diff --git a/clang/test/OpenMP/atomic_capture_codegen.cpp b/clang/test/OpenMP/atomic_capture_codegen.cpp index 95509df9ba935..a5eca0197a8a0 100644 --- a/clang/test/OpenMP/atomic_capture_codegen.cpp +++ b/clang/test/OpenMP/atomic_capture_codegen.cpp @@ -1,19 +1,19 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=CHECK --check-prefix=CHECK-50 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix=CHECK --check-prefix=CHECK-50 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -fopenmp-version=51 -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=51 -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER @@ -91,268 +91,256 @@ float2 float2x; register int rix __asm__("esp"); int main(void) { -// CHECK: [[PREV:%.+]] = atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 -// CHECK: store i8 [[PREV]], i8* @{{.+}}, +// CHECK: [[PREV:%.+]] = atomicrmw add ptr @{{.+}}, i8 1 monotonic, align 1 +// CHECK: store i8 [[PREV]], ptr @{{.+}}, #pragma omp atomic capture bv = bx++; -// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 +// CHECK: atomicrmw add ptr @{{.+}}, i8 1 monotonic, align 1 // CHECK: add nsw i32 %{{.+}}, 1 -// CHECK: store i8 %{{.+}}, i8* @{{.+}}, +// CHECK: store i8 %{{.+}}, ptr @{{.+}}, #pragma omp atomic capture cv = ++cx; -// CHECK: [[PREV:%.+]] = atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1 -// CHECK: store i8 [[PREV]], i8* @{{.+}}, +// CHECK: [[PREV:%.+]] = atomicrmw sub ptr @{{.+}}, i8 1 monotonic, align 1 +// CHECK: store i8 [[PREV]], ptr @{{.+}}, #pragma omp atomic capture ucv = ucx--; -// CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2 +// CHECK: atomicrmw sub ptr @{{.+}}, i16 1 monotonic, align 2 // CHECK: sub nsw i32 %{{.+}}, 1 -// CHECK: store i16 %{{.+}}, i16* @{{.+}}, +// CHECK: store i16 %{{.+}}, ptr @{{.+}}, #pragma omp atomic capture sv = --sx; -// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[USV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 -// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 +// CHECK: [[X:%.+]] = load atomic i16, ptr [[X_ADDR:@.+]] monotonic, align 2 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] // CHECK: [[DESIRED_CALC:%.+]] = trunc i32 [[ADD]] to i16 -// CHECK: store i16 [[DESIRED_CALC]], i16* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 +// CHECK: store i16 [[DESIRED_CALC]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i16, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i16 [[DESIRED_CALC]], i16* @{{.+}}, +// CHECK: store i16 [[DESIRED_CALC]], ptr @{{.+}}, #pragma omp atomic capture sv = usx += usv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED_CALC:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED_CALC]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, +// CHECK: store i32 [[DESIRED_CALC]], ptr @{{.+}}, #pragma omp atomic capture uiv = ix *= iv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[PREV:%.+]] = atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 -// CHECK: store i32 [[PREV]], i32* @{{.+}}, +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[PREV:%.+]] = atomicrmw sub ptr @{{.+}}, i32 [[EXPR]] monotonic, align 4 +// CHECK: store i32 [[PREV]], ptr @{{.+}}, #pragma omp atomic capture {iv = uix; uix -= uiv;} -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED_CALC:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED_CALC]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, +// CHECK: store i32 [[DESIRED_CALC]], ptr @{{.+}}, #pragma omp atomic capture {ix <<= iv; uiv = ix;} -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED_CALC:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED_CALC]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED_CALC]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[DESIRED_CALC]], i32* @{{.+}}, +// CHECK: store i32 [[DESIRED_CALC]], ptr @{{.+}}, #pragma omp atomic capture iv = uix >>= uiv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, +// CHECK: store i64 [[EXPECTED]], ptr @{{.+}}, #pragma omp atomic capture {ulv = lx; lx /= lv;} -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* @{{.+}}, +// CHECK: store i64 [[DESIRED]], ptr @{{.+}}, #pragma omp atomic capture {ulx &= ulv; lv = ulx;} -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[OLD:%.+]] = atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = atomicrmw xor ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 // CHECK: [[DESIRED:%.+]] = xor i64 [[OLD]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* @{{.+}}, +// CHECK: store i64 [[DESIRED]], ptr @{{.+}}, #pragma omp atomic capture ullv = llx ^= llv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[OLD:%.+]] = atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = atomicrmw or ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 // CHECK: [[DESIRED:%.+]] = or i64 [[OLD]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* @{{.+}}, +// CHECK: store i64 [[DESIRED]], ptr @{{.+}}, #pragma omp atomic capture llv = ullx |= ullv; -// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, -// CHECK: [[OLD:%.+]] = atomicrmw fadd float* @{{.+}}, float [[EXPR]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load float, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = atomicrmw fadd ptr @{{.+}}, float [[EXPR]] monotonic, align 4 // CHECK: [[ADD:%.+]] = fadd float [[OLD]], [[EXPR]] // CHECK: [[CAST:%.+]] = fpext float [[ADD]] to double -// CHECK: store double [[CAST]], double* @{{.+}}, +// CHECK: store double [[CAST]], ptr @{{.+}}, #pragma omp atomic capture dv = fx = fx + fv; -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] -// CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] -// CHECK: store double [[SUB]], double* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store double [[SUB]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[CAST:%.+]] = fptrunc double [[OLD]] to float -// CHECK: store float [[CAST]], float* @{{.+}}, +// CHECK: store float [[CAST]], ptr @{{.+}}, #pragma omp atomic capture {fv = dx; dx = dv - dx;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i128, ptr [[X_ADDR:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] -// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]] -// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP:%.+]] +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP1:%.+]] +// CHECK: [[OLD:%.+]] = load x86_fp80, ptr [[TEMP1]] // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] -// CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] -// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 +// CHECK: store x86_fp80 [[MUL]], ptr [[TEMP]] +// CHECK: [[DESIRED:%.+]] = load i128, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[CAST:%.+]] = fptrunc x86_fp80 [[MUL]] to double -// CHECK: store double [[CAST]], double* @{{.+}}, +// CHECK: store double [[CAST]], ptr @{{.+}}, #pragma omp atomic capture {ldx = ldx * ldv; dv = ldx;} -// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR_RE:%.+]] = load i32, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[LD_RE:%.+]] = load i32, i32* [[LD_RE_ADDR]] -// CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[LD_IM:%.+]] = load i32, i32* [[LD_IM_ADDR]] +// CHECK: [[LD_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[LD_RE:%.+]] = load i32, ptr [[LD_RE_ADDR]] +// CHECK: [[LD_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[LD_IM:%.+]] = load i32, ptr [[LD_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] -// CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 [[NEW_RE:%.+]], ptr [[X_RE_ADDR]] +// CHECK: store i32 [[NEW_IM:%.+]], ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = sitofp i32 [[NEW_RE]] to float // CHECK: [[IM_CAST:%.+]] = sitofp i32 [[NEW_IM]] to float -// CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), -// CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), +// CHECK: store float [[RE_CAST]], ptr @{{.+}}, +// CHECK: store float [[IM_CAST]], ptr getelementptr inbounds ({ float, float }, ptr @{{.+}}, i32 0, i32 1), #pragma omp atomic capture cfv = cix = civ / cix; -// CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR_RE:%.+]] = load float, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load float, ptr getelementptr inbounds ({ float, float }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE_OLD:%.+]] = load float, float* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM_OLD:%.+]] = load float, float* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE_OLD:%.+]] = load float, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM_OLD:%.+]] = load float, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store float [[NEW_RE:%.+]], float* [[X_RE_ADDR]] -// CHECK: store float [[NEW_IM:%.+]], float* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store float [[NEW_RE:%.+]], ptr [[X_RE_ADDR]] +// CHECK: store float [[NEW_IM:%.+]], ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = fptosi float [[X_RE_OLD]] to i32 // CHECK: [[IM_CAST:%.+]] = fptosi float [[X_IM_OLD]] to i32 -// CHECK: store i32 [[RE_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), -// CHECK: store i32 [[IM_CAST]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), +// CHECK: store i32 [[RE_CAST]], ptr @{{.+}}, +// CHECK: store i32 [[IM_CAST]], ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1), #pragma omp atomic capture {civ = cfx; cfx = cfv + cfx;} -// CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 5) +// CHECK: [[EXPR_RE:%.+]] = load double, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load double, ptr getelementptr inbounds ({ double, double }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 16, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 5) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load double, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load double, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store double [[NEW_RE:%.+]], double* [[X_RE_ADDR]] -// CHECK: store double [[NEW_IM:%.+]], double* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 5, i32 noundef 5) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store double [[NEW_RE:%.+]], ptr [[X_RE_ADDR]] +// CHECK: store double [[NEW_IM:%.+]], ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 5, i32 noundef 5) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[RE_CAST:%.+]] = fptrunc double [[NEW_RE]] to float // CHECK: [[IM_CAST:%.+]] = fptrunc double [[NEW_IM]] to float -// CHECK: store float [[RE_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0), -// CHECK: store float [[IM_CAST]], float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1), +// CHECK: store float [[RE_CAST]], ptr @{{.+}}, +// CHECK: store float [[IM_CAST]], ptr getelementptr inbounds ({ float, float }, ptr @{{.+}}, i32 0, i32 1), // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture seq_cst {cdx = cdx - cdv; cfv = cdx;} -// CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} +// CHECK: [[BV:%.+]] = load i8, ptr @{{.+}} // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 -// CHECK: [[OLD:%.+]] = atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[OLD:%.+]] = atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 // CHECK: [[DESIRED:%.+]] = and i64 [[OLD]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* @{{.+}}, +// CHECK: store i64 [[DESIRED]], ptr @{{.+}}, #pragma omp atomic capture ulv = ulx = ulx & bv; -// CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 +// CHECK: [[CV:%.+]] = load i8, ptr @{{.+}}, align 1 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 -// CHECK: [[X:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1 +// CHECK: [[X:%.+]] = load atomic i8, ptr [[BX_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -361,194 +349,184 @@ int main(void) { // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 // CHECK: [[NEW:%.+]] = zext i1 [[CAST]] to i8 -// CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 +// CHECK: store i8 [[NEW]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 // CHECK: [[OLD:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[OLD_I8:%.+]] = zext i1 [[OLD_BOOL]] to i8 -// CHECK: store i8 [[OLD_I8]], i8* @{{.+}}, +// CHECK: store i8 [[OLD_I8]], ptr @{{.+}}, #pragma omp atomic capture {bv = bx; bx = cv & bx;} -// CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, +// CHECK: [[UCV:%.+]] = load i8, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 -// CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1 +// CHECK: [[X:%.+]] = load atomic i8, ptr [[CX_ADDR:@.+]] seq_cst, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW:%.+]] = trunc i32 [[ASHR]] to i8 -// CHECK: store i8 [[NEW]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 +// CHECK: store i8 [[NEW]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i8 [[NEW]], i8* @{{.+}}, +// CHECK: store i8 [[NEW]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture, seq_cst {cx = cx >> ucv; cv = cx;} -// CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[SV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 -// CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8 +// CHECK: [[X:%.+]] = load atomic i64, ptr [[ULX_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] // CHECK: [[NEW:%.+]] = sext i32 [[SHL]] to i64 -// CHECK: store i64 [[NEW]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[NEW]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i64 [[NEW]], i64* @{{.+}}, +// CHECK: store i64 [[NEW]], ptr @{{.+}}, #pragma omp atomic capture ulv = ulx = sv << ulx; -// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[USV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 -// CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8 +// CHECK: [[X:%.+]] = load atomic i64, ptr [[LX_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i64 [[EXPECTED]], i64* @{{.+}}, +// CHECK: store i64 [[EXPECTED]], ptr @{{.+}}, #pragma omp atomic capture {lv = lx; lx = lx % usv;} -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} -// CHECK: [[OLD:%.+]] = atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}} +// CHECK: [[OLD:%.+]] = atomicrmw or ptr @{{.+}}, i32 [[EXPR]] seq_cst, align 4 // CHECK: [[DESIRED:%.+]] = or i32 [[EXPR]], [[OLD]] -// CHECK: store i32 [[DESIRED]], i32* @{{.+}}, +// CHECK: store i32 [[DESIRED]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst, capture {uix = iv | uix; uiv = uix;} -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} -// CHECK: [[OLD:%.+]] = atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}} +// CHECK: [[OLD:%.+]] = atomicrmw and ptr @{{.+}}, i32 [[EXPR]] monotonic, align 4 // CHECK: [[DESIRED:%.+]] = and i32 [[OLD]], [[EXPR]] -// CHECK: store i32 [[DESIRED]], i32* @{{.+}}, +// CHECK: store i32 [[DESIRED]], ptr @{{.+}}, #pragma omp atomic capture iv = ix = ix & uiv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[OLD_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[OLD_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[OLD_RE:%.+]] = load i32, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[OLD_IM:%.+]] = load i32, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] -// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store i32 %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[OLD_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), -// CHECK: store i32 [[OLD_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), +// CHECK: store i32 [[OLD_RE]], ptr @{{.+}}, +// CHECK: store i32 [[OLD_IM]], ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1), #pragma omp atomic capture {civ = cix; cix = lv + cix;} -// CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[ULV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float -// CHECK: [[X:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4 +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] -// CHECK: [[TEMP_I:%.+]] = bitcast float* [[TEMP:%.+]] to i32* // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] -// CHECK: store float [[MUL]], float* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP_I]], -// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store float [[MUL]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X:%.+]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store float [[MUL]], float* @{{.+}}, +// CHECK: store float [[MUL]], ptr @{{.+}}, #pragma omp atomic capture {fx = fx * ulv; fv = fx;} -// CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[LLV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double -// CHECK: [[X:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 +// CHECK: [[X:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] -// CHECK: [[TEMP_I:%.+]] = bitcast double* [[TEMP:%.+]] to i64* // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] -// CHECK: store double [[DIV]], double* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP_I]], -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store double [[DIV]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store double [[DIV]], double* @{{.+}}, +// CHECK: store double [[DIV]], ptr @{{.+}}, #pragma omp atomic capture dv = dx /= llv; -// CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[ULLV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 -// CHECK: [[X:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 +// CHECK: [[X:%.+]] = load atomic i128, ptr [[X_ADDR:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] -// CHECK: [[TEMP_I1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I1]], -// CHECK: [[TEMP_I:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[TEMP_I]], -// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]], +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP1:%.+]], +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP:%.+]], +// CHECK: [[OLD:%.+]] = load x86_fp80, ptr [[TEMP]], // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] -// CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] -// CHECK: [[DESIRED:%.+]] = load i128, i128* [[TEMP_I1]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 +// CHECK: store x86_fp80 [[SUB]], ptr [[TEMP1]] +// CHECK: [[DESIRED:%.+]] = load i128, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 // CHECK: [[OLD_X:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store x86_fp80 [[OLD]], x86_fp80* @{{.+}}, +// CHECK: store x86_fp80 [[OLD]], ptr @{{.+}}, #pragma omp atomic capture {ldv = ldx; ldx -= ullv;} -// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load float, ptr @{{.+}}, +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load i32, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load i32, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 [[NEW_RE:%.+]], i32* [[X_RE_ADDR]] -// CHECK: store i32 [[NEW_IM:%.+]], i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 [[NEW_RE:%.+]], ptr [[X_RE_ADDR]] +// CHECK: store i32 [[NEW_IM:%.+]], ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[NEW_RE]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0), -// CHECK: store i32 [[NEW_IM]], i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1), +// CHECK: store i32 [[NEW_RE]], ptr @{{.+}}, +// CHECK: store i32 [[NEW_IM]], ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1), #pragma omp atomic capture {cix = fv / cix; civ = cix;} -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i16, ptr [[X_ADDR:@.+]] monotonic, align 2 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -556,18 +534,18 @@ int main(void) { // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] // CHECK: [[NEW:%.+]] = fptosi double [[ADD]] to i16 -// CHECK: store i16 [[NEW]], i16* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 +// CHECK: store i16 [[NEW]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i16, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i16 [[NEW]], i16* @{{.+}}, +// CHECK: store i16 [[NEW]], ptr @{{.+}}, #pragma omp atomic capture sv = sx = sx + dv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, -// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}}, +// CHECK: [[XI8:%.+]] = load atomic i8, ptr [[X_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -577,20 +555,20 @@ int main(void) { // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[EXPECTED_I8:%.+]] = zext i1 [[BOOL_EXPECTED]] to i8 -// CHECK: store i8 [[EXPECTED_I8]], i8* @{{.+}}, +// CHECK: store i8 [[EXPECTED_I8]], ptr @{{.+}}, #pragma omp atomic capture {bv = bx; bx = ldv * bx;} -// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), -// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), -// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 +// CHECK: [[EXPR_RE:%.+]] = load i32, ptr [[CIV_ADDR:@.+]], +// CHECK: [[EXPR_IM:%.+]] = load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr [[CIV_ADDR]], i32 0, i32 1), +// CHECK: [[XI8:%.+]] = load atomic i8, ptr [[X_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -602,195 +580,187 @@ int main(void) { // CHECK: icmp ne i32 [[SUB_IM]], 0 // CHECK: [[BOOL_DESIRED:%.+]] = or i1 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[DESIRED_I8:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 -// CHECK: store i8 [[DESIRED_I8]], i8* @{{.+}}, +// CHECK: store i8 [[DESIRED_I8]], ptr @{{.+}}, #pragma omp atomic capture {bx = civ - bx; bv = bx;} -// CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} -// CHECK: load i8, i8* +// CHECK: [[IDX:%.+]] = load i16, ptr @{{.+}} +// CHECK: load i8, ptr // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 -// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16 +// CHECK: [[I128VAL:%.+]] = load atomic i128, ptr [[DEST:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[TEMP_I:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[OLD_I128]], i128* [[TEMP_I]], +// CHECK: store i128 [[OLD_I128]], ptr [[TEMP:%.+]], // CHECK: [[LD:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> -// CHECK: store <4 x i32> [[LD]], <4 x i32>* [[TEMP1:%.+]], -// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP1]] +// CHECK: store <4 x i32> [[LD]], ptr [[TEMP1:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, ptr [[TEMP1]] // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] -// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] +// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, ptr [[TEMP]] // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] -// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] -// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[TEMP_I]], -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 +// CHECK: store <4 x i32> [[NEW_VEC_VAL]], ptr [[TEMP]] +// CHECK: [[NEW_I128:%.+]] = load i128, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 // CHECK: [[FAILED_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[OR]], i32* @{{.+}}, +// CHECK: store i32 [[OR]], ptr @{{.+}}, #pragma omp atomic capture {int4x[sv] |= bv; iv = int4x[sv];} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr getelementptr (i8, ptr @{{.+}}, i64 4) monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 // CHECK: [[BF_SET:%.+]] = or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 [[BF_SET]], i32* [[TEMP1]], -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]], -// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 [[BF_SET]], ptr [[TEMP1]], +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]], +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 4), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[CONV]], i32* @{{.+}}, +// CHECK: store i32 [[CONV]], ptr @{{.+}}, #pragma omp atomic capture iv = bfx.a = bfx.a - ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: call void @__atomic_load(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], -// CHECK: store i32 [[OLD]], i32* [[TEMP1:%.+]], -// CHECK: [[OLD:%.+]] = load i32, i32* [[LDTEMP]], -// CHECK: store i32 [[OLD]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: [[OLD:%.+]] = load i32, ptr [[LDTEMP]], +// CHECK: store i32 [[OLD]], ptr [[TEMP1:%.+]], +// CHECK: [[OLD:%.+]] = load i32, ptr [[LDTEMP]], +// CHECK: store i32 [[OLD]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP]], ptr noundef [[TEMP1]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, +// CHECK: store i32 [[A_ASHR]], ptr @{{.+}}, #pragma omp atomic capture {iv = bfx_packed.a; bfx_packed.a *= ldv;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[CONV]], i32* @{{.+}}, +// CHECK: store i32 [[CONV]], ptr @{{.+}}, #pragma omp atomic capture {bfx2.a -= ldv; iv = bfx2.a;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 3) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST_NEW:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST_NEW]], -// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST_NEW:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST_NEW]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST_NEW]], // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST_NEW]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST_NEW]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST_NEW]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST_NEW]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL]], ptr @{{.+}}, #pragma omp atomic capture iv = bfx2_packed.a = ldv / bfx2_packed.a; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 -// CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[A_ASHR]], i32* @{{.+}}, +// CHECK: store i32 [[A_ASHR]], ptr @{{.+}}, #pragma omp atomic capture {iv = bfx3.a; bfx3.a /= ldv;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* -// CHECK: [[BITCAST:%.+]] = bitcast i24* [[LDTEMP]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: call void @__atomic_load(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], -// CHECK: store i24 [[OLD]], i24* [[BITCAST2:%.+]], -// CHECK: [[OLD:%.+]] = load i24, i24* [[LDTEMP]], -// CHECK: store i24 [[OLD]], i24* [[BITCAST1:%.+]], -// CHECK: [[A_LD:%.+]] = load i24, i24* [[BITCAST1]], +// CHECK: [[OLD:%.+]] = load i24, ptr [[LDTEMP]], +// CHECK: store i24 [[OLD]], ptr [[BITCAST2:%.+]], +// CHECK: [[OLD:%.+]] = load i24, ptr [[LDTEMP]], +// CHECK: store i24 [[OLD]], ptr [[BITCAST1:%.+]], +// CHECK: [[A_LD:%.+]] = load i24, ptr [[BITCAST1]], // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 @@ -798,28 +768,26 @@ int main(void) { // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 -// CHECK: [[BF_LD:%.+]] = load i24, i24* [[BITCAST2]], +// CHECK: [[BF_LD:%.+]] = load i24, ptr [[BITCAST2]], // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i24 %{{.+}}, i24* [[BITCAST2]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[BITCAST2]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i24 %{{.+}}, ptr [[BITCAST2]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[LDTEMP]], ptr noundef [[BITCAST2]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL]], ptr @{{.+}}, #pragma omp atomic capture {bfx3_packed.a += ldv; iv = bfx3_packed.a;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i64, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 @@ -827,31 +795,29 @@ int main(void) { // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 -// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i64, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 %{{.+}}, i64* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 +// CHECK: store i64 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL]], ptr @{{.+}}, #pragma omp atomic relaxed capture iv = bfx4.a = bfx4.a * ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], -// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST1:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 @@ -859,120 +825,117 @@ int main(void) { // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST1]], // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store i32 [[CAST]], i32* @{{.+}}, +// CHECK: store i32 [[CAST]], ptr @{{.+}}, #pragma omp atomic capture relaxed {iv = bfx4_packed.a; bfx4_packed.a -= ldv;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i64, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 -// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i64, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 [[VAL]], i64* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8 +// CHECK: store i64 [[VAL]], ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] release monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[NEW_VAL:%.+]] = trunc i64 [[CONV]] to i32 -// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture release {bfx4.b /= ldv; iv = bfx4.b;} -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) acquire, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) acquire, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], -// CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST1:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST1]], // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] acquire acquire, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: [[NEW_VAL_I32:%.+]] = trunc i64 [[NEW_VAL]] to i32 -// CHECK: store i32 [[NEW_VAL_I32]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL_I32]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture acquire iv = bfx4_packed.b += ldv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float -// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) acquire, align 8 +// CHECK: [[I64VAL:%.+]] = load atomic i64, ptr [[DEST:@.+]] acquire, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP1:%.+]] to i64* -// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], +// CHECK: store i64 [[OLD_I64]], ptr [[LDTEMP1:%.+]], // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> -// CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], -// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] +// CHECK: store <2 x float> [[OLD_VEC_VAL]], ptr [[LDTEMP:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, ptr [[LDTEMP]] // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] -// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP1]], +// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, ptr [[LDTEMP1]], // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 -// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP1]] -// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] acq_rel acquire, align 8 +// CHECK: store <2 x float> [[NEW_VEC_VAL]], ptr [[LDTEMP1]] +// CHECK: [[NEW_I64:%.+]] = load i64, ptr [[LDTEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i64 [[OLD_I64]], i64 [[NEW_I64]] acq_rel acquire, align 8 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] -// CHECK: store float [[X]], float* @{{.+}}, +// CHECK: store float [[X]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture acq_rel {fv = float2x.x; float2x.x = ulv - float2x.x;} -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] // CHECK: [[NEW_VAL:%.+]] = fptosi double [[DIV]] to i32 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[NEW_VAL]]) -// CHECK: store i32 [[NEW_VAL]], i32* @{{.+}}, +// CHECK: store i32 [[NEW_VAL]], ptr @{{.+}}, // CHECK-50: call{{.*}} @__kmpc_flush( #pragma omp atomic capture seq_cst {rix = dv / rix; iv = rix;} -// CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg i32* @{{.+}}, i32 5 monotonic, align 4 +// CHECK: [[OLD_VAL:%.+]] = atomicrmw xchg ptr @{{.+}}, i32 5 monotonic, align 4 // CHECK: call void @llvm.write_register.i32([[REG]], i32 [[OLD_VAL]]) #pragma omp atomic capture {rix = ix; ix = 5;} diff --git a/clang/test/OpenMP/atomic_read_codegen.c b/clang/test/OpenMP/atomic_read_codegen.c index a6608eade1433..b60e1686d4dab 100644 --- a/clang/test/OpenMP/atomic_read_codegen.c +++ b/clang/test/OpenMP/atomic_read_codegen.c @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics // REQUIRES: x86-registered-target @@ -84,64 +84,63 @@ register int rix __asm__("esp"); // CHECK-LABEL: @main( int main(void) { -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store i8 #pragma omp atomic read bv = bx; -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store i8 #pragma omp atomic read cv = cx; -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store i8 #pragma omp atomic read ucv = ucx; -// CHECK: load atomic i16, i16* {{.*}} monotonic, align 2 +// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2 // CHECK: store i16 #pragma omp atomic read sv = sx; -// CHECK: load atomic i16, i16* {{.*}} monotonic, align 2 +// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2 // CHECK: store i16 #pragma omp atomic read usv = usx; -// CHECK: load atomic i32, i32* {{.*}} monotonic, align 4 +// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4 // CHECK: store i32 #pragma omp atomic read iv = ix; -// CHECK: load atomic i32, i32* {{.*}} monotonic, align 4 +// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4 // CHECK: store i32 #pragma omp atomic read uiv = uix; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i64 #pragma omp atomic read lv = lx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i64 #pragma omp atomic read ulv = ulx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i64 #pragma omp atomic read llv = llx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i64 #pragma omp atomic read ullv = ullx; -// CHECK: load atomic i32, i32* bitcast (float* {{.*}} monotonic, align 4 +// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4 // CHECK: bitcast i32 {{.*}} to float // CHECK: store float #pragma omp atomic read fv = fx; -// CHECK: load atomic i64, i64* bitcast (double* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: bitcast i64 {{.*}} to double // CHECK: store double #pragma omp atomic read dv = dx; -// CHECK: [[LD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* {{.*}} monotonic, align 16 -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i128* -// CHECK: store i128 [[LD]], i128* [[BITCAST]] -// CHECK: [[LD:%.+]] = load x86_fp80, x86_fp80* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i128, ptr {{.*}} monotonic, align 16 +// CHECK: store i128 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load x86_fp80, ptr [[LDTEMP]] // CHECK: store x86_fp80 [[LD]] #pragma omp atomic read ldv = ldx; @@ -161,33 +160,33 @@ int main(void) { // CHECK: store double #pragma omp atomic seq_cst read cdv = cdx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i8 #pragma omp atomic read bv = ulx; -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store i8 #pragma omp atomic read cv = bx; -// CHECK: load atomic i8, i8* {{.*}} seq_cst, align 1 +// CHECK: load atomic i8, ptr {{.*}} seq_cst, align 1 // CHECK: call{{.*}} @__kmpc_flush( // CHECK: store i8 #pragma omp atomic read seq_cst ucv = cx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i16 #pragma omp atomic read sv = ulx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i16 #pragma omp atomic read usv = lx; -// CHECK: load atomic i32, i32* {{.*}} seq_cst, align 4 +// CHECK: load atomic i32, ptr {{.*}} seq_cst, align 4 // CHECK: call{{.*}} @__kmpc_flush( // CHECK: store i32 #pragma omp atomic seq_cst, read iv = uix; -// CHECK: load atomic i32, i32* {{.*}} monotonic, align 4 +// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4 // CHECK: store i32 #pragma omp atomic read uiv = ix; @@ -195,15 +194,15 @@ int main(void) { // CHECK: store i64 #pragma omp atomic read lv = cix; -// CHECK: load atomic i32, i32* {{.*}} monotonic, align 4 +// CHECK: load atomic i32, ptr {{.*}} monotonic, align 4 // CHECK: store i64 #pragma omp atomic read ulv = fx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store i64 #pragma omp atomic read llv = dx; -// CHECK: load atomic i128, i128* {{.*}} monotonic, align 16 +// CHECK: load atomic i128, ptr {{.*}} monotonic, align 16 // CHECK: store i64 #pragma omp atomic read ullv = ldx; @@ -211,123 +210,119 @@ int main(void) { // CHECK: store float #pragma omp atomic read fv = cix; -// CHECK: load atomic i16, i16* {{.*}} monotonic, align 2 +// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2 // CHECK: store double #pragma omp atomic read dv = sx; -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bx; -// CHECK: load atomic i8, i8* {{.*}} monotonic, align 1 +// CHECK: load atomic i8, ptr {{.*}} monotonic, align 1 // CHECK: store i32 // CHECK: store i32 #pragma omp atomic read civ = bx; -// CHECK: load atomic i16, i16* {{.*}} monotonic, align 2 +// CHECK: load atomic i16, ptr {{.*}} monotonic, align 2 // CHECK: store float // CHECK: store float #pragma omp atomic read cfv = usx; -// CHECK: load atomic i64, i64* {{.*}} monotonic, align 8 +// CHECK: load atomic i64, ptr {{.*}} monotonic, align 8 // CHECK: store double // CHECK: store double #pragma omp atomic read cdv = llx; -// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* @{{.+}} to i128*) monotonic, align 16 -// CHECK: [[I128PTR:%.+]] = bitcast <4 x i32>* [[LDTEMP:%.+]] to i128* -// CHECK: store i128 [[I128VAL]], i128* [[I128PTR]] -// CHECK: [[LD:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]] +// CHECK: [[I128VAL:%.+]] = load atomic i128, ptr @{{.+}} monotonic, align 16 +// CHECK: store i128 [[I128VAL]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load <4 x i32>, ptr [[LDTEMP]] // CHECK: extractelement <4 x i32> [[LD]] // CHECK: store i8 #pragma omp atomic read bv = int4x[0]; -// CHECK: [[LD:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%{{.+}}* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 -// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i32, ptr getelementptr (i8, ptr @{{.+}}, i64 4) monotonic, align 4 +// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1 // CHECK: ashr i32 [[SHL]], 1 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx.a; -// CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @bfx_packed to i8*), i64 4), i8* noundef [[LDTEMP_VOID_PTR]], i32 noundef 0) -// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]] +// CHECK: call void @__atomic_load(i64 noundef 4, ptr noundef getelementptr (i8, ptr @bfx_packed, i64 4), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) +// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 1 // CHECK: ashr i32 [[SHL]], 1 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx_packed.a; -// CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @bfx2, i32 0, i32 0) monotonic, align 4 -// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i32, ptr @bfx2 monotonic, align 4 +// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]] // CHECK: ashr i32 [[LD]], 31 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx2.a; -// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @bfx2_packed to i8*), i64 3) monotonic, align 1 -// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @bfx2_packed, i64 3) monotonic, align 1 +// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]] // CHECK: ashr i8 [[LD]], 7 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx2_packed.a; -// CHECK: [[LD:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @bfx3, i32 0, i32 0) monotonic, align 4 -// CHECK: store i32 [[LD]], i32* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i32, i32* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i32, ptr @bfx3 monotonic, align 4 +// CHECK: store i32 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i32, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i32 [[LD]], 7 // CHECK: ashr i32 [[SHL]], 18 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx3.a; -// CHECK: [[LDTEMP_VOID_PTR:%.+]] = bitcast i24* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @bfx3_packed to i8*), i64 1), i8* noundef [[LDTEMP_VOID_PTR]], i32 noundef 0) -// CHECK: [[LD:%.+]] = load i24, i24* [[LDTEMP]] +// CHECK: call void @__atomic_load(i64 noundef 3, ptr noundef getelementptr (i8, ptr @bfx3_packed, i64 1), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) +// CHECK: [[LD:%.+]] = load i24, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i24 [[LD]], 7 // CHECK: [[ASHR:%.+]] = ashr i24 [[SHL]], 10 // CHECK: sext i24 [[ASHR]] to i32 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx3_packed.a; -// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic, align 8 -// CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i64, ptr @bfx4 monotonic, align 8 +// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i64, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i64 [[LD]], 47 // CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 63 // CHECK: trunc i64 [[ASHR]] to i32 // CHECK: store x86_fp80 #pragma omp atomic read ldv = bfx4.a; -// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) monotonic, align 1 -// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @bfx4_packed, i64 2) monotonic, align 1 +// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i8 [[LD]], 7 // CHECK: [[ASHR:%.+]] = ashr i8 [[SHL]], 7 // CHECK: sext i8 [[ASHR]] to i32 // CHECK: store x86_fp80 #pragma omp atomic relaxed read ldv = bfx4_packed.a; -// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @bfx4 to i64*) monotonic, align 8 -// CHECK: store i64 [[LD]], i64* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i64, i64* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i64, ptr @bfx4 monotonic, align 8 +// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i64, ptr [[LDTEMP]] // CHECK: [[SHL:%.+]] = shl i64 [[LD]], 40 // CHECK: [[ASHR:%.+]] = ashr i64 [[SHL]], 57 // CHECK: store x86_fp80 #pragma omp atomic read relaxed ldv = bfx4.b; -// CHECK: [[LD:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @bfx4_packed, i32 0, i32 0, i64 2) acquire, align 1 -// CHECK: store i8 [[LD]], i8* [[LDTEMP:%.+]] -// CHECK: [[LD:%.+]] = load i8, i8* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @bfx4_packed, i64 2) acquire, align 1 +// CHECK: store i8 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load i8, ptr [[LDTEMP]] // CHECK: [[ASHR:%.+]] = ashr i8 [[LD]], 1 // CHECK: sext i8 [[ASHR]] to i64 // CHECK: call{{.*}} @__kmpc_flush( // CHECK: store x86_fp80 #pragma omp atomic read acquire ldv = bfx4_packed.b; -// CHECK: [[LD:%.+]] = load atomic i64, i64* bitcast (<2 x float>* @{{.+}} to i64*) monotonic, align 8 -// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP:%.+]] to i64* -// CHECK: store i64 [[LD]], i64* [[BITCAST]] -// CHECK: [[LD:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] +// CHECK: [[LD:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 +// CHECK: store i64 [[LD]], ptr [[LDTEMP:%.+]] +// CHECK: [[LD:%.+]] = load <2 x float>, ptr [[LDTEMP]] // CHECK: extractelement <2 x float> [[LD]] // CHECK: store i64 #pragma omp atomic read diff --git a/clang/test/OpenMP/atomic_update_codegen.cpp b/clang/test/OpenMP/atomic_update_codegen.cpp index 4cc301bee337d..31160b4176469 100644 --- a/clang/test/OpenMP/atomic_update_codegen.cpp +++ b/clang/test/OpenMP/atomic_update_codegen.cpp @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER @@ -82,232 +82,220 @@ float2 float2x; register int rix __asm__("esp"); int main(void) { -// CHECK: atomicrmw fadd double* @{{.+}}, double 1.000000e+00 monotonic, align 8 +// CHECK: atomicrmw fadd ptr @{{.+}}, double 1.000000e+00 monotonic, align 8 #pragma omp atomic ++dv; -// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 +// CHECK: atomicrmw add ptr @{{.+}}, i8 1 monotonic, align 1 #pragma omp atomic bx++; -// CHECK: atomicrmw add i8* @{{.+}}, i8 1 monotonic, align 1 +// CHECK: atomicrmw add ptr @{{.+}}, i8 1 monotonic, align 1 #pragma omp atomic update ++cx; -// CHECK: atomicrmw sub i8* @{{.+}}, i8 1 monotonic, align 1 +// CHECK: atomicrmw sub ptr @{{.+}}, i8 1 monotonic, align 1 #pragma omp atomic ucx--; -// CHECK: atomicrmw sub i16* @{{.+}}, i16 1 monotonic, align 2 +// CHECK: atomicrmw sub ptr @{{.+}}, i16 1 monotonic, align 2 #pragma omp atomic update --sx; -// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[USV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i32 -// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 +// CHECK: [[X:%.+]] = load atomic i16, ptr [[X_ADDR:@.+]] monotonic, align 2 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[CONV:%.+]] = zext i16 [[EXPECTED]] to i32 // CHECK: [[ADD:%.+]] = add nsw i32 [[CONV]], [[EXPR]] // CHECK: [[DESIRED:%.+]] = trunc i32 [[ADD]] to i16 -// CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 +// CHECK: store i16 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i16, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic usx += usv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = mul nsw i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update ix *= iv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: atomicrmw sub i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: atomicrmw sub ptr @{{.+}}, i32 [[EXPR]] monotonic, align 4 #pragma omp atomic uix -= uiv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = shl i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update ix <<= iv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i32, i32* [[X_ADDR:@.+]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = lshr i32 [[EXPECTED]], [[EXPR]] -// CHECK: store i32 [[DESIRED]], i32* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i32* [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store i32 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[OLD_X]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic uix >>= uiv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i64, i64* [[X_ADDR:@.+]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = sdiv i64 [[EXPECTED]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update lx /= lv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 #pragma omp atomic ulx &= ulv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: atomicrmw xor i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: atomicrmw xor ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 #pragma omp atomic update llx ^= llv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: atomicrmw or i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: atomicrmw or ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 #pragma omp atomic ullx |= ullv; -// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, -// CHECK: atomicrmw fadd float* @{{.+}}, float [[EXPR]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load float, ptr @{{.+}}, +// CHECK: atomicrmw fadd ptr @{{.+}}, float [[EXPR]] monotonic, align 4 #pragma omp atomic update fx = fx + fv; -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, -// CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double // CHECK: [[SUB:%.+]] = fsub double [[EXPR]], [[OLD]] -// CHECK: store double [[SUB]], double* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store double [[SUB]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic dx = dv - dx; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, -// CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}}, +// CHECK: [[OLD:%.+]] = load atomic i128, ptr [[X_ADDR:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]], -// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST1]], -// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP1]] +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP:%.+]], +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP1:%.+]], +// CHECK: [[OLD:%.+]] = load x86_fp80, ptr [[TEMP1]] // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[OLD]], [[EXPR]] -// CHECK: store x86_fp80 [[MUL]], x86_fp80* [[TEMP]] -// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 +// CHECK: store x86_fp80 [[MUL]], ptr [[TEMP]] +// CHECK: [[DESIRED:%.+]] = load i128, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update ldx = ldx * ldv; -// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR_RE:%.+]] = load i32, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load i32, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load i32, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] -// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store i32 %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic cix = civ / cix; -// CHECK: [[EXPR_RE:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR_RE:%.+]] = load float, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load float, ptr getelementptr inbounds ({ float, float }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load float, float* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load float, float* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load float, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load float, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store float %{{.+}}, float* [[X_RE_ADDR]] -// CHECK: store float %{{.+}}, float* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { float, float }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { float, float }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ float, float }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { float, float }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store float %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store float %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update cfx = cfv + cfx; -// CHECK: [[EXPR_RE:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) -// CHECK: [[EXPR_IM:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 1) -// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 5) +// CHECK: [[EXPR_RE:%.+]] = load double, ptr @{{.+}} +// CHECK: [[EXPR_IM:%.+]] = load double, ptr getelementptr inbounds ({ double, double }, ptr @{{.+}}, i32 0, i32 1) +// CHECK: call void @__atomic_load(i64 noundef 16, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 5) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load double, double* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load double, double* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load double, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load double, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store double %{{.+}}, double* [[X_RE_ADDR]] -// CHECK: store double %{{.+}}, double* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { double, double }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { double, double }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, i8* noundef bitcast ({ double, double }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 5, i32 noundef 5) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { double, double }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store double %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store double %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 16, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 5, i32 noundef 5) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst cdx = cdx - cdv; -// CHECK: [[BV:%.+]] = load i8, i8* @{{.+}} +// CHECK: [[BV:%.+]] = load i8, ptr @{{.+}} // CHECK: [[BOOL:%.+]] = trunc i8 [[BV]] to i1 // CHECK: [[EXPR:%.+]] = zext i1 [[BOOL]] to i64 -// CHECK: atomicrmw and i64* @{{.+}}, i64 [[EXPR]] monotonic, align 8 +// CHECK: atomicrmw and ptr @{{.+}}, i64 [[EXPR]] monotonic, align 8 #pragma omp atomic update ulx = ulx & bv; -// CHECK: [[CV:%.+]] = load i8, i8* @{{.+}}, align 1 +// CHECK: [[CV:%.+]] = load i8, ptr @{{.+}}, align 1 // CHECK: [[EXPR:%.+]] = sext i8 [[CV]] to i32 -// CHECK: [[BX:%.+]] = load atomic i8, i8* [[BX_ADDR:@.+]] monotonic, align 1 +// CHECK: [[BX:%.+]] = load atomic i8, ptr [[BX_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[BX]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -316,27 +304,27 @@ int main(void) { // CHECK: [[AND:%.+]] = and i32 [[EXPR]], [[X_RVAL]] // CHECK: [[CAST:%.+]] = icmp ne i32 [[AND]], 0 // CHECK: [[DESIRED:%.+]] = zext i1 [[CAST]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[BX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bx = cv & bx; -// CHECK: [[UCV:%.+]] = load i8, i8* @{{.+}}, +// CHECK: [[UCV:%.+]] = load i8, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i8 [[UCV]] to i32 -// CHECK: [[X:%.+]] = load atomic i8, i8* [[CX_ADDR:@.+]] seq_cst, align 1 +// CHECK: [[X:%.+]] = load atomic i8, ptr [[CX_ADDR:@.+]] seq_cst, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[X_RVAL:%.+]] = sext i8 [[EXPECTED]] to i32 // CHECK: [[ASHR:%.+]] = ashr i32 [[X_RVAL]], [[EXPR]] // CHECK: [[DESIRED:%.+]] = trunc i32 [[ASHR]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i8* [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[CX_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] seq_cst seq_cst, align 1 // CHECK: [[OLD_X:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] @@ -344,149 +332,139 @@ int main(void) { // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic update, seq_cst cx = cx >> ucv; -// CHECK: [[SV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[SV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = sext i16 [[SV]] to i32 -// CHECK: [[X:%.+]] = load atomic i64, i64* [[ULX_ADDR:@.+]] monotonic, align 8 +// CHECK: [[X:%.+]] = load atomic i64, ptr [[ULX_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[X_RVAL:%.+]] = trunc i64 [[EXPECTED]] to i32 // CHECK: [[SHL:%.+]] = shl i32 [[EXPR]], [[X_RVAL]] // CHECK: [[DESIRED:%.+]] = sext i32 [[SHL]] to i64 -// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[ULX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update ulx = sv << ulx; -// CHECK: [[USV:%.+]] = load i16, i16* @{{.+}}, +// CHECK: [[USV:%.+]] = load i16, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = zext i16 [[USV]] to i64 -// CHECK: [[X:%.+]] = load atomic i64, i64* [[LX_ADDR:@.+]] monotonic, align 8 +// CHECK: [[X:%.+]] = load atomic i64, ptr [[LX_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] // CHECK: [[DESIRED:%.+]] = srem i64 [[EXPECTED]], [[EXPR]] -// CHECK: store i64 [[DESIRED]], i64* [[TEMP:%.+]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[TEMP]], -// CHECK: [[RES:%.+]] = cmpxchg i64* [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store i64 [[DESIRED]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[LX_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[OLD_X:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic lx = lx % usv; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} -// CHECK: atomicrmw or i32* @{{.+}}, i32 [[EXPR]] seq_cst, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}} +// CHECK: atomicrmw or ptr @{{.+}}, i32 [[EXPR]] seq_cst, align 4 // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst, update uix = iv | uix; -// CHECK: [[EXPR:%.+]] = load i32, i32* @{{.+}} -// CHECK: atomicrmw and i32* @{{.+}}, i32 [[EXPR]] monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load i32, ptr @{{.+}} +// CHECK: atomicrmw and ptr @{{.+}}, i32 [[EXPR]] monotonic, align 4 #pragma omp atomic ix = ix & uiv; -// CHECK: [[EXPR:%.+]] = load i64, i64* @{{.+}}, -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load i64, ptr @{{.+}}, +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load i32, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load i32, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] -// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store i32 %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update cix = lv + cix; -// CHECK: [[ULV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[ULV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULV]] to float -// CHECK: [[OLD:%.+]] = load atomic i32, i32* bitcast (float* [[X_ADDR:@.+]] to i32*) monotonic, align 4 +// CHECK: [[OLD:%.+]] = load atomic i32, ptr [[X_ADDR:@.+]] monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i32 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast float* [[TEMP:%.+]] to i32* // CHECK: [[OLD:%.+]] = bitcast i32 [[EXPECTED]] to float // CHECK: [[MUL:%.+]] = fmul float [[OLD]], [[EXPR]] -// CHECK: store float [[MUL]], float* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i32, i32* [[BITCAST]], -// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (float* [[X_ADDR]] to i32*), i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 +// CHECK: store float [[MUL]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i32, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i32 [[EXPECTED]], i32 [[DESIRED]] monotonic monotonic, align 4 // CHECK: [[PREV:%.+]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic fx = fx * ulv; -// CHECK: [[LLV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[LLV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = sitofp i64 [[LLV]] to double -// CHECK: [[OLD:%.+]] = load atomic i64, i64* bitcast (double* [[X_ADDR:@.+]] to i64*) monotonic, align 8 +// CHECK: [[OLD:%.+]] = load atomic i64, ptr [[X_ADDR:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i64 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast double* [[TEMP:%.+]] to i64* // CHECK: [[OLD:%.+]] = bitcast i64 [[EXPECTED]] to double // CHECK: [[DIV:%.+]] = fdiv double [[OLD]], [[EXPR]] -// CHECK: store double [[DIV]], double* [[TEMP]], -// CHECK: [[DESIRED:%.+]] = load i64, i64* [[BITCAST]], -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (double* [[X_ADDR]] to i64*), i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 +// CHECK: store double [[DIV]], ptr [[TEMP:%.+]], +// CHECK: [[DESIRED:%.+]] = load i64, ptr [[TEMP]], +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i64 [[EXPECTED]], i64 [[DESIRED]] monotonic monotonic, align 8 // CHECK: [[PREV:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update dx /= llv; -// CHECK: [[ULLV:%.+]] = load i64, i64* @{{.+}}, +// CHECK: [[ULLV:%.+]] = load i64, ptr @{{.+}}, // CHECK: [[EXPR:%.+]] = uitofp i64 [[ULLV]] to x86_fp80 -// CHECK: [[OLD:%.+]] = load atomic i128, i128* bitcast (x86_fp80* [[X_ADDR:@.+]] to i128*) monotonic, align 16 +// CHECK: [[OLD:%.+]] = load atomic i128, ptr [[X_ADDR:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i128 [ [[OLD]], %{{.+}} ], [ [[PREV:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast x86_fp80* [[TEMP1:%.+]] to i128* -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[EXPECTED]], i128* [[BITCAST]] -// CHECK: [[OLD:%.+]] = load x86_fp80, x86_fp80* [[TEMP]] +// CHECK: store i128 [[EXPECTED]], ptr [[TEMP1:%.+]] +// CHECK: [[OLD:%.+]] = load x86_fp80, ptr [[TEMP:%.+]] // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[OLD]], [[EXPR]] -// CHECK: store x86_fp80 [[SUB]], x86_fp80* [[TEMP1]] -// CHECK: [[DESIRED:%.+]] = load i128, i128* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (x86_fp80* [[X_ADDR]] to i128*), i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 +// CHECK: store x86_fp80 [[SUB]], ptr [[TEMP1]] +// CHECK: [[DESIRED:%.+]] = load i128, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i128 [[EXPECTED]], i128 [[DESIRED]] monotonic monotonic, align 16 // CHECK: [[PREV:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic ldx -= ullv; -// CHECK: [[EXPR:%.+]] = load float, float* @{{.+}}, -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR:@.+]] to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load float, ptr @{{.+}}, +// CHECK: call void @__atomic_load(i64 noundef 8, ptr noundef [[X_ADDR:@.+]], ptr noundef [[EXPECTED_ADDR:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 0 -// CHECK: [[X_RE:%.+]] = load i32, i32* [[X_RE_ADDR]] -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[EXPECTED_ADDR]], i32 0, i32 1 -// CHECK: [[X_IM:%.+]] = load i32, i32* [[X_IM_ADDR]] +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 0 +// CHECK: [[X_RE:%.+]] = load i32, ptr [[X_RE_ADDR]] +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[EXPECTED_ADDR]], i32 0, i32 1 +// CHECK: [[X_IM:%.+]] = load i32, ptr [[X_IM_ADDR]] // -// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR:%.+]], i32 0, i32 0 -// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[DESIRED_ADDR]], i32 0, i32 1 -// CHECK: store i32 %{{.+}}, i32* [[X_RE_ADDR]] -// CHECK: store i32 %{{.+}}, i32* [[X_IM_ADDR]] -// CHECK: [[EXPECTED:%.+]] = bitcast { i32, i32 }* [[EXPECTED_ADDR]] to i8* -// CHECK: [[DESIRED:%.+]] = bitcast { i32, i32 }* [[DESIRED_ADDR]] to i8* -// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* [[X_ADDR]] to i8*), i8* noundef [[EXPECTED]], i8* noundef [[DESIRED]], i32 noundef 0, i32 noundef 0) +// CHECK: [[X_RE_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR:%.+]], i32 0, i32 0 +// CHECK: [[X_IM_ADDR:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[DESIRED_ADDR]], i32 0, i32 1 +// CHECK: store i32 %{{.+}}, ptr [[X_RE_ADDR]] +// CHECK: store i32 %{{.+}}, ptr [[X_IM_ADDR]] +// CHECK: [[SUCCESS_FAIL:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[X_ADDR]], ptr noundef [[EXPECTED_ADDR]], ptr noundef [[DESIRED_ADDR]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update cix = fv / cix; -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, -// CHECK: [[X:%.+]] = load atomic i16, i16* [[X_ADDR:@.+]] monotonic, align 2 +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, +// CHECK: [[X:%.+]] = load atomic i16, ptr [[X_ADDR:@.+]] monotonic, align 2 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i16 [ [[X]], %{{.+}} ], [ [[OLD_X:%.+]], %[[CONT]] ] @@ -494,17 +472,17 @@ int main(void) { // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CONV]] to double // CHECK: [[ADD:%.+]] = fadd double [[X_RVAL]], [[EXPR]] // CHECK: [[DESIRED:%.+]] = fptosi double [[ADD]] to i16 -// CHECK: store i16 [[DESIRED]], i16* [[TEMP:%.+]] -// CHECK: [[DESIRED:%.+]] = load i16, i16* [[TEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i16* [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 +// CHECK: store i16 [[DESIRED]], ptr [[TEMP:%.+]] +// CHECK: [[DESIRED:%.+]] = load i16, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i16 [[EXPECTED]], i16 [[DESIRED]] monotonic monotonic, align 2 // CHECK: [[OLD_X]] = extractvalue { i16, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i16, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic sx = sx + dv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}}, -// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}}, +// CHECK: [[XI8:%.+]] = load atomic i8, ptr [[X_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] @@ -514,9 +492,9 @@ int main(void) { // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[EXPR]], [[X_RVAL]] // CHECK: [[BOOL_DESIRED:%.+]] = fcmp une x86_fp80 [[MUL]], 0xK00000000000000000000 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] release monotonic, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]] +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] release monotonic, align 1 // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] @@ -524,9 +502,9 @@ int main(void) { // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic update release bx = ldv * bx; -// CHECK: [[EXPR_RE:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR:@.+]], i32 0, i32 0), -// CHECK: [[EXPR_IM:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* [[CIV_ADDR]], i32 0, i32 1), -// CHECK: [[XI8:%.+]] = load atomic i8, i8* [[X_ADDR:@.+]] monotonic, align 1 +// CHECK: [[EXPR_RE:%.+]] = load i32, ptr [[CIV_ADDR:@.+]], +// CHECK: [[EXPR_IM:%.+]] = load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr [[CIV_ADDR]], i32 0, i32 1), +// CHECK: [[XI8:%.+]] = load atomic i8, ptr [[X_ADDR:@.+]] monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[EXPECTED:%.+]] = phi i8 [ [[XI8]], %{{.+}} ], [ [[OLD_XI8:%.+]], %[[CONT]] ] @@ -538,187 +516,179 @@ int main(void) { // CHECK: icmp ne i32 [[SUB_IM]], 0 // CHECK: [[BOOL_DESIRED:%.+]] = or i1 // CHECK: [[DESIRED:%.+]] = zext i1 [[BOOL_DESIRED]] to i8 -// CHECK: store i8 [[DESIRED]], i8* [[TEMP:%.+]] -// CHECK: [[DESIRED:%.+]] = load i8, i8* [[TEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i8* [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 +// CHECK: store i8 [[DESIRED]], ptr [[TEMP:%.+]] +// CHECK: [[DESIRED:%.+]] = load i8, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[X_ADDR]], i8 [[EXPECTED]], i8 [[DESIRED]] monotonic monotonic, align 1 // CHECK: [[OLD_XI8:%.+]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[SUCCESS_FAIL:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[SUCCESS_FAIL]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bx = civ - bx; -// CHECK: [[IDX:%.+]] = load i16, i16* @{{.+}} -// CHECK: load i8, i8* +// CHECK: [[IDX:%.+]] = load i16, ptr @{{.+}} +// CHECK: load i8, ptr // CHECK: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 -// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16 +// CHECK: [[I128VAL:%.+]] = load atomic i128, ptr [[DEST:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[TEMP:%.+]] to i128* -// CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]], +// CHECK: store i128 [[OLD_I128]], ptr [[TEMP:%.+]], // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i128 [[OLD_I128]] to <4 x i32> -// CHECK: store <4 x i32> [[OLD_VEC_VAL]], <4 x i32>* [[LDTEMP:%.+]], -// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]] +// CHECK: store <4 x i32> [[OLD_VEC_VAL]], ptr [[LDTEMP:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, ptr [[LDTEMP]] // CHECK: [[ITEM:%.+]] = extractelement <4 x i32> [[VEC_VAL]], i16 [[IDX]] // CHECK: [[OR:%.+]] = or i32 [[ITEM]], [[VEC_ITEM_VAL]] -// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[TEMP]] +// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, ptr [[TEMP]] // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[OR]], i16 [[IDX]] -// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[TEMP]] -// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 +// CHECK: store <4 x i32> [[NEW_VEC_VAL]], ptr [[TEMP]] +// CHECK: [[NEW_I128:%.+]] = load i128, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 // CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update int4x[sv] |= bv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr getelementptr (i8, ptr @{{.+}}, i64 4) monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 4), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bfx.a = bfx.a - ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: call void @__atomic_load(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] -// CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: [[PREV_VALUE:%.+]] = load i32, i32* [[LDTEMP]] -// CHECK: store i32 [[PREV_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: [[PREV_VALUE:%.+]] = load i32, ptr [[LDTEMP]] +// CHECK: store i32 [[PREV_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: [[PREV_VALUE:%.+]] = load i32, ptr [[LDTEMP]] +// CHECK: store i32 [[PREV_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 1 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 1 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[MUL]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_VALUE:%.+]] = and i32 [[CONV]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], -2147483648 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP]], ptr noundef [[TEMP1]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update bfx_packed.a *= ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_LD]], 31 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[SUB:%.+]] = fsub x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB]] to i32 -// CHECK: [[NEW_VAL:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[NEW_VAL:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i32 [[CONV]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[NEW_VAL]], 2147483647 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bfx2.a -= ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 3) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], -// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST1:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 7 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i32 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[CAST]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[EXPR]], [[X_RVAL]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST1]], // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update bfx2_packed.a = ldv / bfx2_packed.a; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP1:%.+]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i32, i32* [[TEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i32, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i32 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i32 [[A_SHL]], 18 // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[A_ASHR]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[DIV]] to i32 -// CHECK: [[BF_LD:%.+]] = load i32, i32* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i32, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i32 [[NEW_VAL]], 16383 // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bfx3.a /= ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* -// CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* -// CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: call void @__atomic_load(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[BITCAST:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] -// CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP1:%.+]], -// CHECK: [[PREV_VALUE:%.+]] = load i24, i24* [[LDTEMP]] -// CHECK: store i24 [[PREV_VALUE]], i24* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i24, i24* [[TEMP]], +// CHECK: [[PREV_VALUE:%.+]] = load i24, ptr [[LDTEMP:%.+]], +// CHECK: store i24 [[PREV_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: [[PREV_VALUE:%.+]] = load i24, ptr [[LDTEMP]] +// CHECK: store i24 [[PREV_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i24, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i24 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i24 [[A_SHL]], 10 // CHECK: [[CAST:%.+]] = sext i24 [[A_ASHR]] to i32 @@ -726,27 +696,25 @@ int main(void) { // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i32 // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 -// CHECK: [[BF_LD:%.+]] = load i24, i24* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i24, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 // CHECK: [[BF_CLEAR:%.+]] = and i24 [[BF_LD]], -131065 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i24 %{{.+}}, i24* [[TEMP1]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i24 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[LDTEMP]], ptr noundef [[TEMP1]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update bfx3_packed.a += ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i64, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 47 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 63 // CHECK: [[A_CAST:%.+]] = trunc i64 [[A_ASHR:%.+]] to i32 @@ -754,30 +722,28 @@ int main(void) { // CHECK: [[MUL:%.+]] = fmul x86_fp80 [[X_RVAL]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[MUL]] to i32 // CHECK: [[ZEXT:%.+]] = zext i32 [[NEW_VAL]] to i64 -// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i64, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i64 [[ZEXT]], 1 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -65537 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 %{{.+}}, i64* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 +// CHECK: store i64 %{{.+}}, ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bfx4.a = bfx4.a * ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %{{.+}} ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], -// CHECK: [[BITCAST:%.+]] = bitcast i32* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST1:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_SHL:%.+]] = shl i8 [[A_LD]], 7 // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_SHL:%.+]], 7 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR:%.+]] to i32 @@ -785,101 +751,98 @@ int main(void) { // CHECK: [[SUB: %.+]] = fsub x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[SUB:%.+]] to i32 // CHECK: [[NEW_VAL:%.+]] = trunc i32 [[CONV]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST1]], // CHECK: [[BF_VALUE:%.+]] = and i8 [[NEW_VAL]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], -2 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic relaxed update bfx4_packed.a -= ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP1:%.+]], -// CHECK: store i64 [[OLD_BF_VALUE]], i64* [[TEMP:%.+]], -// CHECK: [[A_LD:%.+]] = load i64, i64* [[TEMP]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP1:%.+]], +// CHECK: store i64 [[OLD_BF_VALUE]], ptr [[TEMP:%.+]], +// CHECK: [[A_LD:%.+]] = load i64, ptr [[TEMP]], // CHECK: [[A_SHL:%.+]] = shl i64 [[A_LD]], 40 // CHECK: [[A_ASHR:%.+]] = ashr i64 [[A_SHL:%.+]], 57 // CHECK: [[CONV:%.+]] = sitofp i64 [[A_ASHR]] to x86_fp80 // CHECK: [[DIV:%.+]] = fdiv x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[CONV:%.+]] = fptosi x86_fp80 [[DIV]] to i64 -// CHECK: [[BF_LD:%.+]] = load i64, i64* [[TEMP1]], +// CHECK: [[BF_LD:%.+]] = load i64, ptr [[TEMP1]], // CHECK: [[BF_AND:%.+]] = and i64 [[CONV]], 127 // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND:%.+]], 17 // CHECK: [[BF_CLEAR:%.+]] = and i64 [[BF_LD]], -16646145 // CHECK: [[VAL:%.+]] = or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 [[VAL]], i64* [[TEMP1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[TEMP1]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 +// CHECK: store i64 [[VAL]], ptr [[TEMP1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[TEMP1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic bfx4.b /= ldv; -// CHECK: [[EXPR:%.+]] = load x86_fp80, x86_fp80* @{{.+}} -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 +// CHECK: [[EXPR:%.+]] = load x86_fp80, ptr @{{.+}} +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST1:%.+]] = bitcast i64* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST1]], -// CHECK: [[BITCAST:%.+]] = bitcast i64* %{{.+}} to i8* -// CHECK: store i8 [[OLD_BF_VALUE]], i8* [[BITCAST]], -// CHECK: [[A_LD:%.+]] = load i8, i8* [[BITCAST]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST1:%.+]], +// CHECK: store i8 [[OLD_BF_VALUE]], ptr [[BITCAST:%.+]], +// CHECK: [[A_LD:%.+]] = load i8, ptr [[BITCAST]], // CHECK: [[A_ASHR:%.+]] = ashr i8 [[A_LD]], 1 // CHECK: [[CAST:%.+]] = sext i8 [[A_ASHR]] to i64 // CHECK: [[CONV:%.+]] = sitofp i64 [[CAST]] to x86_fp80 // CHECK: [[ADD:%.+]] = fadd x86_fp80 [[CONV]], [[EXPR]] // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 [[ADD]] to i64 // CHECK: [[TRUNC:%.+]] = trunc i64 [[NEW_VAL]] to i8 -// CHECK: [[BF_LD:%.+]] = load i8, i8* [[BITCAST1]], +// CHECK: [[BF_LD:%.+]] = load i8, ptr [[BITCAST1]], // CHECK: [[BF_AND:%.+]] = and i8 [[TRUNC]], 127 // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 [[BF_LD]], 1 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[BITCAST1]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[BITCAST1]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[BITCAST1]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[BITCAST1]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic update relaxed bfx4_packed.b += ldv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: [[EXPR:%.+]] = uitofp i64 %{{.+}} to float -// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic, align 8 +// CHECK: [[I64VAL:%.+]] = load atomic i64, ptr [[DEST:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[TEMP:%.+]] to i64* -// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], +// CHECK: store i64 [[OLD_I64]], ptr [[TEMP:%.+]], // CHECK: [[OLD_VEC_VAL:%.+]] = bitcast i64 [[OLD_I64]] to <2 x float> -// CHECK: store <2 x float> [[OLD_VEC_VAL]], <2 x float>* [[LDTEMP:%.+]], -// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] +// CHECK: store <2 x float> [[OLD_VEC_VAL]], ptr [[LDTEMP:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, ptr [[LDTEMP]] // CHECK: [[X:%.+]] = extractelement <2 x float> [[VEC_VAL]], i64 0 // CHECK: [[VEC_ITEM_VAL:%.+]] = fsub float [[EXPR]], [[X]] -// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[TEMP]], +// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, ptr [[TEMP]], // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 -// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[TEMP]] -// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8 +// CHECK: store <2 x float> [[NEW_VEC_VAL]], ptr [[TEMP]] +// CHECK: [[NEW_I64:%.+]] = load i64, ptr [[TEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic relaxed float2x.x = ulv - float2x.x; -// CHECK: [[EXPR:%.+]] = load double, double* @{{.+}}, +// CHECK: [[EXPR:%.+]] = load double, ptr @{{.+}}, // CHECK: [[OLD_VAL:%.+]] = call i32 @llvm.read_register.i32([[REG:metadata ![0-9]+]]) // CHECK: [[X_RVAL:%.+]] = sitofp i32 [[OLD_VAL]] to double // CHECK: [[DIV:%.+]] = fdiv double [[EXPR]], [[X_RVAL]] diff --git a/clang/test/OpenMP/atomic_write_codegen.c b/clang/test/OpenMP/atomic_write_codegen.c index 9e4da013950b5..24dfbf9c0e8fc 100644 --- a/clang/test/OpenMP/atomic_write_codegen.c +++ b/clang/test/OpenMP/atomic_write_codegen.c @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp -x c -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -target-cpu core2 -fopenmp-simd -x c -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c -triple x86_64-apple-darwin10 -target-cpu core2 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics // REQUIRES: x86-registered-target @@ -83,256 +83,243 @@ float2 float2x; register int rix __asm__("esp"); int main(void) { -// CHECK: store atomic i32 1, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @civ, i32 0, i32 1) monotonic, align 4 +// CHECK: store atomic i32 1, ptr getelementptr inbounds ({ i32, i32 }, ptr @civ, i32 0, i32 1) monotonic, align 4 #pragma omp atomic write __imag(civ) = 1; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i8 {{.*}} monotonic, align 1 #pragma omp atomic write bx = bv; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i8 {{.*}} release, align 1 #pragma omp atomic write release cx = cv; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i8 {{.*}} monotonic, align 1 #pragma omp atomic write ucx = ucv; -// CHECK: load i16, i16* +// CHECK: load i16, ptr // CHECK: store atomic i16 {{.*}} monotonic, align 2 #pragma omp atomic write sx = sv; -// CHECK: load i16, i16* +// CHECK: load i16, ptr // CHECK: store atomic i16 {{.*}} monotonic, align 2 #pragma omp atomic write usx = usv; -// CHECK: load i32, i32* +// CHECK: load i32, ptr // CHECK: store atomic i32 {{.*}} monotonic, align 4 #pragma omp atomic write ix = iv; -// CHECK: load i32, i32* +// CHECK: load i32, ptr // CHECK: store atomic i32 {{.*}} monotonic, align 4 #pragma omp atomic write uix = uiv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write lx = lv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write ulx = ulv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write llx = llv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write ullx = ullv; -// CHECK: load float, float* +// CHECK: load float, ptr // CHECK: bitcast float {{.*}} to i32 -// CHECK: store atomic i32 {{.*}}, i32* bitcast (float* {{.*}} monotonic, align 4 +// CHECK: store atomic i32 {{.*}}, ptr {{.*}} monotonic, align 4 #pragma omp atomic write fx = fv; -// CHECK: load double, double* +// CHECK: load double, ptr // CHECK: bitcast double {{.*}} to i64 -// CHECK: store atomic i64 {{.*}}, i64* bitcast (double* {{.*}} monotonic, align 8 +// CHECK: store atomic i64 {{.*}}, ptr {{.*}} monotonic, align 8 #pragma omp atomic write dx = dv; -// CHECK: [[LD:%.+]] = load x86_fp80, x86_fp80* -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i8* -// CHECK: call void @llvm.memset.p0i8.i64(i8* align 16 [[BITCAST]], i8 0, i64 16, i1 false) -// CHECK: store x86_fp80 [[LD]], x86_fp80* [[LDTEMP]] -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[LDTEMP:%.*]] to i128* -// CHECK: [[LD:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: store atomic i128 [[LD]], i128* bitcast (x86_fp80* {{.*}} monotonic, align 16 +// CHECK: [[LD:%.+]] = load x86_fp80, ptr +// CHECK: call void @llvm.memset.p0.i64(ptr align 16 [[LDTEMP:%.*]], i8 0, i64 16, i1 false) +// CHECK: store x86_fp80 [[LD]], ptr [[LDTEMP]] +// CHECK: [[LD:%.+]] = load i128, ptr [[LDTEMP:%.*]] +// CHECK: store atomic i128 [[LD]], ptr {{.*}} monotonic, align 16 #pragma omp atomic write ldx = ldv; -// CHECK: [[REAL_VAL:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.*}}, i32 0, i32 0) -// CHECK: [[IMG_VAL:%.+]] = load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.*}}, i32 0, i32 1) -// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0 -// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1 -// CHECK: store i32 [[REAL_VAL]], i32* [[TEMP_REAL_REF]] -// CHECK: store i32 [[IMG_VAL]], i32* [[TEMP_IMG_REF]] -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[REAL_VAL:%.+]] = load i32, ptr @{{.*}} +// CHECK: [[IMG_VAL:%.+]] = load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.*}}, i32 0, i32 1) +// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP:%.+]], i32 0, i32 0 +// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP]], i32 0, i32 1 +// CHECK: store i32 [[REAL_VAL]], ptr [[TEMP_REAL_REF]] +// CHECK: store i32 [[IMG_VAL]], ptr [[TEMP_IMG_REF]] +// CHECK: call void @__atomic_store(i64 noundef 8, ptr noundef @{{.*}}, ptr noundef [[TEMP]], i32 noundef 0) #pragma omp atomic write cix = civ; -// CHECK: [[REAL_VAL:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 0) -// CHECK: [[IMG_VAL:%.+]] = load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 1) -// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP:%.+]], i32 0, i32 0 -// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { float, float }, { float, float }* [[TEMP]], i32 0, i32 1 -// CHECK: store float [[REAL_VAL]], float* [[TEMP_REAL_REF]] -// CHECK: store float [[IMG_VAL]], float* [[TEMP_IMG_REF]] -// CHECK: [[BITCAST:%.+]] = bitcast { float, float }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ float, float }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[REAL_VAL:%.+]] = load float, ptr @{{.*}} +// CHECK: [[IMG_VAL:%.+]] = load float, ptr getelementptr inbounds ({ float, float }, ptr @{{.*}}, i32 0, i32 1) +// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { float, float }, ptr [[TEMP:%.+]], i32 0, i32 0 +// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { float, float }, ptr [[TEMP]], i32 0, i32 1 +// CHECK: store float [[REAL_VAL]], ptr [[TEMP_REAL_REF]] +// CHECK: store float [[IMG_VAL]], ptr [[TEMP_IMG_REF]] +// CHECK: call void @__atomic_store(i64 noundef 8, ptr noundef @{{.*}}, ptr noundef [[TEMP]], i32 noundef 0) #pragma omp atomic write cfx = cfv; -// CHECK: [[REAL_VAL:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.*}}, i32 0, i32 0) -// CHECK: [[IMG_VAL:%.+]] = load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.*}}, i32 0, i32 1) -// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[TEMP:%.+]], i32 0, i32 0 -// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { double, double }, { double, double }* [[TEMP]], i32 0, i32 1 -// CHECK: store double [[REAL_VAL]], double* [[TEMP_REAL_REF]] -// CHECK: store double [[IMG_VAL]], double* [[TEMP_IMG_REF]] -// CHECK: [[BITCAST:%.+]] = bitcast { double, double }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 noundef 16, i8* noundef bitcast ({ double, double }* @{{.*}} to i8*), i8* noundef [[BITCAST]], i32 noundef 5) +// CHECK: [[REAL_VAL:%.+]] = load double, ptr @{{.*}} +// CHECK: [[IMG_VAL:%.+]] = load double, ptr getelementptr inbounds ({ double, double }, ptr @{{.*}}, i32 0, i32 1) +// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { double, double }, ptr [[TEMP:%.+]], i32 0, i32 0 +// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { double, double }, ptr [[TEMP]], i32 0, i32 1 +// CHECK: store double [[REAL_VAL]], ptr [[TEMP_REAL_REF]] +// CHECK: store double [[IMG_VAL]], ptr [[TEMP_IMG_REF]] +// CHECK: call void @__atomic_store(i64 noundef 16, ptr noundef @{{.*}}, ptr noundef [[TEMP]], i32 noundef 5) // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst write cdx = cdv; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write ulx = bv; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i8 {{.*}} monotonic, align 1 #pragma omp atomic write bx = cv; -// CHECK: load i8, i8* +// CHECK: load i8, ptr // CHECK: store atomic i8 {{.*}} seq_cst, align 1 // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic write, seq_cst cx = ucv; -// CHECK: load i16, i16* +// CHECK: load i16, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write ulx = sv; -// CHECK: load i16, i16* +// CHECK: load i16, ptr // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write lx = usv; -// CHECK: load i32, i32* +// CHECK: load i32, ptr // CHECK: store atomic i32 {{.*}} seq_cst, align 4 // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic seq_cst, write uix = iv; -// CHECK: load i32, i32* +// CHECK: load i32, ptr // CHECK: store atomic i32 {{.*}} monotonic, align 4 #pragma omp atomic write ix = uiv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: [[VAL:%.+]] = trunc i64 %{{.*}} to i32 -// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0 -// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1 -// CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]] -// CHECK: store i32 0, i32* [[TEMP_IMG_REF]] -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP:%.+]], i32 0, i32 0 +// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP]], i32 0, i32 1 +// CHECK: store i32 [[VAL]], ptr [[TEMP_REAL_REF]] +// CHECK: store i32 0, ptr [[TEMP_IMG_REF]] +// CHECK: call void @__atomic_store(i64 noundef 8, ptr noundef @{{.+}}, ptr noundef [[TEMP]], i32 noundef 0) #pragma omp atomic write cix = lv; -// CHECK: load i64, i64* -// CHECK: store atomic i32 %{{.+}}, i32* bitcast (float* {{.*}} monotonic, align 4 +// CHECK: load i64, ptr +// CHECK: store atomic i32 %{{.+}}, ptr {{.*}} monotonic, align 4 #pragma omp atomic write fx = ulv; -// CHECK: load i64, i64* -// CHECK: store atomic i64 %{{.+}}, i64* bitcast (double* {{.*}} monotonic, align 8 +// CHECK: load i64, ptr +// CHECK: store atomic i64 %{{.+}}, ptr {{.*}} monotonic, align 8 #pragma omp atomic write dx = llv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: [[VAL:%.+]] = uitofp i64 %{{.+}} to x86_fp80 -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP:%.+]] to i8* -// CHECK: call void @llvm.memset.p0i8.i64(i8* align 16 [[BITCAST]], i8 0, i64 16, i1 false) -// CHECK: store x86_fp80 [[VAL]], x86_fp80* [[TEMP]] -// CHECK: [[BITCAST:%.+]] = bitcast x86_fp80* [[TEMP]] to i128* -// CHECK: [[VAL:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: store atomic i128 [[VAL]], i128* bitcast (x86_fp80* {{.*}} monotonic, align 16 +// CHECK: call void @llvm.memset.p0.i64(ptr align 16 [[TEMP:%.+]], i8 0, i64 16, i1 false) +// CHECK: store x86_fp80 [[VAL]], ptr [[TEMP]] +// CHECK: [[VAL:%.+]] = load i128, ptr [[TEMP]] +// CHECK: store atomic i128 [[VAL]], ptr {{.*}} monotonic, align 16 #pragma omp atomic write ldx = ullv; -// CHECK: load float, float* +// CHECK: load float, ptr // CHECK: [[VAL:%.+]] = fptosi float %{{.*}} to i32 -// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP:%.+]], i32 0, i32 0 -// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, { i32, i32 }* [[TEMP]], i32 0, i32 1 -// CHECK: store i32 [[VAL]], i32* [[TEMP_REAL_REF]] -// CHECK: store i32 0, i32* [[TEMP_IMG_REF]] -// CHECK: [[BITCAST:%.+]] = bitcast { i32, i32 }* [[TEMP]] to i8* -// CHECK: call void @__atomic_store(i64 noundef 8, i8* noundef bitcast ({ i32, i32 }* @{{.+}} to i8*), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: [[TEMP_REAL_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP:%.+]], i32 0, i32 0 +// CHECK: [[TEMP_IMG_REF:%.+]] = getelementptr inbounds { i32, i32 }, ptr [[TEMP]], i32 0, i32 1 +// CHECK: store i32 [[VAL]], ptr [[TEMP_REAL_REF]] +// CHECK: store i32 0, ptr [[TEMP_IMG_REF]] +// CHECK: call void @__atomic_store(i64 noundef 8, ptr noundef @{{.+}}, ptr noundef [[TEMP]], i32 noundef 0) #pragma omp atomic write cix = fv; -// CHECK: load double, double* +// CHECK: load double, ptr // CHECK: store atomic i16 {{.*}} monotonic, align 2 #pragma omp atomic write sx = dv; -// CHECK: load x86_fp80, x86_fp80* +// CHECK: load x86_fp80, ptr // CHECK: store atomic i8 {{.*}} monotonic, align 1 #pragma omp atomic write bx = ldv; -// CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 0) -// CHECK: load i32, i32* getelementptr inbounds ({ i32, i32 }, { i32, i32 }* @{{.+}}, i32 0, i32 1) +// CHECK: load i32, ptr @{{.+}} +// CHECK: load i32, ptr getelementptr inbounds ({ i32, i32 }, ptr @{{.+}}, i32 0, i32 1) // CHECK: icmp ne i32 %{{.+}}, 0 // CHECK: icmp ne i32 %{{.+}}, 0 // CHECK: or i1 // CHECK: store atomic i8 {{.*}} monotonic, align 1 #pragma omp atomic write bx = civ; -// CHECK: load float, float* getelementptr inbounds ({ float, float }, { float, float }* @{{.*}}, i32 0, i32 0) +// CHECK: load float, ptr @{{.*}} // CHECK: store atomic i16 {{.*}} monotonic, align 2 #pragma omp atomic write usx = cfv; -// CHECK: load double, double* getelementptr inbounds ({ double, double }, { double, double }* @{{.+}}, i32 0, i32 0) +// CHECK: load double, ptr @{{.+}} // CHECK: store atomic i64 {{.*}} monotonic, align 8 #pragma omp atomic write llx = cdv; -// CHECK-DAG: [[IDX:%.+]] = load i16, i16* @{{.+}} -// CHECK-DAG: load i8, i8* +// CHECK-DAG: [[IDX:%.+]] = load i16, ptr @{{.+}} +// CHECK-DAG: load i8, ptr // CHECK-DAG: [[VEC_ITEM_VAL:%.+]] = zext i1 %{{.+}} to i32 -// CHECK: [[I128VAL:%.+]] = load atomic i128, i128* bitcast (<4 x i32>* [[DEST:@.+]] to i128*) monotonic, align 16 +// CHECK: [[I128VAL:%.+]] = load atomic i128, ptr [[DEST:@.+]] monotonic, align 16 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I128:%.+]] = phi i128 [ [[I128VAL]], %{{.+}} ], [ [[FAILED_I128_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast <4 x i32>* [[LDTEMP:%.+]] to i128* -// CHECK: store i128 [[OLD_I128]], i128* [[BITCAST]], -// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, <4 x i32>* [[LDTEMP]] +// CHECK: store i128 [[OLD_I128]], ptr [[LDTEMP:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <4 x i32>, ptr [[LDTEMP]] // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <4 x i32> [[VEC_VAL]], i32 [[VEC_ITEM_VAL]], i16 [[IDX]] -// CHECK: store <4 x i32> [[NEW_VEC_VAL]], <4 x i32>* [[LDTEMP]] -// CHECK: [[NEW_I128:%.+]] = load i128, i128* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i128* bitcast (<4 x i32>* [[DEST]] to i128*), i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 +// CHECK: store <4 x i32> [[NEW_VEC_VAL]], ptr [[LDTEMP]] +// CHECK: [[NEW_I128:%.+]] = load i128, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i128 [[OLD_I128]], i128 [[NEW_I128]] monotonic monotonic, align 16 // CHECK: [[FAILED_I128_OLD_VAL:%.+]] = extractvalue { i128, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i128, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write int4x[sv] = bv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*) monotonic, align 4 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr getelementptr (i8, ptr @{{.+}}, i64 4) monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] // CHECK: [[BF_VALUE:%.+]] = and i32 [[NEW_VAL]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -2147483648 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i32* bitcast (i8* getelementptr (i8, i8* bitcast (%struct.BitFields* @{{.+}} to i8*), i64 4) to i32*), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 4), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[BITCAST:%.+]] = bitcast i32* [[LDTEMP:%.+]] to i8* -// CHECK: call void @__atomic_load(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: call void @__atomic_load(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]], -// CHECK: store i32 [[OLD_BF_VALUE]], i32* [[LDTEMP1:%.+]], -// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP1]], +// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, ptr [[LDTEMP]], +// CHECK: store i32 [[OLD_BF_VALUE]], ptr [[LDTEMP1:%.+]], +// CHECK: [[OLD_BF_VALUE:%.+]] = load i32, ptr [[LDTEMP1]], // CHECK: [[BF_VALUE:%.+]] = and i32 [[NEW_VAL]], 2147483647 // CHECK: [[BF_CLEAR:%.+]] = and i32 [[OLD_BF_VALUE]], -2147483648 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[LDTEMP1]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i32* [[LDTEMP1]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields_packed* @{{.+}} to i8*), i64 4), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i32 %{{.+}}, ptr [[LDTEMP1]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 4, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 4), ptr noundef [[LDTEMP]], ptr noundef [[LDTEMP1]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx_packed.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -340,18 +327,18 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 31 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, 2147483647 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields2, %struct.BitFields2* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx2.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3) monotonic, align 1 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 3) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -360,18 +347,18 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 7 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 127 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr (i8, i8* bitcast (%struct.BitFields2_packed* @{{.+}} to i8*), i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 3), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx2_packed.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0) monotonic, align 4 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i32, ptr @{{.+}} monotonic, align 4 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i32 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -379,40 +366,36 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i32 [[BF_AND]], 11 // CHECK: [[BF_CLEAR:%.+]] = and i32 %{{.+}}, -33552385 // CHECK: or i32 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i32 %{{.+}}, i32* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, i32* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i32* getelementptr inbounds (%struct.BitFields3, %struct.BitFields3* @{{.+}}, i32 0, i32 0), i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 +// CHECK: store i32 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i32, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i32 [[OLD_BF_VALUE]], i32 [[NEW_BF_VALUE]] monotonic monotonic, align 4 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i32, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i32, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx3.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[LDTEMP:%.+]] = bitcast i32* %{{.+}} to i24* -// CHECK: [[BITCAST:%.+]] = bitcast i24* %{{.+}} to i8* -// CHECK: call void @__atomic_load(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST]], i32 noundef 0) +// CHECK: call void @__atomic_load(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[BITCAST:%.+]], i32 noundef 0) // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] -// CHECK: [[OLD_VAL:%.+]] = load i24, i24* %{{.+}}, -// CHECK: store i24 [[OLD_VAL]], i24* [[TEMP:%.+]], +// CHECK: [[OLD_VAL:%.+]] = load i24, ptr %{{.+}}, +// CHECK: store i24 [[OLD_VAL]], ptr [[TEMP:%.+]], // CHECK: [[TRUNC:%.+]] = trunc i32 [[NEW_VAL]] to i24 // CHECK: [[BF_AND:%.+]] = and i24 [[TRUNC]], 16383 // CHECK: [[BF_VALUE:%.+]] = shl i24 [[BF_AND]], 3 // CHECK: [[BF_CLEAR:%.+]] = and i24 %{{.+}}, -131065 // CHECK: or i24 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i24 %{{.+}}, i24* [[TEMP]] -// CHECK: [[BITCAST_TEMP_OLD_BF_ADDR:%.+]] = bitcast i24* [[LDTEMP]] to i8* -// CHECK: [[BITCAST_TEMP_NEW_BF_ADDR:%.+]] = bitcast i24* [[TEMP]] to i8* -// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, i8* noundef getelementptr (i8, i8* bitcast (%struct.BitFields3_packed* @{{.+}} to i8*), i64 1), i8* noundef [[BITCAST_TEMP_OLD_BF_ADDR]], i8* noundef [[BITCAST_TEMP_NEW_BF_ADDR]], i32 noundef 0, i32 noundef 0) +// CHECK: store i24 %{{.+}}, ptr [[TEMP]] +// CHECK: [[FAIL_SUCCESS:%.+]] = call zeroext i1 @__atomic_compare_exchange(i64 noundef 3, ptr noundef getelementptr (i8, ptr @{{.+}}, i64 1), ptr noundef [[LDTEMP:%.+]], ptr noundef [[TEMP]], i32 noundef 0, i32 noundef 0) // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx3_packed.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -421,18 +404,18 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 16 // CHECK: [[BF_CLEAR:%.+]] = and i64 %{{.+}}, -65537 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 %{{.+}}, i64* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 +// CHECK: store i64 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx4.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i32 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -440,18 +423,18 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = and i8 [[TRUNC]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, -2 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx4_packed.a = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i64 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, i64* bitcast (%struct.BitFields4* @{{.+}} to i64*) monotonic, align 8 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i64, ptr @{{.+}} monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i64 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -459,18 +442,18 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i64 [[BF_AND]], 17 // CHECK: [[BF_CLEAR:%.+]] = and i64 %{{.+}}, -16646145 // CHECK: or i64 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i64 %{{.+}}, i64* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, i64* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (%struct.BitFields4* @{{.+}} to i64*), i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 +// CHECK: store i64 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i64, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr @{{.+}}, i64 [[OLD_BF_VALUE]], i64 [[NEW_BF_VALUE]] monotonic monotonic, align 8 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic write bfx4.b = ldv; -// CHECK: load x86_fp80, x86_fp80* @{{.+}} +// CHECK: load x86_fp80, ptr @{{.+}} // CHECK: [[NEW_VAL:%.+]] = fptosi x86_fp80 %{{.+}} to i64 -// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2) monotonic, align 1 +// CHECK: [[PREV_VALUE:%.+]] = load atomic i8, ptr getelementptr (i8, ptr @{{.+}}, i64 2) monotonic, align 1 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_BF_VALUE:%.+]] = phi i8 [ [[PREV_VALUE]], %[[EXIT]] ], [ [[FAILED_OLD_VAL:%.+]], %[[CONT]] ] @@ -479,28 +462,27 @@ int main(void) { // CHECK: [[BF_VALUE:%.+]] = shl i8 [[BF_AND]], 1 // CHECK: [[BF_CLEAR:%.+]] = and i8 %{{.+}}, 1 // CHECK: or i8 [[BF_CLEAR]], [[BF_VALUE]] -// CHECK: store i8 %{{.+}}, i8* [[LDTEMP:%.+]] -// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, i8* [[LDTEMP]] -// CHECK: [[RES:%.+]] = cmpxchg i8* getelementptr inbounds (%struct.BitFields4_packed, %struct.BitFields4_packed* @{{.+}}, i32 0, i32 0, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 +// CHECK: store i8 %{{.+}}, ptr [[LDTEMP:%.+]] +// CHECK: [[NEW_BF_VALUE:%.+]] = load i8, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr getelementptr (i8, ptr @{{.+}}, i64 2), i8 [[OLD_BF_VALUE]], i8 [[NEW_BF_VALUE]] monotonic monotonic, align 1 // CHECK: [[FAILED_OLD_VAL]] = extractvalue { i8, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i8, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] // CHECK: [[EXIT]] #pragma omp atomic relaxed write bfx4_packed.b = ldv; -// CHECK: load i64, i64* +// CHECK: load i64, ptr // CHECK: [[VEC_ITEM_VAL:%.+]] = uitofp i64 %{{.+}} to float -// CHECK: [[I64VAL:%.+]] = load atomic i64, i64* bitcast (<2 x float>* [[DEST:@.+]] to i64*) monotonic, align 8 +// CHECK: [[I64VAL:%.+]] = load atomic i64, ptr [[DEST:@.+]] monotonic, align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]] // CHECK: [[OLD_I64:%.+]] = phi i64 [ [[I64VAL]], %{{.+}} ], [ [[FAILED_I64_OLD_VAL:%.+]], %[[CONT]] ] -// CHECK: [[BITCAST:%.+]] = bitcast <2 x float>* [[LDTEMP:%.+]] to i64* -// CHECK: store i64 [[OLD_I64]], i64* [[BITCAST]], -// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, <2 x float>* [[LDTEMP]] +// CHECK: store i64 [[OLD_I64]], ptr [[LDTEMP:%.+]], +// CHECK: [[VEC_VAL:%.+]] = load <2 x float>, ptr [[LDTEMP]] // CHECK: [[NEW_VEC_VAL:%.+]] = insertelement <2 x float> [[VEC_VAL]], float [[VEC_ITEM_VAL]], i64 0 -// CHECK: store <2 x float> [[NEW_VEC_VAL]], <2 x float>* [[LDTEMP]] -// CHECK: [[NEW_I64:%.+]] = load i64, i64* [[BITCAST]] -// CHECK: [[RES:%.+]] = cmpxchg i64* bitcast (<2 x float>* [[DEST]] to i64*), i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8 +// CHECK: store <2 x float> [[NEW_VEC_VAL]], ptr [[LDTEMP]] +// CHECK: [[NEW_I64:%.+]] = load i64, ptr [[LDTEMP]] +// CHECK: [[RES:%.+]] = cmpxchg ptr [[DEST]], i64 [[OLD_I64]], i64 [[NEW_I64]] monotonic monotonic, align 8 // CHECK: [[FAILED_I64_OLD_VAL:%.+]] = extractvalue { i64, i1 } [[RES]], 0 // CHECK: [[FAIL_SUCCESS:%.+]] = extractvalue { i64, i1 } [[RES]], 1 // CHECK: br i1 [[FAIL_SUCCESS]], label %[[EXIT:.+]], label %[[CONT]] @@ -510,7 +492,7 @@ int main(void) { // CHECK: call i32 @llvm.read_register.i32( // CHECK: sitofp i32 %{{.+}} to double // CHECK: bitcast double %{{.+}} to i64 -// CHECK: store atomic i64 %{{.+}}, i64* bitcast (double* @{{.+}} to i64*) seq_cst, align 8 +// CHECK: store atomic i64 %{{.+}}, ptr @{{.+}} seq_cst, align 8 // CHECK: call{{.*}} @__kmpc_flush( #pragma omp atomic write seq_cst dv = rix; diff --git a/clang/test/OpenMP/depobj_codegen.cpp b/clang/test/OpenMP/depobj_codegen.cpp index 18e832f14adb5..be758f68b2756 100644 --- a/clang/test/OpenMP/depobj_codegen.cpp +++ b/clang/test/OpenMP/depobj_codegen.cpp @@ -1,18 +1,18 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -triple x86_64-apple-darwin10 -x c++ -std=c++11 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fopenmp -triple x86_64-apple-darwin10 -x c++ -std=c++11 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp-simd -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -triple x86_64-apple-darwin10 -x c++ -std=c++11 -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -emit-llvm -o - %s | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -triple x86_64-apple-darwin10 -x c++ -std=c++11 -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER #define HEADER -// CHECK-DAG: [[MAIN_A:@.+]] = internal global i8* null, -// CHECK-DAG: [[TMAIN_A:@.+]] = linkonce_odr global i8* null, +// CHECK-DAG: [[MAIN_A:@.+]] = internal global ptr null, +// CHECK-DAG: [[TMAIN_A:@.+]] = linkonce_odr global ptr null, typedef void *omp_depend_t; @@ -40,62 +40,57 @@ int main(int argc, char **argv) { } // CHECK-LABEL: @main -// CHECK: [[B_ADDR:%.+]] = alloca i8*, +// CHECK: [[B_ADDR:%b]] = alloca ptr, // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num( -// CHECK: [[DEP_ADDR_VOID:%.+]] = call i8* @__kmpc_alloc(i32 [[GTID]], i64 72, i8* null) -// CHECK: [[DEP_ADDR:%.+]] = bitcast i8* [[DEP_ADDR_VOID]] to %struct.kmp_depend_info* -// CHECK: [[SZ_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 2, i64* [[SZ_BASE]], align 8 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 1 -// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 %{{.+}}, i64* [[ADDR]], align 8 -// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 -// CHECK: store i64 4, i64* [[SZ_ADDR]], align 8 -// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 3, i8* [[FLAGS_ADDR]], align 8 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 2 -// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 %{{.+}}, i64* [[ADDR]], align 8 -// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 -// CHECK: store i64 8, i64* [[SZ_ADDR]], align 8 -// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 3, i8* [[FLAGS_ADDR]], align 8 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 1 -// CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* [[BASE_ADDR]] to i8* -// CHECK: store i8* [[DEP]], i8** [[MAIN_A]], align 8 -// CHECK: [[B:%.+]] = load i8*, i8** [[B_ADDR]], align 8 -// CHECK: [[B_BASE:%.+]] = bitcast i8* [[B]] to %struct.kmp_depend_info* -// CHECK: [[B_REF:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[B_BASE]], i{{.+}} -1 -// CHECK: [[B:%.+]] = bitcast %struct.kmp_depend_info* [[B_REF]] to i8* -// CHECK: call void @__kmpc_free(i32 [[GTID]], i8* [[B]], i8* null) -// CHECK: [[B_ADDR_CAST:%.+]] = bitcast i8** [[B_ADDR]] to %struct.kmp_depend_info** -// CHECK: [[B_BASE:%.+]] = load %struct.kmp_depend_info*, %struct.kmp_depend_info** [[B_ADDR_CAST]], align 8 -// CHECK: [[NUMDEPS_BASE:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[B_BASE]], i64 -1 -// CHECK: [[NUMDEPS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[NUMDEPS_BASE]], i{{.+}} 0, i{{.+}} 0 -// CHECK: [[NUMDEPS:%.+]] = load i64, i64* [[NUMDEPS_ADDR]], align 8 -// CHECK: [[END:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[B_BASE]], i64 [[NUMDEPS]] +// CHECK: [[DEP_ADDR_VOID:%.+]] = call ptr @__kmpc_alloc(i32 [[GTID]], i64 72, ptr null) +// CHECK: [[SZ_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 2, ptr [[SZ_BASE]], align 8 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 1 +// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 %{{.+}}, ptr [[ADDR]], align 8 +// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 +// CHECK: store i64 4, ptr [[SZ_ADDR]], align 8 +// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 3, ptr [[FLAGS_ADDR]], align 8 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 2 +// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 %{{.+}}, ptr [[ADDR]], align 8 +// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 +// CHECK: store i64 8, ptr [[SZ_ADDR]], align 8 +// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 3, ptr [[FLAGS_ADDR]], align 8 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 1 +// CHECK: store ptr [[BASE_ADDR]], ptr [[MAIN_A]], align 8 +// CHECK: [[B:%.+]] = load ptr, ptr [[B_ADDR]], align 8 +// CHECK: [[B_REF:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[B]], i{{.+}} -1 +// CHECK: call void @__kmpc_free(i32 [[GTID]], ptr [[B_REF]], ptr null) +// CHECK: [[B_BASE:%.+]] = load ptr, ptr [[B_ADDR]], align 8 +// CHECK: [[NUMDEPS_BASE:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[B_BASE]], i64 -1 +// CHECK: [[NUMDEPS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[NUMDEPS_BASE]], i{{.+}} 0, i{{.+}} 0 +// CHECK: [[NUMDEPS:%.+]] = load i64, ptr [[NUMDEPS_ADDR]], align 8 +// CHECK: [[END:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[B_BASE]], i64 [[NUMDEPS]] // CHECK: br label %[[BODY:.+]] // CHECK: [[BODY]]: -// CHECK: [[EL:%.+]] = phi %struct.kmp_depend_info* [ [[B_BASE]], %{{.+}} ], [ [[EL_NEXT:%.+]], %[[BODY]] ] -// CHECK: [[FLAG_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[EL]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 4, i8* [[FLAG_BASE]], align 8 -// CHECK: [[EL_NEXT]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[EL]], i{{.+}} 1 -// CHECK: [[IS_DONE:%.+]] = icmp eq %struct.kmp_depend_info* [[EL_NEXT]], [[END]] +// CHECK: [[EL:%.+]] = phi ptr [ [[B_BASE]], %{{.+}} ], [ [[EL_NEXT:%.+]], %[[BODY]] ] +// CHECK: [[FLAG_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[EL]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 4, ptr [[FLAG_BASE]], align 8 +// CHECK: [[EL_NEXT]] = getelementptr %struct.kmp_depend_info, ptr [[EL]], i{{.+}} 1 +// CHECK: [[IS_DONE:%.+]] = icmp eq ptr [[EL_NEXT]], [[END]] // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[BODY]] // CHECK: [[DONE]]: // Claculate toal number of elements. // (argv[argc]-argv[0]-(-1)-1) / -(-1); -// CHECK: [[ARGV:%.+]] = load i8**, i8*** [[ARGV_ADDR:%.+]], align 8 -// CHECK: [[ARGC:%.+]] = load i32, i32* [[ARGC_ADDR:%.+]], align 4 +// CHECK: [[ARGV:%.+]] = load ptr, ptr [[ARGV_ADDR:%.+]], align 8 +// CHECK: [[ARGC:%.+]] = load i32, ptr [[ARGC_ADDR:%.+]], align 4 // CHECK: [[IDX:%.+]] = sext i32 [[ARGC]] to i64 -// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds i8*, i8** [[ARGV]], i64 [[IDX]] -// CHECK: [[BEGIN:%.+]] = load i8*, i8** [[BEGIN_ADDR]], align 8 -// CHECK: [[ARGV:%.+]] = load i8**, i8*** [[ARGV_ADDR]], align 8 -// CHECK: [[END_ADDR:%.+]] = getelementptr inbounds i8*, i8** [[ARGV]], i64 0 -// CHECK: [[END:%.+]] = load i8*, i8** [[END_ADDR]], align 8 -// CHECK: [[BEGIN_INT:%.+]] = ptrtoint i8* [[BEGIN]] to i64 -// CHECK: [[END_INT:%.+]] = ptrtoint i8* [[END]] to i64 +// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds ptr, ptr [[ARGV]], i64 [[IDX]] +// CHECK: [[BEGIN:%.+]] = load ptr, ptr [[BEGIN_ADDR]], align 8 +// CHECK: [[ARGV:%.+]] = load ptr, ptr [[ARGV_ADDR]], align 8 +// CHECK: [[END_ADDR:%.+]] = getelementptr inbounds ptr, ptr [[ARGV]], i64 0 +// CHECK: [[END:%.+]] = load ptr, ptr [[END_ADDR]], align 8 +// CHECK: [[BEGIN_INT:%.+]] = ptrtoint ptr [[BEGIN]] to i64 +// CHECK: [[END_INT:%.+]] = ptrtoint ptr [[END]] to i64 // CHECK: [[BE_SUB:%.+]] = sub i64 [[BEGIN_INT]], [[END_INT]] // CHECK: [[BE_SUB_ST_SUB:%.+]] = add nsw i64 [[BE_SUB]], 1 // CHECK: [[BE_SUB_ST_SUB_1_SUB:%.+]] = sub nsw i64 [[BE_SUB_ST_SUB]], 1 @@ -109,136 +104,129 @@ int main(int argc, char **argv) { // Allocate memory // kmp_depend_info* dep = (kmp_depend_info*)kmpc_alloc(SIZE); -// CHECK: [[DEP_ADDR_VOID:%.+]] = call i8* @__kmpc_alloc(i32 %{{.+}}, i64 [[SIZE]], i8* null) -// CHECK: [[DEP_ADDR:%.+]] = bitcast i8* [[DEP_ADDR_VOID]] to %struct.kmp_depend_info* +// CHECK: [[DEP_ADDR_VOID:%.+]] = call ptr @__kmpc_alloc(i32 %{{.+}}, i64 [[SIZE]], ptr null) // dep[0].base_addr = NELEMS. -// CHECK: [[BASE_ADDR_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 [[NELEMS]], i64* [[BASE_ADDR_ADDR]], align 8 +// CHECK: [[BASE_ADDR_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 [[NELEMS]], ptr [[BASE_ADDR_ADDR]], align 8 // iterator_counter = 1; -// CHECK: store i64 1, i64* [[ITERATOR_COUNTER_ADDR:%.+]], align 8 +// CHECK: store i64 1, ptr [[ITERATOR_COUNTER_ADDR:%.+]], align 8 // NITER = (argv[argc]-argv[0]-(-1)-1) / -(-1); -// CHECK: [[ARGV:%.+]] = load i8**, i8*** [[ARGV_ADDR]], align 8 -// CHECK: [[ARGC:%.+]] = load i32, i32* [[ARGC_ADDR]], align 4 +// CHECK: [[ARGV:%.+]] = load ptr, ptr [[ARGV_ADDR]], align 8 +// CHECK: [[ARGC:%.+]] = load i32, ptr [[ARGC_ADDR]], align 4 // CHECK: [[IDX:%.+]] = sext i32 [[ARGC]] to i64 -// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds i8*, i8** [[ARGV]], i64 [[IDX]] -// CHECK: [[BEGIN:%.+]] = load i8*, i8** [[BEGIN_ADDR]], align 8 -// CHECK: [[ARGV:%.+]] = load i8**, i8*** [[ARGV_ADDR]], align 8 -// CHECK: [[END_ADDR:%.+]] = getelementptr inbounds i8*, i8** [[ARGV]], i64 0 -// CHECK: [[END:%.+]] = load i8*, i8** [[END_ADDR]], align 8 -// CHECK: [[BEGIN_INT:%.+]] = ptrtoint i8* [[BEGIN]] to i64 -// CHECK: [[END_INT:%.+]] = ptrtoint i8* [[END]] to i64 +// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds ptr, ptr [[ARGV]], i64 [[IDX]] +// CHECK: [[BEGIN:%.+]] = load ptr, ptr [[BEGIN_ADDR]], align 8 +// CHECK: [[ARGV:%.+]] = load ptr, ptr [[ARGV_ADDR]], align 8 +// CHECK: [[END_ADDR:%.+]] = getelementptr inbounds ptr, ptr [[ARGV]], i64 0 +// CHECK: [[END:%.+]] = load ptr, ptr [[END_ADDR]], align 8 +// CHECK: [[BEGIN_INT:%.+]] = ptrtoint ptr [[BEGIN]] to i64 +// CHECK: [[END_INT:%.+]] = ptrtoint ptr [[END]] to i64 // CHECK: [[BE_SUB:%.+]] = sub i64 [[BEGIN_INT]], [[END_INT]] // CHECK: [[BE_SUB_ST_SUB:%.+]] = add nsw i64 [[BE_SUB]], 1 // CHECK: [[BE_SUB_ST_SUB_1_SUB:%.+]] = sub nsw i64 [[BE_SUB_ST_SUB]], 1 // CHECK: [[NITER:%.+]] = sdiv i64 [[BE_SUB_ST_SUB_1_SUB]], 1 // Loop. -// CHECK: store i64 0, i64* [[COUNTER_ADDR:%.+]], align 8 +// CHECK: store i64 0, ptr [[COUNTER_ADDR:%.+]], align 8 // CHECK: br label %[[CONT:.+]] // CHECK: [[CONT]]: -// CHECK: [[COUNTER:%.+]] = load i64, i64* [[COUNTER_ADDR]], align 8 +// CHECK: [[COUNTER:%.+]] = load i64, ptr [[COUNTER_ADDR]], align 8 // CHECK: [[CMP:%.+]] = icmp slt i64 [[COUNTER]], [[NITER]] // CHECK: br i1 [[CMP]], label %[[BODY:.+]], label %[[EXIT:.+]] // CHECK: [[BODY]]: // p = BEGIN + COUNTER * STEP; -// CHECK: [[ARGV:%.+]] = load i8**, i8*** [[ARGV_ADDR]], align 8 -// CHECK: [[ARGC:%.+]] = load i32, i32* [[ARGC_ADDR]], align 4 +// CHECK: [[ARGV:%.+]] = load ptr, ptr [[ARGV_ADDR]], align 8 +// CHECK: [[ARGC:%.+]] = load i32, ptr [[ARGC_ADDR]], align 4 // CHECK: [[IDX:%.+]] = sext i32 [[ARGC]] to i64 -// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds i8*, i8** [[ARGV]], i64 [[IDX]] -// CHECK: [[BEGIN:%.+]] = load i8*, i8** [[BEGIN_ADDR]], align 8 -// CHECK: [[COUNTER:%.+]] = load i64, i64* [[COUNTER_ADDR]], align 8 +// CHECK: [[BEGIN_ADDR:%.+]] = getelementptr inbounds ptr, ptr [[ARGV]], i64 [[IDX]] +// CHECK: [[BEGIN:%.+]] = load ptr, ptr [[BEGIN_ADDR]], align 8 +// CHECK: [[COUNTER:%.+]] = load i64, ptr [[COUNTER_ADDR]], align 8 // CHECK: [[CS_MUL:%.+]] = mul nsw i64 [[COUNTER]], -1 -// CHECK: [[CS_MUL_BEGIN_ADD:%.+]] = getelementptr inbounds i8, i8* [[BEGIN]], i64 [[CS_MUL]] -// CHECK: store i8* [[CS_MUL_BEGIN_ADD]], i8** [[P_ADDR:%.+]], align 8 +// CHECK: [[CS_MUL_BEGIN_ADD:%.+]] = getelementptr inbounds i8, ptr [[BEGIN]], i64 [[CS_MUL]] +// CHECK: store ptr [[CS_MUL_BEGIN_ADD]], ptr [[P_ADDR:%.+]], align 8 // &p[0] -// CHECK: [[P:%.+]] = load i8*, i8** [[P_ADDR]], align 8 -// CHECK: [[P0:%.+]] = getelementptr inbounds i8, i8* [[P]], i64 0 -// CHECK: [[P0_ADDR:%.+]] = ptrtoint i8* [[P0]] to i64 +// CHECK: [[P:%.+]] = load ptr, ptr [[P_ADDR]], align 8 +// CHECK: [[P0:%.+]] = getelementptr inbounds i8, ptr [[P]], i64 0 +// CHECK: [[P0_ADDR:%.+]] = ptrtoint ptr [[P0]] to i64 // dep[ITERATOR_COUNTER].base_addr = &p[0]; -// CHECK: [[ITERATOR_COUNTER:%.+]] = load i64, i64* [[ITERATOR_COUNTER_ADDR]], align 8 -// CHECK: [[DEP_IC:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i64 [[ITERATOR_COUNTER]] -// CHECK: [[DEP_IC_BASE_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_IC]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 [[P0_ADDR]], i64* [[DEP_IC_BASE_ADDR]], align 8 +// CHECK: [[ITERATOR_COUNTER:%.+]] = load i64, ptr [[ITERATOR_COUNTER_ADDR]], align 8 +// CHECK: [[DEP_IC:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i64 [[ITERATOR_COUNTER]] +// CHECK: [[DEP_IC_BASE_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_IC]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 [[P0_ADDR]], ptr [[DEP_IC_BASE_ADDR]], align 8 // dep[ITERATOR_COUNTER].size = sizeof(p[0]); -// CHECK: [[DEP_IC_SIZE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_IC]], i{{.+}} 0, i{{.+}} 1 -// CHECK: store i64 1, i64* [[DEP_IC_SIZE]], align 8 +// CHECK: [[DEP_IC_SIZE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_IC]], i{{.+}} 0, i{{.+}} 1 +// CHECK: store i64 1, ptr [[DEP_IC_SIZE]], align 8 // dep[ITERATOR_COUNTER].flags = in_out; -// CHECK: [[DEP_IC_FLAGS:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_IC]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 3, i8* [[DEP_IC_FLAGS]], align 8 +// CHECK: [[DEP_IC_FLAGS:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_IC]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 3, ptr [[DEP_IC_FLAGS]], align 8 // ITERATOR_COUNTER = ITERATOR_COUNTER + 1; -// CHECK: [[ITERATOR_COUNTER:%.+]] = load i64, i64* [[ITERATOR_COUNTER_ADDR]], align 8 +// CHECK: [[ITERATOR_COUNTER:%.+]] = load i64, ptr [[ITERATOR_COUNTER_ADDR]], align 8 // CHECK: [[INC:%.+]] = add nuw i64 [[ITERATOR_COUNTER]], 1 -// CHECK: store i64 [[INC]], i64* [[ITERATOR_COUNTER_ADDR]], align 8 +// CHECK: store i64 [[INC]], ptr [[ITERATOR_COUNTER_ADDR]], align 8 // COUNTER = COUNTER + 1; -// CHECK: [[COUNTER:%.+]] = load i64, i64* [[COUNTER_ADDR]], align 8 +// CHECK: [[COUNTER:%.+]] = load i64, ptr [[COUNTER_ADDR]], align 8 // CHECK: [[INC:%.+]] = add nsw i64 [[COUNTER]], 1 -// CHECK: store i64 [[INC]], i64* [[COUNTER_ADDR]], align 8 +// CHECK: store i64 [[INC]], ptr [[COUNTER_ADDR]], align 8 // CHECK: br label %[[CONT]] // CHECK: [[EXIT]]: // a = &dep[1]; -// CHECK: [[DEP_BEGIN:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i64 1 -// CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* [[DEP_BEGIN]] to i8* -// CHECK: store i8* [[DEP]], i8** [[MAIN_A]], align 8 +// CHECK: [[DEP_BEGIN:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i64 1 +// CHECK: store ptr [[DEP_BEGIN]], ptr [[MAIN_A]], align 8 // CHECK-LABEL: tmain -// CHECK: [[ARGC_ADDR:%.+]] = alloca i8*, +// CHECK: [[ARGC_ADDR:%.+]] = alloca ptr, // CHECK: [[GTID:%.+]] = call i32 @__kmpc_global_thread_num( -// CHECK: [[DEP_ADDR_VOID:%.+]] = call i8* @__kmpc_alloc(i32 [[GTID]], i64 72, i8* null) -// CHECK: [[DEP_ADDR:%.+]] = bitcast i8* [[DEP_ADDR_VOID]] to %struct.kmp_depend_info* -// CHECK: [[SZ_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 2, i64* [[SZ_BASE]], align 8 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 1 -// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 %{{.+}}, i64* [[ADDR]], align 8 -// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 -// CHECK: store i64 8, i64* [[SZ_ADDR]], align 8 -// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 1, i8* [[FLAGS_ADDR]], align 8 -// CHECK: [[SHAPE_ADDR:%.+]] = load i32*, i32** [[ARGV_ADDR:%.+]], align 8 +// CHECK: [[DEP_ADDR_VOID:%.+]] = call ptr @__kmpc_alloc(i32 [[GTID]], i64 72, ptr null) +// CHECK: [[SZ_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 2, ptr [[SZ_BASE]], align 8 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 1 +// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 %{{.+}}, ptr [[ADDR]], align 8 +// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 +// CHECK: store i64 8, ptr [[SZ_ADDR]], align 8 +// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 1, ptr [[FLAGS_ADDR]], align 8 +// CHECK: [[SHAPE_ADDR:%.+]] = load ptr, ptr [[ARGV_ADDR:%.+]], align 8 // CHECK: [[SZ1:%.+]] = mul nuw i64 12, %{{.+}} // CHECK: [[SZ:%.+]] = mul nuw i64 [[SZ1]], 4 -// CHECK: [[SHAPE:%.+]] = ptrtoint i32* [[SHAPE_ADDR]] to i64 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 2 -// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 -// CHECK: store i64 [[SHAPE]], i64* [[ADDR]], align 8 -// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 -// CHECK: store i64 [[SZ]], i64* [[SZ_ADDR]], align 8 -// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 1, i8* [[FLAGS_ADDR]], align 8 -// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[DEP_ADDR]], i{{.+}} 1 -// CHECK: [[DEP:%.+]] = bitcast %struct.kmp_depend_info* [[BASE_ADDR]] to i8* -// CHECK: store i8* [[DEP]], i8** [[TMAIN_A]], align 8 -// CHECK: [[ARGC:%.+]] = load i8*, i8** [[ARGC_ADDR]], align 8 -// CHECK: [[ARGC_BASE:%.+]] = bitcast i8* [[ARGC]] to %struct.kmp_depend_info* -// CHECK: [[ARGC_REF:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[ARGC_BASE]], i{{.+}} -1 -// CHECK: [[ARGC:%.+]] = bitcast %struct.kmp_depend_info* [[ARGC_REF]] to i8* -// CHECK: call void @__kmpc_free(i32 [[GTID]], i8* [[ARGC]], i8* null) -// CHECK: [[ARGC_ADDR_CAST:%.+]] = bitcast i8** [[ARGC_ADDR]] to %struct.kmp_depend_info** -// CHECK: [[ARGC_BASE:%.+]] = load %struct.kmp_depend_info*, %struct.kmp_depend_info** [[ARGC_ADDR_CAST]], align 8 -// CHECK: [[NUMDEPS_BASE:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[ARGC_BASE]], i64 -1 -// CHECK: [[NUMDEPS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[NUMDEPS_BASE]], i{{.+}} 0, i{{.+}} 0 -// CHECK: [[NUMDEPS:%.+]] = load i64, i64* [[NUMDEPS_ADDR]], align 8 -// CHECK: [[END:%.+]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[ARGC_BASE]], i64 [[NUMDEPS]] +// CHECK: [[SHAPE:%.+]] = ptrtoint ptr [[SHAPE_ADDR]] to i64 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 2 +// CHECK: [[ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 0 +// CHECK: store i64 [[SHAPE]], ptr [[ADDR]], align 8 +// CHECK: [[SZ_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 1 +// CHECK: store i64 [[SZ]], ptr [[SZ_ADDR]], align 8 +// CHECK: [[FLAGS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[BASE_ADDR]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 1, ptr [[FLAGS_ADDR]], align 8 +// CHECK: [[BASE_ADDR:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[DEP_ADDR_VOID]], i{{.+}} 1 +// CHECK: store ptr [[BASE_ADDR]], ptr [[TMAIN_A]], align 8 +// CHECK: [[ARGC:%.+]] = load ptr, ptr [[ARGC_ADDR]], align 8 +// CHECK: [[ARGC_REF:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[ARGC]], i{{.+}} -1 +// CHECK: call void @__kmpc_free(i32 [[GTID]], ptr [[ARGC_REF]], ptr null) +// CHECK: [[ARGC_BASE:%.+]] = load ptr, ptr [[ARGC_ADDR]], align 8 +// CHECK: [[NUMDEPS_BASE:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[ARGC_BASE]], i64 -1 +// CHECK: [[NUMDEPS_ADDR:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[NUMDEPS_BASE]], i{{.+}} 0, i{{.+}} 0 +// CHECK: [[NUMDEPS:%.+]] = load i64, ptr [[NUMDEPS_ADDR]], align 8 +// CHECK: [[END:%.+]] = getelementptr %struct.kmp_depend_info, ptr [[ARGC_BASE]], i64 [[NUMDEPS]] // CHECK: br label %[[BODY:.+]] // CHECK: [[BODY]]: -// CHECK: [[EL:%.+]] = phi %struct.kmp_depend_info* [ [[ARGC_BASE]], %{{.+}} ], [ [[EL_NEXT:%.+]], %[[BODY]] ] -// CHECK: [[FLAG_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, %struct.kmp_depend_info* [[EL]], i{{.+}} 0, i{{.+}} 2 -// CHECK: store i8 3, i8* [[FLAG_BASE]], align 8 -// CHECK: [[EL_NEXT]] = getelementptr %struct.kmp_depend_info, %struct.kmp_depend_info* [[EL]], i{{.+}} 1 -// CHECK: [[IS_DONE:%.+]] = icmp eq %struct.kmp_depend_info* [[EL_NEXT]], [[END]] +// CHECK: [[EL:%.+]] = phi ptr [ [[ARGC_BASE]], %{{.+}} ], [ [[EL_NEXT:%.+]], %[[BODY]] ] +// CHECK: [[FLAG_BASE:%.+]] = getelementptr inbounds %struct.kmp_depend_info, ptr [[EL]], i{{.+}} 0, i{{.+}} 2 +// CHECK: store i8 3, ptr [[FLAG_BASE]], align 8 +// CHECK: [[EL_NEXT]] = getelementptr %struct.kmp_depend_info, ptr [[EL]], i{{.+}} 1 +// CHECK: [[IS_DONE:%.+]] = icmp eq ptr [[EL_NEXT]], [[END]] // CHECK: br i1 [[IS_DONE]], label %[[DONE:.+]], label %[[BODY]] // CHECK: [[DONE]]: diff --git a/clang/test/OpenMP/distribute_parallel_for_reduction_codegen.cpp b/clang/test/OpenMP/distribute_parallel_for_reduction_codegen.cpp index 15aff901fcfa5..55d9e6550c400 100644 --- a/clang/test/OpenMP/distribute_parallel_for_reduction_codegen.cpp +++ b/clang/test/OpenMP/distribute_parallel_for_reduction_codegen.cpp @@ -1,35 +1,35 @@ // Test host code gen -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // Test host code gen -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 - -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-64 +// RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix CHECK --check-prefix CHECK-32 + +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY1 %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s // SIMD-ONLY1-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics @@ -63,17 +63,17 @@ int main() { } // CHECK-LABEL: main -// CHECK: call{{.+}} @__tgt_target_kernel(%struct.ident_t* @{{.+}}, +// CHECK: call{{.+}} @__tgt_target_kernel(ptr @{{.+}}, // CHECK: call void [[OFFL:@.+]]( -// CHECK: call{{.+}} [[TMAIN:@.+]](i{{32|64}} +// CHECK: call{{.+}} [[TMAIN:@.+]](ptr // CHECK: ret // CHECK: define{{.+}} [[OFFL]]( -// CHECK: call{{.+}} @__kmpc_fork_teams({{.+}}, {{.+}}, {{.+}} [[TEOUTL:@.+]] to{{.+}} +// CHECK: call{{.+}} @__kmpc_fork_teams({{.+}}, {{.+}}, {{.+}} [[TEOUTL:@[^,]+]] // CHECK: ret void // CHECK: define{{.+}} [[TEOUTL]]( -// CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} [[PAROUTL:@.+]] to{{.+}} +// CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} [[PAROUTL:@[^,]+]] // CHECK: ret void // CHECK: define{{.+}} [[PAROUTL]]( @@ -81,17 +81,17 @@ int main() { // CHECK: call{{.+}} @__kmpc_end_reduce_nowait( // CHECK: ret void -// CHECK: define{{.+}} [[TMAIN]](i{{32|64}} -// CHECK: call{{.+}} @__tgt_target_kernel(%struct.ident_t* @{{.+}}, +// CHECK: define{{.+}} [[TMAIN]](ptr +// CHECK: call{{.+}} @__tgt_target_kernel(ptr @{{.+}}, // CHECK: call void [[TOFFL:@.+]]( // CHECK: ret // CHECK: define{{.+}} [[TOFFL]]( -// CHECK: call{{.+}} @__kmpc_fork_teams({{.+}}, {{.+}}, {{.+}} [[TEMPLTEOUTL:@.+]] to{{.+}} +// CHECK: call{{.+}} @__kmpc_fork_teams({{.+}}, {{.+}}, {{.+}} [[TEMPLTEOUTL:@[^,]+]] // CHECK: ret void // CHECK: define{{.+}} [[TEMPLTEOUTL]]( -// CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} [[TPAROUTL:@.+]] to{{.+}} +// CHECK: call{{.+}} @__kmpc_fork_call({{.+}}, {{.+}}, {{.+}} [[TPAROUTL:@[^,]+]] // CHECK: ret void // CHECK: define{{.+}} [[TPAROUTL]]( diff --git a/clang/test/OpenMP/for_simd_codegen.cpp b/clang/test/OpenMP/for_simd_codegen.cpp index c3ca5258542ae..1ac95e8943640 100644 --- a/clang/test/OpenMP/for_simd_codegen.cpp +++ b/clang/test/OpenMP/for_simd_codegen.cpp @@ -1,20 +1,20 @@ -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45 -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck %s --check-prefix=TERM_DEBUG -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - -DOMP5 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50 -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck %s --check-prefix=TERM_DEBUG - -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5 -// RUN: %clang_cc1 -no-opaque-pointers -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -DOMP5 -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s -// RUN: %clang_cc1 -no-opaque-pointers -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45 +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s +// RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP45 +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck %s --check-prefix=TERM_DEBUG +// RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50 +// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5 +// RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - -DOMP5 < %s | FileCheck %s --check-prefix=CHECK --check-prefix=OMP50 +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck %s --check-prefix=TERM_DEBUG + +// RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s +// RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fopenmp-version=45 -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm -fexceptions -fcxx-exceptions -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t < %s -DOMP5 +// RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -debug-info-kind=limited -std=c++11 -include-pch %t -verify -DOMP5 -emit-llvm -o - < %s | FileCheck --check-prefix SIMD-ONLY0 %s +// RUN: %clang_cc1 -verify -triple x86_64-apple-darwin10 -fopenmp-simd -fexceptions -fcxx-exceptions -debug-info-kind=line-tables-only -x c++ -emit-llvm -o - < %s -DOMP5 | FileCheck --check-prefix SIMD-ONLY0 %s // SIMD-ONLY0-NOT: {{__kmpc|__tgt}} // expected-no-diagnostics #ifndef HEADER @@ -23,246 +23,246 @@ long long get_val() { extern void mayThrow(); mayThrow(); return 0; } double *g_ptr; -// CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(float* noundef {{.+}}, float* noundef {{.+}}, float* noundef {{.+}}, float* noundef {{.+}}) +// CHECK-LABEL: define {{.*void}} @{{.*}}simple{{.*}}(ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}}, ptr noundef {{.+}}) void simple(float *a, float *b, float *c, float *d) { #ifdef OMP5 #pragma omp for simd if (true) #else #pragma omp for simd #endif -// CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1) +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 5 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i32 [ 5, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i32 [[UP]], i32* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]], +// CHECK: store i32 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]], -// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] +// CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]] // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP]], label %[[SIMPLE_LOOP1_BODY:.+]], label %[[SIMPLE_LOOP1_END:[^,]+]] for (int i = 3; i < 32; i += 5) { // CHECK: [[SIMPLE_LOOP1_BODY]]: // Start of body: calculate i from IV: -// CHECK: [[IV1_1:%.+]] = load i32, i32* [[OMP_IV]]{{.*}} +// CHECK: [[IV1_1:%.+]] = load i32, ptr [[OMP_IV]]{{.*}} // CHECK: [[CALC_I_1:%.+]] = mul nsw i32 [[IV1_1]], 5 // CHECK-NEXT: [[CALC_I_2:%.+]] = add nsw i32 3, [[CALC_I_1]] -// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] +// CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]] // ... loop body ... // End of body: store into a[i]: -// CHECK: store float [[RESULT:%.+]], float* +// CHECK: store float [[RESULT:%.+]], ptr a[i] = b[i] * c[i] * d[i]; -// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[ADD1_2:%.+]] = add nsw i32 [[IV1_2]], 1 -// CHECK-NEXT: store i32 [[ADD1_2]], i32* [[OMP_IV]] +// CHECK-NEXT: store i32 [[ADD1_2]], ptr [[OMP_IV]] // br label %{{.+}}, !llvm.loop !{{.+}} } // CHECK: [[SIMPLE_LOOP1_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) long long k = get_val(); #pragma omp for simd linear(k : 3) schedule(simd, nonmonotonic: dynamic) // CHECK: [[K0:%.+]] = call {{.*}}i64 @{{.*}}get_val -// CHECK-NEXT: store i64 [[K0]], i64* [[K_VAR:%[^,]+]] -// CHECK: [[K0LOAD:%.+]] = load i64, i64* [[K_VAR]] -// CHECK-NEXT: store i64 [[K0LOAD]], i64* [[LIN0:%[^,]+]] +// CHECK-NEXT: store i64 [[K0]], ptr [[K_VAR:%[^,]+]] +// CHECK: [[K0LOAD:%.+]] = load i64, ptr [[K_VAR]] +// CHECK-NEXT: store i64 [[K0LOAD]], ptr [[LIN0:%[^,]+]] -// CHECK: call void @__kmpc_dispatch_init_4(%struct.ident_t* {{.+}}, i32 %{{.+}}, i32 1073741859, i32 0, i32 8, i32 1, i32 1) -// CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(%struct.ident_t* {{.+}}, i32 %{{.+}}, i32* %{{.+}}, i32* [[LB:%.+]], i32* [[UB:%.+]], i32* %{{.+}}) +// CHECK: call void @__kmpc_dispatch_init_4(ptr {{.+}}, i32 %{{.+}}, i32 1073741859, i32 0, i32 8, i32 1, i32 1) +// CHECK: [[NEXT:%.+]] = call i32 @__kmpc_dispatch_next_4(ptr {{.+}}, i32 %{{.+}}, ptr %{{.+}}, ptr [[LB:%.+]], ptr [[UB:%.+]], ptr %{{.+}}) // CHECK: [[COND:%.+]] = icmp ne i32 [[NEXT]], 0 // CHECK: br i1 [[COND]], label %[[CONT:.+]], label %[[END:.+]] // CHECK: [[CONT]]: -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV2:%[^,]+]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV2:%[^,]+]], -// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]]{{.*}}!llvm.access.group +// CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]]{{.*}}!llvm.access.group // CHECK-NEXT: [[CMP2:%.+]] = icmp sle i32 [[IV2]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP2]], label %[[SIMPLE_LOOP2_BODY:.+]], label %[[SIMPLE_LOOP2_END:[^,]+]] for (int i = 10; i > 1; i--) { // CHECK: [[SIMPLE_LOOP2_BODY]]: // Start of body: calculate i from IV: -// CHECK: [[IV2_0:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group +// CHECK: [[IV2_0:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group // FIXME: It is interesting, why the following "mul 1" was not constant folded? // CHECK-NEXT: [[IV2_1:%.+]] = mul nsw i32 [[IV2_0]], 1 // CHECK-NEXT: [[LC_I_1:%.+]] = sub nsw i32 10, [[IV2_1]] -// CHECK-NEXT: store i32 [[LC_I_1]], i32* {{.+}}, !llvm.access.group +// CHECK-NEXT: store i32 [[LC_I_1]], ptr {{.+}}, !llvm.access.group // -// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, i64* [[LIN0]]{{.*}}!llvm.access.group -// CHECK-NEXT: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group +// CHECK-NEXT: [[LIN0_1:%.+]] = load i64, ptr [[LIN0]]{{.*}}!llvm.access.group +// CHECK-NEXT: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group // CHECK-NEXT: [[LIN_MUL1:%.+]] = mul nsw i32 [[IV2_2]], 3 // CHECK-NEXT: [[LIN_EXT1:%.+]] = sext i32 [[LIN_MUL1]] to i64 // CHECK-NEXT: [[LIN_ADD1:%.+]] = add nsw i64 [[LIN0_1]], [[LIN_EXT1]] // Update of the privatized version of linear variable! -// CHECK-NEXT: store i64 [[LIN_ADD1]], i64* [[K_PRIVATIZED:%[^,]+]] +// CHECK-NEXT: store i64 [[LIN_ADD1]], ptr [[K_PRIVATIZED:%[^,]+]] a[k]++; k = k + 3; -// CHECK: [[IV2_2:%.+]] = load i32, i32* [[OMP_IV2]]{{.*}}!llvm.access.group +// CHECK: [[IV2_2:%.+]] = load i32, ptr [[OMP_IV2]]{{.*}}!llvm.access.group // CHECK-NEXT: [[ADD2_2:%.+]] = add nsw i32 [[IV2_2]], 1 -// CHECK-NEXT: store i32 [[ADD2_2]], i32* [[OMP_IV2]]{{.*}}!llvm.access.group +// CHECK-NEXT: store i32 [[ADD2_2]], ptr [[OMP_IV2]]{{.*}}!llvm.access.group // br label {{.+}}, !llvm.loop ![[SIMPLE_LOOP2_ID]] } // CHECK: [[SIMPLE_LOOP2_END]]: // // Update linear vars after loop, as the loop was operating on a private version. -// CHECK: [[LIN0_2:%.+]] = load i64, i64* [[K_PRIVATIZED]] -// CHECK-NEXT: store i64 [[LIN0_2]], i64* [[K_VAR]] -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: [[LIN0_2:%.+]] = load i64, ptr [[K_PRIVATIZED]] +// CHECK-NEXT: store i64 [[LIN0_2]], ptr [[K_VAR]] +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) int lin = 12; #pragma omp for simd linear(lin : get_val()), linear(g_ptr) // Init linear private var. -// CHECK: store i32 12, i32* [[LIN_VAR:%[^,]+]] -// CHECK: [[LIN_LOAD:%.+]] = load i32, i32* [[LIN_VAR]] -// CHECK-NEXT: store i32 [[LIN_LOAD]], i32* [[LIN_START:%[^,]+]] +// CHECK: store i32 12, ptr [[LIN_VAR:%[^,]+]] +// CHECK: [[LIN_LOAD:%.+]] = load i32, ptr [[LIN_VAR]] +// CHECK-NEXT: store i32 [[LIN_LOAD]], ptr [[LIN_START:%[^,]+]] // Remember linear step. // CHECK: [[CALL_VAL:%.+]] = invoke -// CHECK: store i64 [[CALL_VAL]], i64* [[LIN_STEP:%[^,]+]] +// CHECK: store i64 [[CALL_VAL]], ptr [[LIN_STEP:%[^,]+]] -// CHECK: [[GLIN_LOAD:%.+]] = load double*, double** [[GLIN_VAR:@[^,]+]] -// CHECK-NEXT: store double* [[GLIN_LOAD]], double** [[GLIN_START:%[^,]+]] +// CHECK: [[GLIN_LOAD:%.+]] = load ptr, ptr [[GLIN_VAR:@[^,]+]] +// CHECK-NEXT: store ptr [[GLIN_LOAD]], ptr [[GLIN_START:%[^,]+]] -// CHECK: call void @__kmpc_for_static_init_8u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: call void @__kmpc_for_static_init_8u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1) +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp ugt i64 [[UB_VAL]], 3 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i64 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i64 [[UP]], i64* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV3:%[^,]+]], +// CHECK: store i64 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV3:%[^,]+]], -// CHECK: [[IV3:%.+]] = load i64, i64* [[OMP_IV3]] -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// CHECK: [[IV3:%.+]] = load i64, ptr [[OMP_IV3]] +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // CHECK-NEXT: [[CMP3:%.+]] = icmp ule i64 [[IV3]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP3]], label %[[SIMPLE_LOOP3_BODY:.+]], label %[[SIMPLE_LOOP3_END:[^,]+]] for (unsigned long long it = 2000; it >= 600; it-=400) { // CHECK: [[SIMPLE_LOOP3_BODY]]: // Start of body: calculate it from IV: -// CHECK: [[IV3_0:%.+]] = load i64, i64* [[OMP_IV3]] +// CHECK: [[IV3_0:%.+]] = load i64, ptr [[OMP_IV3]] // CHECK-NEXT: [[LC_IT_1:%.+]] = mul i64 [[IV3_0]], 400 // CHECK-NEXT: [[LC_IT_2:%.+]] = sub i64 2000, [[LC_IT_1]] -// CHECK-NEXT: store i64 [[LC_IT_2]], i64* +// CHECK-NEXT: store i64 [[LC_IT_2]], ptr // // Linear start and step are used to calculate current value of the linear variable. -// CHECK: [[LINSTART:.+]] = load i32, i32* [[LIN_START]] -// CHECK: [[LINSTEP:.+]] = load i64, i64* [[LIN_STEP]] -// CHECK-NOT: store i32 {{.+}}, i32* [[LIN_VAR]], -// CHECK: store i32 {{.+}}, i32* [[LIN_PRIV:%[^,]+]], -// CHECK: [[GLINSTART:.+]] = load double*, double** [[GLIN_START]] -// CHECK-NEXT: [[IV3_1:%.+]] = load i64, i64* [[OMP_IV3]] +// CHECK: [[LINSTART:.+]] = load i32, ptr [[LIN_START]] +// CHECK: [[LINSTEP:.+]] = load i64, ptr [[LIN_STEP]] +// CHECK-NOT: store i32 {{.+}}, ptr [[LIN_VAR]], +// CHECK: store i32 {{.+}}, ptr [[LIN_PRIV:%[^,]+]], +// CHECK: [[GLINSTART:.+]] = load ptr, ptr [[GLIN_START]] +// CHECK-NEXT: [[IV3_1:%.+]] = load i64, ptr [[OMP_IV3]] // CHECK-NEXT: [[MUL:%.+]] = mul i64 [[IV3_1]], 1 // CHECK: [[GEP:%.+]] = getelementptr{{.*}}[[GLINSTART]] -// CHECK-NEXT: store double* [[GEP]], double** [[G_PTR_CUR:%[^,]+]] +// CHECK-NEXT: store ptr [[GEP]], ptr [[G_PTR_CUR:%[^,]+]] *g_ptr++ = 0.0; -// CHECK: [[GEP_VAL:%.+]] = load double{{.*}}[[G_PTR_CUR]] +// CHECK: [[GEP_VAL:%.+]] = load ptr{{.*}}[[G_PTR_CUR]] // CHECK: store double{{.*}}[[GEP_VAL]] a[it + lin]++; // CHECK: [[FLT_INC:%.+]] = fadd float // CHECK-NEXT: store float [[FLT_INC]], -// CHECK: [[IV3_2:%.+]] = load i64, i64* [[OMP_IV3]] +// CHECK: [[IV3_2:%.+]] = load i64, ptr [[OMP_IV3]] // CHECK-NEXT: [[ADD3_2:%.+]] = add i64 [[IV3_2]], 1 -// CHECK-NEXT: store i64 [[ADD3_2]], i64* [[OMP_IV3]] +// CHECK-NEXT: store i64 [[ADD3_2]], ptr [[OMP_IV3]] } // CHECK: [[SIMPLE_LOOP3_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) // // Linear start and step are used to calculate final value of the linear variables. -// CHECK: [[LIN:%.+]] = load i32, i32* [[LIN_PRIV]], -// CHECK-NEXT: store i32 [[LIN]], i32* [[LIN_VAR]], -// CHECK: [[GLIN:%.+]] = load double*, double** [[G_PTR_CUR]], -// CHECK-NEXT: store double* [[GLIN]], double** [[GLIN_VAR]], -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: [[LIN:%.+]] = load i32, ptr [[LIN_PRIV]], +// CHECK-NEXT: store i32 [[LIN]], ptr [[LIN_VAR]], +// CHECK: [[GLIN:%.+]] = load ptr, ptr [[G_PTR_CUR]], +// CHECK-NEXT: store ptr [[GLIN]], ptr [[GLIN_VAR]], +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) #pragma omp for simd -// CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1) +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 3 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i32 [ 3, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i32 [[UP]], i32* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV4:%[^,]+]], +// CHECK: store i32 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV4:%[^,]+]], -// CHECK: [[IV4:%.+]] = load i32, i32* [[OMP_IV4]] -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] +// CHECK: [[IV4:%.+]] = load i32, ptr [[OMP_IV4]] +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]] // CHECK-NEXT: [[CMP4:%.+]] = icmp sle i32 [[IV4]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP4]], label %[[SIMPLE_LOOP4_BODY:.+]], label %[[SIMPLE_LOOP4_END:[^,]+]] for (short it = 6; it <= 20; it-=-4) { // CHECK: [[SIMPLE_LOOP4_BODY]]: // Start of body: calculate it from IV: -// CHECK: [[IV4_0:%.+]] = load i32, i32* [[OMP_IV4]] +// CHECK: [[IV4_0:%.+]] = load i32, ptr [[OMP_IV4]] // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i32 [[IV4_0]], 4 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i32 6, [[LC_IT_1]] // CHECK-NEXT: [[LC_IT_3:%.+]] = trunc i32 [[LC_IT_2]] to i16 -// CHECK-NEXT: store i16 [[LC_IT_3]], i16* +// CHECK-NEXT: store i16 [[LC_IT_3]], ptr -// CHECK: [[IV4_2:%.+]] = load i32, i32* [[OMP_IV4]] +// CHECK: [[IV4_2:%.+]] = load i32, ptr [[OMP_IV4]] // CHECK-NEXT: [[ADD4_2:%.+]] = add nsw i32 [[IV4_2]], 1 -// CHECK-NEXT: store i32 [[ADD4_2]], i32* [[OMP_IV4]] +// CHECK-NEXT: store i32 [[ADD4_2]], ptr [[OMP_IV4]] } // CHECK: [[SIMPLE_LOOP4_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) #pragma omp for simd -// CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1) +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], 25 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i32 [ 25, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i32 [[UP]], i32* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV5:%[^,]+]], +// CHECK: store i32 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV5:%[^,]+]], -// CHECK: [[IV5:%.+]] = load i32, i32* [[OMP_IV5]] -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] +// CHECK: [[IV5:%.+]] = load i32, ptr [[OMP_IV5]] +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]] // CHECK-NEXT: [[CMP5:%.+]] = icmp sle i32 [[IV5]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP5]], label %[[SIMPLE_LOOP5_BODY:.+]], label %[[SIMPLE_LOOP5_END:[^,]+]] for (unsigned char it = 'z'; it >= 'a'; it+=-1) { // CHECK: [[SIMPLE_LOOP5_BODY]]: // Start of body: calculate it from IV: -// CHECK: [[IV5_0:%.+]] = load i32, i32* [[OMP_IV5]] +// CHECK: [[IV5_0:%.+]] = load i32, ptr [[OMP_IV5]] // CHECK-NEXT: [[IV5_1:%.+]] = mul nsw i32 [[IV5_0]], 1 // CHECK-NEXT: [[LC_IT_1:%.+]] = sub nsw i32 122, [[IV5_1]] // CHECK-NEXT: [[LC_IT_2:%.+]] = trunc i32 [[LC_IT_1]] to i8 -// CHECK-NEXT: store i8 [[LC_IT_2]], i8* +// CHECK-NEXT: store i8 [[LC_IT_2]], ptr -// CHECK: [[IV5_2:%.+]] = load i32, i32* [[OMP_IV5]] +// CHECK: [[IV5_2:%.+]] = load i32, ptr [[OMP_IV5]] // CHECK-NEXT: [[ADD5_2:%.+]] = add nsw i32 [[IV5_2]], 1 -// CHECK-NEXT: store i32 [[ADD5_2]], i32* [[OMP_IV5]] +// CHECK-NEXT: store i32 [[ADD5_2]], ptr [[OMP_IV5]] } // CHECK: [[SIMPLE_LOOP5_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) // CHECK-NOT: mul i32 %{{.+}}, 10 #pragma omp for simd @@ -272,62 +272,62 @@ void simple(float *a, float *b, float *c, float *d) { int A; #pragma omp parallel { - // CHECK: store i32 -1, i32* [[A:%.+]], + // CHECK: store i32 -1, ptr [[A:%.+]], A = -1; #pragma omp for simd lastprivate(A) -// CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1) +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i64 [[UP]], i64* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV7:%[^,]+]], +// CHECK: store i64 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV7:%[^,]+]], // CHECK: br label %[[SIMD_LOOP7_COND:[^,]+]] // CHECK: [[SIMD_LOOP7_COND]]: -// CHECK-NEXT: [[IV7:%.+]] = load i64, i64* [[OMP_IV7]] -// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// CHECK-NEXT: [[IV7:%.+]] = load i64, ptr [[OMP_IV7]] +// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // CHECK-NEXT: [[CMP7:%.+]] = icmp sle i64 [[IV7]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP7]], label %[[SIMPLE_LOOP7_BODY:.+]], label %[[SIMPLE_LOOP7_END:[^,]+]] for (long long i = -10; i < 10; i += 3) { // CHECK: [[SIMPLE_LOOP7_BODY]]: // Start of body: calculate i from IV: -// CHECK: [[IV7_0:%.+]] = load i64, i64* [[OMP_IV7]] +// CHECK: [[IV7_0:%.+]] = load i64, ptr [[OMP_IV7]] // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV7_0]], 3 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]] -// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]], -// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]] +// CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]], +// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]] // CHECK-NEXT: [[CONV:%.+]] = trunc i64 [[LC_VAL]] to i32 -// CHECK-NEXT: store i32 [[CONV]], i32* [[A_PRIV:%[^,]+]], +// CHECK-NEXT: store i32 [[CONV]], ptr [[A_PRIV:%[^,]+]], A = i; -// CHECK: [[IV7_2:%.+]] = load i64, i64* [[OMP_IV7]] +// CHECK: [[IV7_2:%.+]] = load i64, ptr [[OMP_IV7]] // CHECK-NEXT: [[ADD7_2:%.+]] = add nsw i64 [[IV7_2]], 1 -// CHECK-NEXT: store i64 [[ADD7_2]], i64* [[OMP_IV7]] +// CHECK-NEXT: store i64 [[ADD7_2]], ptr [[OMP_IV7]] } // CHECK: [[SIMPLE_LOOP7_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: load i32, i32* +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: load i32, ptr // CHECK: icmp ne i32 %{{.+}}, 0 // CHECK: br i1 %{{.+}}, label -// CHECK: [[A_PRIV_VAL:%.+]] = load i32, i32* [[A_PRIV]], -// CHECK-NEXT: store i32 [[A_PRIV_VAL]], i32* %{{.+}}, +// CHECK: [[A_PRIV_VAL:%.+]] = load i32, ptr [[A_PRIV]], +// CHECK-NEXT: store i32 [[A_PRIV_VAL]], ptr %{{.+}}, // CHECK-NEXT: br label -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) } int R; #pragma omp parallel { - // CHECK: store i32 -1, i32* [[R:%[^,]+]], + // CHECK: store i32 -1, ptr [[R:%[^,]+]], R = -1; -// CHECK: store i32 1, i32* [[R_PRIV:%[^,]+]], -// OMP50: [[A_VAL:%.+]] = load i32, i32* % +// CHECK: store i32 1, ptr [[R_PRIV:%[^,]+]], +// OMP50: [[A_VAL:%.+]] = load i32, ptr % // OMP50: [[COND:%.+]] = icmp ne i32 [[A_VAL]], 0 // OMP50: br i1 [[COND]], label {{%?}}[[THEN:[^,]+]], label {{%?}}[[ELSE:[^,]+]] // OMP50: [[THEN]]: @@ -336,90 +336,90 @@ void simple(float *a, float *b, float *c, float *d) { #else #pragma omp for simd reduction(*:R) #endif -// CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1) +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i64 [[UP]], i64* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]], +// CHECK: store i64 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV8:%[^,]+]], // CHECK: br label %[[SIMD_LOOP8_COND:[^,]+]] // CHECK: [[SIMD_LOOP8_COND]]: -// CHECK-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]] -// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// CHECK-NEXT: [[IV8:%.+]] = load i64, ptr [[OMP_IV8]] +// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // CHECK-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]] for (long long i = -10; i < 10; i += 3) { // CHECK: [[SIMPLE_LOOP8_BODY]]: // Start of body: calculate i from IV: -// CHECK: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]] +// CHECK: [[IV8_0:%.+]] = load i64, ptr [[OMP_IV8]] // CHECK-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3 // CHECK-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]] -// CHECK-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]], -// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]] -// OMP45: store i32 %{{.+}}, i32* [[R_PRIV]], -// OMP50: store i32 %{{.+}}, i32* [[R_PRIV]],{{.*}}!nontemporal +// CHECK-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]], +// CHECK-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]] +// OMP45: store i32 %{{.+}}, ptr [[R_PRIV]], +// OMP50: store i32 %{{.+}}, ptr [[R_PRIV]],{{.*}}!nontemporal R *= i; -// CHECK: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]] +// CHECK: [[IV8_2:%.+]] = load i64, ptr [[OMP_IV8]] // CHECK-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1 -// CHECK-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]] +// CHECK-NEXT: store i64 [[ADD8_2]], ptr [[OMP_IV8]] // CHECK-NEXT: br label {{%?}}[[SIMD_LOOP8_COND]], {{.*}}!llvm.loop ![[SIMD_LOOP:.+]] } // CHECK: [[SIMPLE_LOOP8_END]]: // OMP50: br label {{%?}}[[IF_EXIT:[^,]+]] // OMP50: [[ELSE]]: -// OMP50: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) -// OMP50: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// OMP50: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1) +// OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // OMP50: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 6 // OMP50: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // OMP50: [[TRUE]]: // OMP50: br label %[[SWITCH:[^,]+]] // OMP50: [[FALSE]]: -// OMP50: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// OMP50: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // OMP50: br label %[[SWITCH]] // OMP50: [[SWITCH]]: // OMP50: [[UP:%.+]] = phi i64 [ 6, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// OMP50: store i64 [[UP]], i64* [[UB]], -// OMP50: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// OMP50: store i64 [[LB_VAL]], i64* [[OMP_IV8:%[^,]+]], +// OMP50: store i64 [[UP]], ptr [[UB]], +// OMP50: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// OMP50: store i64 [[LB_VAL]], ptr [[OMP_IV8:%[^,]+]], // OMP50: br label %[[SIMD_LOOP8_COND:[^,]+]] // OMP50: [[SIMD_LOOP8_COND]]: -// OMP50-NEXT: [[IV8:%.+]] = load i64, i64* [[OMP_IV8]] -// OMP50-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// OMP50-NEXT: [[IV8:%.+]] = load i64, ptr [[OMP_IV8]] +// OMP50-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // OMP50-NEXT: [[CMP8:%.+]] = icmp sle i64 [[IV8]], [[UB_VAL]] // OMP50-NEXT: br i1 [[CMP8]], label %[[SIMPLE_LOOP8_BODY:.+]], label %[[SIMPLE_LOOP8_END:[^,]+]] // OMP50: [[SIMPLE_LOOP8_BODY]]: // Start of body: calculate i from IV: -// OMP50: [[IV8_0:%.+]] = load i64, i64* [[OMP_IV8]] +// OMP50: [[IV8_0:%.+]] = load i64, ptr [[OMP_IV8]] // OMP50-NEXT: [[LC_IT_1:%.+]] = mul nsw i64 [[IV8_0]], 3 // OMP50-NEXT: [[LC_IT_2:%.+]] = add nsw i64 -10, [[LC_IT_1]] -// OMP50-NEXT: store i64 [[LC_IT_2]], i64* [[LC:%[^,]+]], -// OMP50-NEXT: [[LC_VAL:%.+]] = load i64, i64* [[LC]] -// OMP50: store i32 %{{.+}}, i32* [[R_PRIV]], -// OMP50: [[IV8_2:%.+]] = load i64, i64* [[OMP_IV8]] +// OMP50-NEXT: store i64 [[LC_IT_2]], ptr [[LC:%[^,]+]], +// OMP50-NEXT: [[LC_VAL:%.+]] = load i64, ptr [[LC]] +// OMP50: store i32 %{{.+}}, ptr [[R_PRIV]], +// OMP50: [[IV8_2:%.+]] = load i64, ptr [[OMP_IV8]] // OMP50-NEXT: [[ADD8_2:%.+]] = add nsw i64 [[IV8_2]], 1 -// OMP50-NEXT: store i64 [[ADD8_2]], i64* [[OMP_IV8]] +// OMP50-NEXT: store i64 [[ADD8_2]], ptr [[OMP_IV8]] // OMP50-NEXT: br label {{%?}}[[SIMD_LOOP8_COND]], {{.*}}!llvm.loop ![[NOSIMD_LOOP:.+]] // OMP50: [[SIMPLE_LOOP8_END]]: // OMP50: br label {{%?}}[[IF_EXIT]] // OMP50: [[IF_EXIT]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) // CHECK: call i32 @__kmpc_reduce( -// CHECK: [[R_PRIV_VAL:%.+]] = load i32, i32* [[R_PRIV]], +// CHECK: [[R_PRIV_VAL:%.+]] = load i32, ptr [[R_PRIV]], // CHECK: [[RED:%.+]] = mul nsw i32 %{{.+}}, [[R_PRIV_VAL]] -// CHECK-NEXT: store i32 [[RED]], i32* %{{.+}}, +// CHECK-NEXT: store i32 [[RED]], ptr %{{.+}}, // CHECK-NEXT: call void @__kmpc_end_reduce( -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) } } @@ -437,52 +437,52 @@ int templ1(T a, T *z) { } // Instatiation templ1 -// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float noundef {{.+}}, float* noundef {{.+}}) -// CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 45, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 2) -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK-LABEL: define {{.*i32}} @{{.*}}templ1{{.*}}(float noundef {{.+}}, ptr noundef {{.+}}) +// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 45, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 2) +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], 15 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i64 [ 15, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i64 [[UP]], i64* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// CHECK: store i64 [[LB_VAL]], i64* [[T1_OMP_IV:%[^,]+]], +// CHECK: store i64 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// CHECK: store i64 [[LB_VAL]], ptr [[T1_OMP_IV:%[^,]+]], // ... // CHECK: icmp sle i64 -// CHECK: [[IV:%.+]] = load i64, i64* [[T1_OMP_IV]] -// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// CHECK: [[IV:%.+]] = load i64, ptr [[T1_OMP_IV]] +// CHECK-NEXT: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // CHECK-NEXT: [[CMP1:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP1]], label %[[T1_BODY:.+]], label %[[T1_END:[^,]+]] // CHECK: [[T1_BODY]]: // Loop counters i and j updates: -// CHECK: [[IV1:%.+]] = load i64, i64* [[T1_OMP_IV]] +// CHECK: [[IV1:%.+]] = load i64, ptr [[T1_OMP_IV]] // CHECK-NEXT: [[I_1:%.+]] = sdiv i64 [[IV1]], 4 // CHECK-NEXT: [[I_1_MUL1:%.+]] = mul nsw i64 [[I_1]], 1 // CHECK-NEXT: [[I_1_ADD0:%.+]] = add nsw i64 0, [[I_1_MUL1]] // CHECK-NEXT: [[I_2:%.+]] = trunc i64 [[I_1_ADD0]] to i32 -// CHECK-NEXT: store i32 [[I_2]], i32* -// CHECK: [[IV2:%.+]] = load i64, i64* [[T1_OMP_IV]] -// CHECK-NEXT: [[IV2_1:%.+]] = load i64, i64* [[T1_OMP_IV]] +// CHECK-NEXT: store i32 [[I_2]], ptr +// CHECK: [[IV2:%.+]] = load i64, ptr [[T1_OMP_IV]] +// CHECK-NEXT: [[IV2_1:%.+]] = load i64, ptr [[T1_OMP_IV]] // CHECK-NEXT: [[DIV_2:%.+]] = sdiv i64 [[IV2_1]], 4 // CHECK-NEXT: [[MUL_2:%.+]] = mul nsw i64 [[DIV_2]], 4 // CHECK-NEXT: [[J_1:%.+]] = sub nsw i64 [[IV2]], [[MUL_2]] // CHECK-NEXT: [[J_2:%.+]] = mul nsw i64 [[J_1]], 2 // CHECK-NEXT: [[J_2_ADD0:%.+]] = add nsw i64 0, [[J_2]] -// CHECK-NEXT: store i64 [[J_2_ADD0]], i64* +// CHECK-NEXT: store i64 [[J_2_ADD0]], ptr // simd.for.inc: -// CHECK: [[IV3:%.+]] = load i64, i64* [[T1_OMP_IV]] +// CHECK: [[IV3:%.+]] = load i64, ptr [[T1_OMP_IV]] // CHECK-NEXT: [[INC:%.+]] = add nsw i64 [[IV3]], 1 -// CHECK-NEXT: store i64 [[INC]], i64* [[T1_OMP_IV]] +// CHECK-NEXT: store i64 [[INC]], ptr [[T1_OMP_IV]] // CHECK-NEXT: br label {{%.+}} // CHECK: [[T1_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) // CHECK: ret i32 0 // void inst_templ1() { @@ -529,34 +529,34 @@ void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) { // CHECK-NEXT: [[DIFF3:%.+]] = add nsw i32 [[DIFF2]], 1 // CHECK-NEXT: [[DIFF4:%.+]] = sdiv i32 [[DIFF3]], 1 // CHECK-NEXT: [[DIFF5:%.+]] = sub nsw i32 [[DIFF4]], 1 -// CHECK-NEXT: store i32 [[DIFF5]], i32* [[OMP_LAST_IT:%[^,]+]]{{.+}} +// CHECK-NEXT: store i32 [[DIFF5]], ptr [[OMP_LAST_IT:%[^,]+]]{{.+}} #pragma omp for simd -// CHECK: call void @__kmpc_for_static_init_4(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) -// CHECK-DAG: [[UB_VAL:%.+]] = load i32, i32* [[UB]], -// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]], +// CHECK: call void @__kmpc_for_static_init_4(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1) +// CHECK-DAG: [[UB_VAL:%.+]] = load i32, ptr [[UB]], +// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]], // CHECK: [[CMP:%.+]] = icmp sgt i32 [[UB_VAL]], [[OMP_LAST_IT_VAL]] // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: -// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, i32* [[OMP_LAST_IT]], +// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i32, ptr [[OMP_LAST_IT]], // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i32 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i32 [[UP]], i32* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[IT_OMP_IV:%[^,]+]], +// CHECK: store i32 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[IT_OMP_IV:%[^,]+]], -// CHECK: [[IV:%.+]] = load i32, i32* [[IT_OMP_IV]] -// CHECK-NEXT: [[UB_VAL:%.+]] = load i32, i32* [[UB]] +// CHECK: [[IV:%.+]] = load i32, ptr [[IT_OMP_IV]] +// CHECK-NEXT: [[UB_VAL:%.+]] = load i32, ptr [[UB]] // CHECK-NEXT: [[CMP:%.+]] = icmp sle i32 [[IV]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP]], label %[[IT_BODY:[^,]+]], label %[[IT_END:[^,]+]] for (IterDouble i = ia; i < ib; ++i) { // CHECK: [[IT_BODY]]: // Start of body: calculate i from index: -// CHECK: [[IV1:%.+]] = load i32, i32* [[IT_OMP_IV]] +// CHECK: [[IV1:%.+]] = load i32, ptr [[IT_OMP_IV]] // Call of operator+ (i, IV). // CHECK: {{%.+}} = invoke {{.+}} @{{.*}}IterDouble{{.*}} // ... loop body ... @@ -564,17 +564,17 @@ void iter_simple(IterDouble ia, IterDouble ib, IterDouble ic) { // Float multiply and save result. // CHECK: [[MULR:%.+]] = fmul double {{%.+}}, 5.000000e-01 // CHECK-NEXT: invoke {{.+}} @{{.*}}IterDouble{{.*}} -// CHECK: store double [[MULR:%.+]], double* [[RESULT_ADDR:%.+]] +// CHECK: store double [[MULR:%.+]], ptr [[RESULT_ADDR:%.+]] ++ic; // -// CHECK: [[IV2:%.+]] = load i32, i32* [[IT_OMP_IV]] +// CHECK: [[IV2:%.+]] = load i32, ptr [[IT_OMP_IV]] // CHECK-NEXT: [[ADD2:%.+]] = add nsw i32 [[IV2]], 1 -// CHECK-NEXT: store i32 [[ADD2]], i32* [[IT_OMP_IV]] +// CHECK-NEXT: store i32 [[ADD2]], ptr [[IT_OMP_IV]] // br label %{{.*}}, !llvm.loop ![[ITER_LOOP_ID]] } // CHECK: [[IT_END]]: -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) // CHECK: ret void } @@ -585,25 +585,25 @@ void collapsed(float *a, float *b, float *c, float *d) { unsigned j; // middle loop couter, leads to unsigned icmp in loop header. // k declared in the loop init below short l; // inner loop counter -// CHECK: call void @__kmpc_for_static_init_4u(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i32* [[LB:%[^,]+]], i32* [[UB:%[^,]+]], i32* [[STRIDE:%[^,]+]], i32 1, i32 1) -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: call void @__kmpc_for_static_init_4u(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i32 1, i32 1) +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: [[CMP:%.+]] = icmp ugt i32 [[UB_VAL]], 119 // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i32 [ 119, %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i32 [[UP]], i32* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i32, i32* [[LB]], -// CHECK: store i32 [[LB_VAL]], i32* [[OMP_IV:%[^,]+]], +// CHECK: store i32 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i32, ptr [[LB]], +// CHECK: store i32 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]], // #pragma omp for simd collapse(4) -// CHECK: [[IV:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[UB_VAL:%.+]] = load i32, i32* [[UB]] +// CHECK: [[IV:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[UB_VAL:%.+]] = load i32, ptr [[UB]] // CHECK-NEXT: [[CMP:%.+]] = icmp ule i32 [[IV]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP]], label %[[COLL1_BODY:[^,]+]], label %[[COLL1_END:[^,]+]] for (i = 1; i < 3; i++) // 2 iterations @@ -613,31 +613,31 @@ void collapsed(float *a, float *b, float *c, float *d) { { // CHECK: [[COLL1_BODY]]: // Start of body: calculate i from index: -// CHECK: [[IV1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1:%.+]] = load i32, ptr [[OMP_IV]] // Calculation of the loop counters values. // CHECK: [[CALC_I_1:%.+]] = udiv i32 [[IV1]], 60 // CHECK-NEXT: [[CALC_I_1_MUL1:%.+]] = mul i32 [[CALC_I_1]], 1 // CHECK-NEXT: [[CALC_I_2:%.+]] = add i32 1, [[CALC_I_1_MUL1]] -// CHECK-NEXT: store i32 [[CALC_I_2]], i32* [[LC_I:.+]] +// CHECK-NEXT: store i32 [[CALC_I_2]], ptr [[LC_I:.+]] -// CHECK: [[IV1_2:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_2_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_2:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_2_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[CALC_J_1:%.+]] = udiv i32 [[IV1_2_1]], 60 // CHECK-NEXT: [[MUL_1:%.+]] = mul i32 [[CALC_J_1]], 60 // CHECK-NEXT: [[SUB_3:%.+]] = sub i32 [[IV1_2]], [[MUL_1]] // CHECK-NEXT: [[CALC_J_2:%.+]] = udiv i32 [[SUB_3]], 20 // CHECK-NEXT: [[CALC_J_2_MUL1:%.+]] = mul i32 [[CALC_J_2]], 1 // CHECK-NEXT: [[CALC_J_3:%.+]] = add i32 2, [[CALC_J_2_MUL1]] -// CHECK-NEXT: store i32 [[CALC_J_3]], i32* [[LC_J:.+]] +// CHECK-NEXT: store i32 [[CALC_J_3]], ptr [[LC_J:.+]] -// CHECK: [[IV1_3:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_3_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_3:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_3_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_1:%.+]] = udiv i32 [[IV1_3_1]], 60 // CHECK-NEXT: [[MUL_2:%.+]] = mul i32 [[DIV_1]], 60 // CHECK-NEXT: [[ADD_3:%.+]] = sub i32 [[IV1_3]], [[MUL_2]] -// CHECK: [[IV1_4:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_4_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_4:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_4_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_2:%.+]] = udiv i32 [[IV1_4_1]], 60 // CHECK-NEXT: [[MUL_3:%.+]] = mul i32 [[DIV_2]], 60 // CHECK-NEXT: [[SUB_6:%.+]] = sub i32 [[IV1_4]], [[MUL_3]] @@ -647,16 +647,16 @@ void collapsed(float *a, float *b, float *c, float *d) { // CHECK-NEXT: [[DIV_4:%.+]] = udiv i32 [[SUB_7]], 5 // CHECK-NEXT: [[MUL_5:%.+]] = mul i32 [[DIV_4]], 1 // CHECK-NEXT: [[ADD_6:%.+]] = add i32 3, [[MUL_5]] -// CHECK-NEXT: store i32 [[ADD_6]], i32* [[LC_K:.+]] +// CHECK-NEXT: store i32 [[ADD_6]], ptr [[LC_K:.+]] -// CHECK: [[IV1_5:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_5_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_5:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_5_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_5:%.+]] = udiv i32 [[IV1_5_1]], 60 // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[DIV_5]], 60 // CHECK-NEXT: [[ADD_7:%.+]] = sub i32 [[IV1_5]], [[MUL_6]] -// CHECK: [[IV1_6:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_6_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_6:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_6_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_6:%.+]] = udiv i32 [[IV1_6_1]], 60 // CHECK-NEXT: [[MUL_7:%.+]] = mul i32 [[DIV_6]], 60 // CHECK-NEXT: [[SUB_10:%.+]] = sub i32 [[IV1_6]], [[MUL_7]] @@ -664,14 +664,14 @@ void collapsed(float *a, float *b, float *c, float *d) { // CHECK-NEXT: [[MUL_8:%.+]] = mul i32 [[DIV_7]], 20 // CHECK-NEXT: [[ADD_9:%.+]] = sub i32 [[ADD_7]], [[MUL_8]] -// CHECK: [[IV1_7:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_7_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_7:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_7_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_8:%.+]] = udiv i32 [[IV1_7_1]], 60 // CHECK-NEXT: [[MUL_9:%.+]] = mul i32 [[DIV_8]], 60 // CHECK-NEXT: [[ADD_10:%.+]] = sub i32 [[IV1_7]], [[MUL_9]] -// CHECK: [[IV1_8:%.+]] = load i32, i32* [[OMP_IV]] -// CHECK: [[IV1_8_1:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV1_8:%.+]] = load i32, ptr [[OMP_IV]] +// CHECK: [[IV1_8_1:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[DIV_3:%.+]] = udiv i32 [[IV1_8_1]], 60 // CHECK-NEXT: [[MUL_4:%.+]] = mul i32 [[DIV_3]], 60 // CHECK-NEXT: [[SUB_7:%.+]] = sub i32 [[IV1_8]], [[MUL_4]] @@ -684,26 +684,26 @@ void collapsed(float *a, float *b, float *c, float *d) { // CHECK-NEXT: [[MUL_6:%.+]] = mul i32 [[SUB_9]], 1 // CHECK-NEXT: [[CALC_L_2:%.+]] = add i32 4, [[MUL_6]] // CHECK-NEXT: [[CALC_L_3:%.+]] = trunc i32 [[CALC_L_2]] to i16 -// CHECK-NEXT: store i16 [[CALC_L_3]], i16* [[LC_L:.+]] +// CHECK-NEXT: store i16 [[CALC_L_3]], ptr [[LC_L:.+]] // ... loop body ... // End of body: store into a[i]: -// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]] +// CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]] float res = b[j] * c[k]; a[i] = res * d[l]; -// CHECK: [[IV2:%.+]] = load i32, i32* [[OMP_IV]] +// CHECK: [[IV2:%.+]] = load i32, ptr [[OMP_IV]] // CHECK-NEXT: [[ADD2:%.+]] = add i32 [[IV2]], 1 -// CHECK-NEXT: store i32 [[ADD2]], i32* [[OMP_IV]] +// CHECK-NEXT: store i32 [[ADD2]], ptr [[OMP_IV]] // br label %{{[^,]+}}, !llvm.loop ![[COLL1_LOOP_ID]] // CHECK: [[COLL1_END]]: } // i,j,l are updated; k is not updated. -// CHECK: call void @__kmpc_for_static_fini(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK: call void @__kmpc_for_static_fini(ptr {{.+}}, i32 %{{.+}}) // CHECK: br i1 -// CHECK: store i32 3, i32* +// CHECK: store i32 3, ptr // CHECK-NEXT: store i32 5, // CHECK-NEXT: store i32 7, -// CHECK-NEXT: store i16 9, i16* -// CHECK: call void @__kmpc_barrier(%struct.ident_t* {{.+}}, i32 %{{.+}}) +// CHECK-NEXT: store i16 9, ptr +// CHECK: call void @__kmpc_barrier(ptr {{.+}}, i32 %{{.+}}) // CHECK: ret void } @@ -716,32 +716,32 @@ void widened(float *a, float *b, float *c, float *d) { short j; // inner loop counter globalfloat = 1.0; int localint = 1; -// CHECK: store double {{.+}}, double* [[GLOBALFLOAT:@.+]] +// CHECK: store double {{.+}}, ptr [[GLOBALFLOAT:@.+]] // Counter is widened to 64 bits. // CHECK: [[MUL:%.+]] = mul nsw i64 2, %{{.+}} // CHECK-NEXT: [[SUB:%.+]] = sub nsw i64 [[MUL]], 1 -// CHECK-NEXT: store i64 [[SUB]], i64* [[OMP_LAST_IT:%[^,]+]], -// CHECK: call void @__kmpc_for_static_init_8(%struct.ident_t* {{[^,]+}}, i32 %{{[^,]+}}, i32 34, i32* %{{[^,]+}}, i64* [[LB:%[^,]+]], i64* [[UB:%[^,]+]], i64* [[STRIDE:%[^,]+]], i64 1, i64 1) -// CHECK-DAG: [[UB_VAL:%.+]] = load i64, i64* [[UB]], -// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]], +// CHECK-NEXT: store i64 [[SUB]], ptr [[OMP_LAST_IT:%[^,]+]], +// CHECK: call void @__kmpc_for_static_init_8(ptr {{[^,]+}}, i32 %{{[^,]+}}, i32 34, ptr %{{[^,]+}}, ptr [[LB:%[^,]+]], ptr [[UB:%[^,]+]], ptr [[STRIDE:%[^,]+]], i64 1, i64 1) +// CHECK-DAG: [[UB_VAL:%.+]] = load i64, ptr [[UB]], +// CHECK-DAG: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]], // CHECK: [[CMP:%.+]] = icmp sgt i64 [[UB_VAL]], [[OMP_LAST_IT_VAL]] // CHECK: br i1 [[CMP]], label %[[TRUE:.+]], label %[[FALSE:[^,]+]] // CHECK: [[TRUE]]: -// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, i64* [[OMP_LAST_IT]], +// CHECK: [[OMP_LAST_IT_VAL:%.+]] = load i64, ptr [[OMP_LAST_IT]], // CHECK: br label %[[SWITCH:[^,]+]] // CHECK: [[FALSE]]: -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]], +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]], // CHECK: br label %[[SWITCH]] // CHECK: [[SWITCH]]: // CHECK: [[UP:%.+]] = phi i64 [ [[OMP_LAST_IT_VAL]], %[[TRUE]] ], [ [[UB_VAL]], %[[FALSE]] ] -// CHECK: store i64 [[UP]], i64* [[UB]], -// CHECK: [[LB_VAL:%.+]] = load i64, i64* [[LB]], -// CHECK: store i64 [[LB_VAL]], i64* [[OMP_IV:%[^,]+]], +// CHECK: store i64 [[UP]], ptr [[UB]], +// CHECK: [[LB_VAL:%.+]] = load i64, ptr [[LB]], +// CHECK: store i64 [[LB_VAL]], ptr [[OMP_IV:%[^,]+]], // #pragma omp for simd collapse(2) private(globalfloat, localint) -// CHECK: [[IV:%.+]] = load i64, i64* [[OMP_IV]] -// CHECK: [[UB_VAL:%.+]] = load i64, i64* [[UB]] +// CHECK: [[IV:%.+]] = load i64, ptr [[OMP_IV]] +// CHECK: [[UB_VAL:%.+]] = load i64, ptr [[UB]] // CHECK-NEXT: [[CMP:%.+]] = icmp sle i64 [[IV]], [[UB_VAL]] // CHECK-NEXT: br i1 [[CMP]], label %[[WIDE1_BODY:[^,]+]], label %[[WIDE1_END:[^,]+]] for (i = 1; i < 3; i++) // 2 iterations @@ -749,36 +749,36 @@ void widened(float *a, float *b, float *c, float *d) { { // CHECK: [[WIDE1_BODY]]: // Start of body: calculate i from index: -// CHECK: [[IV1:%.+]] = load i64, i64* [[OMP_IV]] +// CHECK: [[IV1:%.+]] = load i64, ptr [[OMP_IV]] // Calculation of the loop counters values... -// CHECK: store i32 {{[^,]+}}, i32* [[LC_I:.+]] -// CHECK: [[IV1_2:%.+]] = load i64, i64* [[OMP_IV]] -// CHECK: store i16 {{[^,]+}}, i16* [[LC_J:.+]] +// CHECK: store i32 {{[^,]+}}, ptr [[LC_I:.+]] +// CHECK: [[IV1_2:%.+]] = load i64, ptr [[OMP_IV]] +// CHECK: store i16 {{[^,]+}}, ptr [[LC_J:.+]] // ... loop body ... // // Here we expect store into private double var, not global -// CHECK-NOT: store double {{.+}}, double* [[GLOBALFLOAT]] +// CHECK-NOT: store double {{.+}}, ptr [[GLOBALFLOAT]] globalfloat = (float)j/i; float res = b[j] * c[j]; // Store into a[i]: -// CHECK: store float [[RESULT:%.+]], float* [[RESULT_ADDR:%.+]] +// CHECK: store float [[RESULT:%.+]], ptr [[RESULT_ADDR:%.+]] a[i] = res * d[i]; // Then there's a store into private var localint: -// CHECK: store i32 {{.+}}, i32* [[LOCALINT:%[^,]+]] +// CHECK: store i32 {{.+}}, ptr [[LOCALINT:%[^,]+]] localint = (int)j; -// CHECK: [[IV2:%.+]] = load i64, i64* [[OMP_IV]] +// CHECK: [[IV2:%.+]] = load i64, ptr [[OMP_IV]] // CHECK-NEXT: [[ADD2:%.+]] = add nsw i64 [[IV2]], 1 -// CHECK-NEXT: store i64 [[ADD2]], i64* [[OMP_IV]] +// CHECK-NEXT: store i64 [[ADD2]], ptr [[OMP_IV]] // // br label %{{[^,]+}}, !llvm.loop ![[WIDE1_LOOP_ID]] // CHECK: [[WIDE1_END]]: } // i,j are updated. -// CHECK: store i32 3, i32* [[I:%[^,]+]] +// CHECK: store i32 3, ptr [[I:%[^,]+]] // CHECK: store i16 // // Here we expect store into original localint, not its privatized version. -// CHECK-NOT: store i32 {{.+}}, i32* [[LOCALINT]] +// CHECK-NOT: store i32 {{.+}}, ptr [[LOCALINT]] localint = (int)j; // CHECK: ret void }