diff --git a/llvm/docs/GlobalISel/GenericOpcode.rst b/llvm/docs/GlobalISel/GenericOpcode.rst
index 6f0d7b5b4a6e9..5fd79d0c672f2 100644
--- a/llvm/docs/GlobalISel/GenericOpcode.rst
+++ b/llvm/docs/GlobalISel/GenericOpcode.rst
@@ -252,6 +252,12 @@ The source operands are registers as follows:
 - The least-significant bit for the extraction
 - The width of the extraction
 
+The least-significant bit (lsb) and width operands are in the range:
+
+::
+
+      0 <= lsb < lsb + width <= source bitwidth, where all values are unsigned
+
 G_SBFX sign-extends the result, while G_UBFX zero-extends the result.
 
 .. code-block:: none
diff --git a/llvm/include/llvm/Target/GenericOpcodes.td b/llvm/include/llvm/Target/GenericOpcodes.td
index 600afa1017a48..113799611e738 100644
--- a/llvm/include/llvm/Target/GenericOpcodes.td
+++ b/llvm/include/llvm/Target/GenericOpcodes.td
@@ -1379,14 +1379,16 @@ def G_BZERO : GenericInstruction {
 // Bitfield extraction.
 //------------------------------------------------------------------------------
 
-// Generic signed bitfield extraction.
+// Generic signed bitfield extraction. The operands are in the range
+// 0 <= lsb < lsb + width <= src bitwidth, where all values are unsigned.
 def G_SBFX : GenericInstruction {
   let OutOperandList = (outs type0:$dst);
   let InOperandList = (ins type0:$src, type1:$lsb, type1:$width);
   let hasSideEffects = false;
 }
 
-// Generic unsigned bitfield extraction.
+// Generic unsigned bitfield extraction. The operands are in the range
+// 0 <= lsb < lsb + width <= src bitwidth, where all values are unsigned.
 def G_UBFX : GenericInstruction {
   let OutOperandList = (outs type0:$dst);
   let InOperandList = (ins type0:$src, type1:$lsb, type1:$width);