diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index 12a406455d5ada..dfafcf812fe247 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -flax-vector-conversions=none -fms-extensions -fms-compatibility -ffreestanding %s -triple=x86_64-windows-msvc -target-feature +avx512f -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s #include @@ -176,7 +176,7 @@ __m512d test_mm512_mul_pd(__m512d a, __m512d b) void test_mm512_storeu_si512 (void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_storeu_si512 - // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} // CHECK-NEXT: ret void _mm512_storeu_si512 ( __P,__A); } @@ -184,7 +184,7 @@ void test_mm512_storeu_si512 (void *__P, __m512i __A) void test_mm512_storeu_ps(void *p, __m512 a) { // CHECK-LABEL: @test_mm512_storeu_ps - // CHECK: store <16 x float> %{{.*}}, <16 x float>* %{{.*}}, align 1{{$}} + // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 1{{$}} // CHECK-NEXT: ret void _mm512_storeu_ps(p, a); } @@ -192,7 +192,7 @@ void test_mm512_storeu_ps(void *p, __m512 a) void test_mm512_storeu_pd(void *p, __m512d a) { // CHECK-LABEL: @test_mm512_storeu_pd - // CHECK: store <8 x double> %{{.*}}, <8 x double>* %{{.*}}, align 1{{$}} + // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 1{{$}} // CHECK-NEXT: ret void _mm512_storeu_pd(p, a); } @@ -200,16 +200,15 @@ void test_mm512_storeu_pd(void *p, __m512d a) void test_mm512_mask_store_ps(void *p, __m512 a, __mmask16 m) { // CHECK-LABEL: @test_mm512_mask_store_ps - // CHECK: @llvm.masked.store.v16f32.p0v16f32(<16 x float> %{{.*}}, <16 x float>* %{{.*}}, i32 64, <16 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v16f32.p0(<16 x float> %{{.*}}, ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}) _mm512_mask_store_ps(p, m, a); } void test_mm512_store_si512 (void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_store_si512 - // CHECK: load <8 x i64>, <8 x i64>* %__A.addr.i, align 64{{$}} - // CHECK: [[SI512_3:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: bitcast i8* [[SI512_3]] to <8 x i64>* + // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}} + // CHECK: [[SI512_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} // CHECK: store <8 x i64> _mm512_store_si512 ( __P,__A); } @@ -217,9 +216,8 @@ void test_mm512_store_si512 (void *__P, __m512i __A) void test_mm512_store_epi32 (void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_store_epi32 - // CHECK: load <8 x i64>, <8 x i64>* %__A.addr.i, align 64{{$}} - // CHECK: [[Si32_3:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: bitcast i8* [[Si32_3]] to <8 x i64>* + // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}} + // CHECK: [[Si32_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} // CHECK: store <8 x i64> _mm512_store_epi32 ( __P,__A); } @@ -227,9 +225,8 @@ void test_mm512_store_epi32 (void *__P, __m512i __A) void test_mm512_store_epi64 (void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_store_epi64 - // CHECK: load <8 x i64>, <8 x i64>* %__A.addr.i, align 64{{$}} - // CHECK: [[SI64_3:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: bitcast i8* [[SI64_3]] to <8 x i64>* + // CHECK: load <8 x i64>, ptr %__A.addr.i, align 64{{$}} + // CHECK: [[SI64_3:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} // CHECK: store <8 x i64> _mm512_store_epi64 ( __P,__A); } @@ -251,177 +248,174 @@ void test_mm512_store_pd(void *p, __m512d a) void test_mm512_mask_store_pd(void *p, __m512d a, __mmask8 m) { // CHECK-LABEL: @test_mm512_mask_store_pd - // CHECK: @llvm.masked.store.v8f64.p0v8f64(<8 x double> %{{.*}}, <8 x double>* %{{.*}}, i32 64, <8 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v8f64.p0(<8 x double> %{{.*}}, ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}) _mm512_mask_store_pd(p, m, a); } void test_mm512_storeu_epi32(void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_storeu_epi32 - // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm512_storeu_epi32(__P, __A); } void test_mm512_mask_storeu_epi32(void *__P, __mmask16 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_storeu_epi32 - // CHECK: @llvm.masked.store.v16i32.p0v16i32(<16 x i32> %{{.*}}, <16 x i32>* %{{.*}}, i32 1, <16 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v16i32.p0(<16 x i32> %{{.*}}, ptr %{{.*}}, i32 1, <16 x i1> %{{.*}}) return _mm512_mask_storeu_epi32(__P, __U, __A); } void test_mm512_storeu_epi64(void *__P, __m512i __A) { // CHECK-LABEL: @test_mm512_storeu_epi64 - // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm512_storeu_epi64(__P, __A); } void test_mm512_mask_storeu_epi64(void *__P, __mmask8 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_storeu_epi64 - // CHECK: @llvm.masked.store.v8i64.p0v8i64(<8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, i32 1, <8 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v8i64.p0(<8 x i64> %{{.*}}, ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}) return _mm512_mask_storeu_epi64(__P, __U, __A); } __m512i test_mm512_loadu_si512 (void *__P) { // CHECK-LABEL: @test_mm512_loadu_si512 - // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}} return _mm512_loadu_si512 ( __P); } __m512i test_mm512_loadu_epi32 (void *__P) { // CHECK-LABEL: @test_mm512_loadu_epi32 - // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}} return _mm512_loadu_epi32 (__P); } __m512i test_mm512_mask_loadu_epi32 (__m512i __W, __mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_loadu_epi32 - // CHECK: @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.load.v16i32.p0(ptr %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_mask_loadu_epi32 (__W,__U, __P); } __m512i test_mm512_maskz_loadu_epi32 (__mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_maskz_loadu_epi32 - // CHECK: @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.load.v16i32.p0(ptr %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_maskz_loadu_epi32 (__U, __P); } __m512i test_mm512_loadu_epi64 (void *__P) { // CHECK-LABEL: @test_mm512_loadu_epi64 - // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 1{{$}} + // CHECK: load <8 x i64>, ptr %{{.*}}, align 1{{$}} return _mm512_loadu_epi64 (__P); } __m512i test_mm512_mask_loadu_epi64 (__m512i __W, __mmask8 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_loadu_epi64 - // CHECK: @llvm.masked.load.v8i64.p0v8i64(<8 x i64>* %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.load.v8i64.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_mask_loadu_epi64 (__W,__U, __P); } __m512i test_mm512_maskz_loadu_epi64 (__mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_maskz_loadu_epi64 - // CHECK: @llvm.masked.load.v8i64.p0v8i64(<8 x i64>* %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.load.v8i64.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_maskz_loadu_epi64 (__U, __P); } __m512 test_mm512_loadu_ps(void *p) { // CHECK-LABEL: @test_mm512_loadu_ps - // CHECK: load <16 x float>, <16 x float>* {{.*}}, align 1{{$}} + // CHECK: load <16 x float>, ptr {{.*}}, align 1{{$}} return _mm512_loadu_ps(p); } __m512 test_mm512_mask_loadu_ps (__m512 __W, __mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_loadu_ps - // CHECK: @llvm.masked.load.v16f32.p0v16f32(<16 x float>* %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) + // CHECK: @llvm.masked.load.v16f32.p0(ptr %{{.*}}, i32 1, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) return _mm512_mask_loadu_ps (__W,__U, __P); } __m512d test_mm512_loadu_pd(void *p) { // CHECK-LABEL: @test_mm512_loadu_pd - // CHECK: load <8 x double>, <8 x double>* {{.*}}, align 1{{$}} + // CHECK: load <8 x double>, ptr {{.*}}, align 1{{$}} return _mm512_loadu_pd(p); } __m512d test_mm512_mask_loadu_pd (__m512d __W, __mmask8 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_loadu_pd - // CHECK: @llvm.masked.load.v8f64.p0v8f64(<8 x double>* %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) + // CHECK: @llvm.masked.load.v8f64.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) return _mm512_mask_loadu_pd (__W,__U, __P); } __m512i test_mm512_load_si512 (void *__P) { // CHECK-LABEL: @test_mm512_load_si512 - // CHECK: [[LI512_1:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: [[LI512_2:%.+]] = bitcast i8* [[LI512_1]] to <8 x i64>* - // CHECK: load <8 x i64>, <8 x i64>* [[LI512_2]], align 64{{$}} + // CHECK: [[LI512_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} + // CHECK: load <8 x i64>, ptr [[LI512_1]], align 64{{$}} return _mm512_load_si512 ( __P); } __m512i test_mm512_load_epi32 (void *__P) { // CHECK-LABEL: @test_mm512_load_epi32 - // CHECK: [[LI32_1:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: [[LI32_2:%.+]] = bitcast i8* [[LI32_1]] to <8 x i64>* - // CHECK: load <8 x i64>, <8 x i64>* [[LI32_2]], align 64{{$}} + // CHECK: [[LI32_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} + // CHECK: load <8 x i64>, ptr [[LI32_1]], align 64{{$}} return _mm512_load_epi32 ( __P); } __m512i test_mm512_load_epi64 (void *__P) { // CHECK-LABEL: @test_mm512_load_epi64 - // CHECK: [[LI64_1:%.+]] = load i8*, i8** %__P.addr.i, align 8{{$}} - // CHECK: [[LI64_2:%.+]] = bitcast i8* [[LI64_1]] to <8 x i64>* - // CHECK: load <8 x i64>, <8 x i64>* [[LI64_2]], align 64{{$}} + // CHECK: [[LI64_1:%.+]] = load ptr, ptr %__P.addr.i, align 8{{$}} + // CHECK: load <8 x i64>, ptr [[LI64_1]], align 64{{$}} return _mm512_load_epi64 ( __P); } __m512 test_mm512_load_ps(void *p) { // CHECK-LABEL: @test_mm512_load_ps - // CHECK: load <16 x float>, <16 x float>* %{{.*}}, align 64{{$}} + // CHECK: load <16 x float>, ptr %{{.*}}, align 64{{$}} return _mm512_load_ps(p); } __m512 test_mm512_mask_load_ps (__m512 __W, __mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_load_ps - // CHECK: @llvm.masked.load.v16f32.p0v16f32(<16 x float>* %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) + // CHECK: @llvm.masked.load.v16f32.p0(ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) return _mm512_mask_load_ps (__W,__U, __P); } __m512 test_mm512_maskz_load_ps(__mmask16 __U, void *__P) { // CHECK-LABEL: @test_mm512_maskz_load_ps - // CHECK: @llvm.masked.load.v16f32.p0v16f32(<16 x float>* %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) + // CHECK: @llvm.masked.load.v16f32.p0(ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) return _mm512_maskz_load_ps(__U, __P); } __m512d test_mm512_load_pd(void *p) { // CHECK-LABEL: @test_mm512_load_pd - // CHECK: load <8 x double>, <8 x double>* %{{.*}}, align 64{{$}} + // CHECK: load <8 x double>, ptr %{{.*}}, align 64{{$}} return _mm512_load_pd(p); } __m512d test_mm512_mask_load_pd (__m512d __W, __mmask8 __U, void *__P) { // CHECK-LABEL: @test_mm512_mask_load_pd - // CHECK: @llvm.masked.load.v8f64.p0v8f64(<8 x double>* %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) + // CHECK: @llvm.masked.load.v8f64.p0(ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) return _mm512_mask_load_pd (__W,__U, __P); } __m512d test_mm512_maskz_load_pd(__mmask8 __U, void *__P) { // CHECK-LABEL: @test_mm512_maskz_load_pd - // CHECK: @llvm.masked.load.v8f64.p0v8f64(<8 x double>* %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) + // CHECK: @llvm.masked.load.v8f64.p0(ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) return _mm512_maskz_load_pd(__U, __P); } @@ -4326,13 +4320,13 @@ __m512i test_mm512_maskz_srli_epi64_2(__mmask8 __U, __m512i __A, unsigned int __ __m512i test_mm512_mask_load_epi32(__m512i __W, __mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_load_epi32 - // CHECK: @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.load.v16i32.p0(ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_mask_load_epi32(__W, __U, __P); } __m512i test_mm512_maskz_load_epi32(__mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_load_epi32 - // CHECK: @llvm.masked.load.v16i32.p0v16i32(<16 x i32>* %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.load.v16i32.p0(ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_maskz_load_epi32(__U, __P); } @@ -4362,25 +4356,25 @@ __m512i test_mm512_maskz_mov_epi64(__mmask8 __U, __m512i __A) { __m512i test_mm512_mask_load_epi64(__m512i __W, __mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_load_epi64 - // CHECK: @llvm.masked.load.v8i64.p0v8i64(<8 x i64>* %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.load.v8i64.p0(ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_mask_load_epi64(__W, __U, __P); } __m512i test_mm512_maskz_load_epi64(__mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_load_epi64 - // CHECK: @llvm.masked.load.v8i64.p0v8i64(<8 x i64>* %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.load.v8i64.p0(ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_maskz_load_epi64(__U, __P); } void test_mm512_mask_store_epi32(void *__P, __mmask16 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_store_epi32 - // CHECK: @llvm.masked.store.v16i32.p0v16i32(<16 x i32> %{{.*}}, <16 x i32>* %{{.*}}, i32 64, <16 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v16i32.p0(<16 x i32> %{{.*}}, ptr %{{.*}}, i32 64, <16 x i1> %{{.*}}) return _mm512_mask_store_epi32(__P, __U, __A); } void test_mm512_mask_store_epi64(void *__P, __mmask8 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_store_epi64 - // CHECK: @llvm.masked.store.v8i64.p0v8i64(<8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, i32 64, <8 x i1> %{{.*}}) + // CHECK: @llvm.masked.store.v8i64.p0(<8 x i64> %{{.*}}, ptr %{{.*}}, i32 64, <8 x i1> %{{.*}}) return _mm512_mask_store_epi64(__P, __U, __A); } @@ -4610,7 +4604,7 @@ __m128 test_mm_getmant_ss(__m128 __A, __m128 __B) { __mmask16 test_mm512_kmov(__mmask16 __A) { // CHECK-LABEL: @test_mm512_kmov - // CHECK: load i16, i16* %__A.addr.i, align 2{{$}} + // CHECK: load i16, ptr %__A.addr.i, align 2{{$}} return _mm512_kmov(__A); } @@ -8525,7 +8519,7 @@ __mmask16 test_cvtu32_mask16(__m512i A, __m512i B, unsigned int C) { __mmask16 test_load_mask16(__mmask16 *A, __m512i B, __m512i C) { // CHECK-LABEL: @test_load_mask16 - // CHECK: [[LOAD:%.*]] = load i16, i16* %{{.*}}{{$}} + // CHECK: [[LOAD:%.*]] = load i16, ptr %{{.*}}{{$}} // CHECK: bitcast i16 [[LOAD]] to <16 x i1> return _mm512_mask_cmpneq_epu32_mask(_load_mask16(A), B, C); } @@ -8533,55 +8527,55 @@ __mmask16 test_load_mask16(__mmask16 *A, __m512i B, __m512i C) { void test_store_mask16(__mmask16 *A, __m512i B, __m512i C) { // CHECK-LABEL: @test_store_mask16 // CHECK: bitcast <16 x i1> %{{.*}} to i16 - // CHECK: store i16 %{{.*}}, i16* %{{.*}} + // CHECK: store i16 %{{.*}}, ptr %{{.*}} _store_mask16(A, _mm512_cmpneq_epu32_mask(B, C)); } void test_mm512_stream_si512(__m512i * __P, __m512i __A) { // CHECK-LABEL: @test_mm512_stream_si512 - // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL:![0-9]+]] + // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL:![0-9]+]] _mm512_stream_si512(__P, __A); } void test_mm512_stream_si512_2(void * __P, __m512i __A) { // CHECK-LABEL: @test_mm512_stream_si512 - // CHECK: store <8 x i64> %{{.*}}, <8 x i64>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] + // CHECK: store <8 x i64> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] _mm512_stream_si512(__P, __A); } __m512i test_mm512_stream_load_si512(void *__P) { // CHECK-LABEL: @test_mm512_stream_load_si512 - // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}} + // CHECK: load <8 x i64>, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}} return _mm512_stream_load_si512(__P); } __m512i test_mm512_stream_load_si512_const(void const *__P) { // CHECK-LABEL: @test_mm512_stream_load_si512_const - // CHECK: load <8 x i64>, <8 x i64>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}} + // CHECK: load <8 x i64>, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]]{{$}} return _mm512_stream_load_si512(__P); } void test_mm512_stream_pd(double *__P, __m512d __A) { // CHECK-LABEL: @test_mm512_stream_pd - // CHECK: store <8 x double> %{{.*}}, <8 x double>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] + // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] return _mm512_stream_pd(__P, __A); } void test_mm512_stream_pd_2(void *__P, __m512d __A) { // CHECK-LABEL: @test_mm512_stream_pd - // CHECK: store <8 x double> %{{.*}}, <8 x double>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] + // CHECK: store <8 x double> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] return _mm512_stream_pd(__P, __A); } void test_mm512_stream_ps(float *__P, __m512 __A) { // CHECK-LABEL: @test_mm512_stream_ps - // CHECK: store <16 x float> %{{.*}}, <16 x float>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] + // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] _mm512_stream_ps(__P, __A); } void test_mm512_stream_ps_2(void *__P, __m512 __A) { // CHECK-LABEL: @test_mm512_stream_ps - // CHECK: store <16 x float> %{{.*}}, <16 x float>* %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] + // CHECK: store <16 x float> %{{.*}}, ptr %{{.*}}, align 64, !nontemporal [[NONTEMPORAL]] _mm512_stream_ps(__P, __A); } __m512d test_mm512_mask_compress_pd(__m512d __W, __mmask8 __U, __m512d __A) { @@ -8765,49 +8759,49 @@ __m512i test_mm512_maskz_expand_epi64(__mmask8 __U, __m512i __A) { } __m512i test_mm512_mask_expandloadu_epi64(__m512i __W, __mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_expandloadu_epi64 - // CHECK: @llvm.masked.expandload.v8i64(i64* %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.expandload.v8i64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_mask_expandloadu_epi64(__W, __U, __P); } __m512i test_mm512_maskz_expandloadu_epi64(__mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_expandloadu_epi64 - // CHECK: @llvm.masked.expandload.v8i64(i64* %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) + // CHECK: @llvm.masked.expandload.v8i64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i64> %{{.*}}) return _mm512_maskz_expandloadu_epi64(__U, __P); } __m512d test_mm512_mask_expandloadu_pd(__m512d __W, __mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_expandloadu_pd - // CHECK: @llvm.masked.expandload.v8f64(double* %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) + // CHECK: @llvm.masked.expandload.v8f64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) return _mm512_mask_expandloadu_pd(__W, __U, __P); } __m512d test_mm512_maskz_expandloadu_pd(__mmask8 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_expandloadu_pd - // CHECK: @llvm.masked.expandload.v8f64(double* %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) + // CHECK: @llvm.masked.expandload.v8f64(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x double> %{{.*}}) return _mm512_maskz_expandloadu_pd(__U, __P); } __m512i test_mm512_mask_expandloadu_epi32(__m512i __W, __mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_expandloadu_epi32 - // CHECK: @llvm.masked.expandload.v16i32(i32* %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.expandload.v16i32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_mask_expandloadu_epi32(__W, __U, __P); } __m512i test_mm512_maskz_expandloadu_epi32(__mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_expandloadu_epi32 - // CHECK: @llvm.masked.expandload.v16i32(i32* %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) + // CHECK: @llvm.masked.expandload.v16i32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x i32> %{{.*}}) return _mm512_maskz_expandloadu_epi32(__U, __P); } __m512 test_mm512_mask_expandloadu_ps(__m512 __W, __mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_mask_expandloadu_ps - // CHECK: @llvm.masked.expandload.v16f32(float* %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) + // CHECK: @llvm.masked.expandload.v16f32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) return _mm512_mask_expandloadu_ps(__W, __U, __P); } __m512 test_mm512_maskz_expandloadu_ps(__mmask16 __U, void const *__P) { // CHECK-LABEL: @test_mm512_maskz_expandloadu_ps - // CHECK: @llvm.masked.expandload.v16f32(float* %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) + // CHECK: @llvm.masked.expandload.v16f32(ptr %{{.*}}, <16 x i1> %{{.*}}, <16 x float> %{{.*}}) return _mm512_maskz_expandloadu_ps(__U, __P); } @@ -8912,25 +8906,25 @@ __m512 test_mm512_maskz_mov_ps(__mmask16 __U, __m512 __A) { void test_mm512_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m512d __A) { // CHECK-LABEL: @test_mm512_mask_compressstoreu_pd - // CHECK: @llvm.masked.compressstore.v8f64(<8 x double> %{{.*}}, double* %{{.*}}, <8 x i1> %{{.*}}) + // CHECK: @llvm.masked.compressstore.v8f64(<8 x double> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}}) return _mm512_mask_compressstoreu_pd(__P, __U, __A); } void test_mm512_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_compressstoreu_epi64 - // CHECK: @llvm.masked.compressstore.v8i64(<8 x i64> %{{.*}}, i64* %{{.*}}, <8 x i1> %{{.*}}) + // CHECK: @llvm.masked.compressstore.v8i64(<8 x i64> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}}) return _mm512_mask_compressstoreu_epi64(__P, __U, __A); } void test_mm512_mask_compressstoreu_ps(void *__P, __mmask16 __U, __m512 __A) { // CHECK-LABEL: @test_mm512_mask_compressstoreu_ps - // CHECK: @llvm.masked.compressstore.v16f32(<16 x float> %{{.*}}, float* %{{.*}}, <16 x i1> %{{.*}}) + // CHECK: @llvm.masked.compressstore.v16f32(<16 x float> %{{.*}}, ptr %{{.*}}, <16 x i1> %{{.*}}) return _mm512_mask_compressstoreu_ps(__P, __U, __A); } void test_mm512_mask_compressstoreu_epi32(void *__P, __mmask16 __U, __m512i __A) { // CHECK-LABEL: @test_mm512_mask_compressstoreu_epi32 - // CHECK: @llvm.masked.compressstore.v16i32(<16 x i32> %{{.*}}, i32* %{{.*}}, <16 x i1> %{{.*}}) + // CHECK: @llvm.masked.compressstore.v16i32(<16 x i32> %{{.*}}, ptr %{{.*}}, <16 x i1> %{{.*}}) return _mm512_mask_compressstoreu_epi32(__P, __U, __A); } @@ -10122,70 +10116,70 @@ __m512i test_mm512_set_epi8(char e63, char e62, char e61, char e60, char e59, char e1, char e0) { //CHECK-LABEL: @test_mm512_set_epi8 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 - //CHECK: load i8, i8* %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 + //CHECK: load i8, ptr %{{.*}}, align 1 return _mm512_set_epi8(e63, e62, e61, e60, e59, e58, e57, e56, e55, e54, e53, e52, e51, e50, e49, e48,e47, e46, e45, e44, e43, e42, e41, e40, e39, e38, e37, e36, e35, e34, e33, e32,e31, e30, e29, e28, e27, e26, @@ -10711,42 +10705,42 @@ __m128d test_mm_maskz_move_sd (__mmask8 __U, __m128d __A, __m128d __B) void test_mm_mask_store_ss(float * __P, __mmask8 __U, __m128 __A) { // CHECK-LABEL: @test_mm_mask_store_ss - // CHECK: call void @llvm.masked.store.v4f32.p0v4f32(<4 x float> %{{.*}}, <4 x float>* %{{.*}}, i32 1, <4 x i1> %{{.*}}) + // CHECK: call void @llvm.masked.store.v4f32.p0(<4 x float> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}) _mm_mask_store_ss(__P, __U, __A); } void test_mm_mask_store_sd(double * __P, __mmask8 __U, __m128d __A) { // CHECK-LABEL: @test_mm_mask_store_sd - // CHECK: call void @llvm.masked.store.v2f64.p0v2f64(<2 x double> %{{.*}}, <2 x double>* %{{.*}}, i32 1, <2 x i1> %{{.*}}) + // CHECK: call void @llvm.masked.store.v2f64.p0(<2 x double> %{{.*}}, ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}) _mm_mask_store_sd(__P, __U, __A); } __m128 test_mm_mask_load_ss(__m128 __A, __mmask8 __U, const float* __W) { // CHECK-LABEL: @test_mm_mask_load_ss - // CHECK: call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) + // CHECK: call <4 x float> @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_mask_load_ss(__A, __U, __W); } __m128 test_mm_maskz_load_ss (__mmask8 __U, const float * __W) { // CHECK-LABEL: @test_mm_maskz_load_ss - // CHECK: call <4 x float> @llvm.masked.load.v4f32.p0v4f32(<4 x float>* %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) + // CHECK: call <4 x float> @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_maskz_load_ss (__U, __W); } __m128d test_mm_mask_load_sd (__m128d __A, __mmask8 __U, const double * __W) { // CHECK-LABEL: @test_mm_mask_load_sd - // CHECK: call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) + // CHECK: call <2 x double> @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_mask_load_sd (__A, __U, __W); } __m128d test_mm_maskz_load_sd (__mmask8 __U, const double * __W) { // CHECK-LABEL: @test_mm_maskz_load_sd - // CHECK: call <2 x double> @llvm.masked.load.v2f64.p0v2f64(<2 x double>* %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) + // CHECK: call <2 x double> @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_maskz_load_sd (__U, __W); } diff --git a/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c b/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c index 15ccf8d81e580b..84d7fd05c276e7 100644 --- a/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c +++ b/clang/test/CodeGen/aarch64-bf16-ldst-intrinsics.c @@ -1,7 +1,7 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \ +// RUN: %clang_cc1 -triple aarch64-arm-none-eabi -target-feature +neon -target-feature +bf16 \ // RUN: -O2 -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK64 -// RUN: %clang_cc1 -no-opaque-pointers -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \ +// RUN: %clang_cc1 -triple armv8.6a-arm-none-eabi -target-feature +neon -target-feature +bf16 -mfloat-abi hard \ // RUN: -O2 -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK32 // REQUIRES: arm-registered-target,aarch64-registered-target @@ -10,8 +10,7 @@ // CHECK-LABEL: @test_vld1_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* -// CHECK-NEXT: [[TMP1:%.*]] = load <4 x bfloat>, <4 x bfloat>* [[TMP0]], align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load <4 x bfloat>, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: ret <4 x bfloat> [[TMP1]] // bfloat16x4_t test_vld1_bf16(bfloat16_t const *ptr) { @@ -20,8 +19,7 @@ bfloat16x4_t test_vld1_bf16(bfloat16_t const *ptr) { // CHECK-LABEL: @test_vld1q_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* -// CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, <8 x bfloat>* [[TMP0]], align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load <8 x bfloat>, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: ret <8 x bfloat> [[TMP1]] // bfloat16x8_t test_vld1q_bf16(bfloat16_t const *ptr) { @@ -30,7 +28,7 @@ bfloat16x8_t test_vld1q_bf16(bfloat16_t const *ptr) { // CHECK-LABEL: @test_vld1_lane_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: [[VLD1_LANE:%.*]] = insertelement <4 x bfloat> [[SRC:%.*]], bfloat [[TMP0]], i64 0 // CHECK-NEXT: ret <4 x bfloat> [[VLD1_LANE]] // @@ -40,7 +38,7 @@ bfloat16x4_t test_vld1_lane_bf16(bfloat16_t const *ptr, bfloat16x4_t src) { // CHECK-LABEL: @test_vld1q_lane_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: [[VLD1_LANE:%.*]] = insertelement <8 x bfloat> [[SRC:%.*]], bfloat [[TMP0]], i64 7 // CHECK-NEXT: ret <8 x bfloat> [[VLD1_LANE]] // @@ -50,7 +48,7 @@ bfloat16x8_t test_vld1q_lane_bf16(bfloat16_t const *ptr, bfloat16x8_t src) { // CHECK-LABEL: @test_vld1_dup_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: [[TMP1:%.*]] = insertelement <4 x bfloat> poison, bfloat [[TMP0]], i64 0 // CHECK-NEXT: [[LANE:%.*]] = shufflevector <4 x bfloat> [[TMP1]], <4 x bfloat> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x bfloat> [[LANE]] @@ -61,7 +59,7 @@ bfloat16x4_t test_vld1_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1_bf16_x2( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x2.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] poison, <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 @@ -70,7 +68,7 @@ bfloat16x4_t test_vld1_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1_bf16_x2( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x2.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x2.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <2 x i32> @@ -85,7 +83,7 @@ bfloat16x4x2_t test_vld1_bf16_x2(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1q_bf16_x2( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x2.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] poison, <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]], 0, 0 @@ -94,7 +92,7 @@ bfloat16x4x2_t test_vld1_bf16_x2(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1q_bf16_x2( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x2.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x2.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <8 x bfloat> [[VLD1XN_FCA_0_EXTRACT]] to <4 x i32> @@ -109,7 +107,7 @@ bfloat16x8x2_t test_vld1q_bf16_x2(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1_bf16_x3( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x3.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 @@ -120,7 +118,7 @@ bfloat16x8x2_t test_vld1q_bf16_x2(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1_bf16_x3( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x3.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x3.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 @@ -138,7 +136,7 @@ bfloat16x4x3_t test_vld1_bf16_x3(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1q_bf16_x3( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x3.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 @@ -149,7 +147,7 @@ bfloat16x4x3_t test_vld1_bf16_x3(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1q_bf16_x3( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x3.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x3.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 @@ -167,7 +165,7 @@ bfloat16x8x3_t test_vld1q_bf16_x3(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1_bf16_x4( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld1x4.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 @@ -180,7 +178,7 @@ bfloat16x8x3_t test_vld1q_bf16_x3(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1_bf16_x4( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x4.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld1x4.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD1XN]], 2 @@ -201,7 +199,7 @@ bfloat16x4x4_t test_vld1_bf16_x4(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld1q_bf16_x4( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld1x4.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK64-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK64-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 @@ -214,7 +212,7 @@ bfloat16x4x4_t test_vld1_bf16_x4(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld1q_bf16_x4( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x4.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK32-NEXT: [[VLD1XN:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld1x4.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK32-NEXT: [[VLD1XN_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 0 // CHECK32-NEXT: [[VLD1XN_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 1 // CHECK32-NEXT: [[VLD1XN_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD1XN]], 2 @@ -235,7 +233,7 @@ bfloat16x8x4_t test_vld1q_bf16_x4(bfloat16_t const *ptr) { // CHECK-LABEL: @test_vld1q_dup_bf16( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load bfloat, ptr [[PTR:%.*]], align 2 // CHECK-NEXT: [[TMP1:%.*]] = insertelement <8 x bfloat> poison, bfloat [[TMP0]], i64 0 // CHECK-NEXT: [[LANE:%.*]] = shufflevector <8 x bfloat> [[TMP1]], <8 x bfloat> poison, <8 x i32> zeroinitializer // CHECK-NEXT: ret <8 x bfloat> [[LANE]] @@ -246,8 +244,7 @@ bfloat16x8_t test_vld1q_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld2_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* -// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 0 // CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] poison, <4 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 @@ -256,8 +253,7 @@ bfloat16x8_t test_vld1q_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld2_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD2_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_V]], 0 // CHECK32-NEXT: [[VLD2_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_V]], 1 // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD2_V_FCA_0_EXTRACT]] to <2 x i32> @@ -272,8 +268,7 @@ bfloat16x4x2_t test_vld2_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld2q_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* -// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 0 // CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] poison, <8 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 @@ -282,8 +277,7 @@ bfloat16x4x2_t test_vld2_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld2q_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD2Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_V]], 0 // CHECK32-NEXT: [[VLD2Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_V]], 1 // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD2Q_V_FCA_0_EXTRACT]] to <4 x i32> @@ -300,8 +294,7 @@ bfloat16x8x2_t test_vld2q_bf16(bfloat16_t const *ptr) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[SRC_COERCE:%.*]], 0 // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[SRC_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2lane.v4bf16.p0(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE]], 0 // CHECK64-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] poison, <4 x bfloat> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0 @@ -314,8 +307,7 @@ bfloat16x8x2_t test_vld2q_bf16(bfloat16_t const *ptr) { // CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[SRC_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2lane.v4bf16.p0i8(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD2_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2lane.v4bf16.p0(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) // CHECK32-NEXT: [[VLD2_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE_V]], 0 // CHECK32-NEXT: [[VLD2_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_LANE_V]], 1 // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x bfloat> [[VLD2_LANE_V_FCA_0_EXTRACT]] to <2 x i32> @@ -332,8 +324,7 @@ bfloat16x4x2_t test_vld2_lane_bf16(bfloat16_t const *ptr, bfloat16x4x2_t src) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[SRC_COERCE:%.*]], 0 // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[SRC_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD2_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2lane.v8bf16.p0(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2_LANE]], 0 // CHECK64-NEXT: [[VLD2_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2_LANE]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] poison, <8 x bfloat> [[VLD2_LANE_FCA_0_EXTRACT]], 0, 0 @@ -346,8 +337,7 @@ bfloat16x4x2_t test_vld2_lane_bf16(bfloat16_t const *ptr, bfloat16x4x2_t src) { // CHECK32-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[SRC_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2lane.v8bf16.p0i8(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD2Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2lane.v8bf16.p0(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) // CHECK32-NEXT: [[VLD2Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_LANE_V]], 0 // CHECK32-NEXT: [[VLD2Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_LANE_V]], 1 // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <8 x bfloat> [[VLD2Q_LANE_V_FCA_0_EXTRACT]] to <4 x i32> @@ -362,8 +352,7 @@ bfloat16x8x2_t test_vld2q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x2_t src) { // CHECK64-LABEL: @test_vld3_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* -// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 0 // CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 1 // CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 2 @@ -374,8 +363,7 @@ bfloat16x8x2_t test_vld2q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x2_t src) { // // CHECK32-LABEL: @test_vld3_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD3_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 0 // CHECK32-NEXT: [[VLD3_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 1 // CHECK32-NEXT: [[VLD3_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_V]], 2 @@ -393,8 +381,7 @@ bfloat16x4x3_t test_vld3_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld3q_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* -// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 0 // CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 1 // CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 2 @@ -405,8 +392,7 @@ bfloat16x4x3_t test_vld3_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld3q_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD3Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 0 // CHECK32-NEXT: [[VLD3Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 1 // CHECK32-NEXT: [[VLD3Q_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_V]], 2 @@ -427,8 +413,7 @@ bfloat16x8x3_t test_vld3q_bf16(bfloat16_t const *ptr) { // CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE:%.*]], 0 // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE]], 1 // CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[SRC_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3lane.v4bf16.p0(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 0 // CHECK64-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 1 // CHECK64-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE]], 2 @@ -445,8 +430,7 @@ bfloat16x8x3_t test_vld3q_bf16(bfloat16_t const *ptr) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3lane.v4bf16.p0i8(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD3_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3lane.v4bf16.p0(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) // CHECK32-NEXT: [[VLD3_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 0 // CHECK32-NEXT: [[VLD3_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 1 // CHECK32-NEXT: [[VLD3_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_LANE_V]], 2 @@ -467,8 +451,7 @@ bfloat16x4x3_t test_vld3_lane_bf16(bfloat16_t const *ptr, bfloat16x4x3_t src) { // CHECK64-NEXT: [[SRC_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE:%.*]], 0 // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE]], 1 // CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[SRC_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD3_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3lane.v8bf16.p0(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 0 // CHECK64-NEXT: [[VLD3_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 1 // CHECK64-NEXT: [[VLD3_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3_LANE]], 2 @@ -485,8 +468,7 @@ bfloat16x4x3_t test_vld3_lane_bf16(bfloat16_t const *ptr, bfloat16x4x3_t src) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3lane.v8bf16.p0i8(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD3Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3lane.v8bf16.p0(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) // CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 0 // CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 1 // CHECK32-NEXT: [[VLD3Q_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_LANE_V]], 2 @@ -505,8 +487,7 @@ bfloat16x8x3_t test_vld3q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x3_t src) { // CHECK64-LABEL: @test_vld4_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* -// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0v4bf16(<4 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 0 // CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 1 // CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 2 @@ -519,8 +500,7 @@ bfloat16x8x3_t test_vld3q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x3_t src) { // // CHECK32-LABEL: @test_vld4_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD4_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 0 // CHECK32-NEXT: [[VLD4_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 1 // CHECK32-NEXT: [[VLD4_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_V]], 2 @@ -541,8 +521,7 @@ bfloat16x4x4_t test_vld4_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld4q_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* -// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0v8bf16(<8 x bfloat>* [[TMP0]]) +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 0 // CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 1 // CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 2 @@ -555,8 +534,7 @@ bfloat16x4x4_t test_vld4_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld4q_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4Q_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD4Q_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 0 // CHECK32-NEXT: [[VLD4Q_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 1 // CHECK32-NEXT: [[VLD4Q_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_V]], 2 @@ -581,8 +559,7 @@ bfloat16x8x4_t test_vld4q_bf16(bfloat16_t const *ptr) { // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 1 // CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 2 // CHECK64-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[SRC_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0i8(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4lane.v4bf16.p0(<4 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 0 // CHECK64-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 1 // CHECK64-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE]], 2 @@ -603,8 +580,7 @@ bfloat16x8x4_t test_vld4q_bf16(bfloat16_t const *ptr) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[SRC_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4lane.v4bf16.p0i8(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) +// CHECK32-NEXT: [[VLD4_LANE_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4lane.v4bf16.p0(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) // CHECK32-NEXT: [[VLD4_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 0 // CHECK32-NEXT: [[VLD4_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 1 // CHECK32-NEXT: [[VLD4_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_LANE_V]], 2 @@ -629,8 +605,7 @@ bfloat16x4x4_t test_vld4_lane_bf16(bfloat16_t const *ptr, bfloat16x4x4_t src) { // CHECK64-NEXT: [[SRC_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 1 // CHECK64-NEXT: [[SRC_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 2 // CHECK64-NEXT: [[SRC_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[SRC_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0i8(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: [[VLD4_LANE:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4lane.v8bf16.p0(<8 x bfloat> [[SRC_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[SRC_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_LANE_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 0 // CHECK64-NEXT: [[VLD4_LANE_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 1 // CHECK64-NEXT: [[VLD4_LANE_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4_LANE]], 2 @@ -651,8 +626,7 @@ bfloat16x4x4_t test_vld4_lane_bf16(bfloat16_t const *ptr, bfloat16x4x4_t src) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[SRC_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4lane.v8bf16.p0i8(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) +// CHECK32-NEXT: [[VLD4Q_LANE_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4lane.v8bf16.p0(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) // CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 0 // CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 1 // CHECK32-NEXT: [[VLD4Q_LANE_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_LANE_V]], 2 @@ -673,7 +647,7 @@ bfloat16x8x4_t test_vld4q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x4_t src) { // CHECK64-LABEL: @test_vld2_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld2r.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 0 // CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X4X2_T:%.*]] poison, <4 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 @@ -682,8 +656,7 @@ bfloat16x8x4_t test_vld4q_lane_bf16(bfloat16_t const *ptr, bfloat16x8x4_t src) { // // CHECK32-LABEL: @test_vld2_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld2dup.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD2_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_DUP_V]], 0 // CHECK32-NEXT: [[VLD2_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat> } [[VLD2_DUP_V]], 1 // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x bfloat> [[VLD2_DUP_V_FCA_0_EXTRACT]] to <2 x i32> @@ -698,7 +671,7 @@ bfloat16x4x2_t test_vld2_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld2q_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD2:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld2r.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD2_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 0 // CHECK64-NEXT: [[VLD2_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2]], 1 // CHECK64-NEXT: [[DOTFCA_0_0_INSERT:%.*]] = insertvalue [[STRUCT_BFLOAT16X8X2_T:%.*]] poison, <8 x bfloat> [[VLD2_FCA_0_EXTRACT]], 0, 0 @@ -707,8 +680,7 @@ bfloat16x4x2_t test_vld2_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld2q_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD2Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD2Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld2dup.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD2Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_DUP_V]], 0 // CHECK32-NEXT: [[VLD2Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat> } [[VLD2Q_DUP_V]], 1 // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <8 x bfloat> [[VLD2Q_DUP_V_FCA_0_EXTRACT]] to <4 x i32> @@ -723,7 +695,7 @@ bfloat16x8x2_t test_vld2q_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld3_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld3r.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 0 // CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 1 // CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3]], 2 @@ -734,8 +706,7 @@ bfloat16x8x2_t test_vld2q_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld3_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld3dup.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD3_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 0 // CHECK32-NEXT: [[VLD3_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 1 // CHECK32-NEXT: [[VLD3_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD3_DUP_V]], 2 @@ -753,7 +724,7 @@ bfloat16x4x3_t test_vld3_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld3q_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD3:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld3r.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD3_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 0 // CHECK64-NEXT: [[VLD3_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 1 // CHECK64-NEXT: [[VLD3_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3]], 2 @@ -764,8 +735,7 @@ bfloat16x4x3_t test_vld3_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld3q_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD3Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD3Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld3dup.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 0 // CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 1 // CHECK32-NEXT: [[VLD3Q_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD3Q_DUP_V]], 2 @@ -783,7 +753,7 @@ bfloat16x8x3_t test_vld3q_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld4_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.aarch64.neon.ld4r.v4bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 0 // CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 1 // CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4]], 2 @@ -796,8 +766,7 @@ bfloat16x8x3_t test_vld3q_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld4_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4dup.v4bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4_DUP_V:%.*]] = tail call { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } @llvm.arm.neon.vld4dup.v4bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD4_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 0 // CHECK32-NEXT: [[VLD4_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 1 // CHECK32-NEXT: [[VLD4_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <4 x bfloat>, <4 x bfloat>, <4 x bfloat>, <4 x bfloat> } [[VLD4_DUP_V]], 2 @@ -818,7 +787,7 @@ bfloat16x4x4_t test_vld4_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vld4q_dup_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0bf16(bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: [[VLD4:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.aarch64.neon.ld4r.v8bf16.p0(ptr [[PTR:%.*]]) // CHECK64-NEXT: [[VLD4_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 0 // CHECK64-NEXT: [[VLD4_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 1 // CHECK64-NEXT: [[VLD4_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4]], 2 @@ -831,8 +800,7 @@ bfloat16x4x4_t test_vld4_dup_bf16(bfloat16_t const *ptr) { // // CHECK32-LABEL: @test_vld4q_dup_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: [[VLD4Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4dup.v8bf16.p0i8(i8* [[TMP0]], i32 2) +// CHECK32-NEXT: [[VLD4Q_DUP_V:%.*]] = tail call { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } @llvm.arm.neon.vld4dup.v8bf16.p0(ptr [[PTR:%.*]], i32 2) // CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_0_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 0 // CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_1_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 1 // CHECK32-NEXT: [[VLD4Q_DUP_V_FCA_2_EXTRACT:%.*]] = extractvalue { <8 x bfloat>, <8 x bfloat>, <8 x bfloat>, <8 x bfloat> } [[VLD4Q_DUP_V]], 2 @@ -853,14 +821,12 @@ bfloat16x8x4_t test_vld4q_dup_bf16(bfloat16_t const *ptr) { // CHECK64-LABEL: @test_vst1_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <4 x bfloat>* -// CHECK64-NEXT: store <4 x bfloat> [[VAL:%.*]], <4 x bfloat>* [[TMP0]], align 2 +// CHECK64-NEXT: store <4 x bfloat> [[VAL:%.*]], ptr [[PTR:%.*]], align 2 // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v4bf16(i8* [[TMP0]], <4 x bfloat> [[VAL:%.*]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[VAL:%.*]], i32 2) // CHECK32-NEXT: ret void // void test_vst1_bf16(bfloat16_t *ptr, bfloat16x4_t val) { @@ -869,14 +835,12 @@ void test_vst1_bf16(bfloat16_t *ptr, bfloat16x4_t val) { // CHECK64-LABEL: @test_vst1q_bf16( // CHECK64-NEXT: entry: -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to <8 x bfloat>* -// CHECK64-NEXT: store <8 x bfloat> [[VAL:%.*]], <8 x bfloat>* [[TMP0]], align 2 +// CHECK64-NEXT: store <8 x bfloat> [[VAL:%.*]], ptr [[PTR:%.*]], align 2 // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1q_bf16( // CHECK32-NEXT: entry: -// CHECK32-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0i8.v8bf16(i8* [[TMP0]], <8 x bfloat> [[VAL:%.*]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[VAL:%.*]], i32 2) // CHECK32-NEXT: ret void // void test_vst1q_bf16(bfloat16_t *ptr, bfloat16x8_t val) { @@ -886,7 +850,7 @@ void test_vst1q_bf16(bfloat16_t *ptr, bfloat16x8_t val) { // CHECK-LABEL: @test_vst1_lane_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = extractelement <4 x bfloat> [[VAL:%.*]], i64 1 -// CHECK-NEXT: store bfloat [[TMP0]], bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: store bfloat [[TMP0]], ptr [[PTR:%.*]], align 2 // CHECK-NEXT: ret void // void test_vst1_lane_bf16(bfloat16_t *ptr, bfloat16x4_t val) { @@ -896,7 +860,7 @@ void test_vst1_lane_bf16(bfloat16_t *ptr, bfloat16x4_t val) { // CHECK-LABEL: @test_vst1q_lane_bf16( // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = extractelement <8 x bfloat> [[VAL:%.*]], i64 7 -// CHECK-NEXT: store bfloat [[TMP0]], bfloat* [[PTR:%.*]], align 2 +// CHECK-NEXT: store bfloat [[TMP0]], ptr [[PTR:%.*]], align 2 // CHECK-NEXT: ret void // void test_vst1q_lane_bf16(bfloat16_t *ptr, bfloat16x8_t val) { @@ -907,7 +871,7 @@ void test_vst1q_lane_bf16(bfloat16_t *ptr, bfloat16x8_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1_bf16_x2( @@ -916,7 +880,7 @@ void test_vst1q_lane_bf16(bfloat16_t *ptr, bfloat16x8_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]]) // CHECK32-NEXT: ret void // void test_vst1_bf16_x2(bfloat16_t *ptr, bfloat16x4x2_t val) { @@ -927,7 +891,7 @@ void test_vst1_bf16_x2(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x2.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1q_bf16_x2( @@ -936,7 +900,7 @@ void test_vst1_bf16_x2(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x2.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]]) // CHECK32-NEXT: ret void // void test_vst1q_bf16_x2(bfloat16_t *ptr, bfloat16x8x2_t val) { @@ -948,7 +912,7 @@ void test_vst1q_bf16_x2(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1_bf16_x3( @@ -959,7 +923,7 @@ void test_vst1q_bf16_x2(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]]) // CHECK32-NEXT: ret void // void test_vst1_bf16_x3(bfloat16_t *ptr, bfloat16x4x3_t val) { @@ -971,7 +935,7 @@ void test_vst1_bf16_x3(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x3.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1q_bf16_x3( @@ -982,7 +946,7 @@ void test_vst1_bf16_x3(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x3.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]]) // CHECK32-NEXT: ret void // void test_vst1q_bf16_x3(bfloat16_t *ptr, bfloat16x8x3_t val) { @@ -995,7 +959,7 @@ void test_vst1q_bf16_x3(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v4bf16.p0bf16(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1_bf16_x4( @@ -1008,7 +972,7 @@ void test_vst1q_bf16_x3(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0bf16.v4bf16(bfloat* [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]]) // CHECK32-NEXT: ret void // void test_vst1_bf16_x4(bfloat16_t *ptr, bfloat16x4x4_t val) { @@ -1021,7 +985,7 @@ void test_vst1_bf16_x4(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v8bf16.p0bf16(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], bfloat* [[PTR:%.*]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st1x4.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst1q_bf16_x4( @@ -1034,7 +998,7 @@ void test_vst1_bf16_x4(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0bf16.v8bf16(bfloat* [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]]) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst1x4.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]]) // CHECK32-NEXT: ret void // void test_vst1q_bf16_x4(bfloat16_t *ptr, bfloat16x8x4_t val) { @@ -1045,8 +1009,7 @@ void test_vst1q_bf16_x4(bfloat16_t *ptr, bfloat16x8x4_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst2_bf16( @@ -1055,8 +1018,7 @@ void test_vst1q_bf16_x4(bfloat16_t *ptr, bfloat16x8x4_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0i8.v4bf16(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 2) // CHECK32-NEXT: ret void // void test_vst2_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { @@ -1067,8 +1029,7 @@ void test_vst2_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst2q_bf16( @@ -1077,8 +1038,7 @@ void test_vst2_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0i8.v8bf16(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 2) // CHECK32-NEXT: ret void // void test_vst2q_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { @@ -1089,8 +1049,7 @@ void test_vst2q_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst2_lane_bf16( @@ -1099,8 +1058,7 @@ void test_vst2q_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <2 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0i8.v4bf16(i8* [[TMP2]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], i32 1, i32 2) // CHECK32-NEXT: ret void // void test_vst2_lane_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { @@ -1111,8 +1069,7 @@ void test_vst2_lane_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK64-NEXT: entry: // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <8 x bfloat>] [[VAL_COERCE]], 1 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st2lane.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst2q_lane_bf16( @@ -1121,8 +1078,7 @@ void test_vst2_lane_bf16(bfloat16_t *ptr, bfloat16x4x2_t val) { // CHECK32-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [2 x <4 x i32>] [[VAL_COERCE]], 1 // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP2:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0i8.v8bf16(i8* [[TMP2]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst2lane.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], i32 7, i32 2) // CHECK32-NEXT: ret void // void test_vst2q_lane_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { @@ -1134,8 +1090,7 @@ void test_vst2q_lane_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst3_bf16( @@ -1146,8 +1101,7 @@ void test_vst2q_lane_bf16(bfloat16_t *ptr, bfloat16x8x2_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0i8.v4bf16(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 2) // CHECK32-NEXT: ret void // void test_vst3_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { @@ -1159,8 +1113,7 @@ void test_vst3_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst3q_bf16( @@ -1171,8 +1124,7 @@ void test_vst3_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0i8.v8bf16(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 2) // CHECK32-NEXT: ret void // void test_vst3q_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { @@ -1184,8 +1136,7 @@ void test_vst3q_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <4 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst3_lane_bf16( @@ -1196,8 +1147,7 @@ void test_vst3q_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0i8.v4bf16(i8* [[TMP3]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], i32 1, i32 2) // CHECK32-NEXT: ret void // void test_vst3_lane_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { @@ -1209,8 +1159,7 @@ void test_vst3_lane_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_0_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE:%.*]], 0 // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [3 x <8 x bfloat>] [[VAL_COERCE]], 2 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st3lane.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst3q_lane_bf16( @@ -1221,8 +1170,7 @@ void test_vst3_lane_bf16(bfloat16_t *ptr, bfloat16x4x3_t val) { // CHECK32-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_0_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP3:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0i8.v8bf16(i8* [[TMP3]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst3lane.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], i32 7, i32 2) // CHECK32-NEXT: ret void // void test_vst3q_lane_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { @@ -1235,8 +1183,7 @@ void test_vst3q_lane_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst4_bf16( @@ -1249,8 +1196,7 @@ void test_vst3q_lane_bf16(bfloat16_t *ptr, bfloat16x8x3_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0i8.v4bf16(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 2) // CHECK32-NEXT: ret void // void test_vst4_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { @@ -1263,8 +1209,7 @@ void test_vst4_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst4q_bf16( @@ -1277,8 +1222,7 @@ void test_vst4_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0i8.v8bf16(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 2) // CHECK32-NEXT: ret void // void test_vst4q_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { @@ -1291,8 +1235,7 @@ void test_vst4q_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <4 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v4bf16.p0i8(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 1, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v4bf16.p0(<4 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <4 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 1, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst4_lane_bf16( @@ -1305,8 +1248,7 @@ void test_vst4q_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <4 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <2 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <4 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0i8.v4bf16(i8* [[TMP4]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0.v4bf16(ptr [[PTR:%.*]], <4 x bfloat> [[TMP0]], <4 x bfloat> [[TMP1]], <4 x bfloat> [[TMP2]], <4 x bfloat> [[TMP3]], i32 1, i32 2) // CHECK32-NEXT: ret void // void test_vst4_lane_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { @@ -1319,8 +1261,7 @@ void test_vst4_lane_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK64-NEXT: [[VAL_COERCE_FCA_1_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 1 // CHECK64-NEXT: [[VAL_COERCE_FCA_2_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 2 // CHECK64-NEXT: [[VAL_COERCE_FCA_3_EXTRACT:%.*]] = extractvalue [4 x <8 x bfloat>] [[VAL_COERCE]], 3 -// CHECK64-NEXT: [[TMP0:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v8bf16.p0i8(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 7, i8* [[TMP0]]) +// CHECK64-NEXT: tail call void @llvm.aarch64.neon.st4lane.v8bf16.p0(<8 x bfloat> [[VAL_COERCE_FCA_0_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_1_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_2_EXTRACT]], <8 x bfloat> [[VAL_COERCE_FCA_3_EXTRACT]], i64 7, ptr [[PTR:%.*]]) // CHECK64-NEXT: ret void // // CHECK32-LABEL: @test_vst4q_lane_bf16( @@ -1333,8 +1274,7 @@ void test_vst4_lane_bf16(bfloat16_t *ptr, bfloat16x4x4_t val) { // CHECK32-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_1_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP2:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_2_EXTRACT]] to <8 x bfloat> // CHECK32-NEXT: [[TMP3:%.*]] = bitcast <4 x i32> [[VAL_COERCE_FCA_3_EXTRACT]] to <8 x bfloat> -// CHECK32-NEXT: [[TMP4:%.*]] = bitcast bfloat* [[PTR:%.*]] to i8* -// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0i8.v8bf16(i8* [[TMP4]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) +// CHECK32-NEXT: tail call void @llvm.arm.neon.vst4lane.p0.v8bf16(ptr [[PTR:%.*]], <8 x bfloat> [[TMP0]], <8 x bfloat> [[TMP1]], <8 x bfloat> [[TMP2]], <8 x bfloat> [[TMP3]], i32 7, i32 2) // CHECK32-NEXT: ret void // void test_vst4q_lane_bf16(bfloat16_t *ptr, bfloat16x8x4_t val) { diff --git a/clang/test/CodeGen/aarch64-neon-ldst-one.c b/clang/test/CodeGen/aarch64-neon-ldst-one.c index 328a7204855a60..9dfb3c4a9d3d0a 100644 --- a/clang/test/CodeGen/aarch64-neon-ldst-one.c +++ b/clang/test/CodeGen/aarch64-neon-ldst-one.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-none-linux-gnu -target-feature +neon \ +// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \ // RUN: -disable-O0-optnone -emit-llvm -o - %s \ // RUN: | opt -S -passes=mem2reg | FileCheck %s @@ -6,8 +6,8 @@ #include -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_u8(i8* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_u8(ptr noundef %a) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer // CHECK: ret <16 x i8> [[LANE]] @@ -15,10 +15,8 @@ uint8x16_t test_vld1q_dup_u8(uint8_t *a) { return vld1q_dup_u8(a); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_u16(i16* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_u16(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i16> [[TMP3]], <8 x i16> [[TMP3]], <8 x i32> zeroinitializer // CHECK: ret <8 x i16> [[LANE]] @@ -26,10 +24,8 @@ uint16x8_t test_vld1q_dup_u16(uint16_t *a) { return vld1q_dup_u16(a); } -// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_u32(i32* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_u32(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i32, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x i32> [[LANE]] @@ -37,10 +33,8 @@ uint32x4_t test_vld1q_dup_u32(uint32_t *a) { return vld1q_dup_u32(a); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_u64(i64* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_u64(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP3]], <2 x i64> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x i64> [[LANE]] @@ -48,8 +42,8 @@ uint64x2_t test_vld1q_dup_u64(uint64_t *a) { return vld1q_dup_u64(a); } -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_s8(i8* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_s8(ptr noundef %a) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer // CHECK: ret <16 x i8> [[LANE]] @@ -57,10 +51,8 @@ int8x16_t test_vld1q_dup_s8(int8_t *a) { return vld1q_dup_s8(a); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_s16(i16* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_s16(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i16> [[TMP3]], <8 x i16> [[TMP3]], <8 x i32> zeroinitializer // CHECK: ret <8 x i16> [[LANE]] @@ -68,10 +60,8 @@ int16x8_t test_vld1q_dup_s16(int16_t *a) { return vld1q_dup_s16(a); } -// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_s32(i32* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_dup_s32(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i32, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x i32> poison, i32 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x i32> [[LANE]] @@ -79,10 +69,8 @@ int32x4_t test_vld1q_dup_s32(int32_t *a) { return vld1q_dup_s32(a); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_s64(i64* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_s64(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP3]], <2 x i64> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x i64> [[LANE]] @@ -90,10 +78,8 @@ int64x2_t test_vld1q_dup_s64(int64_t *a) { return vld1q_dup_s64(a); } -// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_dup_f16(half* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] +// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_dup_f16(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load half, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <8 x half> poison, half [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x half> [[TMP3]], <8 x half> [[TMP3]], <8 x i32> zeroinitializer // CHECK: ret <8 x half> [[LANE]] @@ -101,10 +87,8 @@ float16x8_t test_vld1q_dup_f16(float16_t *a) { return vld1q_dup_f16(a); } -// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_dup_f32(float* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_dup_f32(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load float, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x float> poison, float [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x float> [[TMP3]], <4 x float> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x float> [[LANE]] @@ -112,10 +96,8 @@ float32x4_t test_vld1q_dup_f32(float32_t *a) { return vld1q_dup_f32(a); } -// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_dup_f64(double* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_dup_f64(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load double, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x double> poison, double [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x double> [[TMP3]], <2 x double> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x double> [[LANE]] @@ -123,8 +105,8 @@ float64x2_t test_vld1q_dup_f64(float64_t *a) { return vld1q_dup_f64(a); } -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_p8(i8* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_dup_p8(ptr noundef %a) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <16 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <16 x i8> [[TMP1]], <16 x i8> [[TMP1]], <16 x i32> zeroinitializer // CHECK: ret <16 x i8> [[LANE]] @@ -132,10 +114,8 @@ poly8x16_t test_vld1q_dup_p8(poly8_t *a) { return vld1q_dup_p8(a); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_p16(i16* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_dup_p16(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <8 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i16> [[TMP3]], <8 x i16> [[TMP3]], <8 x i32> zeroinitializer // CHECK: ret <8 x i16> [[LANE]] @@ -143,10 +123,8 @@ poly16x8_t test_vld1q_dup_p16(poly16_t *a) { return vld1q_dup_p16(a); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_p64(i64* noundef %a) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_dup_p64(ptr noundef %a) #0 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x i64> [[TMP3]], <2 x i64> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x i64> [[LANE]] @@ -154,8 +132,8 @@ poly64x2_t test_vld1q_dup_p64(poly64_t *a) { return vld1q_dup_p64(a); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_u8(i8* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_u8(ptr noundef %a) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer // CHECK: ret <8 x i8> [[LANE]] @@ -163,10 +141,8 @@ uint8x8_t test_vld1_dup_u8(uint8_t *a) { return vld1_dup_u8(a); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_u16(i16* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_u16(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x i16> [[TMP3]], <4 x i16> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x i16> [[LANE]] @@ -174,10 +150,8 @@ uint16x4_t test_vld1_dup_u16(uint16_t *a) { return vld1_dup_u16(a); } -// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_u32(i32* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_u32(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i32, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x i32> [[LANE]] @@ -185,10 +159,8 @@ uint32x2_t test_vld1_dup_u32(uint32_t *a) { return vld1_dup_u32(a); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_u64(i64* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_u64(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <1 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP3]], <1 x i64> [[TMP3]], <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[LANE]] @@ -196,8 +168,8 @@ uint64x1_t test_vld1_dup_u64(uint64_t *a) { return vld1_dup_u64(a); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_s8(i8* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_s8(ptr noundef %a) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer // CHECK: ret <8 x i8> [[LANE]] @@ -205,10 +177,8 @@ int8x8_t test_vld1_dup_s8(int8_t *a) { return vld1_dup_s8(a); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_s16(i16* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_s16(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x i16> [[TMP3]], <4 x i16> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x i16> [[LANE]] @@ -216,10 +186,8 @@ int16x4_t test_vld1_dup_s16(int16_t *a) { return vld1_dup_s16(a); } -// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_s32(i32* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP2:%.*]] = load i32, i32* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_dup_s32(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i32, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x i32> poison, i32 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x i32> [[TMP3]], <2 x i32> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x i32> [[LANE]] @@ -227,10 +195,8 @@ int32x2_t test_vld1_dup_s32(int32_t *a) { return vld1_dup_s32(a); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_s64(i64* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_s64(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <1 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP3]], <1 x i64> [[TMP3]], <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[LANE]] @@ -238,10 +204,8 @@ int64x1_t test_vld1_dup_s64(int64_t *a) { return vld1_dup_s64(a); } -// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_dup_f16(half* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: [[TMP2:%.*]] = load half, half* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_dup_f16(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load half, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x half> poison, half [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x half> [[TMP3]], <4 x half> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x half> [[LANE]] @@ -249,10 +213,8 @@ float16x4_t test_vld1_dup_f16(float16_t *a) { return vld1_dup_f16(a); } -// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_dup_f32(float* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: [[TMP2:%.*]] = load float, float* [[TMP1]] +// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_dup_f32(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load float, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <2 x float> poison, float [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <2 x float> [[TMP3]], <2 x float> [[TMP3]], <2 x i32> zeroinitializer // CHECK: ret <2 x float> [[LANE]] @@ -260,10 +222,8 @@ float32x2_t test_vld1_dup_f32(float32_t *a) { return vld1_dup_f32(a); } -// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_dup_f64(double* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: [[TMP2:%.*]] = load double, double* [[TMP1]] +// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_dup_f64(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load double, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <1 x double> poison, double [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <1 x double> [[TMP3]], <1 x double> [[TMP3]], <1 x i32> zeroinitializer // CHECK: ret <1 x double> [[LANE]] @@ -271,8 +231,8 @@ float64x1_t test_vld1_dup_f64(float64_t *a) { return vld1_dup_f64(a); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_p8(i8* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_dup_p8(ptr noundef %a) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[TMP1:%.*]] = insertelement <8 x i8> poison, i8 [[TMP0]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <8 x i8> [[TMP1]], <8 x i8> [[TMP1]], <8 x i32> zeroinitializer // CHECK: ret <8 x i8> [[LANE]] @@ -280,10 +240,8 @@ poly8x8_t test_vld1_dup_p8(poly8_t *a) { return vld1_dup_p8(a); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_p16(i16* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP2:%.*]] = load i16, i16* [[TMP1]] +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_dup_p16(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i16, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <4 x i16> poison, i16 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <4 x i16> [[TMP3]], <4 x i16> [[TMP3]], <4 x i32> zeroinitializer // CHECK: ret <4 x i16> [[LANE]] @@ -291,10 +249,8 @@ poly16x4_t test_vld1_dup_p16(poly16_t *a) { return vld1_dup_p16(a); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_p64(i64* noundef %a) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP1:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP2:%.*]] = load i64, i64* [[TMP1]] +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_dup_p64(ptr noundef %a) #1 { +// CHECK: [[TMP2:%.*]] = load i64, ptr %a // CHECK: [[TMP3:%.*]] = insertelement <1 x i64> poison, i64 [[TMP2]], i32 0 // CHECK: [[LANE:%.*]] = shufflevector <1 x i64> [[TMP3]], <1 x i64> [[TMP3]], <1 x i32> zeroinitializer // CHECK: ret <1 x i64> [[LANE]] @@ -302,6499 +258,5499 @@ poly64x1_t test_vld1_dup_p64(poly64_t *a) { return vld1_dup_p64(a); } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_dup_u64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_dup_u64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x2_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], { <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.uint64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x2_t [[TMP6]] uint64x2x2_t test_vld2q_dup_u64(uint64_t *a) { return vld2q_dup_u64(a); } -// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_dup_s64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_dup_s64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x2_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], { <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.int64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.int64x2x2_t, %struct.int64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.int64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x2_t [[TMP6]] int64x2x2_t test_vld2q_dup_s64(int64_t *a) { return vld2q_dup_s64(a); } -// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x2_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD2:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double> } [[VLD2]], { <2 x double>, <2 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x2x2_t, %struct.float64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2r.v2f64.p0(ptr %a) +// CHECK: store { <2 x double>, <2 x double> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x2_t [[TMP6]] float64x2x2_t test_vld2q_dup_f64(float64_t *a) { return vld2q_dup_f64(a); } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], { <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x2_t [[TMP6]] poly64x2x2_t test_vld2q_dup_p64(poly64_t *a) { return vld2q_dup_p64(a); } -// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x2_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD2:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double> } [[VLD2]], { <1 x double>, <1 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 16, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x1x2_t, %struct.float64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2r.v1f64.p0(ptr %a) +// CHECK: store { <1 x double>, <1 x double> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x2_t [[TMP6]] float64x1x2_t test_vld2_dup_f64(float64_t *a) { return vld2_dup_f64(a); } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2]], { <1 x i64>, <1 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 16, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2r.v1i64.p0(ptr %a) +// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x2_t [[TMP6]] poly64x1x2_t test_vld2_dup_p64(poly64_t *a) { return vld2_dup_p64(a); } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_dup_u64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_dup_u64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x3_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.uint64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 48, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x3_t [[TMP6]] uint64x2x3_t test_vld3q_dup_u64(uint64_t *a) { return vld3q_dup_u64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_dup_s64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_dup_s64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x3_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.int64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 48, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.int64x2x3_t, %struct.int64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.int64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x3_t [[TMP6]] int64x2x3_t test_vld3q_dup_s64(int64_t *a) { return vld3q_dup_s64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x3_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD3:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x double>, <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], { <2 x double>, <2 x double>, <2 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 48, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x2x3_t, %struct.float64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3r.v2f64.p0(ptr %a) +// CHECK: store { <2 x double>, <2 x double>, <2 x double> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x3_t [[TMP6]] float64x2x3_t test_vld3q_dup_f64(float64_t *a) { return vld3q_dup_f64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 48, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x3_t [[TMP6]] poly64x2x3_t test_vld3q_dup_p64(poly64_t *a) { return vld3q_dup_p64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x3_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD3:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x double>, <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], { <1 x double>, <1 x double>, <1 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 24, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x1x3_t, %struct.float64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3r.v1f64.p0(ptr %a) +// CHECK: store { <1 x double>, <1 x double>, <1 x double> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x3_t [[TMP6]] float64x1x3_t test_vld3_dup_f64(float64_t *a) { return vld3_dup_f64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], { <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 24, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3r.v1i64.p0(ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x3_t [[TMP6]] poly64x1x3_t test_vld3_dup_p64(poly64_t *a) { return vld3_dup_p64(a); // [{{x[0-9]+|sp}}] } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_dup_u64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_dup_u64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x4_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.uint64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 64, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.uint64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x4_t [[TMP6]] uint64x2x4_t test_vld4q_dup_u64(uint64_t *a) { return vld4q_dup_u64(a); } -// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_dup_s64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_dup_s64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x4_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.int64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 64, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.int64x2x4_t, %struct.int64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.int64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x4_t [[TMP6]] int64x2x4_t test_vld4q_dup_s64(int64_t *a) { return vld4q_dup_s64(a); } -// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x4_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD4:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x double>, <2 x double>, <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], { <2 x double>, <2 x double>, <2 x double>, <2 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 64, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x2x4_t, %struct.float64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4r.v2f64.p0(ptr %a) +// CHECK: store { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x4_t [[TMP6]] float64x2x4_t test_vld4q_dup_f64(float64_t *a) { return vld4q_dup_f64(a); } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP4]], i8* align 16 [[TMP5]], i64 64, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4r.v2i64.p0(ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x4_t [[TMP6]] poly64x2x4_t test_vld4q_dup_p64(poly64_t *a) { return vld4q_dup_p64(a); } -// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_dup_f64(double* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_dup_f64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x4_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast double* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to double* -// CHECK: [[VLD4:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0f64(double* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x double>, <1 x double>, <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], { <1 x double>, <1 x double>, <1 x double>, <1 x double> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.float64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.float64x1x4_t, %struct.float64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4r.v1f64.p0(ptr %a) +// CHECK: store { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.float64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x4_t [[TMP6]] float64x1x4_t test_vld4_dup_f64(float64_t *a) { return vld4_dup_f64(a); } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_dup_p64(i64* noundef %a) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_dup_p64(ptr noundef %a) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast i64* %a to i8* -// CHECK: [[TMP2:%.*]] = bitcast i8* [[TMP1]] to i64* -// CHECK: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0i64(i64* [[TMP2]]) -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP3]] -// CHECK: [[TMP4:%.*]] = bitcast %struct.poly64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP5:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP4]], i8* align 8 [[TMP5]], i64 32, i1 false) -// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4r.v1i64.p0(ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP6:%.*]] = load %struct.poly64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x4_t [[TMP6]] poly64x1x4_t test_vld4_dup_p64(poly64_t *a) { return vld4_dup_p64(a); } -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_u8(i8* noundef %a, <16 x i8> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_u8(ptr noundef %a, <16 x i8> noundef %b) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] uint8x16_t test_vld1q_lane_u8(uint8_t *a, uint8x16_t b) { return vld1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_u16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_u16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[TMP4]], i32 7 // CHECK: ret <8 x i16> [[VLD1_LANE]] uint16x8_t test_vld1q_lane_u16(uint16_t *a, uint16x8_t b) { return vld1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_u32(i32* noundef %a, <4 x i32> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_u32(ptr noundef %a, <4 x i32> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP4:%.*]] = load i32, i32* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i32, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[TMP4]], i32 3 // CHECK: ret <4 x i32> [[VLD1_LANE]] uint32x4_t test_vld1q_lane_u32(uint32_t *a, uint32x4_t b) { return vld1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_u64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_u64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP4]], i32 1 // CHECK: ret <2 x i64> [[VLD1_LANE]] uint64x2_t test_vld1q_lane_u64(uint64_t *a, uint64x2_t b) { return vld1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_s8(i8* noundef %a, <16 x i8> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_s8(ptr noundef %a, <16 x i8> noundef %b) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] int8x16_t test_vld1q_lane_s8(int8_t *a, int8x16_t b) { return vld1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_s16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_s16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[TMP4]], i32 7 // CHECK: ret <8 x i16> [[VLD1_LANE]] int16x8_t test_vld1q_lane_s16(int16_t *a, int16x8_t b) { return vld1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_s32(i32* noundef %a, <4 x i32> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x i32> @test_vld1q_lane_s32(ptr noundef %a, <4 x i32> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP4:%.*]] = load i32, i32* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i32, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[TMP4]], i32 3 // CHECK: ret <4 x i32> [[VLD1_LANE]] int32x4_t test_vld1q_lane_s32(int32_t *a, int32x4_t b) { return vld1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_s64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_s64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP4]], i32 1 // CHECK: ret <2 x i64> [[VLD1_LANE]] int64x2_t test_vld1q_lane_s64(int64_t *a, int64x2_t b) { return vld1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_lane_f16(half* noundef %a, <8 x half> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* +// CHECK-LABEL: define{{.*}} <8 x half> @test_vld1q_lane_f16(ptr noundef %a, <8 x half> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: [[TMP4:%.*]] = load half, half* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load half, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x half> [[TMP2]], half [[TMP4]], i32 7 // CHECK: ret <8 x half> [[VLD1_LANE]] float16x8_t test_vld1q_lane_f16(float16_t *a, float16x8_t b) { return vld1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_lane_f32(float* noundef %a, <4 x float> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x float> @test_vld1q_lane_f32(ptr noundef %a, <4 x float> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: [[TMP4:%.*]] = load float, float* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load float, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x float> [[TMP2]], float [[TMP4]], i32 3 // CHECK: ret <4 x float> [[VLD1_LANE]] float32x4_t test_vld1q_lane_f32(float32_t *a, float32x4_t b) { return vld1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_lane_f64(double* noundef %a, <2 x double> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x double> @test_vld1q_lane_f64(ptr noundef %a, <2 x double> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: [[TMP4:%.*]] = load double, double* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load double, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x double> [[TMP2]], double [[TMP4]], i32 1 // CHECK: ret <2 x double> [[VLD1_LANE]] float64x2_t test_vld1q_lane_f64(float64_t *a, float64x2_t b) { return vld1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_p8(i8* noundef %a, <16 x i8> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <16 x i8> @test_vld1q_lane_p8(ptr noundef %a, <16 x i8> noundef %b) #0 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <16 x i8> %b, i8 [[TMP0]], i32 15 // CHECK: ret <16 x i8> [[VLD1_LANE]] poly8x16_t test_vld1q_lane_p8(poly8_t *a, poly8x16_t b) { return vld1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_p16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <8 x i16> @test_vld1q_lane_p16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i16> [[TMP2]], i16 [[TMP4]], i32 7 // CHECK: ret <8 x i16> [[VLD1_LANE]] poly16x8_t test_vld1q_lane_p16(poly16_t *a, poly16x8_t b) { return vld1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_p64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x i64> @test_vld1q_lane_p64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x i64> [[TMP2]], i64 [[TMP4]], i32 1 // CHECK: ret <2 x i64> [[VLD1_LANE]] poly64x2_t test_vld1q_lane_p64(poly64_t *a, poly64x2_t b) { return vld1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_u8(i8* noundef %a, <8 x i8> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_u8(ptr noundef %a, <8 x i8> noundef %b) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] uint8x8_t test_vld1_lane_u8(uint8_t *a, uint8x8_t b) { return vld1_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_u16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_u16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x i16> [[TMP2]], i16 [[TMP4]], i32 3 // CHECK: ret <4 x i16> [[VLD1_LANE]] uint16x4_t test_vld1_lane_u16(uint16_t *a, uint16x4_t b) { return vld1_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_u32(i32* noundef %a, <2 x i32> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_u32(ptr noundef %a, <2 x i32> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP4:%.*]] = load i32, i32* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i32, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[TMP4]], i32 1 // CHECK: ret <2 x i32> [[VLD1_LANE]] uint32x2_t test_vld1_lane_u32(uint32_t *a, uint32x2_t b) { return vld1_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_u64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_u64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <1 x i64> [[TMP2]], i64 [[TMP4]], i32 0 // CHECK: ret <1 x i64> [[VLD1_LANE]] uint64x1_t test_vld1_lane_u64(uint64_t *a, uint64x1_t b) { return vld1_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_s8(i8* noundef %a, <8 x i8> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_s8(ptr noundef %a, <8 x i8> noundef %b) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] int8x8_t test_vld1_lane_s8(int8_t *a, int8x8_t b) { return vld1_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_s16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_s16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x i16> [[TMP2]], i16 [[TMP4]], i32 3 // CHECK: ret <4 x i16> [[VLD1_LANE]] int16x4_t test_vld1_lane_s16(int16_t *a, int16x4_t b) { return vld1_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_s32(i32* noundef %a, <2 x i32> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x i32> @test_vld1_lane_s32(ptr noundef %a, <2 x i32> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: [[TMP4:%.*]] = load i32, i32* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i32, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x i32> [[TMP2]], i32 [[TMP4]], i32 1 // CHECK: ret <2 x i32> [[VLD1_LANE]] int32x2_t test_vld1_lane_s32(int32_t *a, int32x2_t b) { return vld1_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_s64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_s64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <1 x i64> [[TMP2]], i64 [[TMP4]], i32 0 // CHECK: ret <1 x i64> [[VLD1_LANE]] int64x1_t test_vld1_lane_s64(int64_t *a, int64x1_t b) { return vld1_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_lane_f16(half* noundef %a, <4 x half> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x half> @test_vld1_lane_f16(ptr noundef %a, <4 x half> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: [[TMP4:%.*]] = load half, half* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load half, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x half> [[TMP2]], half [[TMP4]], i32 3 // CHECK: ret <4 x half> [[VLD1_LANE]] float16x4_t test_vld1_lane_f16(float16_t *a, float16x4_t b) { return vld1_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_lane_f32(float* noundef %a, <2 x float> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* +// CHECK-LABEL: define{{.*}} <2 x float> @test_vld1_lane_f32(ptr noundef %a, <2 x float> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: [[TMP4:%.*]] = load float, float* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load float, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <2 x float> [[TMP2]], float [[TMP4]], i32 1 // CHECK: ret <2 x float> [[VLD1_LANE]] float32x2_t test_vld1_lane_f32(float32_t *a, float32x2_t b) { return vld1_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_lane_f64(double* noundef %a, <1 x double> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* +// CHECK-LABEL: define{{.*}} <1 x double> @test_vld1_lane_f64(ptr noundef %a, <1 x double> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: [[TMP4:%.*]] = load double, double* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load double, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <1 x double> [[TMP2]], double [[TMP4]], i32 0 // CHECK: ret <1 x double> [[VLD1_LANE]] float64x1_t test_vld1_lane_f64(float64_t *a, float64x1_t b) { return vld1_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_p8(i8* noundef %a, <8 x i8> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = load i8, i8* %a +// CHECK-LABEL: define{{.*}} <8 x i8> @test_vld1_lane_p8(ptr noundef %a, <8 x i8> noundef %b) #1 { +// CHECK: [[TMP0:%.*]] = load i8, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <8 x i8> %b, i8 [[TMP0]], i32 7 // CHECK: ret <8 x i8> [[VLD1_LANE]] poly8x8_t test_vld1_lane_p8(poly8_t *a, poly8x8_t b) { return vld1_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_p16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} <4 x i16> @test_vld1_lane_p16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: [[TMP4:%.*]] = load i16, i16* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i16, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <4 x i16> [[TMP2]], i16 [[TMP4]], i32 3 // CHECK: ret <4 x i16> [[VLD1_LANE]] poly16x4_t test_vld1_lane_p16(poly16_t *a, poly16x4_t b) { return vld1_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_p64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} <1 x i64> @test_vld1_lane_p64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> -// CHECK: [[TMP3:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: [[TMP4:%.*]] = load i64, i64* [[TMP3]] +// CHECK: [[TMP4:%.*]] = load i64, ptr %a // CHECK: [[VLD1_LANE:%.*]] = insertelement <1 x i64> [[TMP2]], i64 [[TMP4]], i32 0 // CHECK: ret <1 x i64> [[VLD1_LANE]] poly64x1_t test_vld1_lane_p64(poly64_t *a, poly64x1_t b) { return vld1_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.int8x16x2_t @test_vld2q_lane_s8(i8* noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x16x2_t @test_vld2q_lane_s8(ptr noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[SRC]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x2_t* [[SRC]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x16x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %ptr) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], { <16 x i8>, <16 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.int8x16x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.int8x16x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP6]], i8* align 16 [[TMP7]], i64 32, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.int8x16x2_t, %struct.int8x16x2_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[SRC]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[SRC]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %ptr) +// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.int8x16x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int8x16x2_t [[TMP8]] int8x16x2_t test_vld2q_lane_s8(int8_t const * ptr, int8x16x2_t src) { return vld2q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define{{.*}} %struct.uint8x16x2_t @test_vld2q_lane_u8(i8* noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x16x2_t @test_vld2q_lane_u8(ptr noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[SRC]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x2_t* [[SRC]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x16x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %ptr) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], { <16 x i8>, <16 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.uint8x16x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.uint8x16x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP6]], i8* align 16 [[TMP7]], i64 32, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[SRC]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[SRC]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %ptr) +// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.uint8x16x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint8x16x2_t [[TMP8]] uint8x16x2_t test_vld2q_lane_u8(uint8_t const * ptr, uint8x16x2_t src) { return vld2q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define{{.*}} %struct.poly8x16x2_t @test_vld2q_lane_p8(i8* noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x16x2_t @test_vld2q_lane_p8(ptr noundef %ptr, [2 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[SRC]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x2_t* [[SRC]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x16x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %ptr) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], { <16 x i8>, <16 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.poly8x16x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.poly8x16x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP6]], i8* align 16 [[TMP7]], i64 32, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[SRC]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[SRC]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[SRC]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld2lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %ptr) +// CHECK: store { <16 x i8>, <16 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.poly8x16x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly8x16x2_t [[TMP8]] poly8x16x2_t test_vld2q_lane_p8(poly8_t const * ptr, poly8x16x2_t src) { return vld2q_lane_p8(ptr, src, 15); } -// CHECK-LABEL: define{{.*}} %struct.int8x16x3_t @test_vld3q_lane_s8(i8* noundef %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x16x3_t @test_vld3q_lane_s8(ptr noundef %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[SRC]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[SRC]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x3_t* [[SRC]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x16x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %ptr) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], { <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.int8x16x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.int8x16x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP7]], i8* align 16 [[TMP8]], i64 48, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.int8x16x3_t, %struct.int8x16x3_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[SRC]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[SRC]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[SRC]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %ptr) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.int8x16x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int8x16x3_t [[TMP9]] int8x16x3_t test_vld3q_lane_s8(int8_t const * ptr, int8x16x3_t src) { return vld3q_lane_s8(ptr, src, 15); } -// CHECK-LABEL: define{{.*}} %struct.uint8x16x3_t @test_vld3q_lane_u8(i8* noundef %ptr, [3 x <16 x i8>] %src.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x16x3_t @test_vld3q_lane_u8(ptr noundef %ptr, [3 x <16 x i8>] %src.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[SRC:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[SRC]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[SRC]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x3_t* [[SRC]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x16x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %ptr) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], { <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.uint8x16x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.uint8x16x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP7]], i8* align 16 [[TMP8]], i64 48, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[SRC]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[SRC]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[SRC]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %ptr) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.uint8x16x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint8x16x3_t [[TMP9]] uint8x16x3_t test_vld3q_lane_u8(uint8_t const * ptr, uint8x16x3_t src) { return vld3q_lane_u8(ptr, src, 15); } -// CHECK-LABEL: define{{.*}} %struct.uint16x8x2_t @test_vld2q_lane_u16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x8x2_t @test_vld2q_lane_u16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x8x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0i8(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], { <8 x i16>, <8 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint16x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint16x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint16x8x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint16x8x2_t [[TMP13]] uint16x8x2_t test_vld2q_lane_u16(uint16_t *a, uint16x8x2_t b) { return vld2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint32x4x2_t @test_vld2q_lane_u32(i32* noundef %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x4x2_t @test_vld2q_lane_u32(ptr noundef %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i32>] [[B]].coerce, [2 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i8(<4 x i32> [[TMP8]], <4 x i32> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32> } [[VLD2_LANE]], { <4 x i32>, <4 x i32> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint32x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint32x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[TMP8]], <4 x i32> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint32x4x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint32x4x2_t [[TMP13]] uint32x4x2_t test_vld2q_lane_u32(uint32_t *a, uint32x4x2_t b) { return vld2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_lane_u64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x2_t @test_vld2q_lane_u64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0i8(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], { <2 x i64>, <2 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x2_t [[TMP13]] uint64x2x2_t test_vld2q_lane_u64(uint64_t *a, uint64x2x2_t b) { return vld2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int16x8x2_t @test_vld2q_lane_s16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x8x2_t @test_vld2q_lane_s16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x8x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0i8(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], { <8 x i16>, <8 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int16x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int16x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int16x8x2_t, %struct.int16x8x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int16x8x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int16x8x2_t [[TMP13]] int16x8x2_t test_vld2q_lane_s16(int16_t *a, int16x8x2_t b) { return vld2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int32x4x2_t @test_vld2q_lane_s32(i32* noundef %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x4x2_t @test_vld2q_lane_s32(ptr noundef %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i32>] [[B]].coerce, [2 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0i8(<4 x i32> [[TMP8]], <4 x i32> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32> } [[VLD2_LANE]], { <4 x i32>, <4 x i32> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int32x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int32x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int32x4x2_t, %struct.int32x4x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld2lane.v4i32.p0(<4 x i32> [[TMP8]], <4 x i32> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int32x4x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int32x4x2_t [[TMP13]] int32x4x2_t test_vld2q_lane_s32(int32_t *a, int32x4x2_t b) { return vld2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_lane_s64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x2_t @test_vld2q_lane_s64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0i8(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], { <2 x i64>, <2 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int64x2x2_t, %struct.int64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x2_t [[TMP13]] int64x2x2_t test_vld2q_lane_s64(int64_t *a, int64x2x2_t b) { return vld2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float16x8x2_t @test_vld2q_lane_f16(half* noundef %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x8x2_t @test_vld2q_lane_f16(ptr noundef %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x half>] [[B]].coerce, [2 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x8x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x half>], [2 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x half>], [2 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x half> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x half> -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2lane.v8f16.p0i8(<8 x half> [[TMP8]], <8 x half> [[TMP9]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <8 x half>, <8 x half> }* -// CHECK: store { <8 x half>, <8 x half> } [[VLD2_LANE]], { <8 x half>, <8 x half> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float16x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float16x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float16x8x2_t, %struct.float16x8x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x half>, <8 x half> } @llvm.aarch64.neon.ld2lane.v8f16.p0(<8 x half> [[TMP8]], <8 x half> [[TMP9]], i64 7, ptr %a) +// CHECK: store { <8 x half>, <8 x half> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float16x8x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float16x8x2_t [[TMP13]] float16x8x2_t test_vld2q_lane_f16(float16_t *a, float16x8x2_t b) { return vld2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.float32x4x2_t @test_vld2q_lane_f32(float* noundef %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x4x2_t @test_vld2q_lane_f32(ptr noundef %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x float>] [[B]].coerce, [2 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x float>], [2 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x float> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x float>], [2 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x float> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x float> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0i8(<4 x float> [[TMP8]], <4 x float> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x float>, <4 x float> }* -// CHECK: store { <4 x float>, <4 x float> } [[VLD2_LANE]], { <4 x float>, <4 x float> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float32x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float32x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float32x4x2_t, %struct.float32x4x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x float>, <4 x float> } @llvm.aarch64.neon.ld2lane.v4f32.p0(<4 x float> [[TMP8]], <4 x float> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x float>, <4 x float> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float32x4x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float32x4x2_t [[TMP13]] float32x4x2_t test_vld2q_lane_f32(float32_t *a, float32x4x2_t b) { return vld2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_lane_f64(double* noundef %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x2_t @test_vld2q_lane_f64(ptr noundef %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x double>] [[B]].coerce, [2 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x double>], [2 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x double> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x double>], [2 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x double> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0i8(<2 x double> [[TMP8]], <2 x double> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double> } [[VLD2_LANE]], { <2 x double>, <2 x double> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float64x2x2_t, %struct.float64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x double>, <2 x double> } @llvm.aarch64.neon.ld2lane.v2f64.p0(<2 x double> [[TMP8]], <2 x double> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x double>, <2 x double> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x2_t [[TMP13]] float64x2x2_t test_vld2q_lane_f64(float64_t *a, float64x2x2_t b) { return vld2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.poly16x8x2_t @test_vld2q_lane_p16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x8x2_t @test_vld2q_lane_p16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x8x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0i8(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], { <8 x i16>, <8 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.poly16x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.poly16x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld2lane.v8i16.p0(<8 x i16> [[TMP8]], <8 x i16> [[TMP9]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.poly16x8x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly16x8x2_t [[TMP13]] poly16x8x2_t test_vld2q_lane_p16(poly16_t *a, poly16x8x2_t b) { return vld2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_lane_p64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x2_t @test_vld2q_lane_p64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0i8(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], { <2 x i64>, <2 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.poly64x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.poly64x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP11]], i8* align 16 [[TMP12]], i64 32, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[RETVAL]], align 16 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld2lane.v2i64.p0(<2 x i64> [[TMP8]], <2 x i64> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.poly64x2x2_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x2_t [[TMP13]] poly64x2x2_t test_vld2q_lane_p64(poly64_t *a, poly64x2x2_t b) { return vld2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint8x8x2_t @test_vld2_lane_u8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x8x2_t @test_vld2_lane_u8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x8x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], { <8 x i8>, <8 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.uint8x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.uint8x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 [[TMP7]], i64 16, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.uint8x8x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint8x8x2_t [[TMP8]] uint8x8x2_t test_vld2_lane_u8(uint8_t *a, uint8x8x2_t b) { return vld2_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint16x4x2_t @test_vld2_lane_u16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x4x2_t @test_vld2_lane_u16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0i8(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], { <4 x i16>, <4 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint16x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint16x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint16x4x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint16x4x2_t [[TMP13]] uint16x4x2_t test_vld2_lane_u16(uint16_t *a, uint16x4x2_t b) { return vld2_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint32x2x2_t @test_vld2_lane_u32(i32* noundef %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x2x2_t @test_vld2_lane_u32(ptr noundef %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i32>] [[B]].coerce, [2 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0i8(<2 x i32> [[TMP8]], <2 x i32> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32> } [[VLD2_LANE]], { <2 x i32>, <2 x i32> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint32x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint32x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[TMP8]], <2 x i32> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint32x2x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint32x2x2_t [[TMP13]] uint32x2x2_t test_vld2_lane_u32(uint32_t *a, uint32x2x2_t b) { return vld2_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint64x1x2_t @test_vld2_lane_u64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x1x2_t @test_vld2_lane_u64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0i8(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], { <1 x i64>, <1 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.uint64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.uint64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.uint64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint64x1x2_t [[TMP13]] uint64x1x2_t test_vld2_lane_u64(uint64_t *a, uint64x1x2_t b) { return vld2_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.int8x8x2_t @test_vld2_lane_s8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x8x2_t @test_vld2_lane_s8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x8x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], { <8 x i8>, <8 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.int8x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.int8x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 [[TMP7]], i64 16, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.int8x8x2_t, %struct.int8x8x2_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.int8x8x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int8x8x2_t [[TMP8]] int8x8x2_t test_vld2_lane_s8(int8_t *a, int8x8x2_t b) { return vld2_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int16x4x2_t @test_vld2_lane_s16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x4x2_t @test_vld2_lane_s16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0i8(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], { <4 x i16>, <4 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int16x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int16x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int16x4x2_t, %struct.int16x4x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int16x4x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int16x4x2_t [[TMP13]] int16x4x2_t test_vld2_lane_s16(int16_t *a, int16x4x2_t b) { return vld2_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int32x2x2_t @test_vld2_lane_s32(i32* noundef %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x2x2_t @test_vld2_lane_s32(ptr noundef %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i32>] [[B]].coerce, [2 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0i8(<2 x i32> [[TMP8]], <2 x i32> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32> } [[VLD2_LANE]], { <2 x i32>, <2 x i32> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int32x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int32x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int32x2x2_t, %struct.int32x2x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld2lane.v2i32.p0(<2 x i32> [[TMP8]], <2 x i32> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int32x2x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int32x2x2_t [[TMP13]] int32x2x2_t test_vld2_lane_s32(int32_t *a, int32x2x2_t b) { return vld2_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int64x1x2_t @test_vld2_lane_s64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x1x2_t @test_vld2_lane_s64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0i8(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], { <1 x i64>, <1 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.int64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.int64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.int64x1x2_t, %struct.int64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.int64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int64x1x2_t [[TMP13]] int64x1x2_t test_vld2_lane_s64(int64_t *a, int64x1x2_t b) { return vld2_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.float16x4x2_t @test_vld2_lane_f16(half* noundef %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x4x2_t @test_vld2_lane_f16(ptr noundef %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x half>] [[B]].coerce, [2 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x half>], [2 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x half>], [2 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x half> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x half> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2lane.v4f16.p0i8(<4 x half> [[TMP8]], <4 x half> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x half>, <4 x half> }* -// CHECK: store { <4 x half>, <4 x half> } [[VLD2_LANE]], { <4 x half>, <4 x half> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float16x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float16x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float16x4x2_t, %struct.float16x4x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x half>, <4 x half> } @llvm.aarch64.neon.ld2lane.v4f16.p0(<4 x half> [[TMP8]], <4 x half> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x half>, <4 x half> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float16x4x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float16x4x2_t [[TMP13]] float16x4x2_t test_vld2_lane_f16(float16_t *a, float16x4x2_t b) { return vld2_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float32x2x2_t @test_vld2_lane_f32(float* noundef %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x2x2_t @test_vld2_lane_f32(ptr noundef %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x float>] [[B]].coerce, [2 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x2x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x float>], [2 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x float>], [2 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x float> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x float> -// CHECK: [[VLD2_LANE:%.*]] = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0i8(<2 x float> [[TMP8]], <2 x float> [[TMP9]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <2 x float>, <2 x float> }* -// CHECK: store { <2 x float>, <2 x float> } [[VLD2_LANE]], { <2 x float>, <2 x float> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float32x2x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float32x2x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float32x2x2_t, %struct.float32x2x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <2 x float>, <2 x float> } @llvm.aarch64.neon.ld2lane.v2f32.p0(<2 x float> [[TMP8]], <2 x float> [[TMP9]], i64 1, ptr %a) +// CHECK: store { <2 x float>, <2 x float> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float32x2x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float32x2x2_t [[TMP13]] float32x2x2_t test_vld2_lane_f32(float32_t *a, float32x2x2_t b) { return vld2_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_lane_f64(double* noundef %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x2_t @test_vld2_lane_f64(ptr noundef %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x double>] [[B]].coerce, [2 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x double>], [2 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x double> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x double>], [2 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x double> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double> -// CHECK: [[VLD2_LANE:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0i8(<1 x double> [[TMP8]], <1 x double> [[TMP9]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double> } [[VLD2_LANE]], { <1 x double>, <1 x double> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.float64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.float64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.float64x1x2_t, %struct.float64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <1 x double>, <1 x double> } @llvm.aarch64.neon.ld2lane.v1f64.p0(<1 x double> [[TMP8]], <1 x double> [[TMP9]], i64 0, ptr %a) +// CHECK: store { <1 x double>, <1 x double> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.float64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x2_t [[TMP13]] float64x1x2_t test_vld2_lane_f64(float64_t *a, float64x1x2_t b) { return vld2_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.poly8x8x2_t @test_vld2_lane_p8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x8x2_t @test_vld2_lane_p8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x8x2_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) -// CHECK: [[TMP5:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], { <8 x i8>, <8 x i8> }* [[TMP5]] -// CHECK: [[TMP6:%.*]] = bitcast %struct.poly8x8x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP7:%.*]] = bitcast %struct.poly8x8x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP6]], i8* align 8 [[TMP7]], i64 16, i1 false) -// CHECK: [[TMP8:%.*]] = load %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld2lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP8:%.*]] = load %struct.poly8x8x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly8x8x2_t [[TMP8]] poly8x8x2_t test_vld2_lane_p8(poly8_t *a, poly8x8x2_t b) { return vld2_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly16x4x2_t @test_vld2_lane_p16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x4x2_t @test_vld2_lane_p16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x4x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> -// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0i8(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], { <4 x i16>, <4 x i16> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.poly16x4x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.poly16x4x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld2lane.v4i16.p0(<4 x i16> [[TMP8]], <4 x i16> [[TMP9]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.poly16x4x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly16x4x2_t [[TMP13]] poly16x4x2_t test_vld2_lane_p16(poly16_t *a, poly16x4x2_t b) { return vld2_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_lane_p64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x2_t @test_vld2_lane_p64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> -// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0i8(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP10:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], { <1 x i64>, <1 x i64> }* [[TMP10]] -// CHECK: [[TMP11:%.*]] = bitcast %struct.poly64x1x2_t* [[RETVAL]] to i8* -// CHECK: [[TMP12:%.*]] = bitcast %struct.poly64x1x2_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP11]], i8* align 8 [[TMP12]], i64 16, i1 false) -// CHECK: [[TMP13:%.*]] = load %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[RETVAL]], align 8 +// CHECK: [[VLD2_LANE:%.*]] = call { <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld2lane.v1i64.p0(<1 x i64> [[TMP8]], <1 x i64> [[TMP9]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64> } [[VLD2_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 16, i1 false) +// CHECK: [[TMP13:%.*]] = load %struct.poly64x1x2_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x2_t [[TMP13]] poly64x1x2_t test_vld2_lane_p64(poly64_t *a, poly64x1x2_t b) { return vld2_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.uint16x8x3_t @test_vld3q_lane_u16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x8x3_t @test_vld3q_lane_u16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x8x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0i8(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], { <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint16x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint16x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint16x8x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint16x8x3_t [[TMP16]] uint16x8x3_t test_vld3q_lane_u16(uint16_t *a, uint16x8x3_t b) { return vld3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint32x4x3_t @test_vld3q_lane_u32(i32* noundef %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x4x3_t @test_vld3q_lane_u32(ptr noundef %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i32>] [[B]].coerce, [3 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x i32> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x i32> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i8(<4 x i32> [[TMP10]], <4 x i32> [[TMP11]], <4 x i32> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], { <4 x i32>, <4 x i32>, <4 x i32> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint32x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint32x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[TMP10]], <4 x i32> [[TMP11]], <4 x i32> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint32x4x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint32x4x3_t [[TMP16]] uint32x4x3_t test_vld3q_lane_u32(uint32_t *a, uint32x4x3_t b) { return vld3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_lane_u64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x3_t @test_vld3q_lane_u64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0i8(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x3_t [[TMP16]] uint64x2x3_t test_vld3q_lane_u64(uint64_t *a, uint64x2x3_t b) { return vld3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int16x8x3_t @test_vld3q_lane_s16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x8x3_t @test_vld3q_lane_s16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x8x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0i8(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], { <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int16x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int16x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int16x8x3_t, %struct.int16x8x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int16x8x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int16x8x3_t [[TMP16]] int16x8x3_t test_vld3q_lane_s16(int16_t *a, int16x8x3_t b) { return vld3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int32x4x3_t @test_vld3q_lane_s32(i32* noundef %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x4x3_t @test_vld3q_lane_s32(ptr noundef %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i32>] [[B]].coerce, [3 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x i32> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x i32> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0i8(<4 x i32> [[TMP10]], <4 x i32> [[TMP11]], <4 x i32> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], { <4 x i32>, <4 x i32>, <4 x i32> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int32x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int32x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int32x4x3_t, %struct.int32x4x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld3lane.v4i32.p0(<4 x i32> [[TMP10]], <4 x i32> [[TMP11]], <4 x i32> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int32x4x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int32x4x3_t [[TMP16]] int32x4x3_t test_vld3q_lane_s32(int32_t *a, int32x4x3_t b) { return vld3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_lane_s64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x3_t @test_vld3q_lane_s64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0i8(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int64x2x3_t, %struct.int64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x3_t [[TMP16]] int64x2x3_t test_vld3q_lane_s64(int64_t *a, int64x2x3_t b) { return vld3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float16x8x3_t @test_vld3q_lane_f16(half* noundef %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x8x3_t @test_vld3q_lane_f16(ptr noundef %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x half>] [[B]].coerce, [3 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x8x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x half> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x half>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x half> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x half> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x half> -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3lane.v8f16.p0i8(<8 x half> [[TMP10]], <8 x half> [[TMP11]], <8 x half> [[TMP12]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <8 x half>, <8 x half>, <8 x half> }* -// CHECK: store { <8 x half>, <8 x half>, <8 x half> } [[VLD3_LANE]], { <8 x half>, <8 x half>, <8 x half> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float16x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float16x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float16x8x3_t, %struct.float16x8x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld3lane.v8f16.p0(<8 x half> [[TMP10]], <8 x half> [[TMP11]], <8 x half> [[TMP12]], i64 7, ptr %a) +// CHECK: store { <8 x half>, <8 x half>, <8 x half> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float16x8x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float16x8x3_t [[TMP16]] float16x8x3_t test_vld3q_lane_f16(float16_t *a, float16x8x3_t b) { return vld3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.float32x4x3_t @test_vld3q_lane_f32(float* noundef %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x4x3_t @test_vld3q_lane_f32(ptr noundef %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x float>] [[B]].coerce, [3 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x float> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x float> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x float> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x float> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x float> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0i8(<4 x float> [[TMP10]], <4 x float> [[TMP11]], <4 x float> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x float>, <4 x float>, <4 x float> }* -// CHECK: store { <4 x float>, <4 x float>, <4 x float> } [[VLD3_LANE]], { <4 x float>, <4 x float>, <4 x float> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float32x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float32x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float32x4x3_t, %struct.float32x4x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld3lane.v4f32.p0(<4 x float> [[TMP10]], <4 x float> [[TMP11]], <4 x float> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x float>, <4 x float>, <4 x float> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float32x4x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float32x4x3_t [[TMP16]] float32x4x3_t test_vld3q_lane_f32(float32_t *a, float32x4x3_t b) { return vld3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_lane_f64(double* noundef %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x3_t @test_vld3q_lane_f64(ptr noundef %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x double>] [[B]].coerce, [3 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x double> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x double> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x double> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x double> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0i8(<2 x double> [[TMP10]], <2 x double> [[TMP11]], <2 x double> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x double>, <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double>, <2 x double> } [[VLD3_LANE]], { <2 x double>, <2 x double>, <2 x double> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float64x2x3_t, %struct.float64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld3lane.v2f64.p0(<2 x double> [[TMP10]], <2 x double> [[TMP11]], <2 x double> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x double>, <2 x double>, <2 x double> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x3_t [[TMP16]] float64x2x3_t test_vld3q_lane_f64(float64_t *a, float64x2x3_t b) { return vld3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.poly8x16x3_t @test_vld3q_lane_p8(i8* noundef %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x16x3_t @test_vld3q_lane_p8(ptr noundef %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[B]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x16x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %a) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], { <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.poly8x16x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.poly8x16x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP7]], i8* align 16 [[TMP8]], i64 48, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld3lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %a) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.poly8x16x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly8x16x3_t [[TMP9]] poly8x16x3_t test_vld3q_lane_p8(poly8_t *a, poly8x16x3_t b) { return vld3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} %struct.poly16x8x3_t @test_vld3q_lane_p16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x8x3_t @test_vld3q_lane_p16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x8x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0i8(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], { <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.poly16x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.poly16x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld3lane.v8i16.p0(<8 x i16> [[TMP10]], <8 x i16> [[TMP11]], <8 x i16> [[TMP12]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.poly16x8x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly16x8x3_t [[TMP16]] poly16x8x3_t test_vld3q_lane_p16(poly16_t *a, poly16x8x3_t b) { return vld3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_lane_p64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x3_t @test_vld3q_lane_p64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0i8(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], { <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.poly64x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.poly64x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP14]], i8* align 16 [[TMP15]], i64 48, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[RETVAL]], align 16 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld3lane.v2i64.p0(<2 x i64> [[TMP10]], <2 x i64> [[TMP11]], <2 x i64> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 48, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.poly64x2x3_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x3_t [[TMP16]] poly64x2x3_t test_vld3q_lane_p64(poly64_t *a, poly64x2x3_t b) { return vld3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint8x8x3_t @test_vld3_lane_u8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x8x3_t @test_vld3_lane_u8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x8x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], { <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.uint8x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.uint8x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP7]], i8* align 8 [[TMP8]], i64 24, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.uint8x8x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint8x8x3_t [[TMP9]] uint8x8x3_t test_vld3_lane_u8(uint8_t *a, uint8x8x3_t b) { return vld3_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint16x4x3_t @test_vld3_lane_u16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x4x3_t @test_vld3_lane_u16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0i8(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], { <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint16x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint16x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint16x4x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint16x4x3_t [[TMP16]] uint16x4x3_t test_vld3_lane_u16(uint16_t *a, uint16x4x3_t b) { return vld3_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint32x2x3_t @test_vld3_lane_u32(i32* noundef %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x2x3_t @test_vld3_lane_u32(ptr noundef %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i32>] [[B]].coerce, [3 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x i32> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x i32> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0i8(<2 x i32> [[TMP10]], <2 x i32> [[TMP11]], <2 x i32> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], { <2 x i32>, <2 x i32>, <2 x i32> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint32x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint32x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[TMP10]], <2 x i32> [[TMP11]], <2 x i32> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint32x2x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint32x2x3_t [[TMP16]] uint32x2x3_t test_vld3_lane_u32(uint32_t *a, uint32x2x3_t b) { return vld3_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint64x1x3_t @test_vld3_lane_u64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x1x3_t @test_vld3_lane_u64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0i8(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], { <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.uint64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.uint64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.uint64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint64x1x3_t [[TMP16]] uint64x1x3_t test_vld3_lane_u64(uint64_t *a, uint64x1x3_t b) { return vld3_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.int8x8x3_t @test_vld3_lane_s8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x8x3_t @test_vld3_lane_s8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x8x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], { <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.int8x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.int8x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP7]], i8* align 8 [[TMP8]], i64 24, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.int8x8x3_t, %struct.int8x8x3_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.int8x8x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int8x8x3_t [[TMP9]] int8x8x3_t test_vld3_lane_s8(int8_t *a, int8x8x3_t b) { return vld3_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int16x4x3_t @test_vld3_lane_s16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x4x3_t @test_vld3_lane_s16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0i8(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], { <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int16x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int16x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int16x4x3_t, %struct.int16x4x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int16x4x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int16x4x3_t [[TMP16]] int16x4x3_t test_vld3_lane_s16(int16_t *a, int16x4x3_t b) { return vld3_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int32x2x3_t @test_vld3_lane_s32(i32* noundef %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x2x3_t @test_vld3_lane_s32(ptr noundef %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i32>] [[B]].coerce, [3 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x i32> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x i32> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0i8(<2 x i32> [[TMP10]], <2 x i32> [[TMP11]], <2 x i32> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], { <2 x i32>, <2 x i32>, <2 x i32> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int32x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int32x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int32x2x3_t, %struct.int32x2x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld3lane.v2i32.p0(<2 x i32> [[TMP10]], <2 x i32> [[TMP11]], <2 x i32> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int32x2x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int32x2x3_t [[TMP16]] int32x2x3_t test_vld3_lane_s32(int32_t *a, int32x2x3_t b) { return vld3_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int64x1x3_t @test_vld3_lane_s64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x1x3_t @test_vld3_lane_s64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0i8(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], { <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.int64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.int64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.int64x1x3_t, %struct.int64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.int64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int64x1x3_t [[TMP16]] int64x1x3_t test_vld3_lane_s64(int64_t *a, int64x1x3_t b) { return vld3_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.float16x4x3_t @test_vld3_lane_f16(half* noundef %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x4x3_t @test_vld3_lane_f16(ptr noundef %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x half>] [[B]].coerce, [3 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x half> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x half>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x half> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x half> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x half> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3lane.v4f16.p0i8(<4 x half> [[TMP10]], <4 x half> [[TMP11]], <4 x half> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x half>, <4 x half>, <4 x half> }* -// CHECK: store { <4 x half>, <4 x half>, <4 x half> } [[VLD3_LANE]], { <4 x half>, <4 x half>, <4 x half> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float16x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float16x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float16x4x3_t, %struct.float16x4x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld3lane.v4f16.p0(<4 x half> [[TMP10]], <4 x half> [[TMP11]], <4 x half> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x half>, <4 x half>, <4 x half> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float16x4x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float16x4x3_t [[TMP16]] float16x4x3_t test_vld3_lane_f16(float16_t *a, float16x4x3_t b) { return vld3_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float32x2x3_t @test_vld3_lane_f32(float* noundef %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x2x3_t @test_vld3_lane_f32(ptr noundef %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x float>] [[B]].coerce, [3 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x2x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x float> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x float> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x float> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x float> -// CHECK: [[VLD3_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0i8(<2 x float> [[TMP10]], <2 x float> [[TMP11]], <2 x float> [[TMP12]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <2 x float>, <2 x float>, <2 x float> }* -// CHECK: store { <2 x float>, <2 x float>, <2 x float> } [[VLD3_LANE]], { <2 x float>, <2 x float>, <2 x float> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float32x2x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float32x2x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float32x2x3_t, %struct.float32x2x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld3lane.v2f32.p0(<2 x float> [[TMP10]], <2 x float> [[TMP11]], <2 x float> [[TMP12]], i64 1, ptr %a) +// CHECK: store { <2 x float>, <2 x float>, <2 x float> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float32x2x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float32x2x3_t [[TMP16]] float32x2x3_t test_vld3_lane_f32(float32_t *a, float32x2x3_t b) { return vld3_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_lane_f64(double* noundef %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x3_t @test_vld3_lane_f64(ptr noundef %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x double>] [[B]].coerce, [3 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x double> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x double> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x double>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x double> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x double> -// CHECK: [[VLD3_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0i8(<1 x double> [[TMP10]], <1 x double> [[TMP11]], <1 x double> [[TMP12]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <1 x double>, <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double>, <1 x double> } [[VLD3_LANE]], { <1 x double>, <1 x double>, <1 x double> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.float64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.float64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.float64x1x3_t, %struct.float64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld3lane.v1f64.p0(<1 x double> [[TMP10]], <1 x double> [[TMP11]], <1 x double> [[TMP12]], i64 0, ptr %a) +// CHECK: store { <1 x double>, <1 x double>, <1 x double> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.float64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x3_t [[TMP16]] float64x1x3_t test_vld3_lane_f64(float64_t *a, float64x1x3_t b) { return vld3_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.poly8x8x3_t @test_vld3_lane_p8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x8x3_t @test_vld3_lane_p8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x8x3_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) -// CHECK: [[TMP6:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], { <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP6]] -// CHECK: [[TMP7:%.*]] = bitcast %struct.poly8x8x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP8:%.*]] = bitcast %struct.poly8x8x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP7]], i8* align 8 [[TMP8]], i64 24, i1 false) -// CHECK: [[TMP9:%.*]] = load %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld3lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP9:%.*]] = load %struct.poly8x8x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly8x8x3_t [[TMP9]] poly8x8x3_t test_vld3_lane_p8(poly8_t *a, poly8x8x3_t b) { return vld3_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly16x4x3_t @test_vld3_lane_p16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x4x3_t @test_vld3_lane_p16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x4x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> -// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0i8(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], { <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.poly16x4x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.poly16x4x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld3lane.v4i16.p0(<4 x i16> [[TMP10]], <4 x i16> [[TMP11]], <4 x i16> [[TMP12]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.poly16x4x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly16x4x3_t [[TMP16]] poly16x4x3_t test_vld3_lane_p16(poly16_t *a, poly16x4x3_t b) { return vld3_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_lane_p64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x3_t @test_vld3_lane_p64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> -// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0i8(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP13:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], { <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP13]] -// CHECK: [[TMP14:%.*]] = bitcast %struct.poly64x1x3_t* [[RETVAL]] to i8* -// CHECK: [[TMP15:%.*]] = bitcast %struct.poly64x1x3_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP14]], i8* align 8 [[TMP15]], i64 24, i1 false) -// CHECK: [[TMP16:%.*]] = load %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[RETVAL]], align 8 +// CHECK: [[VLD3_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld3lane.v1i64.p0(<1 x i64> [[TMP10]], <1 x i64> [[TMP11]], <1 x i64> [[TMP12]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64> } [[VLD3_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 24, i1 false) +// CHECK: [[TMP16:%.*]] = load %struct.poly64x1x3_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x3_t [[TMP16]] poly64x1x3_t test_vld3_lane_p64(poly64_t *a, poly64x1x3_t b) { return vld3_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.uint8x16x4_t @test_vld4q_lane_u8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x16x4_t @test_vld4q_lane_u8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x16x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.uint8x16x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.uint8x16x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP8]], i8* align 16 [[TMP9]], i64 64, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, ptr %a) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.uint8x16x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint8x16x4_t [[TMP10]] uint8x16x4_t test_vld4q_lane_u8(uint8_t *a, uint8x16x4_t b) { return vld4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} %struct.uint16x8x4_t @test_vld4q_lane_u16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x8x4_t @test_vld4q_lane_u16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x8x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <8 x i16> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <8 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0i8(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint16x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint16x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint16x8x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint16x8x4_t [[TMP19]] uint16x8x4_t test_vld4q_lane_u16(uint16_t *a, uint16x8x4_t b) { return vld4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint32x4x4_t @test_vld4q_lane_u32(i32* noundef %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x4x4_t @test_vld4q_lane_u32(ptr noundef %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i32>] [[B]].coerce, [4 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x i32> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x i32>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <4 x i32> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x i32> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <4 x i32> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i8(<4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], <4 x i32> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint32x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint32x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], <4 x i32> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint32x4x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint32x4x4_t [[TMP19]] uint32x4x4_t test_vld4q_lane_u32(uint32_t *a, uint32x4x4_t b) { return vld4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_lane_u64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x2x4_t @test_vld4q_lane_u64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <2 x i64> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <2 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0i8(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.uint64x2x4_t [[TMP19]] uint64x2x4_t test_vld4q_lane_u64(uint64_t *a, uint64x2x4_t b) { return vld4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int8x16x4_t @test_vld4q_lane_s8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x16x4_t @test_vld4q_lane_s8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x16x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.int8x16x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.int8x16x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP8]], i8* align 16 [[TMP9]], i64 64, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.int8x16x4_t, %struct.int8x16x4_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, ptr %a) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.int8x16x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int8x16x4_t [[TMP10]] int8x16x4_t test_vld4q_lane_s8(int8_t *a, int8x16x4_t b) { return vld4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} %struct.int16x8x4_t @test_vld4q_lane_s16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x8x4_t @test_vld4q_lane_s16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x8x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <8 x i16> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <8 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0i8(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int16x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int16x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int16x8x4_t, %struct.int16x8x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int16x8x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int16x8x4_t [[TMP19]] int16x8x4_t test_vld4q_lane_s16(int16_t *a, int16x8x4_t b) { return vld4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int32x4x4_t @test_vld4q_lane_s32(i32* noundef %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x4x4_t @test_vld4q_lane_s32(ptr noundef %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i32>] [[B]].coerce, [4 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x i32> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x i32> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x i32> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x i32>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <4 x i32> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x i32> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x i32> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x i32> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <4 x i32> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0i8(<4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], <4 x i32> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }* -// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int32x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int32x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int32x4x4_t, %struct.int32x4x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } @llvm.aarch64.neon.ld4lane.v4i32.p0(<4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], <4 x i32> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x i32>, <4 x i32>, <4 x i32>, <4 x i32> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int32x4x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int32x4x4_t [[TMP19]] int32x4x4_t test_vld4q_lane_s32(int32_t *a, int32x4x4_t b) { return vld4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_lane_s64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x2x4_t @test_vld4q_lane_s64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <2 x i64> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <2 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0i8(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int64x2x4_t, %struct.int64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.int64x2x4_t [[TMP19]] int64x2x4_t test_vld4q_lane_s64(int64_t *a, int64x2x4_t b) { return vld4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float16x8x4_t @test_vld4q_lane_f16(half* noundef %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x8x4_t @test_vld4q_lane_f16(ptr noundef %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x half>] [[B]].coerce, [4 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x8x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x half> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x half> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x half>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x half> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <8 x half>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <8 x half> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x half> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x half> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x half> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <8 x half> -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4lane.v8f16.p0i8(<8 x half> [[TMP12]], <8 x half> [[TMP13]], <8 x half> [[TMP14]], <8 x half> [[TMP15]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <8 x half>, <8 x half>, <8 x half>, <8 x half> }* -// CHECK: store { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], { <8 x half>, <8 x half>, <8 x half>, <8 x half> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float16x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float16x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float16x8x4_t, %struct.float16x8x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x half>, <8 x half>, <8 x half>, <8 x half> } @llvm.aarch64.neon.ld4lane.v8f16.p0(<8 x half> [[TMP12]], <8 x half> [[TMP13]], <8 x half> [[TMP14]], <8 x half> [[TMP15]], i64 7, ptr %a) +// CHECK: store { <8 x half>, <8 x half>, <8 x half>, <8 x half> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float16x8x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float16x8x4_t [[TMP19]] float16x8x4_t test_vld4q_lane_f16(float16_t *a, float16x8x4_t b) { return vld4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.float32x4x4_t @test_vld4q_lane_f32(float* noundef %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x4x4_t @test_vld4q_lane_f32(ptr noundef %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x float>] [[B]].coerce, [4 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <4 x float> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <4 x float> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <4 x float> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x float>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <4 x float> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <4 x float> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <4 x float> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <4 x float> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <4 x float> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0i8(<4 x float> [[TMP12]], <4 x float> [[TMP13]], <4 x float> [[TMP14]], <4 x float> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x float>, <4 x float>, <4 x float>, <4 x float> }* -// CHECK: store { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], { <4 x float>, <4 x float>, <4 x float>, <4 x float> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float32x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float32x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float32x4x4_t, %struct.float32x4x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x float>, <4 x float>, <4 x float>, <4 x float> } @llvm.aarch64.neon.ld4lane.v4f32.p0(<4 x float> [[TMP12]], <4 x float> [[TMP13]], <4 x float> [[TMP14]], <4 x float> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x float>, <4 x float>, <4 x float>, <4 x float> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float32x4x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float32x4x4_t [[TMP19]] float32x4x4_t test_vld4q_lane_f32(float32_t *a, float32x4x4_t b) { return vld4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_lane_f64(double* noundef %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x2x4_t @test_vld4q_lane_f64(ptr noundef %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x double>] [[B]].coerce, [4 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x double> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x double> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x double> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x double>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <2 x double> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x double> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x double> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x double> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <2 x double> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0i8(<2 x double> [[TMP12]], <2 x double> [[TMP13]], <2 x double> [[TMP14]], <2 x double> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x double>, <2 x double>, <2 x double>, <2 x double> }* -// CHECK: store { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], { <2 x double>, <2 x double>, <2 x double>, <2 x double> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float64x2x4_t, %struct.float64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x double>, <2 x double>, <2 x double>, <2 x double> } @llvm.aarch64.neon.ld4lane.v2f64.p0(<2 x double> [[TMP12]], <2 x double> [[TMP13]], <2 x double> [[TMP14]], <2 x double> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x double>, <2 x double>, <2 x double>, <2 x double> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.float64x2x4_t [[TMP19]] float64x2x4_t test_vld4q_lane_f64(float64_t *a, float64x2x4_t b) { return vld4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.poly8x16x4_t @test_vld4q_lane_p8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x16x4_t @test_vld4q_lane_p8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x16x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0i8(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* -// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.poly8x16x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.poly8x16x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP8]], i8* align 16 [[TMP9]], i64 64, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[RETVAL]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } @llvm.aarch64.neon.ld4lane.v16i8.p0(<16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], <16 x i8> [[TMP6]], i64 15, ptr %a) +// CHECK: store { <16 x i8>, <16 x i8>, <16 x i8>, <16 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.poly8x16x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly8x16x4_t [[TMP10]] poly8x16x4_t test_vld4q_lane_p8(poly8_t *a, poly8x16x4_t b) { return vld4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} %struct.poly16x8x4_t @test_vld4q_lane_p16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x8x4_t @test_vld4q_lane_p16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x8x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <8 x i16> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <8 x i16> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <8 x i16> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <8 x i16> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <8 x i16> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <8 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0i8(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* -// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.poly16x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.poly16x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } @llvm.aarch64.neon.ld4lane.v8i16.p0(<8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], <8 x i16> [[TMP15]], i64 7, ptr %a) +// CHECK: store { <8 x i16>, <8 x i16>, <8 x i16>, <8 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.poly16x8x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly16x8x4_t [[TMP19]] poly16x8x4_t test_vld4q_lane_p16(poly16_t *a, poly16x8x4_t b) { return vld4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_lane_p64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x2x4_t @test_vld4q_lane_p64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP5:%.*]] = bitcast <2 x i64> [[TMP4]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP7:%.*]] = bitcast <2 x i64> [[TMP6]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP9:%.*]] = bitcast <2 x i64> [[TMP8]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP11:%.*]] = bitcast <2 x i64> [[TMP10]] to <16 x i8> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP5]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP7]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP9]] to <2 x i64> // CHECK: [[TMP15:%.*]] = bitcast <16 x i8> [[TMP11]] to <2 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0i8(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* -// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.poly64x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.poly64x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP17]], i8* align 16 [[TMP18]], i64 64, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[RETVAL]], align 16 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } @llvm.aarch64.neon.ld4lane.v2i64.p0(<2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], <2 x i64> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x i64>, <2 x i64>, <2 x i64>, <2 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[RETVAL]], ptr align 16 [[__RET]], i64 64, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.poly64x2x4_t, ptr [[RETVAL]], align 16 // CHECK: ret %struct.poly64x2x4_t [[TMP19]] poly64x2x4_t test_vld4q_lane_p64(poly64_t *a, poly64x2x4_t b) { return vld4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint8x8x4_t @test_vld4_lane_u8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint8x8x4_t @test_vld4_lane_u8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint8x8x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.uint8x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.uint8x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 [[TMP9]], i64 32, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.uint8x8x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint8x8x4_t [[TMP10]] uint8x8x4_t test_vld4_lane_u8(uint8_t *a, uint8x8x4_t b) { return vld4_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.uint16x4x4_t @test_vld4_lane_u16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint16x4x4_t @test_vld4_lane_u16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint16x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <4 x i16> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <4 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0i8(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint16x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint16x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint16x4x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint16x4x4_t [[TMP19]] uint16x4x4_t test_vld4_lane_u16(uint16_t *a, uint16x4x4_t b) { return vld4_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.uint32x2x4_t @test_vld4_lane_u32(i32* noundef %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint32x2x4_t @test_vld4_lane_u32(ptr noundef %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i32>] [[B]].coerce, [4 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint32x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x i32> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x i32>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <2 x i32> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x i32> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <2 x i32> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0i8(<2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], <2 x i32> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint32x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint32x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], <2 x i32> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint32x2x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint32x2x4_t [[TMP19]] uint32x2x4_t test_vld4_lane_u32(uint32_t *a, uint32x2x4_t b) { return vld4_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.uint64x1x4_t @test_vld4_lane_u64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.uint64x1x4_t @test_vld4_lane_u64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.uint64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <1 x i64> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <1 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0i8(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.uint64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.uint64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.uint64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.uint64x1x4_t [[TMP19]] uint64x1x4_t test_vld4_lane_u64(uint64_t *a, uint64x1x4_t b) { return vld4_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.int8x8x4_t @test_vld4_lane_s8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int8x8x4_t @test_vld4_lane_s8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int8x8x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.int8x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.int8x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 [[TMP9]], i64 32, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.int8x8x4_t, %struct.int8x8x4_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.int8x8x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int8x8x4_t [[TMP10]] int8x8x4_t test_vld4_lane_s8(int8_t *a, int8x8x4_t b) { return vld4_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.int16x4x4_t @test_vld4_lane_s16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int16x4x4_t @test_vld4_lane_s16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int16x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <4 x i16> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <4 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0i8(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int16x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int16x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int16x4x4_t, %struct.int16x4x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int16x4x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int16x4x4_t [[TMP19]] int16x4x4_t test_vld4_lane_s16(int16_t *a, int16x4x4_t b) { return vld4_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.int32x2x4_t @test_vld4_lane_s32(i32* noundef %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int32x2x4_t @test_vld4_lane_s32(ptr noundef %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i32>] [[B]].coerce, [4 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int32x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x i32> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x i32> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x i32> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x i32>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <2 x i32> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x i32> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x i32> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x i32> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <2 x i32> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0i8(<2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], <2 x i32> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }* -// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int32x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int32x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int32x2x4_t, %struct.int32x2x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } @llvm.aarch64.neon.ld4lane.v2i32.p0(<2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], <2 x i32> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int32x2x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int32x2x4_t [[TMP19]] int32x2x4_t test_vld4_lane_s32(int32_t *a, int32x2x4_t b) { return vld4_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.int64x1x4_t @test_vld4_lane_s64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.int64x1x4_t @test_vld4_lane_s64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.int64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <1 x i64> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <1 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0i8(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.int64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.int64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.int64x1x4_t, %struct.int64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.int64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.int64x1x4_t [[TMP19]] int64x1x4_t test_vld4_lane_s64(int64_t *a, int64x1x4_t b) { return vld4_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.float16x4x4_t @test_vld4_lane_f16(half* noundef %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float16x4x4_t @test_vld4_lane_f16(ptr noundef %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x half>] [[B]].coerce, [4 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float16x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x half> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x half> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x half>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x half> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x half>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <4 x half> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x half> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x half> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x half> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <4 x half> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4lane.v4f16.p0i8(<4 x half> [[TMP12]], <4 x half> [[TMP13]], <4 x half> [[TMP14]], <4 x half> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x half>, <4 x half>, <4 x half>, <4 x half> }* -// CHECK: store { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], { <4 x half>, <4 x half>, <4 x half>, <4 x half> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float16x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float16x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float16x4x4_t, %struct.float16x4x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x half>, <4 x half>, <4 x half>, <4 x half> } @llvm.aarch64.neon.ld4lane.v4f16.p0(<4 x half> [[TMP12]], <4 x half> [[TMP13]], <4 x half> [[TMP14]], <4 x half> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x half>, <4 x half>, <4 x half>, <4 x half> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float16x4x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float16x4x4_t [[TMP19]] float16x4x4_t test_vld4_lane_f16(float16_t *a, float16x4x4_t b) { return vld4_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.float32x2x4_t @test_vld4_lane_f32(float* noundef %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float32x2x4_t @test_vld4_lane_f32(ptr noundef %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x float>] [[B]].coerce, [4 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float32x2x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <2 x float> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <2 x float> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <2 x float> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <2 x float>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <2 x float> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <2 x float> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <2 x float> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <2 x float> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <2 x float> -// CHECK: [[VLD4_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0i8(<2 x float> [[TMP12]], <2 x float> [[TMP13]], <2 x float> [[TMP14]], <2 x float> [[TMP15]], i64 1, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <2 x float>, <2 x float>, <2 x float>, <2 x float> }* -// CHECK: store { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], { <2 x float>, <2 x float>, <2 x float>, <2 x float> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float32x2x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float32x2x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float32x2x4_t, %struct.float32x2x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <2 x float>, <2 x float>, <2 x float>, <2 x float> } @llvm.aarch64.neon.ld4lane.v2f32.p0(<2 x float> [[TMP12]], <2 x float> [[TMP13]], <2 x float> [[TMP14]], <2 x float> [[TMP15]], i64 1, ptr %a) +// CHECK: store { <2 x float>, <2 x float>, <2 x float>, <2 x float> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float32x2x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float32x2x4_t [[TMP19]] float32x2x4_t test_vld4_lane_f32(float32_t *a, float32x2x4_t b) { return vld4_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_lane_f64(double* noundef %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.float64x1x4_t @test_vld4_lane_f64(ptr noundef %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x double>] [[B]].coerce, [4 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x double> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x double> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x double>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x double> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <1 x double>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <1 x double> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x double> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x double> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x double> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <1 x double> -// CHECK: [[VLD4_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0i8(<1 x double> [[TMP12]], <1 x double> [[TMP13]], <1 x double> [[TMP14]], <1 x double> [[TMP15]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <1 x double>, <1 x double>, <1 x double>, <1 x double> }* -// CHECK: store { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], { <1 x double>, <1 x double>, <1 x double>, <1 x double> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.float64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.float64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.float64x1x4_t, %struct.float64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <1 x double>, <1 x double>, <1 x double>, <1 x double> } @llvm.aarch64.neon.ld4lane.v1f64.p0(<1 x double> [[TMP12]], <1 x double> [[TMP13]], <1 x double> [[TMP14]], <1 x double> [[TMP15]], i64 0, ptr %a) +// CHECK: store { <1 x double>, <1 x double>, <1 x double>, <1 x double> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.float64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.float64x1x4_t [[TMP19]] float64x1x4_t test_vld4_lane_f64(float64_t *a, float64x1x4_t b) { return vld4_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} %struct.poly8x8x4_t @test_vld4_lane_p8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly8x8x4_t @test_vld4_lane_p8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly8x8x4_t* [[__RET]] to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP6:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0i8(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, i8* %a) -// CHECK: [[TMP7:%.*]] = bitcast i8* [[TMP2]] to { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* -// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> }* [[TMP7]] -// CHECK: [[TMP8:%.*]] = bitcast %struct.poly8x8x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP9:%.*]] = bitcast %struct.poly8x8x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP8]], i8* align 8 [[TMP9]], i64 32, i1 false) -// CHECK: [[TMP10:%.*]] = load %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[RETVAL]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP6:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } @llvm.aarch64.neon.ld4lane.v8i8.p0(<8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], <8 x i8> [[TMP6]], i64 7, ptr %a) +// CHECK: store { <8 x i8>, <8 x i8>, <8 x i8>, <8 x i8> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP10:%.*]] = load %struct.poly8x8x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly8x8x4_t [[TMP10]] poly8x8x4_t test_vld4_lane_p8(poly8_t *a, poly8x8x4_t b) { return vld4_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} %struct.poly16x4x4_t @test_vld4_lane_p16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly16x4x4_t @test_vld4_lane_p16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly16x4x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <4 x i16> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <4 x i16> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <4 x i16> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <4 x i16> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <4 x i16> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <4 x i16> -// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0i8(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* -// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.poly16x4x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.poly16x4x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } @llvm.aarch64.neon.ld4lane.v4i16.p0(<4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], <4 x i16> [[TMP15]], i64 3, ptr %a) +// CHECK: store { <4 x i16>, <4 x i16>, <4 x i16>, <4 x i16> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.poly16x4x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly16x4x4_t [[TMP19]] poly16x4x4_t test_vld4_lane_p16(poly16_t *a, poly16x4x4_t b) { return vld4_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_lane_p64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} %struct.poly64x1x4_t @test_vld4_lane_p64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[RETVAL:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__RET:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* -// CHECK: [[TMP3:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP4:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP4:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP5:%.*]] = bitcast <1 x i64> [[TMP4]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP6:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP6:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP7:%.*]] = bitcast <1 x i64> [[TMP6]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP8:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP8:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP9:%.*]] = bitcast <1 x i64> [[TMP8]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP10:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP10:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP11:%.*]] = bitcast <1 x i64> [[TMP10]] to <8 x i8> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP5]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP7]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP9]] to <1 x i64> // CHECK: [[TMP15:%.*]] = bitcast <8 x i8> [[TMP11]] to <1 x i64> -// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0i8(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, i8* [[TMP3]]) -// CHECK: [[TMP16:%.*]] = bitcast i8* [[TMP2]] to { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* -// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> }* [[TMP16]] -// CHECK: [[TMP17:%.*]] = bitcast %struct.poly64x1x4_t* [[RETVAL]] to i8* -// CHECK: [[TMP18:%.*]] = bitcast %struct.poly64x1x4_t* [[__RET]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP17]], i8* align 8 [[TMP18]], i64 32, i1 false) -// CHECK: [[TMP19:%.*]] = load %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[RETVAL]], align 8 +// CHECK: [[VLD4_LANE:%.*]] = call { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } @llvm.aarch64.neon.ld4lane.v1i64.p0(<1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], <1 x i64> [[TMP15]], i64 0, ptr %a) +// CHECK: store { <1 x i64>, <1 x i64>, <1 x i64>, <1 x i64> } [[VLD4_LANE]], ptr [[__RET]] +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[RETVAL]], ptr align 8 [[__RET]], i64 32, i1 false) +// CHECK: [[TMP19:%.*]] = load %struct.poly64x1x4_t, ptr [[RETVAL]], align 8 // CHECK: ret %struct.poly64x1x4_t [[TMP19]] poly64x1x4_t test_vld4_lane_p64(poly64_t *a, poly64x1x4_t b) { return vld4_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u8(i8* noundef %a, <16 x i8> noundef %b) #0 { +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u8(ptr noundef %a, <16 x i8> noundef %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1q_lane_u8(uint8_t *a, uint8x16_t b) { vst1q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> // CHECK: [[TMP3:%.*]] = extractelement <8 x i16> [[TMP2]], i32 7 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_u16(uint16_t *a, uint16x8_t b) { vst1q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u32(i32* noundef %a, <4 x i32> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u32(ptr noundef %a, <4 x i32> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> // CHECK: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: store i32 [[TMP3]], i32* [[TMP4]] +// CHECK: store i32 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_u32(uint32_t *a, uint32x4_t b) { vst1q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_u64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> // CHECK: [[TMP3:%.*]] = extractelement <2 x i64> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_u64(uint64_t *a, uint64x2_t b) { vst1q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s8(i8* noundef %a, <16 x i8> noundef %b) #0 { +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s8(ptr noundef %a, <16 x i8> noundef %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1q_lane_s8(int8_t *a, int8x16_t b) { vst1q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> // CHECK: [[TMP3:%.*]] = extractelement <8 x i16> [[TMP2]], i32 7 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_s16(int16_t *a, int16x8_t b) { vst1q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s32(i32* noundef %a, <4 x i32> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s32(ptr noundef %a, <4 x i32> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i32> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x i32> // CHECK: [[TMP3:%.*]] = extractelement <4 x i32> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: store i32 [[TMP3]], i32* [[TMP4]] +// CHECK: store i32 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_s32(int32_t *a, int32x4_t b) { vst1q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_s64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> // CHECK: [[TMP3:%.*]] = extractelement <2 x i64> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_s64(int64_t *a, int64x2_t b) { vst1q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f16(half* noundef %a, <8 x half> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f16(ptr noundef %a, <8 x half> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x half> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x half> // CHECK: [[TMP3:%.*]] = extractelement <8 x half> [[TMP2]], i32 7 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: store half [[TMP3]], half* [[TMP4]] +// CHECK: store half [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_f16(float16_t *a, float16x8_t b) { vst1q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f32(float* noundef %a, <4 x float> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f32(ptr noundef %a, <4 x float> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <4 x float> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <4 x float> // CHECK: [[TMP3:%.*]] = extractelement <4 x float> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: store float [[TMP3]], float* [[TMP4]] +// CHECK: store float [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_f32(float32_t *a, float32x4_t b) { vst1q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f64(double* noundef %a, <2 x double> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_f64(ptr noundef %a, <2 x double> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x double> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x double> // CHECK: [[TMP3:%.*]] = extractelement <2 x double> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: store double [[TMP3]], double* [[TMP4]] +// CHECK: store double [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_f64(float64_t *a, float64x2_t b) { vst1q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p8(i8* noundef %a, <16 x i8> noundef %b) #0 { +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p8(ptr noundef %a, <16 x i8> noundef %b) #0 { // CHECK: [[TMP0:%.*]] = extractelement <16 x i8> %b, i32 15 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1q_lane_p8(poly8_t *a, poly8x16_t b) { vst1q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p16(i16* noundef %a, <8 x i16> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p16(ptr noundef %a, <8 x i16> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <8 x i16> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <8 x i16> // CHECK: [[TMP3:%.*]] = extractelement <8 x i16> [[TMP2]], i32 7 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_p16(poly16_t *a, poly16x8_t b) { vst1q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p64(i64* noundef %a, <2 x i64> noundef %b) #0 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1q_lane_p64(ptr noundef %a, <2 x i64> noundef %b) #0 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i64> %b to <16 x i8> // CHECK: [[TMP2:%.*]] = bitcast <16 x i8> [[TMP1]] to <2 x i64> // CHECK: [[TMP3:%.*]] = extractelement <2 x i64> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1q_lane_p64(poly64_t *a, poly64x2_t b) { vst1q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u8(i8* noundef %a, <8 x i8> noundef %b) #1 { +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u8(ptr noundef %a, <8 x i8> noundef %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1_lane_u8(uint8_t *a, uint8x8_t b) { vst1_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> // CHECK: [[TMP3:%.*]] = extractelement <4 x i16> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_u16(uint16_t *a, uint16x4_t b) { vst1_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u32(i32* noundef %a, <2 x i32> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u32(ptr noundef %a, <2 x i32> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> // CHECK: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: store i32 [[TMP3]], i32* [[TMP4]] +// CHECK: store i32 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_u32(uint32_t *a, uint32x2_t b) { vst1_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_u64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> // CHECK: [[TMP3:%.*]] = extractelement <1 x i64> [[TMP2]], i32 0 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_u64(uint64_t *a, uint64x1_t b) { vst1_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s8(i8* noundef %a, <8 x i8> noundef %b) #1 { +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s8(ptr noundef %a, <8 x i8> noundef %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1_lane_s8(int8_t *a, int8x8_t b) { vst1_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> // CHECK: [[TMP3:%.*]] = extractelement <4 x i16> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_s16(int16_t *a, int16x4_t b) { vst1_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s32(i32* noundef %a, <2 x i32> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i32* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s32(ptr noundef %a, <2 x i32> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x i32> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x i32> // CHECK: [[TMP3:%.*]] = extractelement <2 x i32> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i32* -// CHECK: store i32 [[TMP3]], i32* [[TMP4]] +// CHECK: store i32 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_s32(int32_t *a, int32x2_t b) { vst1_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_s64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> // CHECK: [[TMP3:%.*]] = extractelement <1 x i64> [[TMP2]], i32 0 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_s64(int64_t *a, int64x1_t b) { vst1_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f16(half* noundef %a, <4 x half> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast half* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f16(ptr noundef %a, <4 x half> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x half> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x half> // CHECK: [[TMP3:%.*]] = extractelement <4 x half> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to half* -// CHECK: store half [[TMP3]], half* [[TMP4]] +// CHECK: store half [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_f16(float16_t *a, float16x4_t b) { vst1_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f32(float* noundef %a, <2 x float> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast float* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f32(ptr noundef %a, <2 x float> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <2 x float> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <2 x float> // CHECK: [[TMP3:%.*]] = extractelement <2 x float> [[TMP2]], i32 1 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to float* -// CHECK: store float [[TMP3]], float* [[TMP4]] +// CHECK: store float [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_f32(float32_t *a, float32x2_t b) { vst1_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f64(double* noundef %a, <1 x double> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast double* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_f64(ptr noundef %a, <1 x double> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x double> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x double> // CHECK: [[TMP3:%.*]] = extractelement <1 x double> [[TMP2]], i32 0 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to double* -// CHECK: store double [[TMP3]], double* [[TMP4]] +// CHECK: store double [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_f64(float64_t *a, float64x1_t b) { vst1_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p8(i8* noundef %a, <8 x i8> noundef %b) #1 { +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p8(ptr noundef %a, <8 x i8> noundef %b) #1 { // CHECK: [[TMP0:%.*]] = extractelement <8 x i8> %b, i32 7 -// CHECK: store i8 [[TMP0]], i8* %a +// CHECK: store i8 [[TMP0]], ptr %a // CHECK: ret void void test_vst1_lane_p8(poly8_t *a, poly8x8_t b) { vst1_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p16(i16* noundef %a, <4 x i16> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i16* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p16(ptr noundef %a, <4 x i16> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <4 x i16> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <4 x i16> // CHECK: [[TMP3:%.*]] = extractelement <4 x i16> [[TMP2]], i32 3 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i16* -// CHECK: store i16 [[TMP3]], i16* [[TMP4]] +// CHECK: store i16 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_p16(poly16_t *a, poly16x4_t b) { vst1_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p64(i64* noundef %a, <1 x i64> noundef %b) #1 { -// CHECK: [[TMP0:%.*]] = bitcast i64* %a to i8* +// CHECK-LABEL: define{{.*}} void @test_vst1_lane_p64(ptr noundef %a, <1 x i64> noundef %b) #1 { // CHECK: [[TMP1:%.*]] = bitcast <1 x i64> %b to <8 x i8> // CHECK: [[TMP2:%.*]] = bitcast <8 x i8> [[TMP1]] to <1 x i64> // CHECK: [[TMP3:%.*]] = extractelement <1 x i64> [[TMP2]], i32 0 -// CHECK: [[TMP4:%.*]] = bitcast i8* [[TMP0]] to i64* -// CHECK: store i64 [[TMP3]], i64* [[TMP4]] +// CHECK: store i64 [[TMP3]], ptr %a // CHECK: ret void void test_vst1_lane_p64(poly64_t *a, poly64x1_t b) { vst1_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u8(i8* noundef %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u8(ptr noundef %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[B]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, %struct.uint8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, ptr %a) // CHECK: ret void void test_vst2q_lane_u8(uint8_t *a, uint8x16x2_t b) { vst2q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, %struct.uint16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0i8(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, ptr %a) // CHECK: ret void void test_vst2q_lane_u16(uint16_t *a, uint16x8x2_t b) { vst2q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u32(i32* noundef %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u32(ptr noundef %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i32>] [[B]].coerce, [2 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, %struct.uint32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4i32.p0i8(<4 x i32> [[TMP7]], <4 x i32> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> [[TMP7]], <4 x i32> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2q_lane_u32(uint32_t *a, uint32x4x2_t b) { vst2q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_u64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, %struct.uint64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0i8(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2q_lane_u64(uint64_t *a, uint64x2x2_t b) { vst2q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s8(i8* noundef %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s8(ptr noundef %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[B]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x2_t, %struct.int8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, ptr %a) // CHECK: ret void void test_vst2q_lane_s8(int8_t *a, int8x16x2_t b) { vst2q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x2_t, %struct.int16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0i8(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, ptr %a) // CHECK: ret void void test_vst2q_lane_s16(int16_t *a, int16x8x2_t b) { vst2q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s32(i32* noundef %a, [2 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s32(ptr noundef %a, [2 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i32>] [[B]].coerce, [2 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x2_t, %struct.int32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], [2 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4i32.p0i8(<4 x i32> [[TMP7]], <4 x i32> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4i32.p0(<4 x i32> [[TMP7]], <4 x i32> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2q_lane_s32(int32_t *a, int32x4x2_t b) { vst2q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_s64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x2_t, %struct.int64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0i8(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2q_lane_s64(int64_t *a, int64x2x2_t b) { vst2q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f16(half* noundef %a, [2 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f16(ptr noundef %a, [2 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x half>] [[B]].coerce, [2 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x half>], [2 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x half> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x2_t, %struct.float16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x half>], [2 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x half> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half> -// CHECK: call void @llvm.aarch64.neon.st2lane.v8f16.p0i8(<8 x half> [[TMP7]], <8 x half> [[TMP8]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v8f16.p0(<8 x half> [[TMP7]], <8 x half> [[TMP8]], i64 7, ptr %a) // CHECK: ret void void test_vst2q_lane_f16(float16_t *a, float16x8x2_t b) { vst2q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f32(float* noundef %a, [2 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f32(ptr noundef %a, [2 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x float>] [[B]].coerce, [2 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x float>], [2 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x float> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x2_t, %struct.float32x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x float>], [2 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x float> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x float> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4f32.p0i8(<4 x float> [[TMP7]], <4 x float> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4f32.p0(<4 x float> [[TMP7]], <4 x float> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2q_lane_f32(float32_t *a, float32x4x2_t b) { vst2q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f64(double* noundef %a, [2 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_f64(ptr noundef %a, [2 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x double>] [[B]].coerce, [2 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x double>], [2 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x double> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x2_t, %struct.float64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x double>], [2 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x double> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2f64.p0i8(<2 x double> [[TMP7]], <2 x double> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2f64.p0(<2 x double> [[TMP7]], <2 x double> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2q_lane_f64(float64_t *a, float64x2x2_t b) { vst2q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p8(i8* noundef %a, [2 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p8(ptr noundef %a, [2 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <16 x i8>] [[B]].coerce, [2 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, %struct.poly8x16x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], [2 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: call void @llvm.aarch64.neon.st2lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], i64 15, ptr %a) // CHECK: ret void void test_vst2q_lane_p8(poly8_t *a, poly8x16x2_t b) { vst2q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p16(i16* noundef %a, [2 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p16(ptr noundef %a, [2 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i16>] [[B]].coerce, [2 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, %struct.poly16x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], [2 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0i8(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i16.p0(<8 x i16> [[TMP7]], <8 x i16> [[TMP8]], i64 7, ptr %a) // CHECK: ret void void test_vst2q_lane_p16(poly16_t *a, poly16x8x2_t b) { vst2q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p64(i64* noundef %a, [2 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2q_lane_p64(ptr noundef %a, [2 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x2_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x2_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i64>] [[B]].coerce, [2 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, %struct.poly64x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], [2 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> // CHECK: [[TMP7:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP8:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0i8(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2i64.p0(<2 x i64> [[TMP7]], <2 x i64> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2q_lane_p64(poly64_t *a, poly64x2x2_t b) { vst2q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, %struct.uint8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, ptr %a) // CHECK: ret void void test_vst2_lane_u8(uint8_t *a, uint8x8x2_t b) { vst2_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, %struct.uint16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0i8(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2_lane_u16(uint16_t *a, uint16x4x2_t b) { vst2_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u32(i32* noundef %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u32(ptr noundef %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i32>] [[B]].coerce, [2 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, %struct.uint32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2i32.p0i8(<2 x i32> [[TMP7]], <2 x i32> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> [[TMP7]], <2 x i32> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2_lane_u32(uint32_t *a, uint32x2x2_t b) { vst2_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_u64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, %struct.uint64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0i8(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, ptr %a) // CHECK: ret void void test_vst2_lane_u64(uint64_t *a, uint64x1x2_t b) { vst2_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x2_t, %struct.int8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, ptr %a) // CHECK: ret void void test_vst2_lane_s8(int8_t *a, int8x8x2_t b) { vst2_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x2_t, %struct.int16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0i8(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2_lane_s16(int16_t *a, int16x4x2_t b) { vst2_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s32(i32* noundef %a, [2 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s32(ptr noundef %a, [2 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x i32>] [[B]].coerce, [2 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x2_t, %struct.int32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], [2 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2i32.p0i8(<2 x i32> [[TMP7]], <2 x i32> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2i32.p0(<2 x i32> [[TMP7]], <2 x i32> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2_lane_s32(int32_t *a, int32x2x2_t b) { vst2_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_s64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x2_t, %struct.int64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0i8(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, ptr %a) // CHECK: ret void void test_vst2_lane_s64(int64_t *a, int64x1x2_t b) { vst2_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f16(half* noundef %a, [2 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f16(ptr noundef %a, [2 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x half>] [[B]].coerce, [2 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x half>], [2 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x half> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x2_t, %struct.float16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x half>], [2 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x half> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4f16.p0i8(<4 x half> [[TMP7]], <4 x half> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4f16.p0(<4 x half> [[TMP7]], <4 x half> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2_lane_f16(float16_t *a, float16x4x2_t b) { vst2_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f32(float* noundef %a, [2 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f32(ptr noundef %a, [2 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <2 x float>] [[B]].coerce, [2 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x float>], [2 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x float> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x2_t, %struct.float32x2x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x float>], [2 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x float> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x float> -// CHECK: call void @llvm.aarch64.neon.st2lane.v2f32.p0i8(<2 x float> [[TMP7]], <2 x float> [[TMP8]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v2f32.p0(<2 x float> [[TMP7]], <2 x float> [[TMP8]], i64 1, ptr %a) // CHECK: ret void void test_vst2_lane_f32(float32_t *a, float32x2x2_t b) { vst2_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f64(double* noundef %a, [2 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_f64(ptr noundef %a, [2 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x double>] [[B]].coerce, [2 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x double>], [2 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x double> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x2_t, %struct.float64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x double>], [2 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x double> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double> -// CHECK: call void @llvm.aarch64.neon.st2lane.v1f64.p0i8(<1 x double> [[TMP7]], <1 x double> [[TMP8]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v1f64.p0(<1 x double> [[TMP7]], <1 x double> [[TMP8]], i64 0, ptr %a) // CHECK: ret void void test_vst2_lane_f64(float64_t *a, float64x1x2_t b) { vst2_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p8(i8* noundef %a, [2 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p8(ptr noundef %a, [2 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <8 x i8>] [[B]].coerce, [2 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, %struct.poly8x8x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], [2 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: call void @llvm.aarch64.neon.st2lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], i64 7, ptr %a) // CHECK: ret void void test_vst2_lane_p8(poly8_t *a, poly8x8x2_t b) { vst2_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p16(i16* noundef %a, [2 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p16(ptr noundef %a, [2 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <4 x i16>] [[B]].coerce, [2 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, %struct.poly16x4x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], [2 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0i8(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v4i16.p0(<4 x i16> [[TMP7]], <4 x i16> [[TMP8]], i64 3, ptr %a) // CHECK: ret void void test_vst2_lane_p16(poly16_t *a, poly16x4x2_t b) { vst2_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p64(i64* noundef %a, [2 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst2_lane_p64(ptr noundef %a, [2 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x2_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x2_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[B]], i32 0, i32 0 -// CHECK: store [2 x <1 x i64>] [[B]].coerce, [2 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x2_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x2_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 16, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [2 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 16, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, %struct.poly64x1x2_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], [2 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x2_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [2 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> // CHECK: [[TMP7:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP8:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0i8(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st2lane.v1i64.p0(<1 x i64> [[TMP7]], <1 x i64> [[TMP8]], i64 0, ptr %a) // CHECK: ret void void test_vst2_lane_p64(poly64_t *a, poly64x1x2_t b) { vst2_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u8(i8* noundef %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u8(ptr noundef %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[B]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, %struct.uint8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %a) // CHECK: ret void void test_vst3q_lane_u8(uint8_t *a, uint8x16x3_t b) { vst3q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, %struct.uint16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0i8(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, ptr %a) // CHECK: ret void void test_vst3q_lane_u16(uint16_t *a, uint16x8x3_t b) { vst3q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u32(i32* noundef %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u32(ptr noundef %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i32>] [[B]].coerce, [3 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, %struct.uint32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4i32.p0i8(<4 x i32> [[TMP9]], <4 x i32> [[TMP10]], <4 x i32> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> [[TMP9]], <4 x i32> [[TMP10]], <4 x i32> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3q_lane_u32(uint32_t *a, uint32x4x3_t b) { vst3q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_u64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, %struct.uint64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0i8(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3q_lane_u64(uint64_t *a, uint64x2x3_t b) { vst3q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s8(i8* noundef %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s8(ptr noundef %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[B]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x3_t, %struct.int8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %a) // CHECK: ret void void test_vst3q_lane_s8(int8_t *a, int8x16x3_t b) { vst3q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x3_t, %struct.int16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0i8(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, ptr %a) // CHECK: ret void void test_vst3q_lane_s16(int16_t *a, int16x8x3_t b) { vst3q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s32(i32* noundef %a, [3 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s32(ptr noundef %a, [3 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i32>] [[B]].coerce, [3 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x3_t, %struct.int32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], [3 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4i32.p0i8(<4 x i32> [[TMP9]], <4 x i32> [[TMP10]], <4 x i32> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4i32.p0(<4 x i32> [[TMP9]], <4 x i32> [[TMP10]], <4 x i32> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3q_lane_s32(int32_t *a, int32x4x3_t b) { vst3q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_s64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x3_t, %struct.int64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0i8(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3q_lane_s64(int64_t *a, int64x2x3_t b) { vst3q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f16(half* noundef %a, [3 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f16(ptr noundef %a, [3 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x half>] [[B]].coerce, [3 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x half> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x half> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x3_t, %struct.float16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x half>], [3 x <8 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x half>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x half> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x half> -// CHECK: call void @llvm.aarch64.neon.st3lane.v8f16.p0i8(<8 x half> [[TMP9]], <8 x half> [[TMP10]], <8 x half> [[TMP11]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v8f16.p0(<8 x half> [[TMP9]], <8 x half> [[TMP10]], <8 x half> [[TMP11]], i64 7, ptr %a) // CHECK: ret void void test_vst3q_lane_f16(float16_t *a, float16x8x3_t b) { vst3q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f32(float* noundef %a, [3 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f32(ptr noundef %a, [3 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x float>] [[B]].coerce, [3 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x float> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x float> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x3_t, %struct.float32x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x float>], [3 x <4 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x float> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x float> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x float> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4f32.p0i8(<4 x float> [[TMP9]], <4 x float> [[TMP10]], <4 x float> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4f32.p0(<4 x float> [[TMP9]], <4 x float> [[TMP10]], <4 x float> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3q_lane_f32(float32_t *a, float32x4x3_t b) { vst3q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f64(double* noundef %a, [3 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_f64(ptr noundef %a, [3 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x double>] [[B]].coerce, [3 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x double> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x double> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x3_t, %struct.float64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x double>], [3 x <2 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x double> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x double> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2f64.p0i8(<2 x double> [[TMP9]], <2 x double> [[TMP10]], <2 x double> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2f64.p0(<2 x double> [[TMP9]], <2 x double> [[TMP10]], <2 x double> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3q_lane_f64(float64_t *a, float64x2x3_t b) { vst3q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p8(i8* noundef %a, [3 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p8(ptr noundef %a, [3 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <16 x i8>] [[B]].coerce, [3 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, %struct.poly8x16x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], [3 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: call void @llvm.aarch64.neon.st3lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], i64 15, ptr %a) // CHECK: ret void void test_vst3q_lane_p8(poly8_t *a, poly8x16x3_t b) { vst3q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p16(i16* noundef %a, [3 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p16(ptr noundef %a, [3 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i16>] [[B]].coerce, [3 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, %struct.poly16x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], [3 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0i8(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i16.p0(<8 x i16> [[TMP9]], <8 x i16> [[TMP10]], <8 x i16> [[TMP11]], i64 7, ptr %a) // CHECK: ret void void test_vst3q_lane_p16(poly16_t *a, poly16x8x3_t b) { vst3q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p64(i64* noundef %a, [3 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3q_lane_p64(ptr noundef %a, [3 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x3_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x3_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i64>] [[B]].coerce, [3 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 48, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 48, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, %struct.poly64x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], [3 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> // CHECK: [[TMP9:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP10:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0i8(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2i64.p0(<2 x i64> [[TMP9]], <2 x i64> [[TMP10]], <2 x i64> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3q_lane_p64(poly64_t *a, poly64x2x3_t b) { vst3q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, %struct.uint8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) // CHECK: ret void void test_vst3_lane_u8(uint8_t *a, uint8x8x3_t b) { vst3_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, %struct.uint16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0i8(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3_lane_u16(uint16_t *a, uint16x4x3_t b) { vst3_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u32(i32* noundef %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u32(ptr noundef %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i32>] [[B]].coerce, [3 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, %struct.uint32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x i32> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2i32.p0i8(<2 x i32> [[TMP9]], <2 x i32> [[TMP10]], <2 x i32> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> [[TMP9]], <2 x i32> [[TMP10]], <2 x i32> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3_lane_u32(uint32_t *a, uint32x2x3_t b) { vst3_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_u64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, %struct.uint64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0i8(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, ptr %a) // CHECK: ret void void test_vst3_lane_u64(uint64_t *a, uint64x1x3_t b) { vst3_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x3_t, %struct.int8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) // CHECK: ret void void test_vst3_lane_s8(int8_t *a, int8x8x3_t b) { vst3_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x3_t, %struct.int16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0i8(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3_lane_s16(int16_t *a, int16x4x3_t b) { vst3_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s32(i32* noundef %a, [3 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s32(ptr noundef %a, [3 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x i32>] [[B]].coerce, [3 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x3_t, %struct.int32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], [3 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x i32> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2i32.p0i8(<2 x i32> [[TMP9]], <2 x i32> [[TMP10]], <2 x i32> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2i32.p0(<2 x i32> [[TMP9]], <2 x i32> [[TMP10]], <2 x i32> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3_lane_s32(int32_t *a, int32x2x3_t b) { vst3_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_s64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x3_t, %struct.int64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0i8(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, ptr %a) // CHECK: ret void void test_vst3_lane_s64(int64_t *a, int64x1x3_t b) { vst3_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f16(half* noundef %a, [3 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f16(ptr noundef %a, [3 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x half>] [[B]].coerce, [3 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x half> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x half> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x3_t, %struct.float16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x half>], [3 x <4 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x half>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x half> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x half> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4f16.p0i8(<4 x half> [[TMP9]], <4 x half> [[TMP10]], <4 x half> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4f16.p0(<4 x half> [[TMP9]], <4 x half> [[TMP10]], <4 x half> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3_lane_f16(float16_t *a, float16x4x3_t b) { vst3_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f32(float* noundef %a, [3 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f32(ptr noundef %a, [3 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <2 x float>] [[B]].coerce, [3 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x float> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x float> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x3_t, %struct.float32x2x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x float>], [3 x <2 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <2 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x float> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x float> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x float> -// CHECK: call void @llvm.aarch64.neon.st3lane.v2f32.p0i8(<2 x float> [[TMP9]], <2 x float> [[TMP10]], <2 x float> [[TMP11]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v2f32.p0(<2 x float> [[TMP9]], <2 x float> [[TMP10]], <2 x float> [[TMP11]], i64 1, ptr %a) // CHECK: ret void void test_vst3_lane_f32(float32_t *a, float32x2x3_t b) { vst3_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f64(double* noundef %a, [3 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_f64(ptr noundef %a, [3 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x double>] [[B]].coerce, [3 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x double> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x double> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x3_t, %struct.float64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x double>], [3 x <1 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x double>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x double> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x double> -// CHECK: call void @llvm.aarch64.neon.st3lane.v1f64.p0i8(<1 x double> [[TMP9]], <1 x double> [[TMP10]], <1 x double> [[TMP11]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v1f64.p0(<1 x double> [[TMP9]], <1 x double> [[TMP10]], <1 x double> [[TMP11]], i64 0, ptr %a) // CHECK: ret void void test_vst3_lane_f64(float64_t *a, float64x1x3_t b) { vst3_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p8(i8* noundef %a, [3 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p8(ptr noundef %a, [3 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <8 x i8>] [[B]].coerce, [3 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, %struct.poly8x8x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], [3 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: call void @llvm.aarch64.neon.st3lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], i64 7, ptr %a) // CHECK: ret void void test_vst3_lane_p8(poly8_t *a, poly8x8x3_t b) { vst3_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p16(i16* noundef %a, [3 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p16(ptr noundef %a, [3 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <4 x i16>] [[B]].coerce, [3 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, %struct.poly16x4x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], [3 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0i8(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v4i16.p0(<4 x i16> [[TMP9]], <4 x i16> [[TMP10]], <4 x i16> [[TMP11]], i64 3, ptr %a) // CHECK: ret void void test_vst3_lane_p16(poly16_t *a, poly16x4x3_t b) { vst3_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p64(i64* noundef %a, [3 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst3_lane_p64(ptr noundef %a, [3 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x3_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x3_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[B]], i32 0, i32 0 -// CHECK: store [3 x <1 x i64>] [[B]].coerce, [3 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x3_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x3_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 24, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [3 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 24, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, %struct.poly64x1x3_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], [3 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x3_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [3 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> // CHECK: [[TMP9:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP10:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0i8(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st3lane.v1i64.p0(<1 x i64> [[TMP9]], <1 x i64> [[TMP10]], <1 x i64> [[TMP11]], i64 0, ptr %a) // CHECK: ret void void test_vst3_lane_p64(poly64_t *a, poly64x1x3_t b) { vst3_lane_p64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, %struct.uint8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %a) // CHECK: ret void void test_vst4q_lane_u8(uint8_t *a, uint8x16x4_t b) { vst4q_lane_u8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, %struct.uint16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <8 x i16> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0i8(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, ptr %a) // CHECK: ret void void test_vst4q_lane_u16(uint16_t *a, uint16x8x4_t b) { vst4q_lane_u16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u32(i32* noundef %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u32(ptr noundef %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i32>] [[B]].coerce, [4 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, %struct.uint32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x i32>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <4 x i32> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x i32> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4i32.p0i8(<4 x i32> [[TMP11]], <4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> [[TMP11]], <4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4q_lane_u32(uint32_t *a, uint32x4x4_t b) { vst4q_lane_u32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_u64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, %struct.uint64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <2 x i64> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0i8(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4q_lane_u64(uint64_t *a, uint64x2x4_t b) { vst4q_lane_u64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x16x4_t, %struct.int8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %a) // CHECK: ret void void test_vst4q_lane_s8(int8_t *a, int8x16x4_t b) { vst4q_lane_s8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x8x4_t, %struct.int16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <8 x i16> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0i8(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, ptr %a) // CHECK: ret void void test_vst4q_lane_s16(int16_t *a, int16x8x4_t b) { vst4q_lane_s16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s32(i32* noundef %a, [4 x <4 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s32(ptr noundef %a, [4 x <4 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i32>] [[B]].coerce, [4 x <4 x i32>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i32>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x i32> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i32>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x i32> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i32>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x i32> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x4x4_t, %struct.int32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], [4 x <4 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x i32>, <4 x i32>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x i32>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <4 x i32> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x i32> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x i32> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x i32> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <4 x i32> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4i32.p0i8(<4 x i32> [[TMP11]], <4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4i32.p0(<4 x i32> [[TMP11]], <4 x i32> [[TMP12]], <4 x i32> [[TMP13]], <4 x i32> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4q_lane_s32(int32_t *a, int32x4x4_t b) { vst4q_lane_s32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_s64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.int64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x2x4_t, %struct.int64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <2 x i64> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0i8(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4q_lane_s64(int64_t *a, int64x2x4_t b) { vst4q_lane_s64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f16(half* noundef %a, [4 x <8 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f16(ptr noundef %a, [4 x <8 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x half>] [[B]].coerce, [4 x <8 x half>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x half>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x half> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x half>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x half> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x half>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x half> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x8x4_t, %struct.float16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x half>], [4 x <8 x half>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <8 x half>, <8 x half>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x half>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <8 x half>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <8 x half> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x half> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x half> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x half> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <8 x half> -// CHECK: call void @llvm.aarch64.neon.st4lane.v8f16.p0i8(<8 x half> [[TMP11]], <8 x half> [[TMP12]], <8 x half> [[TMP13]], <8 x half> [[TMP14]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v8f16.p0(<8 x half> [[TMP11]], <8 x half> [[TMP12]], <8 x half> [[TMP13]], <8 x half> [[TMP14]], i64 7, ptr %a) // CHECK: ret void void test_vst4q_lane_f16(float16_t *a, float16x8x4_t b) { vst4q_lane_f16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f32(float* noundef %a, [4 x <4 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f32(ptr noundef %a, [4 x <4 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x4x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float32x4x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x float>] [[B]].coerce, [4 x <4 x float>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x float>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <4 x float> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x float>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <4 x float> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x float>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <4 x float> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x4x4_t, %struct.float32x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x float>], [4 x <4 x float>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x float>, <4 x float>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x float>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x float>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <4 x float> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <4 x float> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <4 x float> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <4 x float> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <4 x float> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4f32.p0i8(<4 x float> [[TMP11]], <4 x float> [[TMP12]], <4 x float> [[TMP13]], <4 x float> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4f32.p0(<4 x float> [[TMP11]], <4 x float> [[TMP12]], <4 x float> [[TMP13]], <4 x float> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4q_lane_f32(float32_t *a, float32x4x4_t b) { vst4q_lane_f32(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f64(double* noundef %a, [4 x <2 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_f64(ptr noundef %a, [4 x <2 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.float64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x double>] [[B]].coerce, [4 x <2 x double>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x double>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x double> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x double>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x double> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x double>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x double> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x2x4_t, %struct.float64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x double>], [4 x <2 x double>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x double>, <2 x double>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x double>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x double>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <2 x double> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x double> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x double> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x double> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <2 x double> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2f64.p0i8(<2 x double> [[TMP11]], <2 x double> [[TMP12]], <2 x double> [[TMP13]], <2 x double> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2f64.p0(<2 x double> [[TMP11]], <2 x double> [[TMP12]], <2 x double> [[TMP13]], <2 x double> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4q_lane_f64(float64_t *a, float64x2x4_t b) { vst4q_lane_f64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p8(i8* noundef %a, [4 x <16 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p8(ptr noundef %a, [4 x <16 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x16x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x16x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <16 x i8>] [[B]].coerce, [4 x <16 x i8>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x16x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x16x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX]], align 16 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX2]], align 16 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX4]], align 16 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, %struct.poly8x16x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], [4 x <16 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <16 x i8>, <16 x i8>* [[ARRAYIDX6]], align 16 -// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0i8(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <16 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <16 x i8>, ptr [[ARRAYIDX]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <16 x i8>, ptr [[ARRAYIDX2]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <16 x i8>, ptr [[ARRAYIDX4]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x16x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <16 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <16 x i8>, ptr [[ARRAYIDX6]], align 16 +// CHECK: call void @llvm.aarch64.neon.st4lane.v16i8.p0(<16 x i8> [[TMP2]], <16 x i8> [[TMP3]], <16 x i8> [[TMP4]], <16 x i8> [[TMP5]], i64 15, ptr %a) // CHECK: ret void void test_vst4q_lane_p8(poly8_t *a, poly8x16x4_t b) { vst4q_lane_p8(a, b, 15); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p16(i16* noundef %a, [4 x <8 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p16(ptr noundef %a, [4 x <8 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x8x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x8x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i16>] [[B]].coerce, [4 x <8 x i16>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <8 x i16>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <8 x i16> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <8 x i16>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <8 x i16> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <8 x i16>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <8 x i16> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, %struct.poly16x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], [4 x <8 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <8 x i16>, <8 x i16>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <8 x i16>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <8 x i16> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <8 x i16> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <8 x i16> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <8 x i16> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <8 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0i8(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i16.p0(<8 x i16> [[TMP11]], <8 x i16> [[TMP12]], <8 x i16> [[TMP13]], <8 x i16> [[TMP14]], i64 7, ptr %a) // CHECK: ret void void test_vst4q_lane_p16(poly16_t *a, poly16x8x4_t b) { vst4q_lane_p16(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p64(i64* noundef %a, [4 x <2 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4q_lane_p64(ptr noundef %a, [4 x <2 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x2x4_t, align 16 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x2x4_t, align 16 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i64>] [[B]].coerce, [4 x <2 x i64>]* [[COERCE_DIVE]], align 16 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 [[TMP0]], i8* align 16 [[TMP1]], i64 64, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX]], align 16 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 16 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[__S1]], ptr align 16 [[B]], i64 64, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i64>, ptr [[ARRAYIDX]], align 16 // CHECK: [[TMP4:%.*]] = bitcast <2 x i64> [[TMP3]] to <16 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX2]], align 16 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i64>, ptr [[ARRAYIDX2]], align 16 // CHECK: [[TMP6:%.*]] = bitcast <2 x i64> [[TMP5]] to <16 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX4]], align 16 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i64>, ptr [[ARRAYIDX4]], align 16 // CHECK: [[TMP8:%.*]] = bitcast <2 x i64> [[TMP7]] to <16 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, %struct.poly64x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], [4 x <2 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x i64>, <2 x i64>* [[ARRAYIDX6]], align 16 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x i64>, ptr [[ARRAYIDX6]], align 16 // CHECK: [[TMP10:%.*]] = bitcast <2 x i64> [[TMP9]] to <16 x i8> // CHECK: [[TMP11:%.*]] = bitcast <16 x i8> [[TMP4]] to <2 x i64> // CHECK: [[TMP12:%.*]] = bitcast <16 x i8> [[TMP6]] to <2 x i64> // CHECK: [[TMP13:%.*]] = bitcast <16 x i8> [[TMP8]] to <2 x i64> // CHECK: [[TMP14:%.*]] = bitcast <16 x i8> [[TMP10]] to <2 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0i8(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2i64.p0(<2 x i64> [[TMP11]], <2 x i64> [[TMP12]], <2 x i64> [[TMP13]], <2 x i64> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4q_lane_p64(poly64_t *a, poly64x2x4_t b) { vst4q_lane_p64(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, %struct.uint8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) // CHECK: ret void void test_vst4_lane_u8(uint8_t *a, uint8x8x4_t b) { vst4_lane_u8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, %struct.uint16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <4 x i16> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0i8(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4_lane_u16(uint16_t *a, uint16x4x4_t b) { vst4_lane_u16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u32(i32* noundef %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u32(ptr noundef %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i32>] [[B]].coerce, [4 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x i32> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, %struct.uint32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x i32>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <2 x i32> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x i32> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2i32.p0i8(<2 x i32> [[TMP11]], <2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> [[TMP11]], <2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4_lane_u32(uint32_t *a, uint32x2x4_t b) { vst4_lane_u32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_u64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.uint64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.uint64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.uint64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.uint64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, %struct.uint64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.uint64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <1 x i64> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0i8(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, ptr %a) // CHECK: ret void void test_vst4_lane_u64(uint64_t *a, uint64x1x4_t b) { vst4_lane_u64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x8x4_t, %struct.int8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) // CHECK: ret void void test_vst4_lane_s8(int8_t *a, int8x8x4_t b) { vst4_lane_s8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x4x4_t, %struct.int16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <4 x i16> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0i8(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4_lane_s16(int16_t *a, int16x4x4_t b) { vst4_lane_s16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s32(i32* noundef %a, [4 x <2 x i32>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s32(ptr noundef %a, [4 x <2 x i32>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x i32>] [[B]].coerce, [4 x <2 x i32>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i32* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x i32>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x i32>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x i32> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x i32>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x i32> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x i32>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x i32> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x2x4_t, %struct.int32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], [4 x <2 x i32>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x i32>, <2 x i32>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x i32>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x i32>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <2 x i32> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x i32> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x i32> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x i32> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <2 x i32> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2i32.p0i8(<2 x i32> [[TMP11]], <2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2i32.p0(<2 x i32> [[TMP11]], <2 x i32> [[TMP12]], <2 x i32> [[TMP13]], <2 x i32> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4_lane_s32(int32_t *a, int32x2x4_t b) { vst4_lane_s32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_s64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.int64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.int64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.int64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.int64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x1x4_t, %struct.int64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.int64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <1 x i64> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0i8(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, ptr %a) // CHECK: ret void void test_vst4_lane_s64(int64_t *a, int64x1x4_t b) { vst4_lane_s64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f16(half* noundef %a, [4 x <4 x half>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f16(ptr noundef %a, [4 x <4 x half>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x half>] [[B]].coerce, [4 x <4 x half>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast half* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x half>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x half>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x half> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x half>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x half> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x half>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x half> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x4x4_t, %struct.float16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x half>], [4 x <4 x half>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x half>, <4 x half>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x half>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x half>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <4 x half> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x half> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x half> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x half> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <4 x half> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4f16.p0i8(<4 x half> [[TMP11]], <4 x half> [[TMP12]], <4 x half> [[TMP13]], <4 x half> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4f16.p0(<4 x half> [[TMP11]], <4 x half> [[TMP12]], <4 x half> [[TMP13]], <4 x half> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4_lane_f16(float16_t *a, float16x4x4_t b) { vst4_lane_f16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f32(float* noundef %a, [4 x <2 x float>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f32(ptr noundef %a, [4 x <2 x float>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float32x2x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float32x2x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <2 x float>] [[B]].coerce, [4 x <2 x float>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float32x2x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float32x2x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast float* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <2 x float>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <2 x float>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <2 x float> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <2 x float>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <2 x float> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <2 x float>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <2 x float> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x2x4_t, %struct.float32x2x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x float>], [4 x <2 x float>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <2 x float>, <2 x float>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float32x2x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <2 x float>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <2 x float>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <2 x float> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <2 x float> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <2 x float> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <2 x float> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <2 x float> -// CHECK: call void @llvm.aarch64.neon.st4lane.v2f32.p0i8(<2 x float> [[TMP11]], <2 x float> [[TMP12]], <2 x float> [[TMP13]], <2 x float> [[TMP14]], i64 1, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v2f32.p0(<2 x float> [[TMP11]], <2 x float> [[TMP12]], <2 x float> [[TMP13]], <2 x float> [[TMP14]], i64 1, ptr %a) // CHECK: ret void void test_vst4_lane_f32(float32_t *a, float32x2x4_t b) { vst4_lane_f32(a, b, 1); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f64(double* noundef %a, [4 x <1 x double>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_f64(ptr noundef %a, [4 x <1 x double>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.float64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.float64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x double>] [[B]].coerce, [4 x <1 x double>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.float64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.float64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast double* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x double>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x double>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x double> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x double>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x double> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x double>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x double> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x1x4_t, %struct.float64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x double>], [4 x <1 x double>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <1 x double>, <1 x double>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.float64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x double>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <1 x double>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <1 x double> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x double> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x double> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x double> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <1 x double> -// CHECK: call void @llvm.aarch64.neon.st4lane.v1f64.p0i8(<1 x double> [[TMP11]], <1 x double> [[TMP12]], <1 x double> [[TMP13]], <1 x double> [[TMP14]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v1f64.p0(<1 x double> [[TMP11]], <1 x double> [[TMP12]], <1 x double> [[TMP13]], <1 x double> [[TMP14]], i64 0, ptr %a) // CHECK: ret void void test_vst4_lane_f64(float64_t *a, float64x1x4_t b) { vst4_lane_f64(a, b, 0); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p8(i8* noundef %a, [4 x <8 x i8>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p8(ptr noundef %a, [4 x <8 x i8>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly8x8x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly8x8x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <8 x i8>] [[B]].coerce, [4 x <8 x i8>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly8x8x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly8x8x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP2:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX]], align 8 -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP3:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX2]], align 8 -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP4:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX4]], align 8 -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, %struct.poly8x8x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], [4 x <8 x i8>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP5:%.*]] = load <8 x i8>, <8 x i8>* [[ARRAYIDX6]], align 8 -// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0i8(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, i8* %a) +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <8 x i8>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP2:%.*]] = load <8 x i8>, ptr [[ARRAYIDX]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP3:%.*]] = load <8 x i8>, ptr [[ARRAYIDX2]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP4:%.*]] = load <8 x i8>, ptr [[ARRAYIDX4]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly8x8x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <8 x i8>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP5:%.*]] = load <8 x i8>, ptr [[ARRAYIDX6]], align 8 +// CHECK: call void @llvm.aarch64.neon.st4lane.v8i8.p0(<8 x i8> [[TMP2]], <8 x i8> [[TMP3]], <8 x i8> [[TMP4]], <8 x i8> [[TMP5]], i64 7, ptr %a) // CHECK: ret void void test_vst4_lane_p8(poly8_t *a, poly8x8x4_t b) { vst4_lane_p8(a, b, 7); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p16(i16* noundef %a, [4 x <4 x i16>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p16(ptr noundef %a, [4 x <4 x i16>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly16x4x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly16x4x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <4 x i16>] [[B]].coerce, [4 x <4 x i16>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly16x4x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly16x4x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i16* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <4 x i16>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <4 x i16>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <4 x i16> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <4 x i16>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <4 x i16> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <4 x i16>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <4 x i16> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, %struct.poly16x4x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], [4 x <4 x i16>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <4 x i16>, <4 x i16>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly16x4x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <4 x i16>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <4 x i16>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <4 x i16> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <4 x i16> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <4 x i16> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <4 x i16> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <4 x i16> -// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0i8(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v4i16.p0(<4 x i16> [[TMP11]], <4 x i16> [[TMP12]], <4 x i16> [[TMP13]], <4 x i16> [[TMP14]], i64 3, ptr %a) // CHECK: ret void void test_vst4_lane_p16(poly16_t *a, poly16x4x4_t b) { vst4_lane_p16(a, b, 3); } -// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p64(i64* noundef %a, [4 x <1 x i64>] %b.coerce) #2 { +// CHECK-LABEL: define{{.*}} void @test_vst4_lane_p64(ptr noundef %a, [4 x <1 x i64>] %b.coerce) #2 { // CHECK: [[B:%.*]] = alloca %struct.poly64x1x4_t, align 8 // CHECK: [[__S1:%.*]] = alloca %struct.poly64x1x4_t, align 8 -// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[B]], i32 0, i32 0 -// CHECK: store [4 x <1 x i64>] [[B]].coerce, [4 x <1 x i64>]* [[COERCE_DIVE]], align 8 -// CHECK: [[TMP0:%.*]] = bitcast %struct.poly64x1x4_t* [[__S1]] to i8* -// CHECK: [[TMP1:%.*]] = bitcast %struct.poly64x1x4_t* [[B]] to i8* -// CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 [[TMP0]], i8* align 8 [[TMP1]], i64 32, i1 false) -// CHECK: [[TMP2:%.*]] = bitcast i64* %a to i8* -// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL]], i64 0, i64 0 -// CHECK: [[TMP3:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX]], align 8 +// CHECK: [[COERCE_DIVE:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[B]], i32 0, i32 0 +// CHECK: store [4 x <1 x i64>] [[B]].coerce, ptr [[COERCE_DIVE]], align 8 +// CHECK: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[__S1]], ptr align 8 [[B]], i64 32, i1 false) +// CHECK: [[VAL:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL]], i64 0, i64 0 +// CHECK: [[TMP3:%.*]] = load <1 x i64>, ptr [[ARRAYIDX]], align 8 // CHECK: [[TMP4:%.*]] = bitcast <1 x i64> [[TMP3]] to <8 x i8> -// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL1]], i64 0, i64 1 -// CHECK: [[TMP5:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX2]], align 8 +// CHECK: [[VAL1:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX2:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL1]], i64 0, i64 1 +// CHECK: [[TMP5:%.*]] = load <1 x i64>, ptr [[ARRAYIDX2]], align 8 // CHECK: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to <8 x i8> -// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL3]], i64 0, i64 2 -// CHECK: [[TMP7:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX4]], align 8 +// CHECK: [[VAL3:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX4:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL3]], i64 0, i64 2 +// CHECK: [[TMP7:%.*]] = load <1 x i64>, ptr [[ARRAYIDX4]], align 8 // CHECK: [[TMP8:%.*]] = bitcast <1 x i64> [[TMP7]] to <8 x i8> -// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, %struct.poly64x1x4_t* [[__S1]], i32 0, i32 0 -// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], [4 x <1 x i64>]* [[VAL5]], i64 0, i64 3 -// CHECK: [[TMP9:%.*]] = load <1 x i64>, <1 x i64>* [[ARRAYIDX6]], align 8 +// CHECK: [[VAL5:%.*]] = getelementptr inbounds %struct.poly64x1x4_t, ptr [[__S1]], i32 0, i32 0 +// CHECK: [[ARRAYIDX6:%.*]] = getelementptr inbounds [4 x <1 x i64>], ptr [[VAL5]], i64 0, i64 3 +// CHECK: [[TMP9:%.*]] = load <1 x i64>, ptr [[ARRAYIDX6]], align 8 // CHECK: [[TMP10:%.*]] = bitcast <1 x i64> [[TMP9]] to <8 x i8> // CHECK: [[TMP11:%.*]] = bitcast <8 x i8> [[TMP4]] to <1 x i64> // CHECK: [[TMP12:%.*]] = bitcast <8 x i8> [[TMP6]] to <1 x i64> // CHECK: [[TMP13:%.*]] = bitcast <8 x i8> [[TMP8]] to <1 x i64> // CHECK: [[TMP14:%.*]] = bitcast <8 x i8> [[TMP10]] to <1 x i64> -// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0i8(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, i8* [[TMP2]]) +// CHECK: call void @llvm.aarch64.neon.st4lane.v1i64.p0(<1 x i64> [[TMP11]], <1 x i64> [[TMP12]], <1 x i64> [[TMP13]], <1 x i64> [[TMP14]], i64 0, ptr %a) // CHECK: ret void void test_vst4_lane_p64(poly64_t *a, poly64x1x4_t b) { vst4_lane_p64(a, b, 0); diff --git a/clang/test/CodeGen/arm-vaarg.c b/clang/test/CodeGen/arm-vaarg.c index 4dab397a20de46..bed008039274ab 100644 --- a/clang/test/CodeGen/arm-vaarg.c +++ b/clang/test/CodeGen/arm-vaarg.c @@ -1,4 +1,4 @@ -// RUN: %clang -Xclang -no-opaque-pointers -mfloat-abi=soft -target arm-linux-gnu -emit-llvm -S -o - %s | FileCheck %s +// RUN: %clang -mfloat-abi=soft -target arm-linux-gnu -emit-llvm -S -o - %s | FileCheck %s struct Empty {}; @@ -7,15 +7,13 @@ struct Empty emptyvar; void take_args(int a, ...) { // CHECK: [[ALLOCA_VA_LIST:%[a-zA-Z0-9._]+]] = alloca %struct.__va_list, align 4 // CHECK: call void @llvm.va_start -// CHECK-NEXT: [[AP_ADDR:%[a-zA-Z0-9._]+]] = bitcast %struct.__va_list* [[ALLOCA_VA_LIST]] to i8** -// CHECK-NEXT: [[LOAD_AP:%[a-zA-Z0-9._]+]] = load i8*, i8** [[AP_ADDR]], align 4 -// CHECK-NEXT: [[EMPTY_PTR:%[a-zA-Z0-9._]+]] = bitcast i8* [[LOAD_AP]] to %struct.Empty* +// CHECK-NEXT: [[LOAD_AP:%[a-zA-Z0-9._]+]] = load ptr, ptr [[ALLOCA_VA_LIST]], align 4 // It's conceivable that EMPTY_PTR may not actually be a valid pointer // (e.g. it's at the very bottom of the stack and the next page is // invalid). This doesn't matter provided it's never loaded (there's no // well-defined way to tell), but it becomes a problem if we do try to use it. -// CHECK-NOT: load %struct.Empty, %struct.Empty* [[EMPTY_PTR]] +// CHECK-NOT: load %struct.Empty, ptr [[LOAD_AP]] __builtin_va_list l; __builtin_va_start(l, a); emptyvar = __builtin_va_arg(l, struct Empty); diff --git a/clang/test/CodeGen/complex-convert.c b/clang/test/CodeGen/complex-convert.c index 6041bdd00172ea..23c5dde5c9c57b 100644 --- a/clang/test/CodeGen/complex-convert.c +++ b/clang/test/CodeGen/complex-convert.c @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -o - %s | FileCheck %s // Test conversions between complex integer types and standard integer // types. Tests binary operator conversion and assignment conversion @@ -34,692 +34,692 @@ void foo(signed char sc, unsigned char uc, signed long long sll, // CHECK: store i64 %ull, sc1 = csc; - // CHECK: %[[VAR1:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR2:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR1]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR2]], i[[CHSIZE]]* %[[SC1:[A-Za-z0-9.]+]], align [[CHALIGN]] + // CHECK: %[[VAR1:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR2:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR1]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR2]], ptr %[[SC1:[A-Za-z0-9.]+]], align [[CHALIGN]] sc1 = cuc; - // CHECK-NEXT: %[[VAR3:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR3]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR4]], i[[CHSIZE]]* %[[SC1]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR3:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR4:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR3]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR4]], ptr %[[SC1]], align [[CHALIGN]] sc1 = csll; - // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR5]] + // CHECK-NEXT: %[[VAR5:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR6:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR5]] // CHECK-NEXT: %[[VAR7:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR6]] to i[[CHSIZE]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR7]], i[[CHSIZE]]* %[[SC1]], align [[CHALIGN]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR7]], ptr %[[SC1]], align [[CHALIGN]] sc1 = cull; - // CHECK-NEXT: %[[VAR8:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR9:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR8]] + // CHECK-NEXT: %[[VAR8:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR9:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR8]] // CHECK-NEXT: %[[VAR10:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR9]] to i[[CHSIZE]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR10]], i[[CHSIZE]]* %[[SC1]], align [[CHALIGN]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR10]], ptr %[[SC1]], align [[CHALIGN]] uc1 = csc; - // CHECK-NEXT: %[[VAR11:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR12:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR11]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR12]], i[[CHSIZE]]* %[[UC1:[A-Za-z0-9.]+]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR11:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR12:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR11]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR12]], ptr %[[UC1:[A-Za-z0-9.]+]], align [[CHALIGN]] uc1 = cuc; - // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR13]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR14]], i[[CHSIZE]]* %[[UC1]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR13:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR14:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR13]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR14]], ptr %[[UC1]], align [[CHALIGN]] uc1 = csll; - // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR15]] + // CHECK-NEXT: %[[VAR15:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR16:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR15]] // CHECK-NEXT: %[[VAR17:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR16]] to i[[CHSIZE]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR17]], i[[CHSIZE]]* %[[UC1]], align [[CHALIGN]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR17]], ptr %[[UC1]], align [[CHALIGN]] uc1 = cull; - // CHECK-NEXT: %[[VAR18:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR19:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR18]] + // CHECK-NEXT: %[[VAR18:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR19:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR18]] // CHECK-NEXT: %[[VAR20:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR19]] to i[[CHSIZE]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR20]], i[[CHSIZE]]* %[[UC1]], align [[CHALIGN]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR20]], ptr %[[UC1]], align [[CHALIGN]] sll1 = csc; - // CHECK-NEXT: %[[VAR21:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR22:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR21]] + // CHECK-NEXT: %[[VAR21:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR22:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR21]] // CHECK-NEXT: %[[VAR23:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR22]] to i[[LLSIZE]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR23]], i[[LLSIZE]]* %[[SLL1:[A-Za-z0-9]+]], align [[LLALIGN]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR23]], ptr %[[SLL1:[A-Za-z0-9]+]], align [[LLALIGN]] sll1 = cuc; - // CHECK-NEXT: %[[VAR24:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR24]] + // CHECK-NEXT: %[[VAR24:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR25:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR24]] // CHECK-NEXT: %[[VAR26:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR25]] to i[[LLSIZE]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR26]], i[[LLSIZE]]* %[[SLL1]], align [[LLALIGN]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR26]], ptr %[[SLL1]], align [[LLALIGN]] sll1 = csll; - // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR28:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR27]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR28]], i[[LLSIZE]]* %[[SLL1]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR27:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR28:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR27]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR28]], ptr %[[SLL1]], align [[LLALIGN]] sll1 = cull; - // CHECK-NEXT: %[[VAR29:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR30:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR29]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR30]], i[[LLSIZE]]* %[[SLL1]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR29:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR30:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR29]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR30]], ptr %[[SLL1]], align [[LLALIGN]] ull1 = csc; - // CHECK-NEXT: %[[VAR31:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR32:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR31]] + // CHECK-NEXT: %[[VAR31:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR32:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR31]] // CHECK-NEXT: %[[VAR33:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR32]] to i[[LLSIZE]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR33]], i[[LLSIZE]]* %[[ULL1:[A-Za-z0-9]+]], align [[LLALIGN]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR33]], ptr %[[ULL1:[A-Za-z0-9]+]], align [[LLALIGN]] ull1 = cuc; - // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR34]] + // CHECK-NEXT: %[[VAR34:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR35:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR34]] // CHECK-NEXT: %[[VAR36:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR35]] to i[[LLSIZE]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR36]], i[[LLSIZE]]* %[[ULL1]], align [[LLALIGN]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR36]], ptr %[[ULL1]], align [[LLALIGN]] ull1 = csll; - // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR38:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR37]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR38]], i[[LLSIZE]]* %[[ULL1]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR37:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR38:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR37]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR38]], ptr %[[ULL1]], align [[LLALIGN]] ull1 = cull; - // CHECK-NEXT: %[[VAR39:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR40:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR39]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR40]], i[[LLSIZE]]* %[[ULL1]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR39:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR40:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR39]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR40]], ptr %[[ULL1]], align [[LLALIGN]] csc1 = sc; - // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR:[A-Za-z0-9.]+]], align [[CHALIGN]] - // CHECK-NEXT: %[[VAR42:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR43:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR41]], i[[CHSIZE]]* %[[VAR42]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR43]] + // CHECK-NEXT: %[[VAR41:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR:[A-Za-z0-9.]+]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR42:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR43:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR41]], ptr %[[VAR42]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR43]] csc1 = uc; - // CHECK-NEXT: %[[VAR44:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR:[A-Za-z0-9.]+]], align [[CHALIGN]] - // CHECK-NEXT: %[[VAR45:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR46:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR44]], i[[CHSIZE]]* %[[VAR45]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR46]] + // CHECK-NEXT: %[[VAR44:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR:[A-Za-z0-9.]+]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR45:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR46:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR44]], ptr %[[VAR45]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR46]] csc1 = sll; - // CHECK-NEXT: %[[VAR47:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR:[A-Za-z0-9.]+]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR47:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR:[A-Za-z0-9.]+]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR48:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR47]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR49:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR50:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR48]], i[[CHSIZE]]* %[[VAR49]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR50]] + // CHECK-NEXT: %[[VAR49:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR50:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR48]], ptr %[[VAR49]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR50]] csc1 = ull; - // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR:[A-Za-z0-9.]+]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR51:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR:[A-Za-z0-9.]+]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR52:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR51]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR53:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR54:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR52]], i[[CHSIZE]]* %[[VAR53]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR54]] + // CHECK-NEXT: %[[VAR53:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR54:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR52]], ptr %[[VAR53]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR54]] cuc1 = sc; - // CHECK-NEXT: %[[VAR55:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] - // CHECK-NEXT: %[[VAR56:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR57:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR55]], i[[CHSIZE]]* %[[VAR56]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR57]] + // CHECK-NEXT: %[[VAR55:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR56:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR57:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR55]], ptr %[[VAR56]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR57]] cuc1 = uc; - // CHECK-NEXT: %[[VAR58:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] - // CHECK-NEXT: %[[VAR59:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR60:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR58]], i[[CHSIZE]]* %[[VAR59]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR60]] + // CHECK-NEXT: %[[VAR58:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR59:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR60:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR58]], ptr %[[VAR59]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR60]] cuc1 = sll; - // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR61:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR62:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR61]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR63:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR64:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR62]], i[[CHSIZE]]* %[[VAR63]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR64]] + // CHECK-NEXT: %[[VAR63:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR64:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR62]], ptr %[[VAR63]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR64]] cuc1 = ull; - // CHECK-NEXT: %[[VAR65:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR65:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR66:[A-Za-z0-9.]+]] = trunc i[[LLSIZE]] %[[VAR65]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR67:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR68:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR66]], i[[CHSIZE]]* %[[VAR67]] - // CHECK-NEXT: store i[[CHSIZE]] 0, i[[CHSIZE]]* %[[VAR68]] + // CHECK-NEXT: %[[VAR67:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR68:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR66]], ptr %[[VAR67]] + // CHECK-NEXT: store i[[CHSIZE]] 0, ptr %[[VAR68]] csll1 = sc; - // CHECK-NEXT: %[[VAR69:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR69:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR70:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR69]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR72:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR70]], i[[LLSIZE]]* %[[VAR71]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR72]] + // CHECK-NEXT: %[[VAR71:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR72:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR70]], ptr %[[VAR71]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR72]] csll1 = uc; - // CHECK-NEXT: %[[VAR73:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR73:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR74:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR73]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR75:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR74]], i[[LLSIZE]]* %[[VAR75]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR76]] + // CHECK-NEXT: %[[VAR75:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR76:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR74]], ptr %[[VAR75]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR76]] csll1 = sll; - // CHECK-NEXT: %[[VAR77:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR78:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR79:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR77]], i[[LLSIZE]]* %[[VAR78]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR79]] + // CHECK-NEXT: %[[VAR77:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR78:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR79:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR77]], ptr %[[VAR78]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR79]] csll1 = ull; - // CHECK-NEXT: %[[VAR77:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR78:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR79:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR77]], i[[LLSIZE]]* %[[VAR78]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR79]] + // CHECK-NEXT: %[[VAR77:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR78:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR79:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR77]], ptr %[[VAR78]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR79]] cull1 = sc; - // CHECK-NEXT: %[[VAR80:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR80:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR81:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR80]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR82:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR83:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR81]], i[[LLSIZE]]* %[[VAR82]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR83]] + // CHECK-NEXT: %[[VAR82:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1:[A-Za-z0-9.]+]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR83:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR81]], ptr %[[VAR82]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR83]] cull1 = uc; - // CHECK-NEXT: %[[VAR84:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR84:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR85:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR84]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR86:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR87:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR85]], i[[LLSIZE]]* %[[VAR86]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR87]] + // CHECK-NEXT: %[[VAR86:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR87:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR85]], ptr %[[VAR86]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR87]] cull1 = sll; - // CHECK-NEXT: %[[VAR88:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR89:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR90:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR88]], i[[LLSIZE]]* %[[VAR89]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR90]] + // CHECK-NEXT: %[[VAR88:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR89:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR90:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR88]], ptr %[[VAR89]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR90]] cull1 = ull; - // CHECK-NEXT: %[[VAR91:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR92:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR93:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR91]], i[[LLSIZE]]* %[[VAR92]] - // CHECK-NEXT: store i[[LLSIZE]] 0, i[[LLSIZE]]* %[[VAR93]] + // CHECK-NEXT: %[[VAR91:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR92:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR93:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR91]], ptr %[[VAR92]] + // CHECK-NEXT: store i[[LLSIZE]] 0, ptr %[[VAR93]] csc1 = sc + csc; - // CHECK-NEXT: %[[VAR94:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR94:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR95:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR94]] to i[[ARSIZE:[0-9]+]] - // CHECK-NEXT: %[[VAR96:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR97:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR96]] - // CHECK-NEXT: %[[VAR98:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR99:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR98]] + // CHECK-NEXT: %[[VAR96:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR97:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR96]] + // CHECK-NEXT: %[[VAR98:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR99:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR98]] // CHECK-NEXT: %[[VAR100:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR97]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR101:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR99]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR102:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR95]], %[[VAR100]] // CHECK-NEXT: %[[VAR103:[A-Za-z0-9.]+]] = add i[[ARSIZE]] 0, %[[VAR101]] // CHECK-NEXT: %[[VAR104:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR102]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR105:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR103]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR106:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR107:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR104]], i[[CHSIZE]]* %[[VAR106]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR105]], i[[CHSIZE]]* %[[VAR107]] + // CHECK-NEXT: %[[VAR106:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR107:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR104]], ptr %[[VAR106]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR105]], ptr %[[VAR107]] cuc1 = sc + cuc; - // CHECK-NEXT: %[[VAR108:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR108:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR109:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR108]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR110:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR111:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR110]] - // CHECK-NEXT: %[[VAR112:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR113:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR112]] + // CHECK-NEXT: %[[VAR110:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR111:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR110]] + // CHECK-NEXT: %[[VAR112:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR113:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR112]] // CHECK-NEXT: %[[VAR114:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR111]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR115:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR113]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR116:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR109]], %[[VAR114]] // CHECK-NEXT: %[[VAR117:[A-Za-z0-9.]+]] = add i[[ARSIZE]] 0, %[[VAR115]] // CHECK-NEXT: %[[VAR118:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR116]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR119:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR117]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR120:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR121:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR118]], i[[CHSIZE]]* %[[VAR120]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR119]], i[[CHSIZE]]* %[[VAR121]] + // CHECK-NEXT: %[[VAR120:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR121:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR118]], ptr %[[VAR120]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR119]], ptr %[[VAR121]] csll1 = sc + csll; - // CHECK-NEXT: %[[VAR122:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR122:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR123:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR122]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR124:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR125:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR124]] - // CHECK-NEXT: %[[VAR126:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR127:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR126]] + // CHECK-NEXT: %[[VAR124:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR125:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR124]] + // CHECK-NEXT: %[[VAR126:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR127:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR126]] // CHECK-NEXT: %[[VAR128:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR123]], %[[VAR125]] // CHECK-NEXT: %[[VAR129:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR127]] - // CHECK-NEXT: %[[VAR130:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR131:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR128]], i[[LLSIZE]]* %[[VAR130]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR129]], i[[LLSIZE]]* %[[VAR131]] + // CHECK-NEXT: %[[VAR130:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR131:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR128]], ptr %[[VAR130]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR129]], ptr %[[VAR131]] cull1 = sc + cull; - // CHECK-NEXT: %[[VAR132:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR132:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR133:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR132]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR134:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR135:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR134]] - // CHECK-NEXT: %[[VAR136:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR137:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR136]] + // CHECK-NEXT: %[[VAR134:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR135:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR134]] + // CHECK-NEXT: %[[VAR136:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR137:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR136]] // CHECK-NEXT: %[[VAR138:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR133]], %[[VAR135]] // CHECK-NEXT: %[[VAR139:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR137]] - // CHECK-NEXT: %[[VAR140:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR141:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR138]], i[[LLSIZE]]* %[[VAR140]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR139]], i[[LLSIZE]]* %[[VAR141]] + // CHECK-NEXT: %[[VAR140:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR141:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR138]], ptr %[[VAR140]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR139]], ptr %[[VAR141]] csc1 = uc + csc; - // CHECK-NEXT: %[[VAR142:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR142:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR143:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR142]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR144:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR145:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR144]] - // CHECK-NEXT: %[[VAR146:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR147:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR146]] + // CHECK-NEXT: %[[VAR144:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR145:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR144]] + // CHECK-NEXT: %[[VAR146:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR147:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR146]] // CHECK-NEXT: %[[VAR148:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR145]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR149:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR147]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR150:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR143]], %[[VAR148]] // CHECK-NEXT: %[[VAR151:[A-Za-z0-9.]+]] = add i[[ARSIZE]] 0, %[[VAR149]] // CHECK-NEXT: %[[VAR152:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR150]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR153:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR151]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR154:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR155:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR152]], i[[CHSIZE]]* %[[VAR154]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR153]], i[[CHSIZE]]* %[[VAR155]] + // CHECK-NEXT: %[[VAR154:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR155:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR152]], ptr %[[VAR154]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR153]], ptr %[[VAR155]] cuc1 = uc + cuc; - // CHECK-NEXT: %[[VAR156:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR156:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR157:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR156]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR158:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR159:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR158]] - // CHECK-NEXT: %[[VAR160:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR161:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR160]] + // CHECK-NEXT: %[[VAR158:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR159:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR158]] + // CHECK-NEXT: %[[VAR160:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR161:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR160]] // CHECK-NEXT: %[[VAR162:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR159]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR163:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR161]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR164:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR157]], %[[VAR162]] // CHECK-NEXT: %[[VAR165:[A-Za-z0-9.]+]] = add i[[ARSIZE]] 0, %[[VAR163]] // CHECK-NEXT: %[[VAR166:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR164]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR167:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR165]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR168:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR169:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR166]], i[[CHSIZE]]* %[[VAR168]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR167]], i[[CHSIZE]]* %[[VAR169]] + // CHECK-NEXT: %[[VAR168:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR169:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR166]], ptr %[[VAR168]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR167]], ptr %[[VAR169]] csll1 = uc + csll; - // CHECK-NEXT: %[[VAR170:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR170:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR171:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR170]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR172:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR173:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR172]] - // CHECK-NEXT: %[[VAR174:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR175:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR174]] + // CHECK-NEXT: %[[VAR172:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR173:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR172]] + // CHECK-NEXT: %[[VAR174:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR175:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR174]] // CHECK-NEXT: %[[VAR176:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR171]], %[[VAR173]] // CHECK-NEXT: %[[VAR177:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR175]] - // CHECK-NEXT: %[[VAR178:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR179:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR176]], i[[LLSIZE]]* %[[VAR178]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR177]], i[[LLSIZE]]* %[[VAR179]] + // CHECK-NEXT: %[[VAR178:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR179:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR176]], ptr %[[VAR178]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR177]], ptr %[[VAR179]] cull1 = uc + cull; - // CHECK-NEXT: %[[VAR180:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR180:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR181:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR180]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR182:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR183:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR182]] - // CHECK-NEXT: %[[VAR184:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR185:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR184]] + // CHECK-NEXT: %[[VAR182:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR183:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR182]] + // CHECK-NEXT: %[[VAR184:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR185:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR184]] // CHECK-NEXT: %[[VAR186:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR181]], %[[VAR183]] // CHECK-NEXT: %[[VAR187:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR185]] - // CHECK-NEXT: %[[VAR188:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR189:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR186]], i[[LLSIZE]]* %[[VAR188]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR187]], i[[LLSIZE]]* %[[VAR189]] + // CHECK-NEXT: %[[VAR188:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR189:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR186]], ptr %[[VAR188]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR187]], ptr %[[VAR189]] csll1 = sll + csc; - // CHECK-NEXT: %[[VAR190:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR191:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR192:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR191]] - // CHECK-NEXT: %[[VAR193:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR194:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR193]] + // CHECK-NEXT: %[[VAR190:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR191:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR192:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR191]] + // CHECK-NEXT: %[[VAR193:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR194:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR193]] // CHECK-NEXT: %[[VAR195:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR192]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR196:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR194]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR197:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR190]], %[[VAR195]] // CHECK-NEXT: %[[VAR198:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR196]] - // CHECK-NEXT: %[[VAR199:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR200:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR197]], i[[LLSIZE]]* %[[VAR199]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR198]], i[[LLSIZE]]* %[[VAR200]] + // CHECK-NEXT: %[[VAR199:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR200:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR197]], ptr %[[VAR199]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR198]], ptr %[[VAR200]] csll1 = sll + cuc; - // CHECK-NEXT: %[[VAR201:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR202:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR203:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR202]] - // CHECK-NEXT: %[[VAR204:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR205:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR204]] + // CHECK-NEXT: %[[VAR201:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR202:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR203:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR202]] + // CHECK-NEXT: %[[VAR204:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR205:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR204]] // CHECK-NEXT: %[[VAR206:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR203]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR207:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR205]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR208:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR201]], %[[VAR206]] // CHECK-NEXT: %[[VAR209:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR207]] - // CHECK-NEXT: %[[VAR210:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR211:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR208]], i[[LLSIZE]]* %[[VAR210]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR209]], i[[LLSIZE]]* %[[VAR211]] + // CHECK-NEXT: %[[VAR210:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR211:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR208]], ptr %[[VAR210]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR209]], ptr %[[VAR211]] csll1 = sll + csll; - // CHECK-NEXT: %[[VAR212:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR213:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR214:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR213]] - // CHECK-NEXT: %[[VAR215:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR216:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR215]] + // CHECK-NEXT: %[[VAR212:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR213:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR214:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR213]] + // CHECK-NEXT: %[[VAR215:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR216:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR215]] // CHECK-NEXT: %[[VAR217:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR212]], %[[VAR214]] // CHECK-NEXT: %[[VAR218:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR216]] - // CHECK-NEXT: %[[VAR219:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR220:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR217]], i[[LLSIZE]]* %[[VAR219]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR218]], i[[LLSIZE]]* %[[VAR220]] + // CHECK-NEXT: %[[VAR219:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR220:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR217]], ptr %[[VAR219]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR218]], ptr %[[VAR220]] csll1 = sll + cull; - // CHECK-NEXT: %[[VAR221:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR222:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR223:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR222]] - // CHECK-NEXT: %[[VAR224:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR225:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR224]] + // CHECK-NEXT: %[[VAR221:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR222:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR223:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR222]] + // CHECK-NEXT: %[[VAR224:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR225:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR224]] // CHECK-NEXT: %[[VAR226:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR221]], %[[VAR223]] // CHECK-NEXT: %[[VAR227:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR225]] - // CHECK-NEXT: %[[VAR228:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR229:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR226]], i[[LLSIZE]]* %[[VAR228]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR227]], i[[LLSIZE]]* %[[VAR229]] + // CHECK-NEXT: %[[VAR228:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR229:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR226]], ptr %[[VAR228]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR227]], ptr %[[VAR229]] csll1 = ull + csc; - // CHECK-NEXT: %[[VAR230:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR231:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR232:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR231]] - // CHECK-NEXT: %[[VAR233:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR234:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR233]] + // CHECK-NEXT: %[[VAR230:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR231:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR232:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR231]] + // CHECK-NEXT: %[[VAR233:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR234:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR233]] // CHECK-NEXT: %[[VAR235:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR232]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR236:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR234]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR237:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR230]], %[[VAR235]] // CHECK-NEXT: %[[VAR238:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR236]] - // CHECK-NEXT: %[[VAR239:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR240:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR237]], i[[LLSIZE]]* %[[VAR239]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR238]], i[[LLSIZE]]* %[[VAR240]] + // CHECK-NEXT: %[[VAR239:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR240:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR237]], ptr %[[VAR239]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR238]], ptr %[[VAR240]] cull1 = ull + cuc; - // CHECK-NEXT: %[[VAR241:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR242:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR243:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR242]] - // CHECK-NEXT: %[[VAR244:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR245:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR244]] + // CHECK-NEXT: %[[VAR241:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR242:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR243:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR242]] + // CHECK-NEXT: %[[VAR244:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR245:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR244]] // CHECK-NEXT: %[[VAR246:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR243]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR247:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR245]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR248:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR241]], %[[VAR246]] // CHECK-NEXT: %[[VAR249:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR247]] - // CHECK-NEXT: %[[VAR250:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR251:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR248]], i[[LLSIZE]]* %[[VAR250]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR249]], i[[LLSIZE]]* %[[VAR251]] + // CHECK-NEXT: %[[VAR250:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR251:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR248]], ptr %[[VAR250]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR249]], ptr %[[VAR251]] csll1 = ull + csll; - // CHECK-NEXT: %[[VAR252:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR253:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR254:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR253]] - // CHECK-NEXT: %[[VAR255:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR256:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR255]] + // CHECK-NEXT: %[[VAR252:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR253:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR254:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR253]] + // CHECK-NEXT: %[[VAR255:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR256:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR255]] // CHECK-NEXT: %[[VAR257:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR252]], %[[VAR254]] // CHECK-NEXT: %[[VAR258:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR256]] - // CHECK-NEXT: %[[VAR259:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR260:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR257]], i[[LLSIZE]]* %[[VAR259]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR258]], i[[LLSIZE]]* %[[VAR260]] + // CHECK-NEXT: %[[VAR259:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR260:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR257]], ptr %[[VAR259]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR258]], ptr %[[VAR260]] cull1 = ull + cull; - // CHECK-NEXT: %[[VAR261:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] - // CHECK-NEXT: %[[VAR262:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR263:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR262]] - // CHECK-NEXT: %[[VAR264:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR265:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR264]] + // CHECK-NEXT: %[[VAR261:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR262:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR263:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR262]] + // CHECK-NEXT: %[[VAR264:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR265:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR264]] // CHECK-NEXT: %[[VAR266:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR261]], %[[VAR263]] // CHECK-NEXT: %[[VAR267:[A-Za-z0-9.]+]] = add i[[LLSIZE]] 0, %[[VAR265]] - // CHECK-NEXT: %[[VAR268:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR269:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR266]], i[[LLSIZE]]* %[[VAR268]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR267]], i[[LLSIZE]]* %[[VAR269]] + // CHECK-NEXT: %[[VAR268:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR269:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR266]], ptr %[[VAR268]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR267]], ptr %[[VAR269]] csc1 = csc + sc; - // CHECK-NEXT: %[[VAR270:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR271:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR270]] - // CHECK-NEXT: %[[VAR272:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR273:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR272]] + // CHECK-NEXT: %[[VAR270:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR271:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR270]] + // CHECK-NEXT: %[[VAR272:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR273:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR272]] // CHECK-NEXT: %[[VAR274:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR271]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR275:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR273]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR276:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR276:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR277:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR276]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR278:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR274]], %[[VAR277]] // CHECK-NEXT: %[[VAR279:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR275]], 0 // CHECK-NEXT: %[[VAR280:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR278]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR281:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR279]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR282:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR283:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR280]], i[[CHSIZE]]* %[[VAR282]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR281]], i[[CHSIZE]]* %[[VAR283]] + // CHECK-NEXT: %[[VAR282:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR283:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR280]], ptr %[[VAR282]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR281]], ptr %[[VAR283]] csc1 = csc + uc; - // CHECK-NEXT: %[[VAR284:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR285:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR284]] - // CHECK-NEXT: %[[VAR286:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR287:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR286]] + // CHECK-NEXT: %[[VAR284:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR285:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR284]] + // CHECK-NEXT: %[[VAR286:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR287:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR286]] // CHECK-NEXT: %[[VAR288:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR285]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR289:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR287]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR290:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR290:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR291:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR290]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR292:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR288]], %[[VAR291]] // CHECK-NEXT: %[[VAR293:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR289]], 0 // CHECK-NEXT: %[[VAR294:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR292]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR295:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR293]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR296:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR297:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR294]], i[[CHSIZE]]* %[[VAR296]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR295]], i[[CHSIZE]]* %[[VAR297]] + // CHECK-NEXT: %[[VAR296:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR297:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR294]], ptr %[[VAR296]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR295]], ptr %[[VAR297]] csll1 = csc + sll; - // CHECK-NEXT: %[[VAR298:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR299:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR298]] - // CHECK-NEXT: %[[VAR300:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR301:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR300]] + // CHECK-NEXT: %[[VAR298:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR299:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR298]] + // CHECK-NEXT: %[[VAR300:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR301:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR300]] // CHECK-NEXT: %[[VAR302:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR299]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR303:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR301]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR304:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR304:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR305:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR302]], %[[VAR304]] // CHECK-NEXT: %[[VAR306:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR303]], 0 - // CHECK-NEXT: %[[VAR307:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR308:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR305]], i[[LLSIZE]]* %[[VAR307]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR306]], i[[LLSIZE]]* %[[VAR308]] + // CHECK-NEXT: %[[VAR307:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR308:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR305]], ptr %[[VAR307]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR306]], ptr %[[VAR308]] csll1 = csc + ull; - // CHECK-NEXT: %[[VAR309:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR310:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR309]] - // CHECK-NEXT: %[[VAR311:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR312:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR311]] + // CHECK-NEXT: %[[VAR309:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR310:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR309]] + // CHECK-NEXT: %[[VAR311:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR312:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR311]] // CHECK-NEXT: %[[VAR313:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR310]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR314:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR312]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR315:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR315:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR316:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR313]], %[[VAR315]] // CHECK-NEXT: %[[VAR317:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR314]], 0 - // CHECK-NEXT: %[[VAR318:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR319:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR316]], i[[LLSIZE]]* %[[VAR318]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR317]], i[[LLSIZE]]* %[[VAR319]] + // CHECK-NEXT: %[[VAR318:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR319:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR316]], ptr %[[VAR318]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR317]], ptr %[[VAR319]] csc1 = cuc + sc; - // CHECK-NEXT: %[[VAR320:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR321:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR320]] - // CHECK-NEXT: %[[VAR322:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR323:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR322]] + // CHECK-NEXT: %[[VAR320:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR321:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR320]] + // CHECK-NEXT: %[[VAR322:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR323:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR322]] // CHECK-NEXT: %[[VAR324:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR321]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR325:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR323]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR326:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR326:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR327:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR326]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR328:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR324]], %[[VAR327]] // CHECK-NEXT: %[[VAR329:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR325]], 0 // CHECK-NEXT: %[[VAR330:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR328]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR331:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR329]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR332:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR333:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR330]], i[[CHSIZE]]* %[[VAR332]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR331]], i[[CHSIZE]]* %[[VAR333]] + // CHECK-NEXT: %[[VAR332:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR333:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CSC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR330]], ptr %[[VAR332]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR331]], ptr %[[VAR333]] cuc1 = cuc + uc; - // CHECK-NEXT: %[[VAR334:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR335:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR334]] - // CHECK-NEXT: %[[VAR336:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR337:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR336]] + // CHECK-NEXT: %[[VAR334:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR335:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR334]] + // CHECK-NEXT: %[[VAR336:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR337:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR336]] // CHECK-NEXT: %[[VAR338:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR335]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR339:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR337]] to i[[ARSIZE]] - // CHECK-NEXT: %[[VAR340:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR340:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR341:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR340]] to i[[ARSIZE]] // CHECK-NEXT: %[[VAR342:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR338]], %[[VAR341]] // CHECK-NEXT: %[[VAR343:[A-Za-z0-9.]+]] = add i[[ARSIZE]] %[[VAR339]], 0 // CHECK-NEXT: %[[VAR344:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR342]] to i[[CHSIZE]] // CHECK-NEXT: %[[VAR345:[A-Za-z0-9.]+]] = trunc i[[ARSIZE]] %[[VAR343]] to i[[CHSIZE]] - // CHECK-NEXT: %[[VAR346:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR347:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR344]], i[[CHSIZE]]* %[[VAR346]] - // CHECK-NEXT: store i[[CHSIZE]] %[[VAR345]], i[[CHSIZE]]* %[[VAR347]] + // CHECK-NEXT: %[[VAR346:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR347:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR344]], ptr %[[VAR346]] + // CHECK-NEXT: store i[[CHSIZE]] %[[VAR345]], ptr %[[VAR347]] csll1 = cuc + sll; - // CHECK-NEXT: %[[VAR348:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR349:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR348]] - // CHECK-NEXT: %[[VAR350:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR351:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR350]] + // CHECK-NEXT: %[[VAR348:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR349:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR348]] + // CHECK-NEXT: %[[VAR350:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR351:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR350]] // CHECK-NEXT: %[[VAR352:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR349]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR353:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR351]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR354:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR354:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR355:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR352]], %[[VAR354]] // CHECK-NEXT: %[[VAR356:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR353]], 0 - // CHECK-NEXT: %[[VAR357:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR358:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR355]], i[[LLSIZE]]* %[[VAR357]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR356]], i[[LLSIZE]]* %[[VAR358]] + // CHECK-NEXT: %[[VAR357:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR358:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR355]], ptr %[[VAR357]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR356]], ptr %[[VAR358]] cull1 = cuc + ull; - // CHECK-NEXT: %[[VAR357:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR358:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR357]] - // CHECK-NEXT: %[[VAR359:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, { i[[CHSIZE]], i[[CHSIZE]] }* %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR360:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[VAR359]] + // CHECK-NEXT: %[[VAR357:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR358:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR357]] + // CHECK-NEXT: %[[VAR359:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[CHSIZE]], i[[CHSIZE]] }, ptr %[[CUC]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR360:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[VAR359]] // CHECK-NEXT: %[[VAR361:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR358]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR362:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR360]] to i[[LLSIZE]] - // CHECK-NEXT: %[[VAR363:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR363:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR364:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR361]], %[[VAR363]] // CHECK-NEXT: %[[VAR365:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR362]], 0 - // CHECK-NEXT: %[[VAR366:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR367:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR364]], i[[LLSIZE]]* %[[VAR366]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR365]], i[[LLSIZE]]* %[[VAR367]] + // CHECK-NEXT: %[[VAR366:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR367:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR364]], ptr %[[VAR366]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR365]], ptr %[[VAR367]] csll1 = csll + sc; - // CHECK-NEXT: %[[VAR368:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR369:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR368]] - // CHECK-NEXT: %[[VAR370:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR371:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR370]] - // CHECK-NEXT: %[[VAR372:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR368:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR369:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR368]] + // CHECK-NEXT: %[[VAR370:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR371:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR370]] + // CHECK-NEXT: %[[VAR372:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR373:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR372]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR374:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR369]], %[[VAR373]] // CHECK-NEXT: %[[VAR375:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR371]], 0 - // CHECK-NEXT: %[[VAR376:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR377:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR374]], i[[LLSIZE]]* %[[VAR376]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR375]], i[[LLSIZE]]* %[[VAR377]] + // CHECK-NEXT: %[[VAR376:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR377:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR374]], ptr %[[VAR376]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR375]], ptr %[[VAR377]] csll1 = csll + uc; - // CHECK-NEXT: %[[VAR378:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR379:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR378]] - // CHECK-NEXT: %[[VAR380:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR381:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR380]] - // CHECK-NEXT: %[[VAR382:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR378:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR379:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR378]] + // CHECK-NEXT: %[[VAR380:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR381:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR380]] + // CHECK-NEXT: %[[VAR382:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR383:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR382]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR384:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR379]], %[[VAR383]] // CHECK-NEXT: %[[VAR385:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR381]], 0 - // CHECK-NEXT: %[[VAR386:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR387:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR384]], i[[LLSIZE]]* %[[VAR386]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR385]], i[[LLSIZE]]* %[[VAR387]] + // CHECK-NEXT: %[[VAR386:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR387:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR384]], ptr %[[VAR386]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR385]], ptr %[[VAR387]] csll1 = csll + sll; - // CHECK-NEXT: %[[VAR388:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR389:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR388]] - // CHECK-NEXT: %[[VAR390:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR391:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR390]] - // CHECK-NEXT: %[[VAR392:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR388:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR389:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR388]] + // CHECK-NEXT: %[[VAR390:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR391:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR390]] + // CHECK-NEXT: %[[VAR392:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR393:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR389]], %[[VAR392]] // CHECK-NEXT: %[[VAR394:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR391]], 0 - // CHECK-NEXT: %[[VAR395:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR396:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR393]], i[[LLSIZE]]* %[[VAR395]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR394]], i[[LLSIZE]]* %[[VAR396]] + // CHECK-NEXT: %[[VAR395:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR396:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR393]], ptr %[[VAR395]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR394]], ptr %[[VAR396]] csll1 = csll + ull; - // CHECK-NEXT: %[[VAR397:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR398:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR397]] - // CHECK-NEXT: %[[VAR399:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR400:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR399]] - // CHECK-NEXT: %[[VAR401:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR397:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR398:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR397]] + // CHECK-NEXT: %[[VAR399:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR400:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR399]] + // CHECK-NEXT: %[[VAR401:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR402:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR398]], %[[VAR401]] // CHECK-NEXT: %[[VAR403:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR400]], 0 - // CHECK-NEXT: %[[VAR404:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR405:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR402]], i[[LLSIZE]]* %[[VAR404]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR403]], i[[LLSIZE]]* %[[VAR405]] + // CHECK-NEXT: %[[VAR404:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR405:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR402]], ptr %[[VAR404]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR403]], ptr %[[VAR405]] csll1 = cull + sc; - // CHECK-NEXT: %[[VAR406:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR407:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR406]] - // CHECK-NEXT: %[[VAR408:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR409:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR408]] - // CHECK-NEXT: %[[VAR410:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[SCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR406:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR407:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR406]] + // CHECK-NEXT: %[[VAR408:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR409:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR408]] + // CHECK-NEXT: %[[VAR410:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[SCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR411:[A-Za-z0-9.]+]] = sext i[[CHSIZE]] %[[VAR410]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR412:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR407]], %[[VAR411]] // CHECK-NEXT: %[[VAR413:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR409]], 0 - // CHECK-NEXT: %[[VAR414:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR415:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR412]], i[[LLSIZE]]* %[[VAR414]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR413]], i[[LLSIZE]]* %[[VAR415]] + // CHECK-NEXT: %[[VAR414:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR415:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR412]], ptr %[[VAR414]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR413]], ptr %[[VAR415]] cull1 = cull + uc; - // CHECK-NEXT: %[[VAR416:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR417:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR416]] - // CHECK-NEXT: %[[VAR418:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR419:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR418]] - // CHECK-NEXT: %[[VAR420:[A-Za-z0-9.]+]] = load i[[CHSIZE]], i[[CHSIZE]]* %[[UCADDR]], align [[CHALIGN]] + // CHECK-NEXT: %[[VAR416:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR417:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR416]] + // CHECK-NEXT: %[[VAR418:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR419:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR418]] + // CHECK-NEXT: %[[VAR420:[A-Za-z0-9.]+]] = load i[[CHSIZE]], ptr %[[UCADDR]], align [[CHALIGN]] // CHECK-NEXT: %[[VAR421:[A-Za-z0-9.]+]] = zext i[[CHSIZE]] %[[VAR420]] to i[[LLSIZE]] // CHECK-NEXT: %[[VAR422:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR417]], %[[VAR421]] // CHECK-NEXT: %[[VAR423:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR419]], 0 - // CHECK-NEXT: %[[VAR424:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR425:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR422]], i[[LLSIZE]]* %[[VAR424]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR423]], i[[LLSIZE]]* %[[VAR425]] + // CHECK-NEXT: %[[VAR424:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR425:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR422]], ptr %[[VAR424]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR423]], ptr %[[VAR425]] csll1 = cull + sll; - // CHECK-NEXT: %[[VAR426:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR427:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR426]] - // CHECK-NEXT: %[[VAR428:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR429:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR428]] - // CHECK-NEXT: %[[VAR430:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[SLLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR426:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR427:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR426]] + // CHECK-NEXT: %[[VAR428:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR429:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR428]] + // CHECK-NEXT: %[[VAR430:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[SLLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR431:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR427]], %[[VAR430]] // CHECK-NEXT: %[[VAR432:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR429]], 0 - // CHECK-NEXT: %[[VAR433:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR434:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR431]], i[[LLSIZE]]* %[[VAR433]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR432]], i[[LLSIZE]]* %[[VAR434]] + // CHECK-NEXT: %[[VAR433:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR434:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CSLL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR431]], ptr %[[VAR433]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR432]], ptr %[[VAR434]] cull1 = cull + ull; - // CHECK-NEXT: %[[VAR435:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR436:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR435]] - // CHECK-NEXT: %[[VAR437:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: %[[VAR438:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[VAR437]] - // CHECK-NEXT: %[[VAR439:[A-Za-z0-9.]+]] = load i[[LLSIZE]], i[[LLSIZE]]* %[[ULLADDR]], align [[LLALIGN]] + // CHECK-NEXT: %[[VAR435:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR436:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR435]] + // CHECK-NEXT: %[[VAR437:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: %[[VAR438:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[VAR437]] + // CHECK-NEXT: %[[VAR439:[A-Za-z0-9.]+]] = load i[[LLSIZE]], ptr %[[ULLADDR]], align [[LLALIGN]] // CHECK-NEXT: %[[VAR440:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR436]], %[[VAR439]] // CHECK-NEXT: %[[VAR441:[A-Za-z0-9.]+]] = add i[[LLSIZE]] %[[VAR438]], 0 - // CHECK-NEXT: %[[VAR442:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 - // CHECK-NEXT: %[[VAR443:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, { i[[LLSIZE]], i[[LLSIZE]] }* %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR440]], i[[LLSIZE]]* %[[VAR442]] - // CHECK-NEXT: store i[[LLSIZE]] %[[VAR441]], i[[LLSIZE]]* %[[VAR443]] + // CHECK-NEXT: %[[VAR442:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 0 + // CHECK-NEXT: %[[VAR443:[A-Za-z0-9.]+]] = getelementptr inbounds { i[[LLSIZE]], i[[LLSIZE]] }, ptr %[[CULL1]], i{{[0-9]+}} 0, i{{[0-9]+}} 1 + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR440]], ptr %[[VAR442]] + // CHECK-NEXT: store i[[LLSIZE]] %[[VAR441]], ptr %[[VAR443]] } // This code used to cause a crash; test that it no longer does so. diff --git a/clang/test/CodeGen/instrument-objc-method.m b/clang/test/CodeGen/instrument-objc-method.m index ea7a3cfa82a522..82457beb94a325 100644 --- a/clang/test/CodeGen/instrument-objc-method.m +++ b/clang/test/CodeGen/instrument-objc-method.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -S -triple x86_64-apple-darwin10 -debug-info-kind=standalone -emit-llvm -o - %s -finstrument-functions | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -S -triple x86_64-apple-darwin10 -debug-info-kind=standalone -emit-llvm -o - %s -finstrument-function-entry-bare | FileCheck -check-prefix=BARE %s +// RUN: %clang_cc1 -S -triple x86_64-apple-darwin10 -debug-info-kind=standalone -emit-llvm -o - %s -finstrument-functions | FileCheck %s +// RUN: %clang_cc1 -S -triple x86_64-apple-darwin10 -debug-info-kind=standalone -emit-llvm -o - %s -finstrument-function-entry-bare | FileCheck -check-prefix=BARE %s @interface ObjCClass @end @@ -28,7 +28,7 @@ + (void)load __attribute__((no_instrument_function)) { - (void)dealloc __attribute__((no_instrument_function)) { } -// CHECK: declare void @__cyg_profile_func_enter(i8*, i8*) -// CHECK: declare void @__cyg_profile_func_exit(i8*, i8*) +// CHECK: declare void @__cyg_profile_func_enter(ptr, ptr) +// CHECK: declare void @__cyg_profile_func_exit(ptr, ptr) // BARE: declare void @__cyg_profile_func_enter_bare @end diff --git a/clang/test/CodeGen/named_reg_global.c b/clang/test/CodeGen/named_reg_global.c index 0fbae7adf7e6ed..eab98797feb173 100644 --- a/clang/test/CodeGen/named_reg_global.c +++ b/clang/test/CodeGen/named_reg_global.c @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-X86-64 -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM -// RUN: %clang_cc1 -no-opaque-pointers -triple armv7-linux-gnu -target-abi apcs-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM +// RUN: %clang_cc1 -triple x86_64-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-X86-64 +// RUN: %clang_cc1 -triple arm64-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM +// RUN: %clang_cc1 -triple armv7-linux-gnu -target-abi apcs-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK --check-prefix=CHECK-ARM // CHECK-NOT: @sp = common global @@ -31,7 +31,7 @@ unsigned long get_stack_pointer_addr(void) { // CHECK: declare{{.*}} i[[bits]] @llvm.read_register.i[[bits]](metadata) // CHECK: define{{.*}} void @set_stack_pointer_addr(i[[bits]] noundef %addr) #0 { -// CHECK: [[sto:%[0-9]+]] = load i[[bits]], i[[bits]]* % +// CHECK: [[sto:%[0-9]+]] = load i[[bits]], ptr % // CHECK: call void @llvm.write_register.i[[bits]](metadata !0, i[[bits]] [[sto]]) // CHECK: ret void void set_stack_pointer_addr(unsigned long addr) { @@ -44,13 +44,13 @@ int fn1(void) { return (*p4TH).word.len; } // CHECK: %[[regr:[0-9]+]] = call i[[bits]] @llvm.read_register.i[[bits]](metadata !0) -// CHECK: inttoptr i[[bits]] %[[regr]] to %struct.p4_Thread* +// CHECK: inttoptr i[[bits]] %[[regr]] to ptr // CHECK: define {{.*}}@fn2 void fn2(struct p4_Thread *val) { p4TH = val; } -// CHECK: %[[regw:[0-9]+]] = ptrtoint %struct.p4_Thread* %{{.*}} to i[[bits]] +// CHECK: %[[regw:[0-9]+]] = ptrtoint ptr %{{.*}} to i[[bits]] // CHECK: call void @llvm.write_register.i[[bits]](metadata !0, i[[bits]] %[[regw]]) // CHECK-X86-64: !llvm.named.register.rsp = !{!0} diff --git a/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m b/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m index 28312c674e9371..ec3726bb18c538 100644 --- a/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m +++ b/clang/test/CodeGen/sanitize-thread-no-checking-at-run-time.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -x objective-c++ -fblocks -emit-llvm -o - %s | FileCheck -check-prefix=WITHOUT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -x objective-c++ -fblocks -emit-llvm -o - %s -fsanitize=thread | FileCheck -check-prefix=TSAN %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -x objective-c++ -fblocks -emit-llvm -o - %s | FileCheck -check-prefix=WITHOUT %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -x objective-c++ -fblocks -emit-llvm -o - %s -fsanitize=thread | FileCheck -check-prefix=TSAN %s // WITHOUT-NOT: "sanitize_thread_no_checking_at_run_time" @@ -35,7 +35,7 @@ - (void)dealloc { void test2(id x) { extern void test2_helper(id (^)(void)); test2_helper(^{ return x; }); -// TSAN: define linkonce_odr hidden void @__destroy_helper_block_8_32o(i8* noundef %0) unnamed_addr [[ATTR:#[0-9]+]] +// TSAN: define linkonce_odr hidden void @__destroy_helper_block_8_32o(ptr noundef %0) unnamed_addr [[ATTR:#[0-9]+]] } // TSAN: attributes [[ATTR]] = { noinline nounwind {{.*}} "sanitize_thread_no_checking_at_run_time" {{.*}} } diff --git a/clang/test/CodeGen/thinlto-opaque-typed-mix.ll b/clang/test/CodeGen/thinlto-opaque-typed-mix.ll index 1cd301f290e9b2..c146e1a0128b89 100644 --- a/clang/test/CodeGen/thinlto-opaque-typed-mix.ll +++ b/clang/test/CodeGen/thinlto-opaque-typed-mix.ll @@ -15,9 +15,9 @@ target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128" target triple = "x86_64--" -declare i8* @f2() +declare ptr @f2() define i32 @main() { - call i8* @f2() + call ptr @f2() ret i32 0 } diff --git a/clang/test/CodeGen/ubsan-pointer-overflow.m b/clang/test/CodeGen/ubsan-pointer-overflow.m index d3da6942bd72ec..9192598da92fc8 100644 --- a/clang/test/CodeGen/ubsan-pointer-overflow.m +++ b/clang/test/CodeGen/ubsan-pointer-overflow.m @@ -1,17 +1,17 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -w -emit-llvm -o - %s -fsanitize=pointer-overflow | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -w -emit-llvm -o - %s -fsanitize=pointer-overflow | FileCheck %s // CHECK-LABEL: define{{.*}} void @variable_len_array_arith void variable_len_array_arith(int n, int k) { int vla[n]; int (*p)[n] = &vla; - // CHECK: getelementptr inbounds i32, i32* {{.*}}, i64 [[INC:%.*]] + // CHECK: getelementptr inbounds i32, ptr {{.*}}, i64 [[INC:%.*]] // CHECK: @llvm.smul.with.overflow.i64(i64 4, i64 [[INC]]), !nosanitize // CHECK-NOT: select // CHECK: call void @__ubsan_handle_pointer_overflow{{.*}} ++p; - // CHECK: getelementptr inbounds i32, i32* {{.*}}, i64 [[IDXPROM:%.*]] + // CHECK: getelementptr inbounds i32, ptr {{.*}}, i64 [[IDXPROM:%.*]] // CHECK: @llvm.smul.with.overflow.i64(i64 4, i64 [[IDXPROM]]), !nosanitize // CHECK: select // CHECK: call void @__ubsan_handle_pointer_overflow{{.*}} diff --git a/clang/test/CodeGenCUDA/Inputs/device-code.ll b/clang/test/CodeGenCUDA/Inputs/device-code.ll index 5943a000c1d8d6..f63a5a0bbf10d7 100644 --- a/clang/test/CodeGenCUDA/Inputs/device-code.ll +++ b/clang/test/CodeGenCUDA/Inputs/device-code.ll @@ -4,7 +4,7 @@ target triple = "nvptx-unknown-cuda" -declare i32 @__nvvm_reflect(i8*) +declare i32 @__nvvm_reflect(ptr) @"$str" = private addrspace(1) constant [8 x i8] c"USE_MUL\00" @@ -17,7 +17,7 @@ define void @used_subfunc(float %a) { } define float @_Z17device_mul_or_addff(float %a, float %b) { - %reflect = call i32 @__nvvm_reflect(i8* addrspacecast (i8 addrspace(1)* getelementptr inbounds ([8 x i8], [8 x i8] addrspace(1)* @"$str", i32 0, i32 0) to i8*)) + %reflect = call i32 @__nvvm_reflect(ptr addrspacecast (ptr addrspace(1) @"$str" to ptr)) %cmp = icmp ne i32 %reflect, 0 br i1 %cmp, label %use_mul, label %use_add diff --git a/clang/test/CodeGenCUDA/cxx-call-kernel.cpp b/clang/test/CodeGenCUDA/cxx-call-kernel.cpp index def6dbabfc814a..653e03c153cbea 100644 --- a/clang/test/CodeGenCUDA/cxx-call-kernel.cpp +++ b/clang/test/CodeGenCUDA/cxx-call-kernel.cpp @@ -1,13 +1,13 @@ // REQUIRES: x86-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu \ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu \ // RUN: -x hip -emit-llvm-bc %s -o %t.hip.bc -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu \ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu \ // RUN: -mlink-bitcode-file %t.hip.bc -DHIP_PLATFORM -emit-llvm \ // RUN: %s -o - | FileCheck %s #include "Inputs/cuda.h" -// CHECK: @_Z2g1i = constant void (i32)* @_Z17__device_stub__g1i, align 8 +// CHECK: @_Z2g1i = constant ptr @_Z17__device_stub__g1i, align 8 #if __HIP__ __global__ void g1(int x) {} #else diff --git a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp index a3108e48b68879..c1f93101410006 100644 --- a/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp +++ b/clang/test/CodeGenCXX/amdgcn-automatic-variable.cpp @@ -1,13 +1,13 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -O0 -triple amdgcn---amdgiz -emit-llvm %s -o - | FileCheck %s // CHECK-LABEL: @_Z5func1Pi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32*, align 8, addrspace(5) -// CHECK-NEXT: [[X_ADDR_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[X_ADDR]] to i32** -// CHECK-NEXT: store i32* [[X:%.*]], i32** [[X_ADDR_ASCAST]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = load i32*, i32** [[X_ADDR_ASCAST]], align 8 -// CHECK-NEXT: store i32 1, i32* [[TMP0]], align 4 +// CHECK-NEXT: [[X_ADDR:%.*]] = alloca ptr, align 8, addrspace(5) +// CHECK-NEXT: [[X_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X_ADDR]] to ptr +// CHECK-NEXT: store ptr [[X:%.*]], ptr [[X_ADDR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X_ADDR_ASCAST]], align 8 +// CHECK-NEXT: store i32 1, ptr [[TMP0]], align 4 // CHECK-NEXT: ret void // void func1(int *x) { @@ -19,25 +19,25 @@ void func1(int *x) { // CHECK-NEXT: [[LV1:%.*]] = alloca i32, align 4, addrspace(5) // CHECK-NEXT: [[LV2:%.*]] = alloca i32, align 4, addrspace(5) // CHECK-NEXT: [[LA:%.*]] = alloca [100 x i32], align 4, addrspace(5) -// CHECK-NEXT: [[LP1:%.*]] = alloca i32*, align 8, addrspace(5) -// CHECK-NEXT: [[LP2:%.*]] = alloca i32*, align 8, addrspace(5) +// CHECK-NEXT: [[LP1:%.*]] = alloca ptr, align 8, addrspace(5) +// CHECK-NEXT: [[LP2:%.*]] = alloca ptr, align 8, addrspace(5) // CHECK-NEXT: [[LVC:%.*]] = alloca i32, align 4, addrspace(5) -// CHECK-NEXT: [[LV1_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LV1]] to i32* -// CHECK-NEXT: [[LV2_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LV2]] to i32* -// CHECK-NEXT: [[LA_ASCAST:%.*]] = addrspacecast [100 x i32] addrspace(5)* [[LA]] to [100 x i32]* -// CHECK-NEXT: [[LP1_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[LP1]] to i32** -// CHECK-NEXT: [[LP2_ASCAST:%.*]] = addrspacecast i32* addrspace(5)* [[LP2]] to i32** -// CHECK-NEXT: [[LVC_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[LVC]] to i32* -// CHECK-NEXT: store i32 1, i32* [[LV1_ASCAST]], align 4 -// CHECK-NEXT: store i32 2, i32* [[LV2_ASCAST]], align 4 -// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[LA_ASCAST]], i64 0, i64 0 -// CHECK-NEXT: store i32 3, i32* [[ARRAYIDX]], align 4 -// CHECK-NEXT: store i32* [[LV1_ASCAST]], i32** [[LP1_ASCAST]], align 8 -// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], [100 x i32]* [[LA_ASCAST]], i64 0, i64 0 -// CHECK-NEXT: store i32* [[ARRAYDECAY]], i32** [[LP2_ASCAST]], align 8 -// CHECK-NEXT: call void @_Z5func1Pi(i32* noundef [[LV1_ASCAST]]) -// CHECK-NEXT: store i32 4, i32* [[LVC_ASCAST]], align 4 -// CHECK-NEXT: store i32 4, i32* [[LV1_ASCAST]], align 4 +// CHECK-NEXT: [[LV1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LV1]] to ptr +// CHECK-NEXT: [[LV2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LV2]] to ptr +// CHECK-NEXT: [[LA_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LA]] to ptr +// CHECK-NEXT: [[LP1_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LP1]] to ptr +// CHECK-NEXT: [[LP2_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LP2]] to ptr +// CHECK-NEXT: [[LVC_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[LVC]] to ptr +// CHECK-NEXT: store i32 1, ptr [[LV1_ASCAST]], align 4 +// CHECK-NEXT: store i32 2, ptr [[LV2_ASCAST]], align 4 +// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [100 x i32], ptr [[LA_ASCAST]], i64 0, i64 0 +// CHECK-NEXT: store i32 3, ptr [[ARRAYIDX]], align 4 +// CHECK-NEXT: store ptr [[LV1_ASCAST]], ptr [[LP1_ASCAST]], align 8 +// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [100 x i32], ptr [[LA_ASCAST]], i64 0, i64 0 +// CHECK-NEXT: store ptr [[ARRAYDECAY]], ptr [[LP2_ASCAST]], align 8 +// CHECK-NEXT: call void @_Z5func1Pi(ptr noundef [[LV1_ASCAST]]) +// CHECK-NEXT: store i32 4, ptr [[LVC_ASCAST]], align 4 +// CHECK-NEXT: store i32 4, ptr [[LV1_ASCAST]], align 4 // CHECK-NEXT: ret void // void func2(void) { @@ -73,9 +73,9 @@ int x; // CHECK-LABEL: @_Z5func3v( // CHECK-NEXT: entry: // CHECK-NEXT: [[A:%.*]] = alloca [[CLASS_A:%.*]], align 4, addrspace(5) -// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast [[CLASS_A]] addrspace(5)* [[A]] to %class.A* -// CHECK-NEXT: call void @_ZN1AC1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) +// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A]] to ptr +// CHECK-NEXT: call void @_ZN1AC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) // CHECK-NEXT: ret void // void func3() { @@ -85,9 +85,9 @@ void func3() { // CHECK-LABEL: @_Z5func4i( // CHECK-NEXT: entry: // CHECK-NEXT: [[X_ADDR:%.*]] = alloca i32, align 4, addrspace(5) -// CHECK-NEXT: [[X_ADDR_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X_ADDR]] to i32* -// CHECK-NEXT: store i32 [[X:%.*]], i32* [[X_ADDR_ASCAST]], align 4 -// CHECK-NEXT: call void @_Z5func1Pi(i32* noundef [[X_ADDR_ASCAST]]) +// CHECK-NEXT: [[X_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X_ADDR]] to ptr +// CHECK-NEXT: store i32 [[X:%.*]], ptr [[X_ADDR_ASCAST]], align 4 +// CHECK-NEXT: call void @_Z5func1Pi(ptr noundef [[X_ADDR_ASCAST]]) // CHECK-NEXT: ret void // void func4(int x) { @@ -97,7 +97,7 @@ void func4(int x) { // CHECK-LABEL: @_Z5func5v( // CHECK-NEXT: entry: // CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5) -// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32* +// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X]] to ptr // CHECK-NEXT: ret void // void func5() { @@ -108,7 +108,7 @@ void func5() { // CHECK-LABEL: @_Z5func6v( // CHECK-NEXT: entry: // CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5) -// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32* +// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X]] to ptr // CHECK-NEXT: ret void // void func6() { @@ -120,10 +120,10 @@ extern void use(int *); // CHECK-LABEL: @_Z5func7v( // CHECK-NEXT: entry: // CHECK-NEXT: [[X:%.*]] = alloca i32, align 4, addrspace(5) -// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast i32 addrspace(5)* [[X]] to i32* +// CHECK-NEXT: [[X_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[X]] to ptr // CHECK-NEXT: br label [[LATER:%.*]] // CHECK: later: -// CHECK-NEXT: call void @_Z3usePi(i32* noundef [[X_ASCAST]]) +// CHECK-NEXT: call void @_Z3usePi(ptr noundef [[X_ASCAST]]) // CHECK-NEXT: ret void // void func7() { diff --git a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp index e8b0975b1f521d..f6b75d589dd848 100644 --- a/clang/test/CodeGenCXX/amdgcn-func-arg.cpp +++ b/clang/test/CodeGenCXX/amdgcn-func-arg.cpp @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -O0 -triple amdgcn -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -O0 -triple amdgcn -emit-llvm %s -o - | FileCheck %s class A { public: @@ -20,10 +20,10 @@ void func_with_ref_arg(B &b); // CHECK-LABEL: @_Z22func_with_indirect_arg1A( // CHECK-NEXT: entry: -// CHECK-NEXT: [[P:%.*]] = alloca %class.A*, align 8, addrspace(5) -// CHECK-NEXT: [[P_ASCAST:%.*]] = addrspacecast %class.A* addrspace(5)* [[P]] to %class.A** -// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast [[CLASS_A:%.*]] addrspace(5)* [[A:%.*]] to %class.A* -// CHECK-NEXT: store %class.A* [[A_ASCAST]], %class.A** [[P_ASCAST]], align 8 +// CHECK-NEXT: [[P:%.*]] = alloca ptr, align 8, addrspace(5) +// CHECK-NEXT: [[P_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P]] to ptr +// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A:%.*]] to ptr +// CHECK-NEXT: store ptr [[A_ASCAST]], ptr [[P_ASCAST]], align 8 // CHECK-NEXT: ret void // void func_with_indirect_arg(A a) { @@ -34,17 +34,15 @@ void func_with_indirect_arg(A a) { // CHECK-NEXT: entry: // CHECK-NEXT: [[A:%.*]] = alloca [[CLASS_A:%.*]], align 4, addrspace(5) // CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_A]], align 4, addrspace(5) -// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast [[CLASS_A]] addrspace(5)* [[A]] to %class.A* -// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast [[CLASS_A]] addrspace(5)* [[AGG_TMP]] to %class.A* -// CHECK-NEXT: call void @_ZN1AC1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) -// CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.A* [[AGG_TMP_ASCAST]] to i8* -// CHECK-NEXT: [[TMP1:%.*]] = bitcast %class.A* [[A_ASCAST]] to i8* -// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 [[TMP1]], i64 4, i1 false) -// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast %class.A* [[AGG_TMP_ASCAST]] to [[CLASS_A]] addrspace(5)* -// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A([[CLASS_A]] addrspace(5)* noundef [[AGG_TMP_ASCAST_ASCAST]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]]) -// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(%class.A* noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) +// CHECK-NEXT: [[A_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[A]] to ptr +// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[AGG_TMP]] to ptr +// CHECK-NEXT: call void @_ZN1AC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[AGG_TMP_ASCAST]], ptr align 4 [[A_ASCAST]], i64 4, i1 false) +// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast ptr [[AGG_TMP_ASCAST]] to ptr addrspace(5) +// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A(ptr addrspace(5) noundef [[AGG_TMP_ASCAST_ASCAST]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]]) +// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(ptr noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[A_ASCAST]]) // CHECK-NEXT: ret void // void test_indirect_arg_auto() { @@ -56,13 +54,12 @@ void test_indirect_arg_auto() { // CHECK-LABEL: @_Z24test_indirect_arg_globalv( // CHECK-NEXT: entry: // CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_A:%.*]], align 4, addrspace(5) -// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast [[CLASS_A]] addrspace(5)* [[AGG_TMP]] to %class.A* -// CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.A* [[AGG_TMP_ASCAST]] to i8* -// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 addrspacecast (i8 addrspace(1)* bitcast ([[CLASS_A]] addrspace(1)* @g_a to i8 addrspace(1)*) to i8*), i64 4, i1 false) -// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast %class.A* [[AGG_TMP_ASCAST]] to [[CLASS_A]] addrspace(5)* -// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A([[CLASS_A]] addrspace(5)* noundef [[AGG_TMP_ASCAST_ASCAST]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%class.A* noundef nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]]) -// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(%class.A* noundef nonnull align 4 dereferenceable(4) addrspacecast ([[CLASS_A]] addrspace(1)* @g_a to %class.A*)) +// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[AGG_TMP]] to ptr +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[AGG_TMP_ASCAST]], ptr align 4 addrspacecast (ptr addrspace(1) @g_a to ptr), i64 4, i1 false) +// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast ptr [[AGG_TMP_ASCAST]] to ptr addrspace(5) +// CHECK-NEXT: call void @_Z22func_with_indirect_arg1A(ptr addrspace(5) noundef [[AGG_TMP_ASCAST_ASCAST]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[AGG_TMP_ASCAST]]) +// CHECK-NEXT: call void @_Z17func_with_ref_argR1A(ptr noundef nonnull align 4 dereferenceable(4) addrspacecast (ptr addrspace(1) @g_a to ptr)) // CHECK-NEXT: ret void // void test_indirect_arg_global() { @@ -72,10 +69,10 @@ void test_indirect_arg_global() { // CHECK-LABEL: @_Z19func_with_byval_arg1B( // CHECK-NEXT: entry: -// CHECK-NEXT: [[P:%.*]] = alloca %class.B*, align 8, addrspace(5) -// CHECK-NEXT: [[P_ASCAST:%.*]] = addrspacecast %class.B* addrspace(5)* [[P]] to %class.B** -// CHECK-NEXT: [[B_ASCAST:%.*]] = addrspacecast [[CLASS_B:%.*]] addrspace(5)* [[B:%.*]] to %class.B* -// CHECK-NEXT: store %class.B* [[B_ASCAST]], %class.B** [[P_ASCAST]], align 8 +// CHECK-NEXT: [[P:%.*]] = alloca ptr, align 8, addrspace(5) +// CHECK-NEXT: [[P_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[P]] to ptr +// CHECK-NEXT: [[B_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B:%.*]] to ptr +// CHECK-NEXT: store ptr [[B_ASCAST]], ptr [[P_ASCAST]], align 8 // CHECK-NEXT: ret void // void func_with_byval_arg(B b) { @@ -86,14 +83,12 @@ void func_with_byval_arg(B b) { // CHECK-NEXT: entry: // CHECK-NEXT: [[B:%.*]] = alloca [[CLASS_B:%.*]], align 4, addrspace(5) // CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_B]], align 4, addrspace(5) -// CHECK-NEXT: [[B_ASCAST:%.*]] = addrspacecast [[CLASS_B]] addrspace(5)* [[B]] to %class.B* -// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast [[CLASS_B]] addrspace(5)* [[AGG_TMP]] to %class.B* -// CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.B* [[AGG_TMP_ASCAST]] to i8* -// CHECK-NEXT: [[TMP1:%.*]] = bitcast %class.B* [[B_ASCAST]] to i8* -// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 [[TMP1]], i64 400, i1 false) -// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast %class.B* [[AGG_TMP_ASCAST]] to [[CLASS_B]] addrspace(5)* -// CHECK-NEXT: call void @_Z19func_with_byval_arg1B([[CLASS_B]] addrspace(5)* noundef byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]]) -// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(%class.B* noundef nonnull align 4 dereferenceable(400) [[B_ASCAST]]) +// CHECK-NEXT: [[B_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[B]] to ptr +// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[AGG_TMP]] to ptr +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[AGG_TMP_ASCAST]], ptr align 4 [[B_ASCAST]], i64 400, i1 false) +// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast ptr [[AGG_TMP_ASCAST]] to ptr addrspace(5) +// CHECK-NEXT: call void @_Z19func_with_byval_arg1B(ptr addrspace(5) noundef byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]]) +// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(ptr noundef nonnull align 4 dereferenceable(400) [[B_ASCAST]]) // CHECK-NEXT: ret void // void test_byval_arg_auto() { @@ -105,12 +100,11 @@ void test_byval_arg_auto() { // CHECK-LABEL: @_Z21test_byval_arg_globalv( // CHECK-NEXT: entry: // CHECK-NEXT: [[AGG_TMP:%.*]] = alloca [[CLASS_B:%.*]], align 4, addrspace(5) -// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast [[CLASS_B]] addrspace(5)* [[AGG_TMP]] to %class.B* -// CHECK-NEXT: [[TMP0:%.*]] = bitcast %class.B* [[AGG_TMP_ASCAST]] to i8* -// CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[TMP0]], i8* align 4 addrspacecast (i8 addrspace(1)* bitcast ([[CLASS_B]] addrspace(1)* @g_b to i8 addrspace(1)*) to i8*), i64 400, i1 false) -// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast %class.B* [[AGG_TMP_ASCAST]] to [[CLASS_B]] addrspace(5)* -// CHECK-NEXT: call void @_Z19func_with_byval_arg1B([[CLASS_B]] addrspace(5)* noundef byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]]) -// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(%class.B* noundef nonnull align 4 dereferenceable(400) addrspacecast ([[CLASS_B]] addrspace(1)* @g_b to %class.B*)) +// CHECK-NEXT: [[AGG_TMP_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[AGG_TMP]] to ptr +// CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[AGG_TMP_ASCAST]], ptr align 4 addrspacecast (ptr addrspace(1) @g_b to ptr), i64 400, i1 false) +// CHECK-NEXT: [[AGG_TMP_ASCAST_ASCAST:%.*]] = addrspacecast ptr [[AGG_TMP_ASCAST]] to ptr addrspace(5) +// CHECK-NEXT: call void @_Z19func_with_byval_arg1B(ptr addrspace(5) noundef byval([[CLASS_B]]) align 4 [[AGG_TMP_ASCAST_ASCAST]]) +// CHECK-NEXT: call void @_Z17func_with_ref_argR1B(ptr noundef nonnull align 4 dereferenceable(400) addrspacecast (ptr addrspace(1) @g_b to ptr)) // CHECK-NEXT: ret void // void test_byval_arg_global() { diff --git a/clang/test/CodeGenCoroutines/coro-alloc-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-alloc-exp-namespace.cpp index a93a85adfbb370..9377fd9e0e8c7d 100644 --- a/clang/test/CodeGenCoroutines/coro-alloc-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-alloc-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ // RUN: -Wno-coroutine-missing-unhandled-exception -emit-llvm %s -o - -disable-llvm-passes \ // RUN: | FileCheck %s @@ -60,19 +60,19 @@ extern "C" void f0(global_new_delete_tag) { // CHECK: [[AllocBB]]: // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: %[[MEM:.+]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) // CHECK: br label %[[InitBB]] // CHECK: [[InitBB]]: - // CHECK: %[[PHI:.+]] = phi i8* [ null, %{{.+}} ], [ %call, %[[AllocBB]] ] - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin(token %[[ID]], i8* %[[PHI]]) + // CHECK: %[[PHI:.+]] = phi ptr [ null, %{{.+}} ], [ %call, %[[AllocBB]] ] + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin(token %[[ID]], ptr %[[PHI]]) - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: %[[NeedDealloc:.+]] = icmp ne i8* %[[MEM]], null + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: %[[NeedDealloc:.+]] = icmp ne ptr %[[MEM]], null // CHECK: br i1 %[[NeedDealloc]], label %[[FreeBB:.+]], label %[[Afterwards:.+]] // CHECK: [[FreeBB]]: - // CHECK: call void @_ZdlPv(i8* noundef %[[MEM]]) + // CHECK: call void @_ZdlPv(ptr noundef %[[MEM]]) // CHECK: br label %[[Afterwards]] // CHECK: [[Afterwards]]: @@ -97,11 +97,11 @@ struct std::experimental::coroutine_traits { extern "C" void f1(promise_new_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noundef i8* @_ZNSt12experimental16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 noundef %[[SIZE]]) + // CHECK: call noundef ptr @_ZNSt12experimental16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZdlPv(i8* noundef %[[MEM]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: call void @_ZdlPv(ptr noundef %[[MEM]]) co_return; } @@ -121,20 +121,20 @@ struct std::experimental::coroutine_traits { extern "C" void f2(promise_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(i8* noundef %[[MEM]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(ptr noundef %[[MEM]]) co_return; } @@ -201,12 +201,12 @@ struct std::experimental::coroutine_traits { extern "C" void f3(promise_sized_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) // CHECK: %[[SIZE2:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(i8* noundef %[[MEM]], i64 noundef %[[SIZE2]]) + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(ptr noundef %[[MEM]], i64 noundef %[[SIZE2]]) co_return; } @@ -228,20 +228,20 @@ extern "C" int f4(promise_on_alloc_failure_tag) { // CHECK: %[[RetVal:.+]] = alloca i32 // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias noundef i8* @_ZnwmRKSt9nothrow_t(i64 noundef %[[SIZE]], %"struct.std::nothrow_t"* noundef nonnull align 1 dereferenceable(1) @_ZStL7nothrow) - // CHECK: %[[OK:.+]] = icmp ne i8* %[[MEM]], null + // CHECK: %[[MEM:.+]] = call noalias noundef ptr @_ZnwmRKSt9nothrow_t(i64 noundef %[[SIZE]], ptr noundef nonnull align 1 dereferenceable(1) @_ZStL7nothrow) + // CHECK: %[[OK:.+]] = icmp ne ptr %[[MEM]], null // CHECK: br i1 %[[OK]], label %[[OKBB:.+]], label %[[ERRBB:.+]] // CHECK: [[ERRBB]]: // CHECK: %[[FailRet:.+]] = call noundef i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type39get_return_object_on_allocation_failureEv( - // CHECK: store i32 %[[FailRet]], i32* %[[RetVal]] + // CHECK: store i32 %[[FailRet]], ptr %[[RetVal]] // CHECK: br label %[[RetBB:.+]] // CHECK: [[OKBB]]: // CHECK: %[[OkRet:.+]] = call noundef i32 @_ZNSt12experimental16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type17get_return_objectEv( // CHECK: [[RetBB]]: - // CHECK: %[[LoadRet:.+]] = load i32, i32* %[[RetVal]], align 4 + // CHECK: %[[LoadRet:.+]] = load i32, ptr %[[RetVal]], align 4 // CHECK: ret i32 %[[LoadRet]] co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-alloc.cpp b/clang/test/CodeGenCoroutines/coro-alloc.cpp index c16af68664e72e..05b3d56483d0ee 100644 --- a/clang/test/CodeGenCoroutines/coro-alloc.cpp +++ b/clang/test/CodeGenCoroutines/coro-alloc.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 \ +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 \ // RUN: -Wno-coroutine-missing-unhandled-exception -emit-llvm %s -o - -disable-llvm-passes \ // RUN: | FileCheck %s @@ -58,19 +58,19 @@ extern "C" void f0(global_new_delete_tag) { // CHECK: [[AllocBB]]: // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: %[[MEM:.+]] = call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) // CHECK: br label %[[InitBB]] // CHECK: [[InitBB]]: - // CHECK: %[[PHI:.+]] = phi i8* [ null, %{{.+}} ], [ %call, %[[AllocBB]] ] - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin(token %[[ID]], i8* %[[PHI]]) + // CHECK: %[[PHI:.+]] = phi ptr [ null, %{{.+}} ], [ %call, %[[AllocBB]] ] + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin(token %[[ID]], ptr %[[PHI]]) - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: %[[NeedDealloc:.+]] = icmp ne i8* %[[MEM]], null + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: %[[NeedDealloc:.+]] = icmp ne ptr %[[MEM]], null // CHECK: br i1 %[[NeedDealloc]], label %[[FreeBB:.+]], label %[[Afterwards:.+]] // CHECK: [[FreeBB]]: - // CHECK: call void @_ZdlPv(i8* noundef %[[MEM]]) + // CHECK: call void @_ZdlPv(ptr noundef %[[MEM]]) // CHECK: br label %[[Afterwards]] // CHECK: [[Afterwards]]: @@ -95,11 +95,11 @@ struct std::coroutine_traits { extern "C" void f1(promise_new_tag ) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noundef i8* @_ZNSt16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 noundef %[[SIZE]]) + // CHECK: call noundef ptr @_ZNSt16coroutine_traitsIJv15promise_new_tagEE12promise_typenwEm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZdlPv(i8* noundef %[[MEM]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: call void @_ZdlPv(ptr noundef %[[MEM]]) co_return; } @@ -119,20 +119,20 @@ struct std::coroutine_traits { extern "C" void f2(promise_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) - // CHECK: call void @_ZNSt16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(i8* noundef %[[MEM]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) + // CHECK: call void @_ZNSt16coroutine_traitsIJv18promise_delete_tagEE12promise_typedlEPv(ptr noundef %[[MEM]]) co_return; } @@ -199,12 +199,12 @@ struct std::coroutine_traits { extern "C" void f3(promise_sized_delete_tag) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) // CHECK: %[[SIZE2:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call void @_ZNSt16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(i8* noundef %[[MEM]], i64 noundef %[[SIZE2]]) + // CHECK: call void @_ZNSt16coroutine_traitsIJv24promise_sized_delete_tagEE12promise_typedlEPvm(ptr noundef %[[MEM]], i64 noundef %[[SIZE2]]) co_return; } @@ -226,20 +226,20 @@ extern "C" int f4(promise_on_alloc_failure_tag) { // CHECK: %[[RetVal:.+]] = alloca i32 // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: %[[MEM:.+]] = call noalias noundef i8* @_ZnwmRKSt9nothrow_t(i64 noundef %[[SIZE]], %"struct.std::nothrow_t"* noundef nonnull align 1 dereferenceable(1) @_ZStL7nothrow) - // CHECK: %[[OK:.+]] = icmp ne i8* %[[MEM]], null + // CHECK: %[[MEM:.+]] = call noalias noundef ptr @_ZnwmRKSt9nothrow_t(i64 noundef %[[SIZE]], ptr noundef nonnull align 1 dereferenceable(1) @_ZStL7nothrow) + // CHECK: %[[OK:.+]] = icmp ne ptr %[[MEM]], null // CHECK: br i1 %[[OK]], label %[[OKBB:.+]], label %[[ERRBB:.+]] // CHECK: [[ERRBB]]: // CHECK: %[[FailRet:.+]] = call noundef i32 @_ZNSt16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type39get_return_object_on_allocation_failureEv( - // CHECK: store i32 %[[FailRet]], i32* %[[RetVal]] + // CHECK: store i32 %[[FailRet]], ptr %[[RetVal]] // CHECK: br label %[[RetBB:.+]] // CHECK: [[OKBB]]: // CHECK: %[[OkRet:.+]] = call noundef i32 @_ZNSt16coroutine_traitsIJi28promise_on_alloc_failure_tagEE12promise_type17get_return_objectEv( // CHECK: [[RetBB]]: - // CHECK: %[[LoadRet:.+]] = load i32, i32* %[[RetVal]], align 4 + // CHECK: %[[LoadRet:.+]] = load i32, ptr %[[RetVal]], align 4 // CHECK: ret i32 %[[LoadRet]] co_return; } @@ -264,11 +264,11 @@ struct std::coroutine_traits { extern "C" void f5(promise_sized_delete_tag2) { // CHECK: %[[ID:.+]] = call token @llvm.coro.id(i32 16 // CHECK: %[[SIZE:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[SIZE]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[SIZE]]) - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( - // CHECK: %[[MEM:.+]] = call i8* @llvm.coro.free(token %[[ID]], i8* %[[FRAME]]) + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( + // CHECK: %[[MEM:.+]] = call ptr @llvm.coro.free(token %[[ID]], ptr %[[FRAME]]) // CHECK: %[[SIZE2:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call void @_ZNSt16coroutine_traitsIJv25promise_sized_delete_tag2EE12promise_typedlEPvm(i8* noundef %[[MEM]], i64 noundef %[[SIZE2]]) + // CHECK: call void @_ZNSt16coroutine_traitsIJv25promise_sized_delete_tag2EE12promise_typedlEPvm(ptr noundef %[[MEM]], i64 noundef %[[SIZE2]]) co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-await-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-await-exp-namespace.cpp index faa23dd5cde532..6efbaa3e01739a 100644 --- a/clang/test/CodeGenCoroutines/coro-await-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-await-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 \ // RUN: -emit-llvm %s -o - -disable-llvm-passes -Wno-coroutine -Wno-unused | FileCheck %s namespace std { @@ -53,19 +53,19 @@ struct std::experimental::coroutine_traits { // CHECK-LABEL: f0( extern "C" void f0() { - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(ptr // CHECK: %[[INITSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[INITSP_ID]], i1 false) co_await suspend_always{}; // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN14suspend_always11await_readyEv(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE:.+]]) + // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN14suspend_always11await_readyEv(ptr {{[^,]*}} %[[AWAITABLE:.+]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -75,10 +75,10 @@ extern "C" void f0() { // --------------------------- // Build the coroutine handle and pass it to await_suspend // --------------------------- - // CHECK: call i8* @_ZNSt12experimental16coroutine_handleINS_16coroutine_traitsIJvEE12promise_typeEE12from_addressEPv(i8* %[[FRAME]]) - // ... many lines of code to coerce coroutine_handle into an i8* scalar - // CHECK: %[[CH:.+]] = load i8*, i8** %{{.+}} - // CHECK: call void @_ZN14suspend_always13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE]], i8* %[[CH]]) + // CHECK: call ptr @_ZNSt12experimental16coroutine_handleINS_16coroutine_traitsIJvEE12promise_typeEE12from_addressEPv(ptr %[[FRAME]]) + // ... many lines of code to coerce coroutine_handle into an ptr scalar + // CHECK: %[[CH:.+]] = load ptr, ptr %{{.+}} + // CHECK: call void @_ZN14suspend_always13await_suspendENSt12experimental16coroutine_handleIvEE(ptr {{[^,]*}} %[[AWAITABLE]], ptr %[[CH]]) // ------------------------- // Generate a suspend point: // ------------------------- @@ -95,12 +95,12 @@ extern "C" void f0() { // When coroutine is resumed, call await_resume // -------------------------- // CHECK: [[READY_BB]]: - // CHECK: call void @_ZN14suspend_always12await_resumeEv(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: call void @_ZN14suspend_always12await_resumeEv(ptr {{[^,]*}} %[[AWAITABLE]]) // See if final_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NEXT: call zeroext i1 @_ZN10final_susp11await_readyEv(ptr // CHECK: %[[FINALSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[FINALSP_ID]], i1 true) } @@ -127,13 +127,13 @@ struct std::experimental::coroutine_traits { // CHECK-LABEL: f1( extern "C" void f1(int) { // CHECK: %[[PROMISE:.+]] = alloca %"struct.std::experimental::coroutine_traits::promise_type" - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( co_yield 42; - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJviEE12promise_type11yield_valueEi(%struct.suspend_maybe* sret(%struct.suspend_maybe) align 4 %[[AWAITER:.+]], %"struct.std::experimental::coroutine_traits::promise_type"* {{[^,]*}} %[[PROMISE]], i32 42) + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJviEE12promise_type11yield_valueEi(ptr sret(%struct.suspend_maybe) align 4 %[[AWAITER:.+]], ptr {{[^,]*}} %[[PROMISE]], i32 42) // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN13suspend_maybe11await_readyEv(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN13suspend_maybe11await_readyEv(ptr {{[^,]*}} %[[AWAITABLE]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -143,10 +143,10 @@ extern "C" void f1(int) { // --------------------------- // Build the coroutine handle and pass it to await_suspend // --------------------------- - // CHECK: call i8* @_ZNSt12experimental16coroutine_handleINS_16coroutine_traitsIJviEE12promise_typeEE12from_addressEPv(i8* %[[FRAME]]) - // ... many lines of code to coerce coroutine_handle into an i8* scalar - // CHECK: %[[CH:.+]] = load i8*, i8** %{{.+}} - // CHECK: %[[YES:.+]] = call zeroext i1 @_ZN13suspend_maybe13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]], i8* %[[CH]]) + // CHECK: call ptr @_ZNSt12experimental16coroutine_handleINS_16coroutine_traitsIJviEE12promise_typeEE12from_addressEPv(ptr %[[FRAME]]) + // ... many lines of code to coerce coroutine_handle into an ptr scalar + // CHECK: %[[CH:.+]] = load ptr, ptr %{{.+}} + // CHECK: %[[YES:.+]] = call zeroext i1 @_ZN13suspend_maybe13await_suspendENSt12experimental16coroutine_handleIvEE(ptr {{[^,]*}} %[[AWAITABLE]], ptr %[[CH]]) // ------------------------------------------- // See if await_suspend decided not to suspend // ------------------------------------------- @@ -156,7 +156,7 @@ extern "C" void f1(int) { // CHECK: call i8 @llvm.coro.suspend(token %[[SUSPEND_ID]], i1 false) // CHECK: [[READY_BB]]: - // CHECK: call void @_ZN13suspend_maybe12await_resumeEv(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: call void @_ZN13suspend_maybe12await_resumeEv(ptr {{[^,]*}} %[[AWAITABLE]]) } struct ComplexAwaiter { @@ -169,14 +169,14 @@ extern "C" void UseComplex(_Complex float); // CHECK-LABEL: @TestComplex( extern "C" void TestComplex() { UseComplex(co_await ComplexAwaiter{}); - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr // CHECK: call void @UseComplex(<2 x float> %{{.+}}) co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr _Complex float Val = co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr } struct Aggr { @@ -199,22 +199,22 @@ extern "C" void UseAggr(Aggr &&); extern "C" void TestAggr() { UseAggr(co_await AggrAwaiter{}); Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume:.+]], - // CHECK: call void @UseAggr(%struct.Aggr* nonnull align 4 dereferenceable(12) %[[AwaitResume]]) - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume]]) + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume:.+]], + // CHECK: call void @UseAggr(ptr nonnull align 4 dereferenceable(12) %[[AwaitResume]]) + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume]]) // CHECK: call void @Whatever() co_await AggrAwaiter{}; Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume2:.+]], - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume2]]) + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume2:.+]], + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume2]]) // CHECK: call void @Whatever() Aggr Val = co_await AggrAwaiter{}; Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume3:.+]], + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume3:.+]], // CHECK: call void @Whatever() - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume3]]) + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume3]]) } struct ScalarAwaiter { @@ -228,17 +228,17 @@ extern "C" void UseScalar(int); // CHECK-LABEL: @TestScalar( extern "C" void TestScalar() { UseScalar(co_await ScalarAwaiter{}); - // CHECK: %[[Result:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: %[[Result:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr // CHECK: call void @UseScalar(i32 %[[Result]]) int Val = co_await ScalarAwaiter{}; - // CHECK: %[[Result2:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* - // CHECK: store i32 %[[Result2]], i32* %[[TMP_EXPRCLEANUP:.+]], - // CHECK: %[[TMP:.+]] = load i32, i32* %[[TMP_EXPRCLEANUP]], - // CHECK: store i32 %[[TMP]], i32* %Val, + // CHECK: %[[Result2:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr + // CHECK: store i32 %[[Result2]], ptr %[[TMP_EXPRCLEANUP:.+]], + // CHECK: %[[TMP:.+]] = load i32, ptr %[[TMP_EXPRCLEANUP]], + // CHECK: store i32 %[[TMP]], ptr %Val, co_await ScalarAwaiter{}; - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr } // Test operator co_await codegen. @@ -253,21 +253,21 @@ struct MyAgg { extern "C" void TestOpAwait() { co_await MyInt(42); // CHECK: call void @_Zaw5MyInt(i32 42) - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* {{[^,]*}} % + // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr {{[^,]*}} % co_await MyAgg{}; - // CHECK: call void @_ZN5MyAggawEv(%struct.MyAgg* {{[^,]*}} % - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 % + // CHECK: call void @_ZN5MyAggawEv(ptr {{[^,]*}} % + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 % } // CHECK-LABEL: EndlessLoop( extern "C" void EndlessLoop() { - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(ptr for (;;) co_await suspend_always{}; @@ -275,7 +275,7 @@ extern "C" void EndlessLoop() { // Verify that final_suspend was NOT issued: // ---------------------------------- // CHECK-NOT: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NOT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NOT: call zeroext i1 @_ZN10final_susp11await_readyEv(ptr } // Verifies that we don't crash when awaiting on an lvalue. @@ -310,30 +310,30 @@ struct std::experimental::coroutine_traits { void AwaitReturnsLValue(double) { AwaitResumeReturnsLValue a; // CHECK: %[[AVAR:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[XVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[XVAR:.+]] = alloca ptr, - // CHECK: %[[YVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[YVAR:.+]] = alloca ptr, // CHECK-NEXT: %[[TMP1:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[TMP_EXPRCLEANUP1:.+]] = alloca %struct.RefTag*, - // CHECK: %[[ZVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[TMP_EXPRCLEANUP1:.+]] = alloca ptr, + // CHECK: %[[ZVAR:.+]] = alloca ptr, // CHECK-NEXT: %[[TMP2:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[TMP_EXPRCLEANUP2:.+]] = alloca %struct.RefTag*, + // CHECK: %[[TMP_EXPRCLEANUP2:.+]] = alloca ptr, - // CHECK: %[[RES1:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[AVAR]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES1]], %struct.RefTag** %[[XVAR]], + // CHECK: %[[RES1:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[AVAR]]) + // CHECK-NEXT: store ptr %[[RES1]], ptr %[[XVAR]], RefTag &x = co_await a; - // CHECK: %[[RES2:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[TMP1]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES2]], %struct.RefTag** %[[TMP_EXPRCLEANUP1]], - // CHECK: %[[LOAD_TMP1:.+]] = load %struct.RefTag*, %struct.RefTag** %[[TMP_EXPRCLEANUP1]], - // CHECK: store %struct.RefTag* %[[LOAD_TMP1]], %struct.RefTag** %[[YVAR]], + // CHECK: %[[RES2:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[TMP1]]) + // CHECK-NEXT: store ptr %[[RES2]], ptr %[[TMP_EXPRCLEANUP1]], + // CHECK: %[[LOAD_TMP1:.+]] = load ptr, ptr %[[TMP_EXPRCLEANUP1]], + // CHECK: store ptr %[[LOAD_TMP1]], ptr %[[YVAR]], RefTag &y = co_await AwaitResumeReturnsLValue{}; - // CHECK: %[[RES3:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[TMP2]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES3]], %struct.RefTag** %[[TMP_EXPRCLEANUP2]], - // CHECK: %[[LOAD_TMP2:.+]] = load %struct.RefTag*, %struct.RefTag** %[[TMP_EXPRCLEANUP2]], - // CHECK: store %struct.RefTag* %[[LOAD_TMP2]], %struct.RefTag** %[[ZVAR]], + // CHECK: %[[RES3:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[TMP2]]) + // CHECK-NEXT: store ptr %[[RES3]], ptr %[[TMP_EXPRCLEANUP2]], + // CHECK: %[[LOAD_TMP2:.+]] = load ptr, ptr %[[TMP_EXPRCLEANUP2]], + // CHECK: store ptr %[[LOAD_TMP2]], ptr %[[ZVAR]], RefTag &z = co_yield 42; } @@ -347,9 +347,9 @@ struct TailCallAwait { extern "C" void TestTailcall() { co_await TailCallAwait{}; - // CHECK: %[[RESULT:.+]] = call i8* @_ZN13TailCallAwait13await_suspendENSt12experimental16coroutine_handleIvEE(%struct.TailCallAwait* - // CHECK: %[[COERCE:.+]] = getelementptr inbounds %"struct.std::experimental::coroutine_handle", %"struct.std::experimental::coroutine_handle"* %[[TMP:.+]], i32 0, i32 0 - // CHECK: store i8* %[[RESULT]], i8** %[[COERCE]] - // CHECK: %[[ADDR:.+]] = call i8* @_ZNSt12experimental16coroutine_handleIvE7addressEv(%"struct.std::experimental::coroutine_handle"* {{[^,]*}} %[[TMP]]) - // CHECK: call void @llvm.coro.resume(i8* %[[ADDR]]) + // CHECK: %[[RESULT:.+]] = call ptr @_ZN13TailCallAwait13await_suspendENSt12experimental16coroutine_handleIvEE(ptr + // CHECK: %[[COERCE:.+]] = getelementptr inbounds %"struct.std::experimental::coroutine_handle", ptr %[[TMP:.+]], i32 0, i32 0 + // CHECK: store ptr %[[RESULT]], ptr %[[COERCE]] + // CHECK: %[[ADDR:.+]] = call ptr @_ZNSt12experimental16coroutine_handleIvE7addressEv(ptr {{[^,]*}} %[[TMP]]) + // CHECK: call void @llvm.coro.resume(ptr %[[ADDR]]) } diff --git a/clang/test/CodeGenCoroutines/coro-await-resume-eh-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-await-resume-eh-exp-namespace.cpp index aab9fc100e6dcf..380ce751e6c81e 100644 --- a/clang/test/CodeGenCoroutines/coro-await-resume-eh-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-await-resume-eh-exp-namespace.cpp @@ -3,7 +3,7 @@ // executing the handler specified by the promise type's 'unhandled_exception' // member function. // -// RUN: %clang_cc1 -no-opaque-pointers -std=c++14 -fcoroutines-ts \ +// RUN: %clang_cc1 -std=c++14 -fcoroutines-ts \ // RUN: -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s \ // RUN: -fexceptions -fcxx-exceptions -disable-llvm-passes \ // RUN: | FileCheck %s @@ -34,14 +34,14 @@ throwing_task f() { // of 'await_resume' threw an exception. Exceptions thrown in // 'await_resume' are unwound to RESUMELPAD. // CHECK: init.ready: - // CHECK-NEXT: store i1 true, i1* %[[RESUMETHREW:.+]], align 1 + // CHECK-NEXT: store i1 true, ptr %[[RESUMETHREW:.+]], align 1 // CHECK-NEXT: invoke void @_ZN18throwing_awaitable12await_resumeEv // CHECK-NEXT: to label %[[RESUMECONT:.+]] unwind label %[[RESUMELPAD:.+]] // If 'await_resume' does not throw an exception, 'false' is stored in // variable RESUMETHREW. // CHECK: [[RESUMECONT]]: - // CHECK-NEXT: store i1 false, i1* %[[RESUMETHREW]] + // CHECK-NEXT: store i1 false, ptr %[[RESUMETHREW]] // CHECK-NEXT: br label %[[RESUMETRYCONT:.+]] // 'unhandled_exception' is called for the exception thrown in @@ -69,7 +69,7 @@ throwing_task f() { // suspend is executed immediately. Otherwise, the coroutine body is // executed, and then the final suspend. // CHECK: [[CLEANUPCONT]]: - // CHECK-NEXT: %[[RESUMETHREWLOAD:.+]] = load i1, i1* %[[RESUMETHREW]] + // CHECK-NEXT: %[[RESUMETHREWLOAD:.+]] = load i1, ptr %[[RESUMETHREW]] // CHECK-NEXT: br i1 %[[RESUMETHREWLOAD]], label %[[RESUMEDCONT:.+]], label %[[RESUMEDBODY:.+]] // CHECK: [[RESUMEDBODY]]: @@ -109,6 +109,6 @@ noexcept_task g() { // This means that no i1 are stored before or after calling await_resume: // CHECK: init.ready: // CHECK-NEXT: call void @_ZN18noexcept_awaitable12await_resumeEv - // CHECK-NOT: store i1 false, i1* + // CHECK-NOT: store i1 false, ptr co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-await-resume-eh.cpp b/clang/test/CodeGenCoroutines/coro-await-resume-eh.cpp index aa14028244624f..8253337ba73906 100644 --- a/clang/test/CodeGenCoroutines/coro-await-resume-eh.cpp +++ b/clang/test/CodeGenCoroutines/coro-await-resume-eh.cpp @@ -3,7 +3,7 @@ // executing the handler specified by the promise type's 'unhandled_exception' // member function. // -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 \ +// RUN: %clang_cc1 -std=c++20 \ // RUN: -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s \ // RUN: -fexceptions -fcxx-exceptions -disable-llvm-passes \ // RUN: | FileCheck %s @@ -32,14 +32,14 @@ throwing_task f() { // of 'await_resume' threw an exception. Exceptions thrown in // 'await_resume' are unwound to RESUMELPAD. // CHECK: init.ready: - // CHECK-NEXT: store i1 true, i1* %[[RESUMETHREW:.+]], align 1 + // CHECK-NEXT: store i1 true, ptr %[[RESUMETHREW:.+]], align 1 // CHECK-NEXT: invoke void @_ZN18throwing_awaitable12await_resumeEv // CHECK-NEXT: to label %[[RESUMECONT:.+]] unwind label %[[RESUMELPAD:.+]] // If 'await_resume' does not throw an exception, 'false' is stored in // variable RESUMETHREW. // CHECK: [[RESUMECONT]]: - // CHECK-NEXT: store i1 false, i1* %[[RESUMETHREW]] + // CHECK-NEXT: store i1 false, ptr %[[RESUMETHREW]] // CHECK-NEXT: br label %[[RESUMETRYCONT:.+]] // 'unhandled_exception' is called for the exception thrown in @@ -67,7 +67,7 @@ throwing_task f() { // suspend is executed immediately. Otherwise, the coroutine body is // executed, and then the final suspend. // CHECK: [[CLEANUPCONT]]: - // CHECK-NEXT: %[[RESUMETHREWLOAD:.+]] = load i1, i1* %[[RESUMETHREW]] + // CHECK-NEXT: %[[RESUMETHREWLOAD:.+]] = load i1, ptr %[[RESUMETHREW]] // CHECK-NEXT: br i1 %[[RESUMETHREWLOAD]], label %[[RESUMEDCONT:.+]], label %[[RESUMEDBODY:.+]] // CHECK: [[RESUMEDBODY]]: @@ -107,6 +107,6 @@ noexcept_task g() { // This means that no i1 are stored before or after calling await_resume: // CHECK: init.ready: // CHECK-NEXT: call void @_ZN18noexcept_awaitable12await_resumeEv - // CHECK-NOT: store i1 false, i1* + // CHECK-NOT: store i1 false, ptr co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-await.cpp b/clang/test/CodeGenCoroutines/coro-await.cpp index 7685376a9a6dfe..e1c7039469afc2 100644 --- a/clang/test/CodeGenCoroutines/coro-await.cpp +++ b/clang/test/CodeGenCoroutines/coro-await.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -std=c++20 \ +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -std=c++20 \ // RUN: -emit-llvm %s -o - -disable-llvm-passes -Wno-coroutine -Wno-unused | FileCheck %s namespace std { @@ -51,19 +51,19 @@ struct std::coroutine_traits { // CHECK-LABEL: f0( extern "C" void f0() { - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(ptr // CHECK: %[[INITSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[INITSP_ID]], i1 false) co_await suspend_always{}; // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN14suspend_always11await_readyEv(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE:.+]]) + // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN14suspend_always11await_readyEv(ptr {{[^,]*}} %[[AWAITABLE:.+]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -73,10 +73,10 @@ extern "C" void f0() { // --------------------------- // Build the coroutine handle and pass it to await_suspend // --------------------------- - // CHECK: call i8* @_ZNSt16coroutine_handleINSt16coroutine_traitsIJvEE12promise_typeEE12from_addressEPv(i8* %[[FRAME]]) - // ... many lines of code to coerce coroutine_handle into an i8* scalar - // CHECK: %[[CH:.+]] = load i8*, i8** %{{.+}} - // CHECK: call void @_ZN14suspend_always13await_suspendESt16coroutine_handleIvE(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE]], i8* %[[CH]]) + // CHECK: call ptr @_ZNSt16coroutine_handleINSt16coroutine_traitsIJvEE12promise_typeEE12from_addressEPv(ptr %[[FRAME]]) + // ... many lines of code to coerce coroutine_handle into an ptr scalar + // CHECK: %[[CH:.+]] = load ptr, ptr %{{.+}} + // CHECK: call void @_ZN14suspend_always13await_suspendESt16coroutine_handleIvE(ptr {{[^,]*}} %[[AWAITABLE]], ptr %[[CH]]) // ------------------------- // Generate a suspend point: // ------------------------- @@ -93,12 +93,12 @@ extern "C" void f0() { // When coroutine is resumed, call await_resume // -------------------------- // CHECK: [[READY_BB]]: - // CHECK: call void @_ZN14suspend_always12await_resumeEv(%struct.suspend_always* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: call void @_ZN14suspend_always12await_resumeEv(ptr {{[^,]*}} %[[AWAITABLE]]) // See if final_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NEXT: call zeroext i1 @_ZN10final_susp11await_readyEv(ptr // CHECK: %[[FINALSP_ID:.+]] = call token @llvm.coro.save( // CHECK: call i8 @llvm.coro.suspend(token %[[FINALSP_ID]], i1 true) } @@ -125,13 +125,13 @@ struct std::coroutine_traits { // CHECK-LABEL: f1( extern "C" void f1(int) { // CHECK: %[[PROMISE:.+]] = alloca %"struct.std::coroutine_traits::promise_type" - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( co_yield 42; - // CHECK: call void @_ZNSt16coroutine_traitsIJviEE12promise_type11yield_valueEi(%struct.suspend_maybe* sret(%struct.suspend_maybe) align 4 %[[AWAITER:.+]], %"struct.std::coroutine_traits::promise_type"* {{[^,]*}} %[[PROMISE]], i32 42) + // CHECK: call void @_ZNSt16coroutine_traitsIJviEE12promise_type11yield_valueEi(ptr sret(%struct.suspend_maybe) align 4 %[[AWAITER:.+]], ptr {{[^,]*}} %[[PROMISE]], i32 42) // See if we need to suspend: // -------------------------- - // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN13suspend_maybe11await_readyEv(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: %[[READY:.+]] = call zeroext i1 @_ZN13suspend_maybe11await_readyEv(ptr {{[^,]*}} %[[AWAITABLE]]) // CHECK: br i1 %[[READY]], label %[[READY_BB:.+]], label %[[SUSPEND_BB:.+]] // If we are suspending: @@ -141,10 +141,10 @@ extern "C" void f1(int) { // --------------------------- // Build the coroutine handle and pass it to await_suspend // --------------------------- - // CHECK: call i8* @_ZNSt16coroutine_handleINSt16coroutine_traitsIJviEE12promise_typeEE12from_addressEPv(i8* %[[FRAME]]) - // ... many lines of code to coerce coroutine_handle into an i8* scalar - // CHECK: %[[CH:.+]] = load i8*, i8** %{{.+}} - // CHECK: %[[YES:.+]] = call zeroext i1 @_ZN13suspend_maybe13await_suspendESt16coroutine_handleIvE(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]], i8* %[[CH]]) + // CHECK: call ptr @_ZNSt16coroutine_handleINSt16coroutine_traitsIJviEE12promise_typeEE12from_addressEPv(ptr %[[FRAME]]) + // ... many lines of code to coerce coroutine_handle into an ptr scalar + // CHECK: %[[CH:.+]] = load ptr, ptr %{{.+}} + // CHECK: %[[YES:.+]] = call zeroext i1 @_ZN13suspend_maybe13await_suspendESt16coroutine_handleIvE(ptr {{[^,]*}} %[[AWAITABLE]], ptr %[[CH]]) // ------------------------------------------- // See if await_suspend decided not to suspend // ------------------------------------------- @@ -154,7 +154,7 @@ extern "C" void f1(int) { // CHECK: call i8 @llvm.coro.suspend(token %[[SUSPEND_ID]], i1 false) // CHECK: [[READY_BB]]: - // CHECK: call void @_ZN13suspend_maybe12await_resumeEv(%struct.suspend_maybe* {{[^,]*}} %[[AWAITABLE]]) + // CHECK: call void @_ZN13suspend_maybe12await_resumeEv(ptr {{[^,]*}} %[[AWAITABLE]]) } struct ComplexAwaiter { @@ -167,14 +167,14 @@ extern "C" void UseComplex(_Complex float); // CHECK-LABEL: @TestComplex( extern "C" void TestComplex() { UseComplex(co_await ComplexAwaiter{}); - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr // CHECK: call void @UseComplex(<2 x float> %{{.+}}) co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr _Complex float Val = co_await ComplexAwaiter{}; - // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(%struct.ComplexAwaiter* + // CHECK: call <2 x float> @_ZN14ComplexAwaiter12await_resumeEv(ptr } struct Aggr { int X, Y, Z; ~Aggr(); }; @@ -194,22 +194,22 @@ extern "C" void UseAggr(Aggr&&); extern "C" void TestAggr() { UseAggr(co_await AggrAwaiter{}); Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume:.+]], - // CHECK: call void @UseAggr(%struct.Aggr* nonnull align 4 dereferenceable(12) %[[AwaitResume]]) - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume]]) + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume:.+]], + // CHECK: call void @UseAggr(ptr nonnull align 4 dereferenceable(12) %[[AwaitResume]]) + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume]]) // CHECK: call void @Whatever() co_await AggrAwaiter{}; Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume2:.+]], - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume2]]) + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume2:.+]], + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume2]]) // CHECK: call void @Whatever() Aggr Val = co_await AggrAwaiter{}; Whatever(); - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 %[[AwaitResume3:.+]], + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 %[[AwaitResume3:.+]], // CHECK: call void @Whatever() - // CHECK: call void @_ZN4AggrD1Ev(%struct.Aggr* {{[^,]*}} %[[AwaitResume3]]) + // CHECK: call void @_ZN4AggrD1Ev(ptr {{[^,]*}} %[[AwaitResume3]]) } struct ScalarAwaiter { @@ -223,17 +223,17 @@ extern "C" void UseScalar(int); // CHECK-LABEL: @TestScalar( extern "C" void TestScalar() { UseScalar(co_await ScalarAwaiter{}); - // CHECK: %[[Result:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: %[[Result:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr // CHECK: call void @UseScalar(i32 %[[Result]]) int Val = co_await ScalarAwaiter{}; - // CHECK: %[[Result2:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* - // CHECK: store i32 %[[Result2]], i32* %[[TMP_EXPRCLEANUP:.+]], - // CHECK: %[[TMP:.+]] = load i32, i32* %[[TMP_EXPRCLEANUP]], - // CHECK: store i32 %[[TMP]], i32* %Val, + // CHECK: %[[Result2:.+]] = call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr + // CHECK: store i32 %[[Result2]], ptr %[[TMP_EXPRCLEANUP:.+]], + // CHECK: %[[TMP:.+]] = load i32, ptr %[[TMP_EXPRCLEANUP]], + // CHECK: store i32 %[[TMP]], ptr %Val, co_await ScalarAwaiter{}; - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* + // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr } // Test operator co_await codegen. @@ -248,21 +248,21 @@ struct MyAgg { extern "C" void TestOpAwait() { co_await MyInt(42); // CHECK: call void @_Zaw5MyInt(i32 42) - // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(%struct.ScalarAwaiter* {{[^,]*}} % + // CHECK: call i32 @_ZN13ScalarAwaiter12await_resumeEv(ptr {{[^,]*}} % co_await MyAgg{}; - // CHECK: call void @_ZN5MyAggawEv(%struct.MyAgg* {{[^,]*}} % - // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(%struct.Aggr* sret(%struct.Aggr) align 4 % + // CHECK: call void @_ZN5MyAggawEv(ptr {{[^,]*}} % + // CHECK: call void @_ZN11AggrAwaiter12await_resumeEv(ptr sret(%struct.Aggr) align 4 % } // CHECK-LABEL: EndlessLoop( extern "C" void EndlessLoop() { - // CHECK: %[[FRAME:.+]] = call i8* @llvm.coro.begin( + // CHECK: %[[FRAME:.+]] = call ptr @llvm.coro.begin( // See if initial_suspend was issued: // ---------------------------------- // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type15initial_suspendEv( - // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(%struct.init_susp* + // CHECK-NEXT: call zeroext i1 @_ZN9init_susp11await_readyEv(ptr for (;;) co_await suspend_always{}; @@ -270,7 +270,7 @@ extern "C" void EndlessLoop() { // Verify that final_suspend was NOT issued: // ---------------------------------- // CHECK-NOT: call void @_ZNSt16coroutine_traitsIJvEE12promise_type13final_suspendEv( - // CHECK-NOT: call zeroext i1 @_ZN10final_susp11await_readyEv(%struct.final_susp* + // CHECK-NOT: call zeroext i1 @_ZN10final_susp11await_readyEv(ptr } // Verifies that we don't crash when awaiting on an lvalue. @@ -305,30 +305,30 @@ struct std::coroutine_traits { void AwaitReturnsLValue(double) { AwaitResumeReturnsLValue a; // CHECK: %[[AVAR:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[XVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[XVAR:.+]] = alloca ptr, - // CHECK: %[[YVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[YVAR:.+]] = alloca ptr, // CHECK-NEXT: %[[TMP1:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[TMP_EXPRCLEANUP1:.+]] = alloca %struct.RefTag*, - // CHECK: %[[ZVAR:.+]] = alloca %struct.RefTag*, + // CHECK: %[[TMP_EXPRCLEANUP1:.+]] = alloca ptr, + // CHECK: %[[ZVAR:.+]] = alloca ptr, // CHECK-NEXT: %[[TMP2:.+]] = alloca %struct.AwaitResumeReturnsLValue, - // CHECK: %[[TMP_EXPRCLEANUP2:.+]] = alloca %struct.RefTag*, + // CHECK: %[[TMP_EXPRCLEANUP2:.+]] = alloca ptr, - // CHECK: %[[RES1:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[AVAR]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES1]], %struct.RefTag** %[[XVAR]], + // CHECK: %[[RES1:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[AVAR]]) + // CHECK-NEXT: store ptr %[[RES1]], ptr %[[XVAR]], RefTag& x = co_await a; - // CHECK: %[[RES2:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[TMP1]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES2]], %struct.RefTag** %[[TMP_EXPRCLEANUP1]], - // CHECK: %[[LOAD_TMP1:.+]] = load %struct.RefTag*, %struct.RefTag** %[[TMP_EXPRCLEANUP1]], - // CHECK: store %struct.RefTag* %[[LOAD_TMP1]], %struct.RefTag** %[[YVAR]], + // CHECK: %[[RES2:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[TMP1]]) + // CHECK-NEXT: store ptr %[[RES2]], ptr %[[TMP_EXPRCLEANUP1]], + // CHECK: %[[LOAD_TMP1:.+]] = load ptr, ptr %[[TMP_EXPRCLEANUP1]], + // CHECK: store ptr %[[LOAD_TMP1]], ptr %[[YVAR]], RefTag& y = co_await AwaitResumeReturnsLValue{}; - // CHECK: %[[RES3:.+]] = call nonnull align 1 dereferenceable({{.*}}) %struct.RefTag* @_ZN24AwaitResumeReturnsLValue12await_resumeEv(%struct.AwaitResumeReturnsLValue* {{[^,]*}} %[[TMP2]]) - // CHECK-NEXT: store %struct.RefTag* %[[RES3]], %struct.RefTag** %[[TMP_EXPRCLEANUP2]], - // CHECK: %[[LOAD_TMP2:.+]] = load %struct.RefTag*, %struct.RefTag** %[[TMP_EXPRCLEANUP2]], - // CHECK: store %struct.RefTag* %[[LOAD_TMP2]], %struct.RefTag** %[[ZVAR]], + // CHECK: %[[RES3:.+]] = call nonnull align 1 dereferenceable({{.*}}) ptr @_ZN24AwaitResumeReturnsLValue12await_resumeEv(ptr {{[^,]*}} %[[TMP2]]) + // CHECK-NEXT: store ptr %[[RES3]], ptr %[[TMP_EXPRCLEANUP2]], + // CHECK: %[[LOAD_TMP2:.+]] = load ptr, ptr %[[TMP_EXPRCLEANUP2]], + // CHECK: store ptr %[[LOAD_TMP2]], ptr %[[ZVAR]], RefTag& z = co_yield 42; } @@ -342,9 +342,9 @@ struct TailCallAwait { extern "C" void TestTailcall() { co_await TailCallAwait{}; - // CHECK: %[[RESULT:.+]] = call i8* @_ZN13TailCallAwait13await_suspendESt16coroutine_handleIvE(%struct.TailCallAwait* - // CHECK: %[[COERCE:.+]] = getelementptr inbounds %"struct.std::coroutine_handle", %"struct.std::coroutine_handle"* %[[TMP:.+]], i32 0, i32 0 - // CHECK: store i8* %[[RESULT]], i8** %[[COERCE]] - // CHECK: %[[ADDR:.+]] = call i8* @_ZNSt16coroutine_handleIvE7addressEv(%"struct.std::coroutine_handle"* {{[^,]*}} %[[TMP]]) - // CHECK: call void @llvm.coro.resume(i8* %[[ADDR]]) + // CHECK: %[[RESULT:.+]] = call ptr @_ZN13TailCallAwait13await_suspendESt16coroutine_handleIvE(ptr + // CHECK: %[[COERCE:.+]] = getelementptr inbounds %"struct.std::coroutine_handle", ptr %[[TMP:.+]], i32 0, i32 0 + // CHECK: store ptr %[[RESULT]], ptr %[[COERCE]] + // CHECK: %[[ADDR:.+]] = call ptr @_ZNSt16coroutine_handleIvE7addressEv(ptr {{[^,]*}} %[[TMP]]) + // CHECK: call void @llvm.coro.resume(ptr %[[ADDR]]) } diff --git a/clang/test/CodeGenCoroutines/coro-cleanup-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-cleanup-exp-namespace.cpp index 1233790abfa588..03023cc0694d21 100644 --- a/clang/test/CodeGenCoroutines/coro-cleanup-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-cleanup-exp-namespace.cpp @@ -1,5 +1,5 @@ // Verify that coroutine promise and allocated memory are freed up on exception. -// RUN: %clang_cc1 -no-opaque-pointers -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s namespace std::experimental { template struct coroutine_traits; @@ -41,7 +41,7 @@ void may_throw(); // CHECK-LABEL: define{{.*}} void @_Z1fv( void f() { - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 // If promise constructor throws, check that we free the memory. @@ -63,12 +63,12 @@ void f() { // CHECK: [[CatchPad]]: // CHECK-NEXT: landingpad - // CHECK-NEXT: catch i8* null + // CHECK-NEXT: catch ptr null // CHECK: call void @_ZN7CleanupD1Ev( // CHECK: br label %[[Catch:.+]] // CHECK: [[Catch]]: - // CHECK: call i8* @__cxa_begin_catch( + // CHECK: call ptr @__cxa_begin_catch( // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type19unhandled_exceptionEv( // CHECK: invoke void @__cxa_end_catch() // CHECK-NEXT: to label %[[Cont:.+]] unwind @@ -80,12 +80,12 @@ void f() { // CHECK: [[Cleanup]]: // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_typeD1Ev( - // CHECK: %[[Mem0:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem0]] + // CHECK: %[[Mem0:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem0]] // CHECK: [[Dealloc]]: - // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem]]) + // CHECK: %[[Mem:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem]]) co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-cleanup.cpp b/clang/test/CodeGenCoroutines/coro-cleanup.cpp index 06b70853a02a2b..e07876305dabf6 100644 --- a/clang/test/CodeGenCoroutines/coro-cleanup.cpp +++ b/clang/test/CodeGenCoroutines/coro-cleanup.cpp @@ -1,5 +1,5 @@ // Verify that coroutine promise and allocated memory are freed up on exception. -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s namespace std { template struct coroutine_traits; @@ -39,7 +39,7 @@ void may_throw(); // CHECK-LABEL: define{{.*}} void @_Z1fv( void f() { - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 // If promise constructor throws, check that we free the memory. @@ -61,12 +61,12 @@ void f() { // CHECK: [[CatchPad]]: // CHECK-NEXT: landingpad - // CHECK-NEXT: catch i8* null + // CHECK-NEXT: catch ptr null // CHECK: call void @_ZN7CleanupD1Ev( // CHECK: br label %[[Catch:.+]] // CHECK: [[Catch]]: - // CHECK: call i8* @__cxa_begin_catch( + // CHECK: call ptr @__cxa_begin_catch( // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type19unhandled_exceptionEv( // CHECK: invoke void @__cxa_end_catch() // CHECK-NEXT: to label %[[Cont:.+]] unwind @@ -78,12 +78,12 @@ void f() { // CHECK: [[Cleanup]]: // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_typeD1Ev( - // CHECK: %[[Mem0:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem0]] + // CHECK: %[[Mem0:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem0]] // CHECK: [[Dealloc]]: - // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem]]) + // CHECK: %[[Mem:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem]]) co_return; } diff --git a/clang/test/CodeGenCoroutines/coro-dest-slot-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-dest-slot-exp-namespace.cpp index 43862fa1304378..14be9a1d03601a 100644 --- a/clang/test/CodeGenCoroutines/coro-dest-slot-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-dest-slot-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine-exp-namespace.h" @@ -33,7 +33,7 @@ extern "C" coro f(int) { co_return; } // CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv( // CHECK: %[[CLEANUP_DEST1:.+]] = phi i32 [ 0, %[[FINAL_READY]] ], [ 2, %[[FINAL_CLEANUP]] ] // CHECK: %[[CLEANUP_DEST2:.+]] = phi i32 [ %[[CLEANUP_DEST0]], %{{.+}} ], [ %[[CLEANUP_DEST1]], %{{.+}} ], [ 0, %{{.+}} ] -// CHECK: call i8* @llvm.coro.free( +// CHECK: call ptr @llvm.coro.free( // CHECK: switch i32 %[[CLEANUP_DEST2]], label %{{.+}} [ // CHECK-NEXT: i32 0 // CHECK-NEXT: i32 2 diff --git a/clang/test/CodeGenCoroutines/coro-dest-slot.cpp b/clang/test/CodeGenCoroutines/coro-dest-slot.cpp index abdedfb9f68f43..d794c74cd52d61 100644 --- a/clang/test/CodeGenCoroutines/coro-dest-slot.cpp +++ b/clang/test/CodeGenCoroutines/coro-dest-slot.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine.h" @@ -33,7 +33,7 @@ extern "C" coro f(int) { co_return; } // CHECK: call void @_ZNSt13suspend_never12await_resumeEv( // CHECK: %[[CLEANUP_DEST1:.+]] = phi i32 [ 0, %[[FINAL_READY]] ], [ 2, %[[FINAL_CLEANUP]] ] // CHECK: %[[CLEANUP_DEST2:.+]] = phi i32 [ %[[CLEANUP_DEST0]], %{{.+}} ], [ %[[CLEANUP_DEST1]], %{{.+}} ], [ 0, %{{.+}} ] -// CHECK: call i8* @llvm.coro.free( +// CHECK: call ptr @llvm.coro.free( // CHECK: switch i32 %[[CLEANUP_DEST2]], label %{{.+}} [ // CHECK-NEXT: i32 0 // CHECK-NEXT: i32 2 diff --git a/clang/test/CodeGenCoroutines/coro-eh-cleanup-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-eh-cleanup-exp-namespace.cpp index feebef3006d1a1..9ba91e77004fa9 100644 --- a/clang/test/CodeGenCoroutines/coro-eh-cleanup-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-eh-cleanup-exp-namespace.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++1z -fcoroutines-ts -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm %s -o - -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck --check-prefix=CHECK-LPAD %s +// RUN: %clang_cc1 -std=c++1z -fcoroutines-ts -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm %s -o - -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck --check-prefix=CHECK-LPAD %s namespace std::experimental { template struct coroutine_traits { @@ -62,27 +62,27 @@ coro_t f() { // CHECK: [[COROENDBB]]: // CHECK-NEXT: %[[CLPAD:.+]] = cleanuppad within none -// CHECK-NEXT: call i1 @llvm.coro.end(i8* null, i1 true) [ "funclet"(token %[[CLPAD]]) ] +// CHECK-NEXT: call i1 @llvm.coro.end(ptr null, i1 true) [ "funclet"(token %[[CLPAD]]) ] // CHECK-NEXT: cleanupret from %[[CLPAD]] unwind label // CHECK-LPAD: @_Z1fv( // CHECK-LPAD: invoke void @_Z9may_throwv() // CHECK-LPAD: to label %[[CONT:.+]] unwind label %[[EHCLEANUP:.+]] // CHECK-LPAD: [[EHCLEANUP]]: -// CHECK-LPAD: landingpad { i8*, i32 } +// CHECK-LPAD: landingpad { ptr, i32 } // CHECK-LPAD: catch // CHECK-LPAD: call void @_ZN7CleanupD1Ev( -// CHECK-LPAD: call i8* @__cxa_begin_catch +// CHECK-LPAD: call ptr @__cxa_begin_catch // CHECK-LPAD: call void @_ZN6coro_t12promise_type19unhandled_exceptionEv // CHECK-LPAD: invoke void @__cxa_end_catch() // CHECK-LPAD: to label %{{.+}} unwind label %[[UNWINDBB:.+]] // CHECK-LPAD: [[UNWINDBB]]: -// CHECK-LPAD: %[[I1RESUME:.+]] = call i1 @llvm.coro.end(i8* null, i1 true) +// CHECK-LPAD: %[[I1RESUME:.+]] = call i1 @llvm.coro.end(ptr null, i1 true) // CHECK-LPAD: br i1 %[[I1RESUME]], label %[[EHRESUME:.+]], label // CHECK-LPAD: [[EHRESUME]]: -// CHECK-LPAD-NEXT: %[[exn:.+]] = load i8*, i8** %exn.slot, align 8 -// CHECK-LPAD-NEXT: %[[sel:.+]] = load i32, i32* %ehselector.slot, align 4 -// CHECK-LPAD-NEXT: %[[val1:.+]] = insertvalue { i8*, i32 } poison, i8* %[[exn]], 0 -// CHECK-LPAD-NEXT: %[[val2:.+]] = insertvalue { i8*, i32 } %[[val1]], i32 %[[sel]], 1 -// CHECK-LPAD-NEXT: resume { i8*, i32 } %[[val2]] +// CHECK-LPAD-NEXT: %[[exn:.+]] = load ptr, ptr %exn.slot, align 8 +// CHECK-LPAD-NEXT: %[[sel:.+]] = load i32, ptr %ehselector.slot, align 4 +// CHECK-LPAD-NEXT: %[[val1:.+]] = insertvalue { ptr, i32 } poison, ptr %[[exn]], 0 +// CHECK-LPAD-NEXT: %[[val2:.+]] = insertvalue { ptr, i32 } %[[val1]], i32 %[[sel]], 1 +// CHECK-LPAD-NEXT: resume { ptr, i32 } %[[val2]] diff --git a/clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp b/clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp index 756aa453fc315d..c4a6ae96f551e1 100644 --- a/clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp +++ b/clang/test/CodeGenCoroutines/coro-eh-cleanup.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm %s -o - -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck --check-prefix=CHECK-LPAD %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm %s -o - -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck --check-prefix=CHECK-LPAD %s namespace std { template struct coroutine_traits { @@ -60,27 +60,27 @@ coro_t f() { // CHECK: [[COROENDBB]]: // CHECK-NEXT: %[[CLPAD:.+]] = cleanuppad within none -// CHECK-NEXT: call i1 @llvm.coro.end(i8* null, i1 true) [ "funclet"(token %[[CLPAD]]) ] +// CHECK-NEXT: call i1 @llvm.coro.end(ptr null, i1 true) [ "funclet"(token %[[CLPAD]]) ] // CHECK-NEXT: cleanupret from %[[CLPAD]] unwind label // CHECK-LPAD: @_Z1fv( // CHECK-LPAD: invoke void @_Z9may_throwv() // CHECK-LPAD: to label %[[CONT:.+]] unwind label %[[EHCLEANUP:.+]] // CHECK-LPAD: [[EHCLEANUP]]: -// CHECK-LPAD: landingpad { i8*, i32 } +// CHECK-LPAD: landingpad { ptr, i32 } // CHECK-LPAD: catch // CHECK-LPAD: call void @_ZN7CleanupD1Ev( -// CHECK-LPAD: call i8* @__cxa_begin_catch +// CHECK-LPAD: call ptr @__cxa_begin_catch // CHECK-LPAD: call void @_ZN6coro_t12promise_type19unhandled_exceptionEv // CHECK-LPAD: invoke void @__cxa_end_catch() // CHECK-LPAD: to label %{{.+}} unwind label %[[UNWINDBB:.+]] // CHECK-LPAD: [[UNWINDBB]]: -// CHECK-LPAD: %[[I1RESUME:.+]] = call i1 @llvm.coro.end(i8* null, i1 true) +// CHECK-LPAD: %[[I1RESUME:.+]] = call i1 @llvm.coro.end(ptr null, i1 true) // CHECK-LPAD: br i1 %[[I1RESUME]], label %[[EHRESUME:.+]], label // CHECK-LPAD: [[EHRESUME]]: -// CHECK-LPAD-NEXT: %[[exn:.+]] = load i8*, i8** %exn.slot, align 8 -// CHECK-LPAD-NEXT: %[[sel:.+]] = load i32, i32* %ehselector.slot, align 4 -// CHECK-LPAD-NEXT: %[[val1:.+]] = insertvalue { i8*, i32 } poison, i8* %[[exn]], 0 -// CHECK-LPAD-NEXT: %[[val2:.+]] = insertvalue { i8*, i32 } %[[val1]], i32 %[[sel]], 1 -// CHECK-LPAD-NEXT: resume { i8*, i32 } %[[val2]] +// CHECK-LPAD-NEXT: %[[exn:.+]] = load ptr, ptr %exn.slot, align 8 +// CHECK-LPAD-NEXT: %[[sel:.+]] = load i32, ptr %ehselector.slot, align 4 +// CHECK-LPAD-NEXT: %[[val1:.+]] = insertvalue { ptr, i32 } poison, ptr %[[exn]], 0 +// CHECK-LPAD-NEXT: %[[val2:.+]] = insertvalue { ptr, i32 } %[[val1]], i32 %[[sel]], 1 +// CHECK-LPAD-NEXT: resume { ptr, i32 } %[[val2]] diff --git a/clang/test/CodeGenCoroutines/coro-gro-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-gro-exp-namespace.cpp index b58828bfdd553c..bdd2e1149bf0ab 100644 --- a/clang/test/CodeGenCoroutines/coro-gro-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro-exp-namespace.cpp @@ -1,6 +1,6 @@ // Verifies lifetime of __gro local variable // Verify that coroutine promise and allocated memory are freed up on exception. -// RUN: %clang_cc1 -no-opaque-pointers -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++1z -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -disable-llvm-passes | FileCheck %s namespace std::experimental { template struct coroutine_traits; @@ -50,11 +50,11 @@ int f() { // CHECK: %[[RetVal:.+]] = alloca i32 // CHECK: %[[Size:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[Size]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[Size]]) // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_typeC1Ev( - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type17get_return_objectEv(%struct.GroType* sret(%struct.GroType) align {{[0-9]+}} %[[GRO:.+]], + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type17get_return_objectEv(ptr sret(%struct.GroType) align {{[0-9]+}} %[[GRO:.+]], // CHECK: %[[Conv:.+]] = call noundef i32 @_ZN7GroTypecviEv({{.*}}[[GRO]] - // CHECK: store i32 %[[Conv]], i32* %[[RetVal]] + // CHECK: store i32 %[[Conv]], ptr %[[RetVal]] Cleanup cleanup; doSomething(); @@ -67,10 +67,10 @@ int f() { // Destroy promise and free the memory. // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_typeD1Ev( - // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem]]) + // CHECK: %[[Mem:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem]]) // CHECK: coro.ret: - // CHECK: %[[LoadRet:.+]] = load i32, i32* %[[RetVal]] + // CHECK: %[[LoadRet:.+]] = load i32, ptr %[[RetVal]] // CHECK: ret i32 %[[LoadRet]] } diff --git a/clang/test/CodeGenCoroutines/coro-gro.cpp b/clang/test/CodeGenCoroutines/coro-gro.cpp index 40ce751ff098cc..fad75c9433076d 100644 --- a/clang/test/CodeGenCoroutines/coro-gro.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro.cpp @@ -1,6 +1,6 @@ // Verifies lifetime of __gro local variable // Verify that coroutine promise and allocated memory are freed up on exception. -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm -o - %s -disable-llvm-passes | FileCheck %s namespace std { template struct coroutine_traits; @@ -48,11 +48,11 @@ int f() { // CHECK: %[[RetVal:.+]] = alloca i32 // CHECK: %[[Size:.+]] = call i64 @llvm.coro.size.i64() - // CHECK: call noalias noundef nonnull i8* @_Znwm(i64 noundef %[[Size]]) + // CHECK: call noalias noundef nonnull ptr @_Znwm(i64 noundef %[[Size]]) // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_typeC1Ev( - // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_type17get_return_objectEv(%struct.GroType* sret(%struct.GroType) align {{[0-9]+}} %[[GRO:.+]], + // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_type17get_return_objectEv(ptr sret(%struct.GroType) align {{[0-9]+}} %[[GRO:.+]], // CHECK: %[[Conv:.+]] = call noundef i32 @_ZN7GroTypecviEv({{.*}}[[GRO]] - // CHECK: store i32 %[[Conv]], i32* %[[RetVal]] + // CHECK: store i32 %[[Conv]], ptr %[[RetVal]] Cleanup cleanup; doSomething(); @@ -65,10 +65,10 @@ int f() { // Destroy promise and free the memory. // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_typeD1Ev( - // CHECK: %[[Mem:.+]] = call i8* @llvm.coro.free( - // CHECK: call void @_ZdlPv(i8* noundef %[[Mem]]) + // CHECK: %[[Mem:.+]] = call ptr @llvm.coro.free( + // CHECK: call void @_ZdlPv(ptr noundef %[[Mem]]) // CHECK: coro.ret: - // CHECK: %[[LoadRet:.+]] = load i32, i32* %[[RetVal]] + // CHECK: %[[LoadRet:.+]] = load i32, ptr %[[RetVal]] // CHECK: ret i32 %[[LoadRet]] } diff --git a/clang/test/CodeGenCoroutines/coro-gro2-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-gro2-exp-namespace.cpp index 5b73ec083ff73a..10c606450d5bf7 100644 --- a/clang/test/CodeGenCoroutines/coro-gro2-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro2-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine-exp-namespace.h" @@ -33,13 +33,13 @@ struct coro { }; // Verify that the RVO is applied. -// CHECK-LABEL: define{{.*}} void @_Z1fi(%struct.coro* noalias sret(%struct.coro) align 8 %agg.result, i32 noundef %0) +// CHECK-LABEL: define{{.*}} void @_Z1fi(ptr noalias sret(%struct.coro) align 8 %agg.result, i32 noundef %0) coro f(int) { - // CHECK: %call = call noalias noundef nonnull i8* @_Znwm( + // CHECK: %call = call noalias noundef nonnull ptr @_Znwm( // CHECK-NEXT: br label %[[CoroInit:.*]] // CHECK: {{.*}}[[CoroInit]]: - // CHECK: call void @{{.*get_return_objectEv}}(%struct.coro* sret(%struct.coro) align 8 %agg.result + // CHECK: call void @{{.*get_return_objectEv}}(ptr sret(%struct.coro) align 8 %agg.result co_return; } @@ -61,19 +61,19 @@ struct coro_two { }; // Verify that the NRVO is applied to the Gro object. -// CHECK-LABEL: define{{.*}} void @_Z1hi(%struct.coro_two* noalias sret(%struct.coro_two) align 8 %agg.result, i32 noundef %0) +// CHECK-LABEL: define{{.*}} void @_Z1hi(ptr noalias sret(%struct.coro_two) align 8 %agg.result, i32 noundef %0) coro_two h(int) { - // CHECK: %call = call noalias noundef i8* @_ZnwmRKSt9nothrow_t - // CHECK-NEXT: %[[CheckNull:.*]] = icmp ne i8* %call, null + // CHECK: %call = call noalias noundef ptr @_ZnwmRKSt9nothrow_t + // CHECK-NEXT: %[[CheckNull:.*]] = icmp ne ptr %call, null // CHECK-NEXT: br i1 %[[CheckNull]], label %[[InitOnSuccess:.*]], label %[[InitOnFailure:.*]] // CHECK: {{.*}}[[InitOnFailure]]: - // CHECK-NEXT: call void @{{.*get_return_object_on_allocation_failureEv}}(%struct.coro_two* sret(%struct.coro_two) align 8 %agg.result + // CHECK-NEXT: call void @{{.*get_return_object_on_allocation_failureEv}}(ptr sret(%struct.coro_two) align 8 %agg.result // CHECK-NEXT: br label %[[RetLabel:.*]] // CHECK: {{.*}}[[InitOnSuccess]]: - // CHECK: call void @{{.*get_return_objectEv}}(%struct.coro_two* sret(%struct.coro_two) align 8 %agg.result + // CHECK: call void @{{.*get_return_objectEv}}(ptr sret(%struct.coro_two) align 8 %agg.result // CHECK: [[RetLabel]]: // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCoroutines/coro-gro2.cpp b/clang/test/CodeGenCoroutines/coro-gro2.cpp index ba3fc9b884d81c..bb52d21af746cc 100644 --- a/clang/test/CodeGenCoroutines/coro-gro2.cpp +++ b/clang/test/CodeGenCoroutines/coro-gro2.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine.h" @@ -34,13 +34,13 @@ struct coro { }; // Verify that the RVO is applied. -// CHECK-LABEL: define{{.*}} void @_Z1fi(%struct.coro* noalias sret(%struct.coro) align 8 %agg.result, i32 noundef %0) +// CHECK-LABEL: define{{.*}} void @_Z1fi(ptr noalias sret(%struct.coro) align 8 %agg.result, i32 noundef %0) coro f(int) { -// CHECK: %call = call noalias noundef nonnull i8* @_Znwm( +// CHECK: %call = call noalias noundef nonnull ptr @_Znwm( // CHECK-NEXT: br label %[[CoroInit:.*]] // CHECK: {{.*}}[[CoroInit]]: -// CHECK: call void @{{.*get_return_objectEv}}(%struct.coro* sret(%struct.coro) align 8 %agg.result +// CHECK: call void @{{.*get_return_objectEv}}(ptr sret(%struct.coro) align 8 %agg.result co_return; } @@ -63,19 +63,19 @@ struct coro_two { }; // Verify that the RVO is applied. -// CHECK-LABEL: define{{.*}} void @_Z1hi(%struct.coro_two* noalias sret(%struct.coro_two) align 8 %agg.result, i32 noundef %0) +// CHECK-LABEL: define{{.*}} void @_Z1hi(ptr noalias sret(%struct.coro_two) align 8 %agg.result, i32 noundef %0) coro_two h(int) { - // CHECK: %call = call noalias noundef i8* @_ZnwmRKSt9nothrow_t - // CHECK-NEXT: %[[CheckNull:.*]] = icmp ne i8* %call, null + // CHECK: %call = call noalias noundef ptr @_ZnwmRKSt9nothrow_t + // CHECK-NEXT: %[[CheckNull:.*]] = icmp ne ptr %call, null // CHECK-NEXT: br i1 %[[CheckNull]], label %[[InitOnSuccess:.*]], label %[[InitOnFailure:.*]] // CHECK: {{.*}}[[InitOnFailure]]: - // CHECK-NEXT: call void @{{.*get_return_object_on_allocation_failureEv}}(%struct.coro_two* sret(%struct.coro_two) align 8 %agg.result + // CHECK-NEXT: call void @{{.*get_return_object_on_allocation_failureEv}}(ptr sret(%struct.coro_two) align 8 %agg.result // CHECK-NEXT: br label %[[RetLabel:.*]] // CHECK: {{.*}}[[InitOnSuccess]]: - // CHECK: call void @{{.*get_return_objectEv}}(%struct.coro_two* sret(%struct.coro_two) align 8 %agg.result + // CHECK: call void @{{.*get_return_objectEv}}(ptr sret(%struct.coro_two) align 8 %agg.result // CHECK: [[RetLabel]]: // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenCoroutines/coro-halo.cpp b/clang/test/CodeGenCoroutines/coro-halo.cpp index 14ae53c41aebee..6244f130b7be23 100644 --- a/clang/test/CodeGenCoroutines/coro-halo.cpp +++ b/clang/test/CodeGenCoroutines/coro-halo.cpp @@ -1,5 +1,5 @@ // This tests that the coroutine heap allocation elision optimization could happen succesfully. -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 -O2 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -O2 -emit-llvm %s -o - | FileCheck %s #include "Inputs/coroutine.h" #include "Inputs/numeric.h" diff --git a/clang/test/CodeGenCoroutines/coro-promise-dtor-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-promise-dtor-exp-namespace.cpp index 75c0e29c3eaf36..30b655c03bb2b4 100644 --- a/clang/test/CodeGenCoroutines/coro-promise-dtor-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-promise-dtor-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++14 -fcoroutines-ts -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++14 -fcoroutines-ts -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s // -triple=x86_64-unknown-linux-gnu #include "Inputs/coroutine-exp-namespace.h" @@ -32,7 +32,7 @@ coro_t f() { // CHECK-LABEL: define dso_local void @"?f@@YA?AUcoro_t@@XZ"( -// CHECK: invoke noundef %"struct.coro_t::promise_type"* @"??0promise_type@coro_t@@QEAA@XZ"( +// CHECK: invoke noundef ptr @"??0promise_type@coro_t@@QEAA@XZ"( // CHECK: invoke void @"?get_return_object@promise_type@coro_t@@QEAA?AU2@XZ"( // CHECK: call void @"??1promise_type@coro_t@@QEAA@XZ" diff --git a/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp b/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp index 5371b7d9772b92..afaaf876a81035 100644 --- a/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp +++ b/clang/test/CodeGenCoroutines/coro-promise-dtor.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-pc-windows-msvc18.0.0 -emit-llvm -o - %s -fexceptions -fcxx-exceptions -disable-llvm-passes | FileCheck %s // -triple=x86_64-unknown-linux-gnu #include "Inputs/coroutine.h" @@ -28,7 +28,7 @@ coro_t f() { // CHECK-LABEL: define dso_local void @"?f@@YA?AUcoro_t@@XZ"( -// CHECK: invoke noundef %"struct.coro_t::promise_type"* @"??0promise_type@coro_t@@QEAA@XZ"( +// CHECK: invoke noundef ptr @"??0promise_type@coro_t@@QEAA@XZ"( // CHECK: invoke void @"?get_return_object@promise_type@coro_t@@QEAA?AU2@XZ"( // CHECK: call void @"??1promise_type@coro_t@@QEAA@XZ" diff --git a/clang/test/CodeGenCoroutines/coro-ret-void-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-ret-void-exp-namespace.cpp index 9968aa03eaa175..44c09616097f8a 100644 --- a/clang/test/CodeGenCoroutines/coro-ret-void-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-ret-void-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++14 -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++14 -fcoroutines-ts -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine-exp-namespace.h" @@ -18,8 +18,8 @@ coro1 f() { } // CHECK-LABEL: define{{.*}} void @_Z1fv( -// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"* -// CHECK: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* {{[^,]*}} %__promise) +// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(ptr +// CHECK: call void @_ZN5coro112promise_type11return_voidEv(ptr {{[^,]*}} %__promise) struct A { A(); @@ -31,9 +31,9 @@ coro1 f2() { } // CHECK-LABEL: define{{.*}} void @_Z2f2v( -// CHECK: call void @_ZN1AC1Ev(%struct.A* {{[^,]*}} %[[AVar:.*]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%struct.A* {{[^,]*}} %[[AVar]]) -// CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* +// CHECK: call void @_ZN1AC1Ev(ptr {{[^,]*}} %[[AVar:.*]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr {{[^,]*}} %[[AVar]]) +// CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(ptr struct coro2 { struct promise_type { @@ -49,5 +49,5 @@ coro2 g() { } // CHECK-LABEL: define{{.*}} void @_Z1gv( -// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(%"struct.std::experimental::coroutines_v1::suspend_never"* -// CHECK: call void @_ZN5coro212promise_type12return_valueEi(%"struct.coro2::promise_type"* {{[^,]*}} %__promise, i32 noundef 42) +// CHECK: call void @_ZNSt12experimental13coroutines_v113suspend_never12await_resumeEv(ptr +// CHECK: call void @_ZN5coro212promise_type12return_valueEi(ptr {{[^,]*}} %__promise, i32 noundef 42) diff --git a/clang/test/CodeGenCoroutines/coro-ret-void.cpp b/clang/test/CodeGenCoroutines/coro-ret-void.cpp index ae139afabc4d45..73caba114cc600 100644 --- a/clang/test/CodeGenCoroutines/coro-ret-void.cpp +++ b/clang/test/CodeGenCoroutines/coro-ret-void.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -std=c++20 -triple=x86_64-unknown-linux-gnu -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s #include "Inputs/coroutine.h" @@ -17,8 +17,8 @@ coro1 f() { } // CHECK-LABEL: define{{.*}} void @_Z1fv( -// CHECK: call void @_ZNSt13suspend_never12await_resumeEv(%"struct.std::suspend_never"* -// CHECK: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* {{[^,]*}} %__promise) +// CHECK: call void @_ZNSt13suspend_never12await_resumeEv(ptr +// CHECK: call void @_ZN5coro112promise_type11return_voidEv(ptr {{[^,]*}} %__promise) struct A { A(); @@ -30,9 +30,9 @@ coro1 f2() { } // CHECK-LABEL: define{{.*}} void @_Z2f2v( -// CHECK: call void @_ZN1AC1Ev(%struct.A* {{[^,]*}} %[[AVar:.*]]) -// CHECK-NEXT: call void @_ZN1AD1Ev(%struct.A* {{[^,]*}} %[[AVar]]) -// CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(%"struct.coro1::promise_type"* +// CHECK: call void @_ZN1AC1Ev(ptr {{[^,]*}} %[[AVar:.*]]) +// CHECK-NEXT: call void @_ZN1AD1Ev(ptr {{[^,]*}} %[[AVar]]) +// CHECK-NEXT: call void @_ZN5coro112promise_type11return_voidEv(ptr struct coro2 { struct promise_type { @@ -49,5 +49,5 @@ coro2 g() { } // CHECK-LABEL: define{{.*}} void @_Z1gv( -// CHECK: call void @_ZNSt13suspend_never12await_resumeEv(%"struct.std::suspend_never"* -// CHECK: call void @_ZN5coro212promise_type12return_valueEi(%"struct.coro2::promise_type"* {{[^,]*}} %__promise, i32 noundef 42) +// CHECK: call void @_ZNSt13suspend_never12await_resumeEv(ptr +// CHECK: call void @_ZN5coro212promise_type12return_valueEi(ptr {{[^,]*}} %__promise, i32 noundef 42) diff --git a/clang/test/CodeGenCoroutines/coro-return-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-return-exp-namespace.cpp index 7ab8d2c3dd4e20..39de61067e2c1f 100644 --- a/clang/test/CodeGenCoroutines/coro-return-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-return-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++1z -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++1z -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s namespace std::experimental { template struct coroutine_traits; @@ -33,8 +33,8 @@ template <> struct std::experimental::coroutine_traits { // CHECK-LABEL: f0( extern "C" void f0() { // CHECK: %__promise = alloca %"struct.std::experimental::coroutine_traits::promise_type" - // CHECK: %call = call noalias noundef nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type11return_voidEv(%"struct.std::experimental::coroutine_traits::promise_type"* {{[^,]*}} %__promise) + // CHECK: %call = call noalias noundef nonnull ptr @_Znwm( + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJvEE12promise_type11return_voidEv(ptr {{[^,]*}} %__promise) // CHECK: call void @_ZdlPv co_return; } @@ -52,8 +52,8 @@ struct std::experimental::coroutine_traits { // CHECK-LABEL: f1( extern "C" int f1() { // CHECK: %__promise = alloca %"struct.std::experimental::coroutine_traits::promise_type" - // CHECK: %call = call noalias noundef nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type12return_valueEi(%"struct.std::experimental::coroutine_traits::promise_type"* {{[^,]*}} %__promise, i32 noundef 42) + // CHECK: %call = call noalias noundef nonnull ptr @_Znwm( + // CHECK: call void @_ZNSt12experimental16coroutine_traitsIJiEE12promise_type12return_valueEi(ptr {{[^,]*}} %__promise, i32 noundef 42) // CHECK: call void @_ZdlPv co_return 42; } diff --git a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist-exp-namespace.cpp index 2751baebf2625a..fbcab6386103ca 100644 --- a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++1z -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++1z -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s namespace std { template @@ -72,7 +72,7 @@ template f>> J::bo() { std::c bu; int bw(0); - // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(%struct.j* {{[^,]*}} %__promise) + // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(ptr {{[^,]*}} %__promise) co_return {0, co_await ax(bu, bw)}; } void bh() { diff --git a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp index b6cac61031598b..66dfdedf958e3f 100644 --- a/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp +++ b/clang/test/CodeGenCoroutines/coro-return-voidtype-initlist.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s namespace std { template @@ -70,7 +70,7 @@ template f>> J::bo() { std::c bu; int bw(0); - // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(%struct.j* {{[^,]*}} %__promise) + // CHECK: void @_ZN1j12return_valueESt1bISt1cIiiEE(ptr {{[^,]*}} %__promise) co_return{0, co_await ax(bu, bw)}; } void bh() { diff --git a/clang/test/CodeGenCoroutines/coro-return.cpp b/clang/test/CodeGenCoroutines/coro-return.cpp index b6260bbcc6c467..6f6cd712aa6fbb 100644 --- a/clang/test/CodeGenCoroutines/coro-return.cpp +++ b/clang/test/CodeGenCoroutines/coro-return.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s namespace std { template struct coroutine_traits; @@ -33,8 +33,8 @@ template <> struct std::coroutine_traits { // CHECK-LABEL: f0( extern "C" void f0() { // CHECK: %__promise = alloca %"struct.std::coroutine_traits::promise_type" - // CHECK: %call = call noalias noundef nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type11return_voidEv(%"struct.std::coroutine_traits::promise_type"* {{[^,]*}} %__promise) + // CHECK: %call = call noalias noundef nonnull ptr @_Znwm( + // CHECK: call void @_ZNSt16coroutine_traitsIJvEE12promise_type11return_voidEv(ptr {{[^,]*}} %__promise) // CHECK: call void @_ZdlPv co_return; } @@ -52,8 +52,8 @@ struct std::coroutine_traits { // CHECK-LABEL: f1( extern "C" int f1() { // CHECK: %__promise = alloca %"struct.std::coroutine_traits::promise_type" - // CHECK: %call = call noalias noundef nonnull i8* @_Znwm( - // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_type12return_valueEi(%"struct.std::coroutine_traits::promise_type"* {{[^,]*}} %__promise, i32 noundef 42) + // CHECK: %call = call noalias noundef nonnull ptr @_Znwm( + // CHECK: call void @_ZNSt16coroutine_traitsIJiEE12promise_type12return_valueEi(ptr {{[^,]*}} %__promise, i32 noundef 42) // CHECK: call void @_ZdlPv co_return 42; } diff --git a/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01-exp-namespace.cpp b/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01-exp-namespace.cpp index 77da8f7720ab6e..c60c2e0e271a7f 100644 --- a/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01-exp-namespace.cpp +++ b/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01-exp-namespace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -O0 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-unknown-linux-gnu -fcoroutines-ts -std=c++14 -O0 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s // RUN: %clang -fcoroutines-ts -std=c++14 -O0 -emit-llvm -c %s -o %t -Xclang -disable-llvm-passes && %clang -c %t #include "Inputs/coroutine-exp-namespace.h" @@ -51,13 +51,11 @@ detached_task foo() { // check that the lifetime of the coroutine handle used to obtain the address is contained within single basic block, and hence does not live across suspension points. // CHECK-LABEL: final.suspend: -// CHECK: %{{.+}} = call token @llvm.coro.save(i8* null) -// CHECK: %[[HDL_CAST1:.+]] = bitcast %"struct.std::experimental::coroutines_v1::coroutine_handle.0"* %[[HDL:.+]] to i8* -// CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* %[[HDL_CAST1]]) -// CHECK: %[[CALL:.+]] = call i8* @_ZN13detached_task12promise_type13final_awaiter13await_suspendENSt12experimental13coroutines_v116coroutine_handleIS0_EE( -// CHECK: %[[HDL_CAST2:.+]] = getelementptr inbounds %"struct.std::experimental::coroutines_v1::coroutine_handle.0", %"struct.std::experimental::coroutines_v1::coroutine_handle.0"* %[[HDL]], i32 0, i32 0 -// CHECK: store i8* %[[CALL]], i8** %[[HDL_CAST2]], align 8 -// CHECK: %[[HDL_TRANSFER:.+]] = call i8* @_ZNKSt12experimental13coroutines_v116coroutine_handleIvE7addressEv(%"struct.std::experimental::coroutines_v1::coroutine_handle.0"* nonnull align 8 dereferenceable(8) %[[HDL]]) -// CHECK: %[[HDL_CAST3:.+]] = bitcast %"struct.std::experimental::coroutines_v1::coroutine_handle.0"* %[[HDL]] to i8* -// CHECK: call void @llvm.lifetime.end.p0i8(i64 8, i8* %[[HDL_CAST3]]) -// CHECK: call void @llvm.coro.resume(i8* %[[HDL_TRANSFER]]) +// CHECK: %{{.+}} = call token @llvm.coro.save(ptr null) +// CHECK: call void @llvm.lifetime.start.p0(i64 8, ptr %[[HDL:.+]]) +// CHECK: %[[CALL:.+]] = call ptr @_ZN13detached_task12promise_type13final_awaiter13await_suspendENSt12experimental13coroutines_v116coroutine_handleIS0_EE( +// CHECK: %[[HDL_CAST2:.+]] = getelementptr inbounds %"struct.std::experimental::coroutines_v1::coroutine_handle.0", ptr %[[HDL]], i32 0, i32 0 +// CHECK: store ptr %[[CALL]], ptr %[[HDL_CAST2]], align 8 +// CHECK: %[[HDL_TRANSFER:.+]] = call ptr @_ZNKSt12experimental13coroutines_v116coroutine_handleIvE7addressEv(ptr nonnull align 8 dereferenceable(8) %[[HDL]]) +// CHECK: call void @llvm.lifetime.end.p0(i64 8, ptr %[[HDL]]) +// CHECK: call void @llvm.coro.resume(ptr %[[HDL_TRANSFER]]) diff --git a/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01.cpp b/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01.cpp index 79c8d48c3c4781..c0b9e9ee2c5581 100644 --- a/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01.cpp +++ b/clang/test/CodeGenCoroutines/coro-symmetric-transfer-01.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -std=c++20 -O0 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -std=c++20 -O0 -emit-llvm %s -o - -disable-llvm-passes | FileCheck %s // RUN: %clang -std=c++20 -O0 -emit-llvm -c %s -o %t -Xclang -disable-llvm-passes && %clang -c %t #include "Inputs/coroutine.h" @@ -49,13 +49,11 @@ detached_task foo() { // check that the lifetime of the coroutine handle used to obtain the address is contained within single basic block, and hence does not live across suspension points. // CHECK-LABEL: final.suspend: -// CHECK: %{{.+}} = call token @llvm.coro.save(i8* null) -// CHECK: %[[HDL_CAST1:.+]] = bitcast %"struct.std::coroutine_handle.0"* %[[HDL:.+]] to i8* -// CHECK: call void @llvm.lifetime.start.p0i8(i64 8, i8* %[[HDL_CAST1]]) -// CHECK: %[[CALL:.+]] = call i8* @_ZN13detached_task12promise_type13final_awaiter13await_suspendESt16coroutine_handleIS0_E( -// CHECK: %[[HDL_CAST2:.+]] = getelementptr inbounds %"struct.std::coroutine_handle.0", %"struct.std::coroutine_handle.0"* %[[HDL]], i32 0, i32 0 -// CHECK: store i8* %[[CALL]], i8** %[[HDL_CAST2]], align 8 -// CHECK: %[[HDL_TRANSFER:.+]] = call noundef i8* @_ZNKSt16coroutine_handleIvE7addressEv(%"struct.std::coroutine_handle.0"* noundef {{.*}}%[[HDL]]) -// CHECK: %[[HDL_CAST3:.+]] = bitcast %"struct.std::coroutine_handle.0"* %[[HDL]] to i8* -// CHECK: call void @llvm.lifetime.end.p0i8(i64 8, i8* %[[HDL_CAST3]]) -// CHECK: call void @llvm.coro.resume(i8* %[[HDL_TRANSFER]]) +// CHECK: %{{.+}} = call token @llvm.coro.save(ptr null) +// CHECK: call void @llvm.lifetime.start.p0(i64 8, ptr %[[HDL:.+]]) +// CHECK: %[[CALL:.+]] = call ptr @_ZN13detached_task12promise_type13final_awaiter13await_suspendESt16coroutine_handleIS0_E( +// CHECK: %[[HDL_CAST2:.+]] = getelementptr inbounds %"struct.std::coroutine_handle.0", ptr %[[HDL]], i32 0, i32 0 +// CHECK: store ptr %[[CALL]], ptr %[[HDL_CAST2]], align 8 +// CHECK: %[[HDL_TRANSFER:.+]] = call noundef ptr @_ZNKSt16coroutine_handleIvE7addressEv(ptr noundef {{.*}}%[[HDL]]) +// CHECK: call void @llvm.lifetime.end.p0(i64 8, ptr %[[HDL]]) +// CHECK: call void @llvm.coro.resume(ptr %[[HDL_TRANSFER]]) diff --git a/clang/test/CodeGenHIP/hipspv-addr-spaces.cpp b/clang/test/CodeGenHIP/hipspv-addr-spaces.cpp index 486e1606e7ba31..9fcdc460482e7e 100644 --- a/clang/test/CodeGenHIP/hipspv-addr-spaces.cpp +++ b/clang/test/CodeGenHIP/hipspv-addr-spaces.cpp @@ -1,11 +1,11 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple spirv64 -x hip -emit-llvm -fcuda-is-device \ +// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \ // RUN: -o - %s | FileCheck %s #define __device__ __attribute__((device)) #define __shared__ __attribute__((shared)) #define __constant__ __attribute__((constant)) -// CHECK: %struct.foo_t = type { i32, i32 addrspace(4)* } +// CHECK: %struct.foo_t = type { i32, ptr addrspace(4) } // CHECK: @d ={{.*}} addrspace(1) externally_initialized global __device__ int d; @@ -25,30 +25,30 @@ __device__ struct foo_t { // Check literals are placed in address space 1 (CrossWorkGroup/__global). // CHECK: @.str ={{.*}} unnamed_addr addrspace(1) constant -// CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z3barPi(i32 addrspace(4)* +// CHECK: define{{.*}} spir_func noundef ptr addrspace(4) @_Z3barPi(ptr addrspace(4) __device__ int* bar(int *x) { return x; } -// CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z5baz_dv() +// CHECK: define{{.*}} spir_func noundef ptr addrspace(4) @_Z5baz_dv() __device__ int* baz_d() { - // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @d to i32 addrspace(4)* + // CHECK: ret ptr addrspace(4) addrspacecast (ptr addrspace(1) @d to ptr addrspace(4) return &d; } -// CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z5baz_cv() +// CHECK: define{{.*}} spir_func noundef ptr addrspace(4) @_Z5baz_cv() __device__ int* baz_c() { - // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(1)* @c to i32 addrspace(4)* + // CHECK: ret ptr addrspace(4) addrspacecast (ptr addrspace(1) @c to ptr addrspace(4) return &c; } -// CHECK: define{{.*}} spir_func noundef i32 addrspace(4)* @_Z5baz_sv() +// CHECK: define{{.*}} spir_func noundef ptr addrspace(4) @_Z5baz_sv() __device__ int* baz_s() { - // CHECK: ret i32 addrspace(4)* addrspacecast (i32 addrspace(3)* @s to i32 addrspace(4)* + // CHECK: ret ptr addrspace(4) addrspacecast (ptr addrspace(3) @s to ptr addrspace(4) return &s; } -// CHECK: define{{.*}} spir_func noundef i8 addrspace(4)* @_Z3quzv() +// CHECK: define{{.*}} spir_func noundef ptr addrspace(4) @_Z3quzv() __device__ const char* quz() { return "abc"; } diff --git a/clang/test/CodeGenHIP/hipspv-kernel.cpp b/clang/test/CodeGenHIP/hipspv-kernel.cpp index cc4fd30a0fbd27..b9a6df12c79688 100644 --- a/clang/test/CodeGenHIP/hipspv-kernel.cpp +++ b/clang/test/CodeGenHIP/hipspv-kernel.cpp @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple spirv64 -x hip -emit-llvm -fcuda-is-device \ +// RUN: %clang_cc1 -triple spirv64 -x hip -emit-llvm -fcuda-is-device \ // RUN: -o - %s | FileCheck %s #define __global__ __attribute__((global)) -// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(float addrspace(1)* {{.*}}, float {{.*}}) +// CHECK: define {{.*}}spir_kernel void @_Z3fooPff(ptr addrspace(1) {{.*}}, float {{.*}}) __global__ void foo(float *a, float b) { *a = b; } diff --git a/clang/test/CodeGenHIP/printf.cpp b/clang/test/CodeGenHIP/printf.cpp index b9146310ddd0d5..8c8b801dbbf560 100644 --- a/clang/test/CodeGenHIP/printf.cpp +++ b/clang/test/CodeGenHIP/printf.cpp @@ -1,5 +1,5 @@ // REQUIRES: amdgpu-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -triple amdgcn-amd-amdhsa -x hip -emit-llvm -fcuda-is-device \ +// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -x hip -emit-llvm -fcuda-is-device \ // RUN: -o - %s | FileCheck --enable-var-scope %s #define __device__ __attribute__((device)) @@ -21,7 +21,7 @@ __device__ int foo1() { // CHECK: [[APPEND5:%.*]] = call i64 @__ockl_printf_append_args(i64 [[APPEND4]], i32 1, i64 4, i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i32 0) // CHECK: [[STRLEN2:%.*]] = phi i64 [ %{{[^,]*}}, %{{[^ ]*}} ], [ 0, %{{[^ ]*}} ] // CHECK: [[APPEND6:%.*]] = call i64 @__ockl_printf_append_string_n(i64 [[APPEND5]], {{.*}}, i64 [[STRLEN2]], i32 0) -// CHECK: [[PTR2INT:%.*]] = ptrtoint i8* %{{.*}} to i64 +// CHECK: [[PTR2INT:%.*]] = ptrtoint ptr %{{.*}} to i64 // CHECK: [[APPEND7:%.*]] = call i64 @__ockl_printf_append_args(i64 [[APPEND6]], i32 1, i64 [[PTR2INT]], i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i32 1) // CHECK: [[RETURN:%.*]] = trunc i64 [[APPEND7]] to i32 // CHECK: ret i32 [[RETURN]] @@ -38,7 +38,7 @@ __device__ int foo2() { // CHECK: [[APPEND1:%.*]] = call i64 @__ockl_printf_append_string_n(i64 [[BEGIN]], {{.*}}, i64 [[STRLEN1]], i32 0) // CHECK: [[STRLEN2:%.*]] = phi i64 [ %{{[^,]*}}, %{{[^ ]*}} ], [ 0, %{{[^ ]*}} ] // CHECK: [[APPEND2:%.*]] = call i64 @__ockl_printf_append_string_n(i64 [[APPEND1]], {{.*}}, i64 [[STRLEN2]], i32 0) -// CHECK: [[PTR2INT:%.*]] = ptrtoint i8* %{{.*}} to i64 +// CHECK: [[PTR2INT:%.*]] = ptrtoint ptr %{{.*}} to i64 // CHECK: [[APPEND3:%.*]] = call i64 @__ockl_printf_append_args(i64 [[APPEND2]], i32 1, i64 [[PTR2INT]], i64 0, i64 0, i64 0, i64 0, i64 0, i64 0, i32 1) // CHECK: [[RETURN:%.*]] = trunc i64 [[APPEND3]] to i32 // CHECK: ret i32 [[RETURN]] diff --git a/clang/test/CodeGenObjC/2010-02-01-utf16-with-null.m b/clang/test/CodeGenObjC/2010-02-01-utf16-with-null.m index 290b7a3eac0c39..811e8a3a4ea11f 100644 --- a/clang/test/CodeGenObjC/2010-02-01-utf16-with-null.m +++ b/clang/test/CodeGenObjC/2010-02-01-utf16-with-null.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-apple-darwin -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple i686-apple-darwin -emit-llvm %s -o - | FileCheck %s // rdar://7589850 // CHECK: @.str = private unnamed_addr constant [9 x i16] [i16 103, i16 111, i16 111, i16 100, i16 0, i16 98, i16 121, i16 101, i16 0], section "__TEXT,__ustring", align 2 -// CHECK: @_unnamed_cfstring_ = private global %struct.__NSConstantString_tag { i32* getelementptr inbounds ([0 x i32], [0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 2000, i8* bitcast ([9 x i16]* @.str to i8*), i32 8 }, section "__DATA,__cfstring" -// CHECK: @P ={{.*}} global i8* bitcast (%struct.__NSConstantString_tag* @_unnamed_cfstring_ to i8*), align 4 +// CHECK: @_unnamed_cfstring_ = private global %struct.__NSConstantString_tag { ptr @__CFConstantStringClassReference, i32 2000, ptr @.str, i32 8 }, section "__DATA,__cfstring" +// CHECK: @P ={{.*}} global ptr @_unnamed_cfstring_, align 4 void *P = @"good\0bye"; diff --git a/clang/test/CodeGenObjC/2010-02-09-DbgSelf.m b/clang/test/CodeGenObjC/2010-02-09-DbgSelf.m index 0f8ad9d9c7b1df..df2f8bec20f058 100644 --- a/clang/test/CodeGenObjC/2010-02-09-DbgSelf.m +++ b/clang/test/CodeGenObjC/2010-02-09-DbgSelf.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c -emit-llvm -debug-info-kind=limited < %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c -emit-llvm -debug-info-kind=limited < %s | FileCheck %s // Test to check that "self" argument is assigned a location. -// CHECK: call void @llvm.dbg.declare(metadata %0** %{{[^,]+}}, metadata [[SELF:![0-9]*]], metadata !{{.*}}) +// CHECK: call void @llvm.dbg.declare(metadata ptr %{{[^,]+}}, metadata [[SELF:![0-9]*]], metadata !{{.*}}) // CHECK: [[SELF]] = !DILocalVariable(name: "self", arg: 1, @interface Foo diff --git a/clang/test/CodeGenObjC/NSFastEnumeration.m b/clang/test/CodeGenObjC/NSFastEnumeration.m index 757921b1ec79ca..564a8b1228f77d 100644 --- a/clang/test/CodeGenObjC/NSFastEnumeration.m +++ b/clang/test/CodeGenObjC/NSFastEnumeration.m @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-apple-ios10.3 -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK32 -// RUN: %clang_cc1 -no-opaque-pointers -triple i686--windows-msvc -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK32 -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-ios10.3 -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK64 -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64--windows-msvc -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK64 +// RUN: %clang_cc1 -triple i686-apple-ios10.3 -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK32 +// RUN: %clang_cc1 -triple i686--windows-msvc -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK32 +// RUN: %clang_cc1 -triple x86_64-apple-ios10.3 -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK64 +// RUN: %clang_cc1 -triple x86_64--windows-msvc -fobjc-runtime=ios-6.0 -Os -emit-llvm -o - %s | FileCheck %s -check-prefix CHECK64 void f(id a) { for (id i in a) (void)i; } -// CHECK32: call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) -// CHECK32: call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i32)*) +// CHECK32: call i32 @objc_msgSend +// CHECK32: call i32 @objc_msgSend -// CHECK64: call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) -// CHECK64: call i64 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i64 (i8*, i8*, %struct.__objcFastEnumerationState*, [16 x i8*]*, i64)*) +// CHECK64: call i64 @objc_msgSend +// CHECK64: call i64 @objc_msgSend diff --git a/clang/test/CodeGenObjC/arc-arm.m b/clang/test/CodeGenObjC/arc-arm.m index 8f90900788793e..a605fab33e3a2b 100644 --- a/clang/test/CodeGenObjC/arc-arm.m +++ b/clang/test/CodeGenObjC/arc-arm.m @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple armv7-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple armv7-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple arm64-apple-ios -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s // : use an autorelease marker on ARM64. id test0(void) { extern id test0_helper(void); - // CHECK: [[T0:%.*]] = call [[CC:(arm_aapcscc )?]]i8* @test0_helper() - // CHECK-NEXT: ret i8* [[T0]] + // CHECK: [[T0:%.*]] = call [[CC:(arm_aapcscc )?]]ptr @test0_helper() + // CHECK-NEXT: ret ptr [[T0]] return test0_helper(); } void test1(void) { extern id test1_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]]i8* @test1_helper() + // CHECK: [[T0:%.*]] = call [[CC]]ptr @test1_helper() // CHECK-NEXT: call void asm sideeffect "mov\09{{fp, fp|r7, r7}}\09\09// marker for objc_retainAutoreleaseReturnValue" - // CHECK-NEXT: [[T1:%.*]] = call [[CC]]i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) - // CHECK-NEXT: store i8* [[T1]], + // CHECK-NEXT: [[T1:%.*]] = call [[CC]]ptr @llvm.objc.retainAutoreleasedReturnValue(ptr [[T0]]) + // CHECK-NEXT: store ptr [[T1]], // CHECK-NEXT: call [[CC]]void @llvm.objc.storeStrong( // CHECK-NEXT: ret void id x = test1_helper(); @@ -25,15 +25,14 @@ void test1(void) { @class A; A *test2(void) { extern A *test2_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]][[A:%.*]]* @test2_helper() - // CHECK-NEXT: ret [[A]]* [[T0]] + // CHECK: [[T0:%.*]] = call [[CC]]ptr @test2_helper() + // CHECK-NEXT: ret ptr [[T0]] return test2_helper(); } id test3(void) { extern A *test3_helper(void); - // CHECK: [[T0:%.*]] = call [[CC]][[A:%.*]]* @test3_helper() - // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* - // CHECK-NEXT: ret i8* [[T1]] + // CHECK: [[T0:%.*]] = call [[CC]]ptr @test3_helper() + // CHECK-NEXT: ret ptr [[T0]] return test3_helper(); } diff --git a/clang/test/CodeGenObjC/arc-block-copy-escape.m b/clang/test/CodeGenObjC/arc-block-copy-escape.m index 6ce623c70a8e31..886e97a8a10a7a 100644 --- a/clang/test/CodeGenObjC/arc-block-copy-escape.m +++ b/clang/test/CodeGenObjC/arc-block-copy-escape.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-arc -fblocks -emit-llvm %s -o - | FileCheck -check-prefix=CHECK -check-prefix=CHECK-HEAP %s -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-arc -fblocks -fobjc-avoid-heapify-local-blocks -emit-llvm %s -o - | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NOHEAP %s +// RUN: %clang_cc1 -fobjc-arc -fblocks -emit-llvm %s -o - | FileCheck -check-prefix=CHECK -check-prefix=CHECK-HEAP %s +// RUN: %clang_cc1 -fobjc-arc -fblocks -fobjc-avoid-heapify-local-blocks -emit-llvm %s -o - | FileCheck -check-prefix=CHECK -check-prefix=CHECK-NOHEAP %s typedef void (^block_t)(void); @@ -11,7 +11,7 @@ void test0(int i) { block_t block = ^{ use_int(i); }; // CHECK-LABEL: define {{.*}}void @test0( - // CHECK-HEAP: call {{.*}}i8* @llvm.objc.retainBlock(i8* {{%.*}}) [[NUW:#[0-9]+]], !clang.arc.copy_on_escape + // CHECK-HEAP: call {{.*}}ptr @llvm.objc.retainBlock(ptr {{%.*}}) [[NUW:#[0-9]+]], !clang.arc.copy_on_escape // CHECK-NOHEAP-NOT: @llvm.objc.retainBlock( // CHECK: ret void } @@ -19,8 +19,8 @@ void test0(int i) { void test1(int i) { id block = ^{ use_int(i); }; // CHECK-LABEL: define {{.*}}void @test1( - // CHECK-HEAP: call {{.*}}i8* @llvm.objc.retainBlock(i8* {{%.*}}) [[NUW]] - // CHECK-NOHEAP: call {{.*}}i8* @llvm.objc.retainBlock(i8* {{%.*}}) [[NUW:#[0-9]+]] + // CHECK-HEAP: call {{.*}}ptr @llvm.objc.retainBlock(ptr {{%.*}}) [[NUW]] + // CHECK-NOHEAP: call {{.*}}ptr @llvm.objc.retainBlock(ptr {{%.*}}) [[NUW:#[0-9]+]] // CHECK-NOT: !clang.arc.copy_on_escape // CHECK: ret void } diff --git a/clang/test/CodeGenObjC/arc-blocks-exceptions.m b/clang/test/CodeGenObjC/arc-blocks-exceptions.m index 9318a748184034..821b818d4027dd 100644 --- a/clang/test/CodeGenObjC/arc-blocks-exceptions.m +++ b/clang/test/CodeGenObjC/arc-blocks-exceptions.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -fexceptions -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -fexceptions -disable-llvm-passes -o - %s | FileCheck %s void test1(_Bool c) { void test1_fn(void (^blk)(void)); @@ -6,30 +6,30 @@ void test1(_Bool c) { test1_fn(c ? ^{ (void)weakId; } : 0); // CHECK: [[CLEANUP_COND:%.*]] = alloca i1 - // CHECK-NEXT: [[CLEANUP_SAVE:%.*]] = alloca i8** + // CHECK-NEXT: [[CLEANUP_SAVE:%.*]] = alloca ptr - // CHECK: store i1 true, i1* [[CLEANUP_COND]] - // CHECK-NEXT: store i8** {{.*}}, i8*** [[CLEANUP_SAVE]] + // CHECK: store i1 true, ptr [[CLEANUP_COND]] + // CHECK-NEXT: store ptr {{.*}}, ptr [[CLEANUP_SAVE]] // CHECK: invoke void @test1_fn( // CHECK-NEXT: to label %[[INVOKE_CONT:.*]] unwind label %[[LANDING_PAD_LAB:.*]] // CHECK: [[INVOKE_CONT]]: - // CHECK-NEXT: [[LOAD:%.*]] = load i1, i1* [[CLEANUP_COND]] + // CHECK-NEXT: [[LOAD:%.*]] = load i1, ptr [[CLEANUP_COND]] // CHECK-NEXT: br i1 [[LOAD]], label %[[END_OF_SCOPE_LAB:.*]], label // CHECK: [[END_OF_SCOPE_LAB]]: - // CHECK-NEXT: [[LOAD:%.*]] = load i8**, i8*** [[CLEANUP_SAVE]] - // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[LOAD]]) + // CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr [[CLEANUP_SAVE]] + // CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[LOAD]]) // CHECK-NEXT: br label // CHECK: [[LANDING_PAD_LAB]]: // /* some EH stuff */ - // CHECK: [[LOAD:%.*]] = load i1, i1* [[CLEANUP_COND]] + // CHECK: [[LOAD:%.*]] = load i1, ptr [[CLEANUP_COND]] // CHECK-NEXT: br i1 [[LOAD]], label %[[EH_CLEANUP_LAB:.*]], label // CHECK: [[EH_CLEANUP_LAB]]: - // CHECK-NEXT: [[LOAD:%.*]] = load i8**, i8*** [[CLEANUP_SAVE]] - // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[LOAD]]) + // CHECK-NEXT: [[LOAD:%.*]] = load ptr, ptr [[CLEANUP_SAVE]] + // CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[LOAD]]) // CHECK-NEXT: br label } diff --git a/clang/test/CodeGenObjC/arc-bridged-cast.m b/clang/test/CodeGenObjC/arc-bridged-cast.m index 32dcfde8ce0b1b..a769ce42928799 100644 --- a/clang/test/CodeGenObjC/arc-bridged-cast.m +++ b/clang/test/CodeGenObjC/arc-bridged-cast.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -O2 -disable-llvm-passes -o - %s | FileCheck %s typedef const void *CFTypeRef; typedef const struct __CFString *CFStringRef; @@ -18,12 +18,12 @@ @interface NSString void bridge_transfer_from_cf(int *i) { // CHECK: store i32 7 *i = 7; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call ptr @CFCreateSomething() id obj1 = (__bridge_transfer id)CFCreateSomething(); // CHECK-NOT: retain // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call ptr @CFCreateSomething() // CHECK-NOT: retain // CHECK: store i32 13 (void)(__bridge_transfer id)CFCreateSomething(), *i = 13; @@ -31,7 +31,6 @@ void bridge_transfer_from_cf(int *i) { // CHECK: store i32 17 *i = 17; // CHECK: call void @llvm.objc.release - // CHECK-NEXT: bitcast // CHECK-NEXT: call void @llvm.lifetime.end // CHECK-NEXT: ret void } @@ -40,18 +39,17 @@ void bridge_transfer_from_cf(int *i) { void bridge_from_cf(int *i) { // CHECK: store i32 7 *i = 7; - // CHECK: call i8* @CFCreateSomething() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK: call ptr @CFCreateSomething() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] id obj1 = (__bridge id)CFCreateSomething(); // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CFCreateSomething() + // CHECK: call ptr @CFCreateSomething() // CHECK-NOT: release // CHECK: store i32 13 (void)(__bridge id)CFCreateSomething(), *i = 13; // CHECK: store i32 17 *i = 17; // CHECK: call void @llvm.objc.release - // CHECK-NEXT: bitcast // CHECK-NEXT: call void @llvm.lifetime.end // CHECK-NEXT: ret void } @@ -59,16 +57,15 @@ void bridge_from_cf(int *i) { // CHECK-LABEL: define{{.*}} void @bridge_retained_of_cf void bridge_retained_of_cf(int *i) { *i = 7; - // CHECK: call i8* @CreateSomething() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK: call ptr @CreateSomething() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] CFTypeRef cf1 = (__bridge_retained CFTypeRef)CreateSomething(); // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CreateSomething() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK: call ptr @CreateSomething() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] (__bridge_retained CFTypeRef)CreateSomething(), *i = 13; // CHECK: store i32 13 // CHECK: store i32 17 *i = 17; - // CHECK-NEXT: bitcast // CHECK-NEXT: call void @llvm.lifetime.end // CHECK-NEXT: ret void } @@ -78,23 +75,22 @@ void bridge_of_cf(int *i) { // CHECK: store i32 7 *i = 7; // CHECK: call void @llvm.lifetime.start - // CHECK-NEXT: call i8* @CreateSomething() + // CHECK-NEXT: call ptr @CreateSomething() CFTypeRef cf1 = (__bridge CFTypeRef)CreateSomething(); // CHECK-NOT: retain // CHECK: store i32 11 *i = 11; - // CHECK: call i8* @CreateSomething + // CHECK: call ptr @CreateSomething (__bridge CFTypeRef)CreateSomething(), *i = 13; // CHECK: store i32 13 // CHECK-NOT: release // CHECK: store i32 17 *i = 17; - // CHECK-NEXT: bitcast // CHECK-NEXT: call void @llvm.lifetime.end // CHECK-NEXT: ret void } -// CHECK-LABEL: define{{.*}} %struct.__CFString* @bridge_of_paren_expr() +// CHECK-LABEL: define{{.*}} ptr @bridge_of_paren_expr() CFStringRef bridge_of_paren_expr(void) { // CHECK-NOT: "@llvm.objc" CFStringRef r = (__bridge CFStringRef)(CreateNSString()); diff --git a/clang/test/CodeGenObjC/arc-i386.m b/clang/test/CodeGenObjC/arc-i386.m index cd6b6e11182017..09edc7f1f357b5 100644 --- a/clang/test/CodeGenObjC/arc-i386.m +++ b/clang/test/CodeGenObjC/arc-i386.m @@ -1,23 +1,23 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-iossimulator6.0 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-iossimulator6.0 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s // : implement objc_retainAutoreleasedReturnValue on i386 -// CHECK-LABEL: define{{.*}} i8* @test0() +// CHECK-LABEL: define{{.*}} ptr @test0() id test0(void) { extern id test0_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test0_helper() - // CHECK-NEXT: ret i8* [[T0]] + // CHECK: [[T0:%.*]] = call ptr @test0_helper() + // CHECK-NEXT: ret ptr [[T0]] return test0_helper(); } // CHECK-LABEL: define{{.*}} void @test1() void test1(void) { extern id test1_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test1_helper() + // CHECK: [[T0:%.*]] = call ptr @test1_helper() // CHECK-NEXT: call void asm sideeffect "mov - // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) - // CHECK-NEXT: store i8* [[T1]], + // CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.retainAutoreleasedReturnValue(ptr [[T0]]) + // CHECK-NEXT: store ptr [[T1]], // CHECK-NEXT: call void @llvm.objc.storeStrong( // CHECK-NEXT: ret void id x = test1_helper(); @@ -28,16 +28,15 @@ void test1(void) { @class A; A *test2(void) { extern A *test2_helper(void); - // CHECK: [[T0:%.*]] = call [[A:%.*]]* @test2_helper() - // CHECK-NEXT: ret [[A]]* [[T0]] + // CHECK: [[T0:%.*]] = call ptr @test2_helper() + // CHECK-NEXT: ret ptr [[T0]] return test2_helper(); } -// CHECK-LABEL: define{{.*}} i8* @test3() +// CHECK-LABEL: define{{.*}} ptr @test3() id test3(void) { extern A *test3_helper(void); - // CHECK: [[T0:%.*]] = call [[A]]* @test3_helper() - // CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* - // CHECK-NEXT: ret i8* [[T1]] + // CHECK: [[T0:%.*]] = call ptr @test3_helper() + // CHECK-NEXT: ret ptr [[T0]] return test3_helper(); } diff --git a/clang/test/CodeGenObjC/arc-linetable.m b/clang/test/CodeGenObjC/arc-linetable.m index 14722cb89f984c..60e0e0f70ac6da 100644 --- a/clang/test/CodeGenObjC/arc-linetable.m +++ b/clang/test/CodeGenObjC/arc-linetable.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -gno-column-info -disable-llvm-passes -triple x86_64-apple-darwin10 %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -fblocks -fobjc-arc -debug-info-kind=standalone -dwarf-version=4 -gno-column-info -disable-llvm-passes -triple x86_64-apple-darwin10 %s -o - | FileCheck %s // Legend: EXP = Return expression, RET = ret instruction @@ -34,7 +34,7 @@ // CHECK: define {{.*}}testCleanupVoid // CHECK: icmp ne {{.*}}!dbg ![[SKIP1:[0-9]+]] -// CHECK: store i32 0, i32* {{.*}}, !dbg ![[RET8:[0-9]+]] +// CHECK: store i32 0, ptr {{.*}}, !dbg ![[RET8:[0-9]+]] // CHECK: @llvm.objc.storeStrong{{.*}}, !dbg ![[RET8]] // CHECK: ret {{.*}} !dbg ![[RET8]] diff --git a/clang/test/CodeGenObjC/arc-no-arc-exceptions.m b/clang/test/CodeGenObjC/arc-no-arc-exceptions.m index 9483299c2b2eab..223cc43f835d03 100644 --- a/clang/test/CodeGenObjC/arc-no-arc-exceptions.m +++ b/clang/test/CodeGenObjC/arc-no-arc-exceptions.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -disable-llvm-passes -o - %s | FileCheck -check-prefix=NO-METADATA %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s -fobjc-arc-exceptions | FileCheck -check-prefix=NO-METADATA %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -disable-llvm-passes -o - %s | FileCheck -check-prefix=NO-METADATA %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fblocks -fexceptions -fobjc-exceptions -O2 -disable-llvm-passes -o - %s -fobjc-arc-exceptions | FileCheck -check-prefix=NO-METADATA %s // The front-end should emit clang.arc.no_objc_arc_exceptions in -fobjc-arc-exceptions // mode when optimization is enabled, and not otherwise. @@ -34,7 +34,7 @@ void test1(id x) { void NSLog(id, ...); // CHECK-LABEL: define{{.*}} void @test2( -// CHECK: invoke void (i8*, ...) @NSLog(i8* noundef bitcast (%struct.__NSConstantString_tag* @_unnamed_cfstring_ to i8*), i32* noundef %{{.*}}) +// CHECK: invoke void (ptr, ...) @NSLog(ptr noundef @_unnamed_cfstring_, ptr noundef %{{.*}}) // CHECK: to label %{{.*}} unwind label %{{.*}}, !clang.arc.no_objc_arc_exceptions ! // NO-METADATA-LABEL: define{{.*}} void @test2( // NO-METADATA-NOT: !clang.arc.no_objc_arc_exceptions @@ -48,7 +48,7 @@ void test2(void) { } // CHECK-LABEL: define{{.*}} void @test3( -// CHECK: invoke void %{{.*}}(i8* noundef %{{.*}}) +// CHECK: invoke void %{{.*}}(ptr noundef %{{.*}}) // CHECK: to label %{{.*}} unwind label %{{.*}}, !clang.arc.no_objc_arc_exceptions ! // NO-METADATA-LABEL: define{{.*}} void @test3( // NO-METADATA-NOT: !clang.arc.no_objc_arc_exceptions @@ -63,7 +63,7 @@ void test3(void) { } // CHECK-LABEL: define{{.*}} void @test4( -// CHECK: invoke void %{{.*}}(i8* noundef %{{.*}}) +// CHECK: invoke void %{{.*}}(ptr noundef %{{.*}}) // CHECK: to label %{{.*}} unwind label %{{.*}}, !clang.arc.no_objc_arc_exceptions ! // NO-METADATA-LABEL: define{{.*}} void @test4( // NO-METADATA-NOT: !clang.arc.no_objc_arc_exceptions diff --git a/clang/test/CodeGenObjC/arc-rv-attr.m b/clang/test/CodeGenObjC/arc-rv-attr.m index 77aef00ad84504..89b9c49564f35d 100644 --- a/clang/test/CodeGenObjC/arc-rv-attr.m +++ b/clang/test/CodeGenObjC/arc-rv-attr.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios9 -fobjc-runtime=ios-9.0 -fobjc-arc -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10 -fobjc-runtime=ios-9.0 -fobjc-arc -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK +// RUN: %clang_cc1 -triple arm64-apple-ios9 -fobjc-runtime=ios-9.0 -fobjc-arc -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK +// RUN: %clang_cc1 -triple x86_64-apple-macosx10 -fobjc-runtime=ios-9.0 -fobjc-arc -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK @class A; @@ -10,12 +10,10 @@ void test_assign(void) { x = makeA(); } // CHECK-LABEL: define{{.*}} void @test_assign() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A:.*]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -24,16 +22,13 @@ void test_assign_assign(void) { x = y = makeA(); } // CHECK-LABEL: define{{.*}} void @test_assign_assign() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] // CHECK-NEXT: lifetime.end -// CHECK-NEXT: bitcast // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -43,20 +38,17 @@ void test_strong_assign_assign(void) { x = y = makeA(); } // CHECK-LABEL: define{{.*}} void @test_strong_assign_assign() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: [[OLD:%.*]] = load i8*, i8** [[X]] -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[OLD]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] +// CHECK-NEXT: [[OLD:%.*]] = load ptr, ptr [[X]] +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[OLD]] // CHECK-NEXT: lifetime.end -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) -// CHECK-NEXT: bitcast +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[X]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -66,20 +58,17 @@ void test_assign_strong_assign(void) { x = y = makeA(); } // CHECK-LABEL: define{{.*}} void @test_assign_strong_assign() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: [[OLD:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[OLD]] -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) -// CHECK-NEXT: bitcast +// CHECK-NEXT: [[OLD:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[OLD]] +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) // CHECK-NEXT: lifetime.end -// CHECK-NEXT: bitcast // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -87,12 +76,10 @@ void test_init(void) { __unsafe_unretained id x = makeA(); } // CHECK-LABEL: define{{.*}} void @test_init() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -101,16 +88,13 @@ void test_init_assignment(void) { __unsafe_unretained id y = x = makeA(); } // CHECK-LABEL: define{{.*}} void @test_init_assignment() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] // CHECK-NEXT: lifetime.end -// CHECK-NEXT: bitcast // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -119,18 +103,15 @@ void test_strong_init_assignment(void) { __strong id y = x = makeA(); } // CHECK-LABEL: define{{.*}} void @test_strong_init_assignment() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) -// CHECK-NEXT: bitcast +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) // CHECK-NEXT: lifetime.end -// CHECK-NEXT: bitcast // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -139,20 +120,17 @@ void test_init_strong_assignment(void) { __unsafe_unretained id y = x = makeA(); } // CHECK-LABEL: define{{.*}} void @test_init_strong_assignment() -// CHECK: [[X:%.*]] = alloca i8* -// CHECK: [[Y:%.*]] = alloca i8* -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] +// CHECK: [[X:%.*]] = alloca ptr +// CHECK: [[Y:%.*]] = alloca ptr +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) -// CHECK-NEXT: [[T1:%.*]] = bitcast [[A]]* [[T0]] to i8* -// CHECK-NEXT: [[OLD:%.*]] = load i8*, i8** [[X]] -// CHECK-NEXT: store i8* [[T1]], i8** [[X]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[OLD]]) -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] -// CHECK-NEXT: bitcast +// CHECK-NEXT: [[OLD:%.*]] = load ptr, ptr [[X]] +// CHECK-NEXT: store ptr [[T0]], ptr [[X]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[OLD]]) +// CHECK-NEXT: store ptr [[T0]], ptr [[Y]] // CHECK-NEXT: lifetime.end -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]] -// CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) -// CHECK-NEXT: bitcast +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[X]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) // CHECK-NEXT: lifetime.end // CHECK-NEXT: ret void @@ -160,7 +138,7 @@ void test_ignored(void) { makeA(); } // CHECK-LABEL: define{{.*}} void @test_ignored() -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) // CHECK-NEXT: ret void @@ -168,7 +146,7 @@ void test_cast_to_void(void) { (void) makeA(); } // CHECK-LABEL: define{{.*}} void @test_cast_to_void() -// CHECK: [[T0:%.*]] = call [[A]]* @makeA() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] +// CHECK: [[T0:%.*]] = call ptr @makeA() [ "clang.arc.attachedcall"(ptr @llvm.objc.unsafeClaimAutoreleasedReturnValue) ] // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use({{.*}} [[T0]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/arc-ternary-op.m b/clang/test/CodeGenObjC/arc-ternary-op.m index 59fc5b27792c73..c62c913893b456 100644 --- a/clang/test/CodeGenObjC/arc-ternary-op.m +++ b/clang/test/CodeGenObjC/arc-ternary-op.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -O2 -disable-llvm-passes -o - %s | FileCheck %s id g0, g1; @@ -7,34 +7,32 @@ void test0(_Bool cond) { // CHECK-LABEL: define{{.*}} void @test0( // CHECK: [[COND:%.*]] = alloca i8, - // CHECK-NEXT: [[X:%.*]] = alloca i8*, - // CHECK-NEXT: [[RELVAL:%.*]] = alloca i8* + // CHECK-NEXT: [[X:%.*]] = alloca ptr, + // CHECK-NEXT: [[RELVAL:%.*]] = alloca ptr // CHECK-NEXT: [[RELCOND:%.*]] = alloca i1 // CHECK-NEXT: zext // CHECK-NEXT: store - // CHECK-NEXT: [[XPTR1:%.*]] = bitcast i8** [[X]] to i8* - // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[XPTR1]]) - // CHECK-NEXT: [[T0:%.*]] = load i8, i8* [[COND]] + // CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[X]]) + // CHECK-NEXT: [[T0:%.*]] = load i8, ptr [[COND]] // CHECK-NEXT: [[T1:%.*]] = trunc i8 [[T0]] to i1 - // CHECK-NEXT: store i1 false, i1* [[RELCOND]] + // CHECK-NEXT: store i1 false, ptr [[RELCOND]] // CHECK-NEXT: br i1 [[T1]], // CHECK: br label - // CHECK: [[CALL:%.*]] = call i8* @test0_helper() - // CHECK-NEXT: store i8* [[CALL]], i8** [[RELVAL]] - // CHECK-NEXT: store i1 true, i1* [[RELCOND]] + // CHECK: [[CALL:%.*]] = call ptr @test0_helper() + // CHECK-NEXT: store ptr [[CALL]], ptr [[RELVAL]] + // CHECK-NEXT: store i1 true, ptr [[RELCOND]] // CHECK-NEXT: br label - // CHECK: [[T0:%.*]] = phi i8* [ null, {{%.*}} ], [ [[CALL]], {{%.*}} ] - // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retain(i8* [[T0]]) [[NUW:#[0-9]+]] - // CHECK-NEXT: store i8* [[T1]], i8** [[X]], - // CHECK-NEXT: [[REL:%.*]] = load i1, i1* [[RELCOND]] + // CHECK: [[T0:%.*]] = phi ptr [ null, {{%.*}} ], [ [[CALL]], {{%.*}} ] + // CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.retain(ptr [[T0]]) [[NUW:#[0-9]+]] + // CHECK-NEXT: store ptr [[T1]], ptr [[X]], + // CHECK-NEXT: [[REL:%.*]] = load i1, ptr [[RELCOND]] // CHECK-NEXT: br i1 [[REL]], - // CHECK: [[T0:%.*]] = load i8*, i8** [[RELVAL]] - // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) [[NUW]] + // CHECK: [[T0:%.*]] = load ptr, ptr [[RELVAL]] + // CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) [[NUW]] // CHECK-NEXT: br label - // CHECK: [[T0:%.*]] = load i8*, i8** [[X]] - // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) [[NUW]] - // CHECK-NEXT: [[XPTR2:%.*]] = bitcast i8** [[X]] to i8* - // CHECK-NEXT: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[XPTR2]]) + // CHECK: [[T0:%.*]] = load ptr, ptr [[X]] + // CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) [[NUW]] + // CHECK-NEXT: call void @llvm.lifetime.end.p0(i64 8, ptr [[X]]) // CHECK-NEXT: ret void id x = (cond ? 0 : test0_helper()); } @@ -48,65 +46,61 @@ void test1(int cond) { // CHECK-LABEL: define{{.*}} void @test1( // CHECK: [[COND:%.*]] = alloca i32 - // CHECK-NEXT: [[STRONG:%.*]] = alloca i8* - // CHECK-NEXT: [[WEAK:%.*]] = alloca i8* - // CHECK-NEXT: [[TEMP1:%.*]] = alloca i8* - // CHECK-NEXT: [[TEMP2:%.*]] = alloca i8* - // CHECK-NEXT: [[CONDCLEANUPSAVE:%.*]] = alloca i8* + // CHECK-NEXT: [[STRONG:%.*]] = alloca ptr + // CHECK-NEXT: [[WEAK:%.*]] = alloca ptr + // CHECK-NEXT: [[TEMP1:%.*]] = alloca ptr + // CHECK-NEXT: [[TEMP2:%.*]] = alloca ptr + // CHECK-NEXT: [[CONDCLEANUPSAVE:%.*]] = alloca ptr // CHECK-NEXT: [[CONDCLEANUP:%.*]] = alloca i1 // CHECK-NEXT: store i32 - // CHECK-NEXT: [[STRONGPTR1:%.*]] = bitcast i8** [[STRONG]] to i8* - // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[STRONGPTR1]]) - // CHECK-NEXT: store i8* null, i8** [[STRONG]] - // CHECK-NEXT: [[WEAKPTR1:%.*]] = bitcast i8** [[WEAK]] to i8* - // CHECK-NEXT: call void @llvm.lifetime.start.p0i8(i64 8, i8* [[WEAKPTR1]]) - // CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[WEAK]], i8* null) - - // CHECK-NEXT: [[T0:%.*]] = load i32, i32* [[COND]] + // CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[STRONG]]) + // CHECK-NEXT: store ptr null, ptr [[STRONG]] + // CHECK-NEXT: call void @llvm.lifetime.start.p0(i64 8, ptr [[WEAK]]) + // CHECK-NEXT: call ptr @llvm.objc.initWeak(ptr [[WEAK]], ptr null) + + // CHECK-NEXT: [[T0:%.*]] = load i32, ptr [[COND]] // CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[T0]], 0 - // CHECK: [[ARG:%.*]] = phi i8** - // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null - // CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i8** null, i8** [[TEMP1]] + // CHECK: [[ARG:%.*]] = phi ptr + // CHECK-NEXT: [[T0:%.*]] = icmp eq ptr [[ARG]], null + // CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], ptr null, ptr [[TEMP1]] // CHECK-NEXT: br i1 [[T0]], - // CHECK: [[T0:%.*]] = load i8*, i8** [[ARG]] - // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP1]] + // CHECK: [[T0:%.*]] = load ptr, ptr [[ARG]] + // CHECK-NEXT: store ptr [[T0]], ptr [[TEMP1]] // CHECK-NEXT: br label - // CHECK: [[W:%.*]] = phi i8* [ [[T0]], {{%.*}} ], [ undef, {{%.*}} ] - // CHECK-NEXT: call void @test1_sink(i8** noundef [[T1]]) - // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null + // CHECK: [[W:%.*]] = phi ptr [ [[T0]], {{%.*}} ], [ undef, {{%.*}} ] + // CHECK-NEXT: call void @test1_sink(ptr noundef [[T1]]) + // CHECK-NEXT: [[T0:%.*]] = icmp eq ptr [[ARG]], null // CHECK-NEXT: br i1 [[T0]], - // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP1]] - // CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.retain(i8* [[T0]]) - // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.use(i8* [[W]]) [[NUW]] - // CHECK-NEXT: [[T2:%.*]] = load i8*, i8** [[ARG]] - // CHECK-NEXT: store i8* [[T1]], i8** [[ARG]] - // CHECK-NEXT: call void @llvm.objc.release(i8* [[T2]]) + // CHECK: [[T0:%.*]] = load ptr, ptr [[TEMP1]] + // CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.retain(ptr [[T0]]) + // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.use(ptr [[W]]) [[NUW]] + // CHECK-NEXT: [[T2:%.*]] = load ptr, ptr [[ARG]] + // CHECK-NEXT: store ptr [[T1]], ptr [[ARG]] + // CHECK-NEXT: call void @llvm.objc.release(ptr [[T2]]) // CHECK-NEXT: br label - // CHECK: [[T0:%.*]] = load i32, i32* [[COND]] + // CHECK: [[T0:%.*]] = load i32, ptr [[COND]] // CHECK-NEXT: [[T1:%.*]] = icmp ne i32 [[T0]], 0 - // CHECK: [[ARG:%.*]] = phi i8** - // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null - // CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], i8** null, i8** [[TEMP2]] - // CHECK-NEXT: store i1 false, i1* [[CONDCLEANUP]] + // CHECK: [[ARG:%.*]] = phi ptr + // CHECK-NEXT: [[T0:%.*]] = icmp eq ptr [[ARG]], null + // CHECK-NEXT: [[T1:%.*]] = select i1 [[T0]], ptr null, ptr [[TEMP2]] + // CHECK-NEXT: store i1 false, ptr [[CONDCLEANUP]] // CHECK-NEXT: br i1 [[T0]], - // CHECK: [[T0:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[ARG]]) - // CHECK-NEXT: store i8* [[T0]], i8** [[CONDCLEANUPSAVE]] - // CHECK-NEXT: store i1 true, i1* [[CONDCLEANUP]] - // CHECK-NEXT: store i8* [[T0]], i8** [[TEMP2]] + // CHECK: [[T0:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[ARG]]) + // CHECK-NEXT: store ptr [[T0]], ptr [[CONDCLEANUPSAVE]] + // CHECK-NEXT: store i1 true, ptr [[CONDCLEANUP]] + // CHECK-NEXT: store ptr [[T0]], ptr [[TEMP2]] // CHECK-NEXT: br label - // CHECK: call void @test1_sink(i8** noundef [[T1]]) - // CHECK-NEXT: [[T0:%.*]] = icmp eq i8** [[ARG]], null + // CHECK: call void @test1_sink(ptr noundef [[T1]]) + // CHECK-NEXT: [[T0:%.*]] = icmp eq ptr [[ARG]], null // CHECK-NEXT: br i1 [[T0]], - // CHECK: [[T0:%.*]] = load i8*, i8** [[TEMP2]] - // CHECK-NEXT: call i8* @llvm.objc.storeWeak(i8** [[ARG]], i8* [[T0]]) + // CHECK: [[T0:%.*]] = load ptr, ptr [[TEMP2]] + // CHECK-NEXT: call ptr @llvm.objc.storeWeak(ptr [[ARG]], ptr [[T0]]) // CHECK-NEXT: br label - // CHECK: call void @llvm.objc.destroyWeak(i8** [[WEAK]]) - // CHECK: [[WEAKPTR2:%.*]] = bitcast i8** [[WEAK]] to i8* - // CHECK: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[WEAKPTR2]]) - // CHECK: [[STRONGPTR2:%.*]] = bitcast i8** [[STRONG]] to i8* - // CHECK: call void @llvm.lifetime.end.p0i8(i64 8, i8* [[STRONGPTR2]]) + // CHECK: call void @llvm.objc.destroyWeak(ptr [[WEAK]]) + // CHECK: call void @llvm.lifetime.end.p0(i64 8, ptr [[WEAK]]) + // CHECK: call void @llvm.lifetime.end.p0(i64 8, ptr [[STRONG]]) // CHECK: ret void } @@ -122,31 +116,31 @@ void test2(int cond) { // CHECK-LABEL: define{{.*}} void @test2( // CHECK: [[COND:%.*]] = alloca i32, - // CHECK: alloca i8* - // CHECK: [[CLEANUP_SAVE:%.*]] = alloca i8* + // CHECK: alloca ptr + // CHECK: [[CLEANUP_SAVE:%.*]] = alloca ptr // CHECK: [[RUN_CLEANUP:%.*]] = alloca i1 // Evaluate condition; cleanup disabled by default. - // CHECK: [[T0:%.*]] = load i32, i32* [[COND]], + // CHECK: [[T0:%.*]] = load i32, ptr [[COND]], // CHECK-NEXT: icmp ne i32 [[T0]], 0 - // CHECK-NEXT: store i1 false, i1* [[RUN_CLEANUP]] + // CHECK-NEXT: store i1 false, ptr [[RUN_CLEANUP]] // CHECK-NEXT: br i1 // Within true branch, cleanup enabled. - // CHECK: [[T1:%.*]] = call i8* @test2_producer() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] - // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(i8* [[T1]]) - // CHECK-NEXT: store i8* [[T1]], i8** [[CLEANUP_SAVE]] - // CHECK-NEXT: store i1 true, i1* [[RUN_CLEANUP]] + // CHECK: [[T1:%.*]] = call ptr @test2_producer() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(ptr [[T1]]) + // CHECK-NEXT: store ptr [[T1]], ptr [[CLEANUP_SAVE]] + // CHECK-NEXT: store i1 true, ptr [[RUN_CLEANUP]] // CHECK-NEXT: br label // Join point for conditional operator; retain immediately. - // CHECK: [[T0:%.*]] = phi i8* [ [[T1]], {{%.*}} ], [ null, {{%.*}} ] - // CHECK-NEXT: [[RESULT:%.*]] = call i8* @llvm.objc.retain(i8* [[T0]]) + // CHECK: [[T0:%.*]] = phi ptr [ [[T1]], {{%.*}} ], [ null, {{%.*}} ] + // CHECK-NEXT: [[RESULT:%.*]] = call ptr @llvm.objc.retain(ptr [[T0]]) // Leaving full-expression; run conditional cleanup. - // CHECK-NEXT: [[T0:%.*]] = load i1, i1* [[RUN_CLEANUP]] + // CHECK-NEXT: [[T0:%.*]] = load i1, ptr [[RUN_CLEANUP]] // CHECK-NEXT: br i1 [[T0]] - // CHECK: [[T0:%.*]] = load i8*, i8** [[CLEANUP_SAVE]] - // CHECK-NEXT: call void @llvm.objc.release(i8* [[T0]]) + // CHECK: [[T0:%.*]] = load ptr, ptr [[CLEANUP_SAVE]] + // CHECK-NEXT: call void @llvm.objc.release(ptr [[T0]]) // CHECK-NEXT: br label // And way down at the end of the loop: - // CHECK: call void @llvm.objc.release(i8* [[RESULT]]) + // CHECK: call void @llvm.objc.release(ptr [[RESULT]]) } void test3(int cond) { @@ -154,53 +148,53 @@ void test3(int cond) { test2(cond); // CHECK: define{{.*}} void @test3( - // CHECK: %[[P:.*]] = alloca i8**, align 8 - // CHECK: %[[_COMPOUNDLITERAL:.*]] = alloca [2 x i8*], align 8 + // CHECK: %[[P:.*]] = alloca ptr, align 8 + // CHECK: %[[_COMPOUNDLITERAL:.*]] = alloca [2 x ptr], align 8 // CHECK: %[[CLEANUP_COND:.*]] = alloca i1, align 1 - // CHECK: %[[_COMPOUNDLITERAL1:.*]] = alloca [2 x i8*], align 8 + // CHECK: %[[_COMPOUNDLITERAL1:.*]] = alloca [2 x ptr], align 8 // CHECK: %[[CLEANUP_COND4:.*]] = alloca i1, align 1 - // CHECK: %[[ARRAYINIT_BEGIN:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL]], i64 0, i64 0 - // CHECK: %[[V2:.*]] = load i8*, i8** @g0, align 8 - // CHECK: %[[V3:.*]] = call i8* @llvm.objc.retain(i8* %[[V2]]) - // CHECK: store i8* %[[V3]], i8** %[[ARRAYINIT_BEGIN]], align 8 - // CHECK: %[[ARRAYINIT_ELEMENT:.*]] = getelementptr inbounds i8*, i8** %[[ARRAYINIT_BEGIN]], i64 1 - // CHECK: %[[V4:.*]] = load i8*, i8** @g1, align 8 - // CHECK: %[[V5:.*]] = call i8* @llvm.objc.retain(i8* %[[V4]]) - // CHECK: store i8* %[[V5]], i8** %[[ARRAYINIT_ELEMENT]], align 8 - // CHECK: store i1 true, i1* %[[CLEANUP_COND]], align 1 - // CHECK: %[[ARRAYDECAY:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL]], i64 0, i64 0 - - // CHECK: %[[ARRAYINIT_BEGIN2:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL1]], i64 0, i64 0 - // CHECK: %[[V6:.*]] = load i8*, i8** @g1, align 8 - // CHECK: %[[V7:.*]] = call i8* @llvm.objc.retain(i8* %[[V6]]) - // CHECK: store i8* %[[V7]], i8** %[[ARRAYINIT_BEGIN2]], align 8 - // CHECK: %[[ARRAYINIT_ELEMENT3:.*]] = getelementptr inbounds i8*, i8** %[[ARRAYINIT_BEGIN2]], i64 1 - // CHECK: %[[V8:.*]] = load i8*, i8** @g0, align 8 - // CHECK: %[[V9:.*]] = call i8* @llvm.objc.retain(i8* %[[V8]]) - // CHECK: store i8* %[[V9]], i8** %[[ARRAYINIT_ELEMENT3]], align 8 - // CHECK: store i1 true, i1* %[[CLEANUP_COND4]], align 1 - // CHECK: %[[ARRAYDECAY5:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL1]], i64 0, i64 0 - - // CHECK: %[[COND6:.*]] = phi i8** [ %[[ARRAYDECAY]], %{{.*}} ], [ %[[ARRAYDECAY5]], %{{.*}} ] - // CHECK: store i8** %[[COND6]], i8*** %[[P]], align 8 + // CHECK: %[[ARRAYINIT_BEGIN:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL]], i64 0, i64 0 + // CHECK: %[[V2:.*]] = load ptr, ptr @g0, align 8 + // CHECK: %[[V3:.*]] = call ptr @llvm.objc.retain(ptr %[[V2]]) + // CHECK: store ptr %[[V3]], ptr %[[ARRAYINIT_BEGIN]], align 8 + // CHECK: %[[ARRAYINIT_ELEMENT:.*]] = getelementptr inbounds ptr, ptr %[[ARRAYINIT_BEGIN]], i64 1 + // CHECK: %[[V4:.*]] = load ptr, ptr @g1, align 8 + // CHECK: %[[V5:.*]] = call ptr @llvm.objc.retain(ptr %[[V4]]) + // CHECK: store ptr %[[V5]], ptr %[[ARRAYINIT_ELEMENT]], align 8 + // CHECK: store i1 true, ptr %[[CLEANUP_COND]], align 1 + // CHECK: %[[ARRAYDECAY:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL]], i64 0, i64 0 + + // CHECK: %[[ARRAYINIT_BEGIN2:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL1]], i64 0, i64 0 + // CHECK: %[[V6:.*]] = load ptr, ptr @g1, align 8 + // CHECK: %[[V7:.*]] = call ptr @llvm.objc.retain(ptr %[[V6]]) + // CHECK: store ptr %[[V7]], ptr %[[ARRAYINIT_BEGIN2]], align 8 + // CHECK: %[[ARRAYINIT_ELEMENT3:.*]] = getelementptr inbounds ptr, ptr %[[ARRAYINIT_BEGIN2]], i64 1 + // CHECK: %[[V8:.*]] = load ptr, ptr @g0, align 8 + // CHECK: %[[V9:.*]] = call ptr @llvm.objc.retain(ptr %[[V8]]) + // CHECK: store ptr %[[V9]], ptr %[[ARRAYINIT_ELEMENT3]], align 8 + // CHECK: store i1 true, ptr %[[CLEANUP_COND4]], align 1 + // CHECK: %[[ARRAYDECAY5:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL1]], i64 0, i64 0 + + // CHECK: %[[COND6:.*]] = phi ptr [ %[[ARRAYDECAY]], %{{.*}} ], [ %[[ARRAYDECAY5]], %{{.*}} ] + // CHECK: store ptr %[[COND6]], ptr %[[P]], align 8 // CHECK: call void @test2( - // CHECK: %[[ARRAY_BEGIN:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL1]], i32 0, i32 0 - // CHECK: %[[V11:.*]] = getelementptr inbounds i8*, i8** %[[ARRAY_BEGIN]], i64 2 + // CHECK: %[[ARRAY_BEGIN:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL1]], i32 0, i32 0 + // CHECK: %[[V11:.*]] = getelementptr inbounds ptr, ptr %[[ARRAY_BEGIN]], i64 2 - // CHECK: %[[ARRAYDESTROY_ELEMENTPAST:.*]] = phi i8** [ %[[V11]], %{{.*}} ], [ %[[ARRAYDESTROY_ELEMENT:.*]], %{{.*}} ] - // CHECK: %[[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds i8*, i8** %[[ARRAYDESTROY_ELEMENTPAST]], i64 -1 - // CHECK: %[[V12:.*]] = load i8*, i8** %[[ARRAYDESTROY_ELEMENT]], align 8 - // CHECK: call void @llvm.objc.release(i8* %[[V12]]) + // CHECK: %[[ARRAYDESTROY_ELEMENTPAST:.*]] = phi ptr [ %[[V11]], %{{.*}} ], [ %[[ARRAYDESTROY_ELEMENT:.*]], %{{.*}} ] + // CHECK: %[[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds ptr, ptr %[[ARRAYDESTROY_ELEMENTPAST]], i64 -1 + // CHECK: %[[V12:.*]] = load ptr, ptr %[[ARRAYDESTROY_ELEMENT]], align 8 + // CHECK: call void @llvm.objc.release(ptr %[[V12]]) - // CHECK: %[[ARRAY_BEGIN10:.*]] = getelementptr inbounds [2 x i8*], [2 x i8*]* %[[_COMPOUNDLITERAL]], i32 0, i32 0 - // CHECK: %[[V13:.*]] = getelementptr inbounds i8*, i8** %[[ARRAY_BEGIN10]], i64 2 + // CHECK: %[[ARRAY_BEGIN10:.*]] = getelementptr inbounds [2 x ptr], ptr %[[_COMPOUNDLITERAL]], i32 0, i32 0 + // CHECK: %[[V13:.*]] = getelementptr inbounds ptr, ptr %[[ARRAY_BEGIN10]], i64 2 - // CHECK: %[[ARRAYDESTROY_ELEMENTPAST12:.*]] = phi i8** [ %[[V13]], %{{.*}} ], [ %[[ARRAYDESTROY_ELEMENT13:.*]], %{{.*}} ] - // CHECK: %[[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds i8*, i8** %[[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 - // CHECK: %[[V14:.*]] = load i8*, i8** %[[ARRAYDESTROY_ELEMENT13]], align 8 - // CHECK: call void @llvm.objc.release(i8* %[[V14]]) + // CHECK: %[[ARRAYDESTROY_ELEMENTPAST12:.*]] = phi ptr [ %[[V13]], %{{.*}} ], [ %[[ARRAYDESTROY_ELEMENT13:.*]], %{{.*}} ] + // CHECK: %[[ARRAYDESTROY_ELEMENT13]] = getelementptr inbounds ptr, ptr %[[ARRAYDESTROY_ELEMENTPAST12]], i64 -1 + // CHECK: %[[V14:.*]] = load ptr, ptr %[[ARRAYDESTROY_ELEMENT13]], align 8 + // CHECK: call void @llvm.objc.release(ptr %[[V14]]) } // CHECK: attributes [[NUW]] = { nounwind } diff --git a/clang/test/CodeGenObjC/arc-unopt.m b/clang/test/CodeGenObjC/arc-unopt.m index 2822ca2166e6e3..8f247c64b95972 100644 --- a/clang/test/CodeGenObjC/arc-unopt.m +++ b/clang/test/CodeGenObjC/arc-unopt.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-runtime-has-weak -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-runtime-has-weak -fblocks -fobjc-arc -o - %s | FileCheck %s // A test to ensure that we generate fused calls at -O0. @@ -7,34 +7,32 @@ extern Test0 *test0_helper; return test0_helper; - // CHECK: [[LD:%.*]] = load [[TEST0:%.*]]*, [[TEST0:%.*]]** @test0_helper - // CHECK-NEXT: [[T0:%.*]] = bitcast [[TEST0]]* [[LD]] to i8* - // CHECK-NEXT: [[T1:%.*]] = tail call i8* @llvm.objc.retainAutoreleaseReturnValue(i8* [[T0]]) - // CHECK-NEXT: [[T2:%.*]] = bitcast i8* [[T1]] to [[TEST0]]* - // CHECK-NEXT: ret [[TEST0]]* [[T2]] + // CHECK: [[LD:%.*]] = load ptr, ptr @test0_helper + // CHECK-NEXT: [[T1:%.*]] = tail call ptr @llvm.objc.retainAutoreleaseReturnValue(ptr [[LD]]) + // CHECK-NEXT: ret ptr [[T1]] } id test1(void) { extern id test1_helper; return test1_helper; - // CHECK: [[LD:%.*]] = load i8*, i8** @test1_helper - // CHECK-NEXT: [[T0:%.*]] = tail call i8* @llvm.objc.retainAutoreleaseReturnValue(i8* [[LD]]) - // CHECK-NEXT: ret i8* [[T0]] + // CHECK: [[LD:%.*]] = load ptr, ptr @test1_helper + // CHECK-NEXT: [[T0:%.*]] = tail call ptr @llvm.objc.retainAutoreleaseReturnValue(ptr [[LD]]) + // CHECK-NEXT: ret ptr [[T0]] } void test2(void) { - // CHECK: [[X:%.*]] = alloca i8* - // CHECK-NEXT: store i8* null, i8** [[X]] - // CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[X]]) + // CHECK: [[X:%.*]] = alloca ptr + // CHECK-NEXT: store ptr null, ptr [[X]] + // CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[X]]) // CHECK-NEXT: ret void __weak id x; } id test3(void) { extern id test3_helper(void); - // CHECK: [[T0:%.*]] = call i8* @test3_helper() - // CHECK-NEXT: ret i8* [[T0]] + // CHECK: [[T0:%.*]] = call ptr @test3_helper() + // CHECK-NEXT: ret ptr [[T0]] return test3_helper(); } @@ -42,9 +40,8 @@ @interface Test4 { id x; } @end @interface Test4_sub : Test4 { id y; } @end Test4 *test4(void) { extern Test4_sub *test4_helper(void); - // CHECK: [[T0:%.*]] = call [[TEST4S:%.*]]* @test4_helper() - // CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST4S]]* [[T0]] to [[TEST4:%.*]]* - // CHECK-NEXT: ret [[TEST4]]* [[T1]] + // CHECK: [[T0:%.*]] = call ptr @test4_helper() + // CHECK-NEXT: ret ptr [[T0]] return test4_helper(); } @@ -56,14 +53,12 @@ void test5(void) { y = 0; // CHECK-LABEL: define{{.*}} void @test5() -// CHECK: [[X:%.*]] = alloca [[TEST5:%.*]]*, -// CHECK-NEXT: [[Y:%.*]] = alloca [[TEST5:%.*]]*, -// CHECK-NEXT: store [[TEST5]]* null, [[TEST5]]** [[X]], -// CHECK-NEXT: store [[TEST5]]* null, [[TEST5]]** [[Y]], -// CHECK-NEXT: [[T0:%.*]] = load [[TEST5]]*, [[TEST5]]** [[Y]], -// CHECK-NEXT: [[T1:%.*]] = bitcast [[TEST5]]** [[X]] to i8** -// CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST5]]* [[T0]] to i8* -// CHECK-NEXT: call void @llvm.objc.storeStrong(i8** [[T1]], i8* [[T2]]) -// CHECK-NEXT: [[T3:%.*]] = icmp ne [[TEST5]]* [[T0]], null +// CHECK: [[X:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, +// CHECK-NEXT: store ptr null, ptr [[X]], +// CHECK-NEXT: store ptr null, ptr [[Y]], +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]], +// CHECK-NEXT: call void @llvm.objc.storeStrong(ptr [[X]], ptr [[T0]]) +// CHECK-NEXT: [[T3:%.*]] = icmp ne ptr [[T0]], null // CHECK-NEXT: br i1 [[T3]], } diff --git a/clang/test/CodeGenObjC/arc-unoptimized-byref-var.m b/clang/test/CodeGenObjC/arc-unoptimized-byref-var.m index 66fa21ea02fe44..870580c984f7c3 100644 --- a/clang/test/CodeGenObjC/arc-unoptimized-byref-var.m +++ b/clang/test/CodeGenObjC/arc-unoptimized-byref-var.m @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=CHECK-UNOPT %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck -check-prefix=CHECK-UNOPT %s // rdar://12530881 void test19(void) { __block id x; ^{ (void)x; }; // CHECK-UNOPT-LABEL: define internal void @__Block_byref_object_copy -// CHECK-UNOPT: [[X:%.*]] = getelementptr inbounds [[BYREF_T:%.*]], [[BYREF_T:%.*]]* [[VAR:%.*]], i32 0, i32 6 -// CHECK-UNOPT: [[X2:%.*]] = getelementptr inbounds [[BYREF_T:%.*]], [[BYREF_T:%.*]]* [[VAR1:%.*]], i32 0, i32 6 -// CHECK-UNOPT-NEXT: [[SIX:%.*]] = load i8*, i8** [[X2]], align 8 -// CHECK-UNOPT-NEXT: store i8* null, i8** [[X]], align 8 -// CHECK-UNOPT-NEXT: call void @llvm.objc.storeStrong(i8** [[X]], i8* [[SIX]]) [[NUW:#[0-9]+]] -// CHECK-UNOPT-NEXT: call void @llvm.objc.storeStrong(i8** [[X2]], i8* null) [[NUW]] +// CHECK-UNOPT: [[X:%.*]] = getelementptr inbounds [[BYREF_T:%.*]], ptr [[VAR:%.*]], i32 0, i32 6 +// CHECK-UNOPT: [[X2:%.*]] = getelementptr inbounds [[BYREF_T:%.*]], ptr [[VAR1:%.*]], i32 0, i32 6 +// CHECK-UNOPT-NEXT: [[SIX:%.*]] = load ptr, ptr [[X2]], align 8 +// CHECK-UNOPT-NEXT: store ptr null, ptr [[X]], align 8 +// CHECK-UNOPT-NEXT: call void @llvm.objc.storeStrong(ptr [[X]], ptr [[SIX]]) [[NUW:#[0-9]+]] +// CHECK-UNOPT-NEXT: call void @llvm.objc.storeStrong(ptr [[X2]], ptr null) [[NUW]] // CHECK-UNOPT-NEXT: ret void } diff --git a/clang/test/CodeGenObjC/arc-weak-property.m b/clang/test/CodeGenObjC/arc-weak-property.m index 765be75805e60f..b62fdec3a06036 100644 --- a/clang/test/CodeGenObjC/arc-weak-property.m +++ b/clang/test/CodeGenObjC/arc-weak-property.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-runtime-has-weak -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-runtime-has-weak -fblocks -fobjc-arc -o - %s | FileCheck %s // rdar://8899430 @interface WeakPropertyTest { @@ -11,45 +11,39 @@ @implementation WeakPropertyTest @synthesize PROP; @end -// CHECK: define internal i8* @"\01-[WeakPropertyTest PROP]" -// CHECK: [[SELF:%.*]] = alloca [[WPT:%.*]]*, -// CHECK-NEXT: [[CMD:%.*]] = alloca i8*, -// CHECK-NEXT: store [[WPT]]* {{%.*}}, [[WPT]]** [[SELF]] -// CHECK-NEXT: store i8* {{%.*}}, i8** [[CMD]] -// CHECK-NEXT: [[T0:%.*]] = load [[WPT]]*, [[WPT]]** [[SELF]] -// CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP" -// CHECK-NEXT: [[T2:%.*]] = bitcast [[WPT]]* [[T0]] to i8* -// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i64 [[T1]] -// CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i8** -// CHECK-NEXT: [[T5:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[T4]]) -// CHECK-NEXT: [[T6:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T5]]) -// CHECK-NEXT: ret i8* [[T6]] +// CHECK: define internal ptr @"\01-[WeakPropertyTest PROP]" +// CHECK: [[SELF:%.*]] = alloca ptr, +// CHECK-NEXT: [[CMD:%.*]] = alloca ptr, +// CHECK-NEXT: store ptr {{%.*}}, ptr [[SELF]] +// CHECK-NEXT: store ptr {{%.*}}, ptr [[CMD]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[SELF]] +// CHECK-NEXT: [[T1:%.*]] = load i64, ptr @"OBJC_IVAR_$_WeakPropertyTest.PROP" +// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, ptr [[T0]], i64 [[T1]] +// CHECK-NEXT: [[T5:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[T3]]) +// CHECK-NEXT: [[T6:%.*]] = tail call ptr @llvm.objc.autoreleaseReturnValue(ptr [[T5]]) +// CHECK-NEXT: ret ptr [[T6]] // CHECK: define internal void @"\01-[WeakPropertyTest setPROP:]" -// CHECK: [[SELF:%.*]] = alloca [[WPT:%.*]]*, -// CHECK-NEXT: [[CMD:%.*]] = alloca i8*, -// CHECK-NEXT: [[PROP:%.*]] = alloca i8*, -// CHECK-NEXT: store [[WPT]]* {{%.*}}, [[WPT]]** [[SELF]] -// CHECK-NEXT: store i8* {{%.*}}, i8** [[CMD]] -// CHECK-NEXT: store i8* {{%.*}}, i8** [[PROP]] -// CHECK-NEXT: [[V:%.*]] = load i8*, i8** [[PROP]] -// CHECK-NEXT: [[T0:%.*]] = load [[WPT]]*, [[WPT]]** [[SELF]] -// CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP" -// CHECK-NEXT: [[T2:%.*]] = bitcast [[WPT]]* [[T0]] to i8* -// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i64 [[T1]] -// CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i8** -// CHECK-NEXT: call i8* @llvm.objc.storeWeak(i8** [[T4]], i8* [[V]]) +// CHECK: [[SELF:%.*]] = alloca ptr, +// CHECK-NEXT: [[CMD:%.*]] = alloca ptr, +// CHECK-NEXT: [[PROP:%.*]] = alloca ptr, +// CHECK-NEXT: store ptr {{%.*}}, ptr [[SELF]] +// CHECK-NEXT: store ptr {{%.*}}, ptr [[CMD]] +// CHECK-NEXT: store ptr {{%.*}}, ptr [[PROP]] +// CHECK-NEXT: [[V:%.*]] = load ptr, ptr [[PROP]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[SELF]] +// CHECK-NEXT: [[T1:%.*]] = load i64, ptr @"OBJC_IVAR_$_WeakPropertyTest.PROP" +// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, ptr [[T0]], i64 [[T1]] +// CHECK-NEXT: call ptr @llvm.objc.storeWeak(ptr [[T3]], ptr [[V]]) // CHECK-NEXT: ret void // CHECK: define internal void @"\01-[WeakPropertyTest .cxx_destruct]" -// CHECK: [[SELF:%.*]] = alloca [[WPT:%.*]]*, -// CHECK-NEXT: [[CMD:%.*]] = alloca i8*, -// CHECK-NEXT: store [[WPT]]* {{%.*}}, [[WPT]]** [[SELF]] -// CHECK-NEXT: store i8* {{%.*}}, i8** [[CMD]] -// CHECK-NEXT: [[T0:%.*]] = load [[WPT]]*, [[WPT]]** [[SELF]] -// CHECK-NEXT: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_WeakPropertyTest.PROP" -// CHECK-NEXT: [[T2:%.*]] = bitcast [[WPT]]* [[T0]] to i8* -// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, i8* [[T2]], i64 [[T1]] -// CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i8** -// CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[T4]]) +// CHECK: [[SELF:%.*]] = alloca ptr, +// CHECK-NEXT: [[CMD:%.*]] = alloca ptr, +// CHECK-NEXT: store ptr {{%.*}}, ptr [[SELF]] +// CHECK-NEXT: store ptr {{%.*}}, ptr [[CMD]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[SELF]] +// CHECK-NEXT: [[T1:%.*]] = load i64, ptr @"OBJC_IVAR_$_WeakPropertyTest.PROP" +// CHECK-NEXT: [[T3:%.*]] = getelementptr inbounds i8, ptr [[T0]], i64 [[T1]] +// CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[T3]]) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/arc-weak.m b/clang/test/CodeGenObjC/arc-weak.m index d0a22acce9bd8f..9cc622cd20eda7 100644 --- a/clang/test/CodeGenObjC/arc-weak.m +++ b/clang/test/CodeGenObjC/arc-weak.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck %s __attribute((objc_root_class)) @interface A @end @interface B : A @end @@ -9,12 +9,8 @@ void test0(__weak B **src) { __weak A *dest = *src; } // CHECK-LABEL: define{{.*}} void @test0 -// CHECK: [[SRC:%.*]] = alloca [[B:%.*]]**, align 8 -// CHECK: [[DEST:%.*]] = alloca [[A:%.*]]*, align 8 -// CHECK: [[T0:%.*]] = load [[B]]**, [[B]]*** [[SRC]], align 8 -// CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]** [[T0]] to [[A]]** -// CHECK-NEXT: [[T2:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK-NEXT: [[T3:%.*]] = bitcast [[A]]** [[T1]] to i8** -// CHECK-NEXT: call void @llvm.objc.copyWeak(i8** [[T2]], i8** [[T3]]) -// CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK: call void @llvm.objc.destroyWeak(i8** [[T0]]) +// CHECK: [[SRC:%.*]] = alloca ptr, align 8 +// CHECK: [[DEST:%.*]] = alloca ptr, align 8 +// CHECK: [[T0:%.*]] = load ptr, ptr [[SRC]], align 8 +// CHECK-NEXT: call void @llvm.objc.copyWeak(ptr [[DEST]], ptr [[T0]]) +// CHECK: call void @llvm.objc.destroyWeak(ptr [[DEST]]) diff --git a/clang/test/CodeGenObjC/arc-with-atthrow.m b/clang/test/CodeGenObjC/arc-with-atthrow.m index 40a10d63295be9..7fddad22ed1783 100644 --- a/clang/test/CodeGenObjC/arc-with-atthrow.m +++ b/clang/test/CodeGenObjC/arc-with-atthrow.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-exceptions -o - %s | FileCheck %s // pr10411 // rdar://10042689 @@ -10,10 +10,10 @@ void test(void) { // TODO: We should probably emit this specific pattern without the reclaim. // CHECK-LABEL: define{{.*}} void @test() -// CHECK: [[T0:%.*]] = call i8* @make() -// CHECK-NEXT: [[T1:%.*]] = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* [[T0]]) -// CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.autorelease(i8* [[T1]]) -// CHECK-NEXT: call void @objc_exception_throw(i8* [[T2]]) [[NR:#[0-9]+]] +// CHECK: [[T0:%.*]] = call ptr @make() +// CHECK-NEXT: [[T1:%.*]] = notail call ptr @llvm.objc.retainAutoreleasedReturnValue(ptr [[T0]]) +// CHECK-NEXT: [[T2:%.*]] = call ptr @llvm.objc.autorelease(ptr [[T1]]) +// CHECK-NEXT: call void @objc_exception_throw(ptr [[T2]]) [[NR:#[0-9]+]] // CHECK-NEXT: unreachable // CHECK: attributes [[NR]] = { noreturn } diff --git a/clang/test/CodeGenObjC/arc.ll b/clang/test/CodeGenObjC/arc.ll index cfc88c3c7eb715..90187de0a6e7e6 100644 --- a/clang/test/CodeGenObjC/arc.ll +++ b/clang/test/CodeGenObjC/arc.ll @@ -1,25 +1,25 @@ ; RUN: %clang_cc1 -triple x86_64-apple-darwin10 -Os -emit-llvm -fobjc-arc -o - %s | FileCheck %s -declare i8* @llvm.objc.retain(i8*) -declare void @llvm.objc.release(i8*) +declare ptr @llvm.objc.retain(ptr) +declare void @llvm.objc.release(ptr) ; CHECK-LABEL: define void @test( ; CHECK-NOT: @objc_ ; CHECK: } -define void @test(i8* %x, i1* %p) nounwind { +define void @test(ptr %x, ptr %p) nounwind { entry: br label %loop loop: - call i8* @llvm.objc.retain(i8* %x) - %q = load i1, i1* %p + call ptr @llvm.objc.retain(ptr %x) + %q = load i1, ptr %p br i1 %q, label %loop.more, label %exit loop.more: - call void @llvm.objc.release(i8* %x) + call void @llvm.objc.release(ptr %x) br label %loop exit: - call void @llvm.objc.release(i8* %x) + call void @llvm.objc.release(ptr %x) ret void } diff --git a/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m b/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m index a6a8dc5ecb8306..e179bdacb2ef72 100644 --- a/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m +++ b/clang/test/CodeGenObjC/arm-atomic-scalar-setter-getter.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple armv7-apple-darwin10 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ARM %s +// RUN: %clang_cc1 -triple armv7-apple-darwin10 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-ARM %s // rdar://7761305 @interface I @@ -8,6 +8,6 @@ @interface I @implementation I @synthesize LONG_PROP; @end -// CHECK-ARM: call void @objc_copyStruct(i8* noundef %{{.*}}, i8* noundef %{{.*}}, i32 noundef 8, i1 noundef zeroext true, i1 noundef zeroext false) -// CHECK-ARM: call void @objc_copyStruct(i8* noundef %{{.*}}, i8* noundef %{{.*}}, i32 noundef 8, i1 noundef zeroext true, i1 noundef zeroext false) +// CHECK-ARM: call void @objc_copyStruct(ptr noundef %{{.*}}, ptr noundef %{{.*}}, i32 noundef 8, i1 noundef zeroext true, i1 noundef zeroext false) +// CHECK-ARM: call void @objc_copyStruct(ptr noundef %{{.*}}, ptr noundef %{{.*}}, i32 noundef 8, i1 noundef zeroext true, i1 noundef zeroext false) diff --git a/clang/test/CodeGenObjC/arm64-int32-ivar.m b/clang/test/CodeGenObjC/arm64-int32-ivar.m index e84a838ffe0487..76d0543b20b112 100644 --- a/clang/test/CodeGenObjC/arm64-int32-ivar.m +++ b/clang/test/CodeGenObjC/arm64-int32-ivar.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple arm64-apple-ios -emit-llvm -o - %s | FileCheck %s // rdar://12617764 // CHECK: @"OBJC_IVAR_$_I.IVAR2" = global i32 8 @@ -11,7 +11,7 @@ @interface I @end @implementation I -// CHECK: [[IVAR:%.*]] = load i32, i32* @"OBJC_IVAR_$_I.IVAR2" +// CHECK: [[IVAR:%.*]] = load i32, ptr @"OBJC_IVAR_$_I.IVAR2" // CHECK: [[CONV:%.*]] = sext i32 [[IVAR]] to i64 - (id) METH { return IVAR2; } @end diff --git a/clang/test/CodeGenObjC/atomic-aggregate-property.m b/clang/test/CodeGenObjC/atomic-aggregate-property.m index a37659c8e81517..b574cc3ce4a66b 100644 --- a/clang/test/CodeGenObjC/atomic-aggregate-property.m +++ b/clang/test/CodeGenObjC/atomic-aggregate-property.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s +// RUN: %clang_cc1 -no-enable-noundef-analysis -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s +// RUN: %clang_cc1 -no-enable-noundef-analysis -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s // rdar: // 7849824 // @@ -29,22 +29,22 @@ @implementation A @synthesize a; @end // CHECK-LP64: define internal double @"\01-[A x]"( -// CHECK-LP64: load atomic i64, i64* {{%.*}} unordered, align 8 +// CHECK-LP64: load atomic i64, ptr {{%.*}} unordered, align 8 // CHECK-LP64: define internal void @"\01-[A setX:]"( -// CHECK-LP64: store atomic i64 {{%.*}}, i64* {{%.*}} unordered, align 8 +// CHECK-LP64: store atomic i64 {{%.*}}, ptr {{%.*}} unordered, align 8 // CHECK-LP64: define internal void @"\01-[A y]"( -// CHECK-LP64: call void @objc_copyStruct(i8* {{%.*}}, i8* {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) +// CHECK-LP64: call void @objc_copyStruct(ptr {{%.*}}, ptr {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) // CHECK-LP64: define internal void @"\01-[A setY:]"( -// CHECK-LP64: call void @objc_copyStruct(i8* {{%.*}}, i8* {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) +// CHECK-LP64: call void @objc_copyStruct(ptr {{%.*}}, ptr {{%.*}}, i64 32, i1 zeroext true, i1 zeroext false) // CHECK-LP64: define internal void @"\01-[A z]"( -// CHECK-LP64: call i8* @objc_memmove_collectable( +// CHECK-LP64: call ptr @objc_memmove_collectable( // CHECK-LP64: define internal void @"\01-[A setZ:]"( -// CHECK-LP64: call i8* @objc_memmove_collectable( +// CHECK-LP64: call ptr @objc_memmove_collectable( // CHECK-LP64: define internal void @"\01-[A a]"( // (do nothing) diff --git a/clang/test/CodeGenObjC/attr-exception.m b/clang/test/CodeGenObjC/attr-exception.m index 8769630af2f989..5a038796d24f4a 100644 --- a/clang/test/CodeGenObjC/attr-exception.m +++ b/clang/test/CodeGenObjC/attr-exception.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fexceptions -fobjc-exceptions -fvisibility=hidden -o - %s | FileCheck -check-prefix=CHECK-HIDDEN %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fexceptions -fobjc-exceptions -fvisibility=hidden -o - %s | FileCheck -check-prefix=CHECK-HIDDEN %s __attribute__((objc_root_class)) @interface Root { @@ -13,8 +13,8 @@ @interface A : Root @implementation A @end -// CHECK: @"OBJC_EHTYPE_$_A" ={{.*}} global {{%.*}} { i8** getelementptr inbounds (i8*, i8** @objc_ehtype_vtable, i32 2) -// CHECK-HIDDEN: @"OBJC_EHTYPE_$_A" = hidden global {{%.*}} { i8** getelementptr inbounds (i8*, i8** @objc_ehtype_vtable, i32 2) +// CHECK: @"OBJC_EHTYPE_$_A" ={{.*}} global {{%.*}} { ptr getelementptr inbounds (ptr, ptr @objc_ehtype_vtable, i32 2) +// CHECK-HIDDEN: @"OBJC_EHTYPE_$_A" = hidden global {{%.*}} { ptr getelementptr inbounds (ptr, ptr @objc_ehtype_vtable, i32 2) __attribute__((objc_exception)) __attribute__((visibility("default"))) @@ -23,5 +23,5 @@ @interface B : Root @implementation B @end -// CHECK: @"OBJC_EHTYPE_$_B" ={{.*}} global {{%.*}} { i8** getelementptr inbounds (i8*, i8** @objc_ehtype_vtable, i32 2) -// CHECK-HIDDEN: @"OBJC_EHTYPE_$_B" ={{.*}} global {{%.*}} { i8** getelementptr inbounds (i8*, i8** @objc_ehtype_vtable, i32 2) +// CHECK: @"OBJC_EHTYPE_$_B" ={{.*}} global {{%.*}} { ptr getelementptr inbounds (ptr, ptr @objc_ehtype_vtable, i32 2) +// CHECK-HIDDEN: @"OBJC_EHTYPE_$_B" ={{.*}} global {{%.*}} { ptr getelementptr inbounds (ptr, ptr @objc_ehtype_vtable, i32 2) diff --git a/clang/test/CodeGenObjC/attr-noreturn.m b/clang/test/CodeGenObjC/attr-noreturn.m index 7645fd9a7cb93c..70a117616fda96 100644 --- a/clang/test/CodeGenObjC/attr-noreturn.m +++ b/clang/test/CodeGenObjC/attr-noreturn.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MRC -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARC +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MRC +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-ARC __attribute__((objc_root_class)) @interface Root @@ -22,14 +22,14 @@ void testInstanceMethod(Derived *x) { [x fail]; } // CHECK-LABEL: @testInstanceMethod -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}} +// CHECK: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}){{$}} // A direct call of a class method will normally never have a null receiver. void testClassMethod(void) { [Derived abort]; } // CHECK-LABEL: @testClassMethod -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN:#[0-9]+]] +// CHECK: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}) [[NORETURN:#[0-9]+]] __attribute__((weak_import)) @interface WeakMiddle : Base @@ -44,7 +44,7 @@ void testWeakImport(void) { [WeakDerived abort]; } // CHECK-LABEL: @testWeakImport -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}} +// CHECK: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}){{$}} @interface Derived (MyMethods) @end @@ -59,8 +59,8 @@ - (void) testSelfInstanceMethod { [self fail]; } // CHECK-LABEL: [Derived(MyMethods) testSelfInstanceMethod] -// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}} -// CHECK-ARC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN]] +// CHECK-MRC: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}){{$}} +// CHECK-ARC: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}) [[NORETURN]] // The ARC rule doesn't apply in -init methods. - (id) initWhileTestingSelfInstanceMethod { @@ -69,15 +69,15 @@ - (id) initWhileTestingSelfInstanceMethod { return self; } // CHECK-LABEL: [Derived(MyMethods) initWhileTestingSelfInstanceMethod] -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}} +// CHECK: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}){{$}} // Same thing applies to class methods. + (void) testSelfClassMethod { [self abort]; } // CHECK-LABEL: [Derived(MyMethods) testSelfClassMethod] -// CHECK-MRC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}){{$}} -// CHECK-ARC: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* {{.*}}, i8* {{.*}}) [[NORETURN]] +// CHECK-MRC: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}){{$}} +// CHECK-ARC: call void @objc_msgSend(ptr {{.*}}, ptr {{.*}}) [[NORETURN]] // Super invocations may never be used with a null pointer; this is a // constraint on user code when it isn't enforced by the ARC const-self @@ -86,13 +86,13 @@ - (void) testSuperInstanceMethod { [super fail]; } // CHECK-LABEL: [Derived(MyMethods) testSuperInstanceMethod] -// CHECK: call void bitcast (i8* ([[SUPER_T:%.*]]*, i8*, ...)* @objc_msgSendSuper2 to void ([[SUPER_T]]*, i8*)*)([[SUPER_T]]* {{.*}}, i8* {{.*}}) [[NORETURN]] +// CHECK: call void @objc_msgSendSuper2(ptr {{.*}}, ptr {{.*}}) [[NORETURN]] + (void) testSuperClassMethod { [super abort]; } // CHECK-LABEL: [Derived(MyMethods) testSuperClassMethod] -// CHECK: call void bitcast (i8* ([[SUPER_T]]*, i8*, ...)* @objc_msgSendSuper2 to void ([[SUPER_T]]*, i8*)*)([[SUPER_T]]* {{.*}}, i8* {{.*}}) [[NORETURN]] +// CHECK: call void @objc_msgSendSuper2(ptr {{.*}}, ptr {{.*}}) [[NORETURN]] @end // CHECK: attributes [[NORETURN]] = { noreturn } diff --git a/clang/test/CodeGenObjC/attr-objc-arc-inert.m b/clang/test/CodeGenObjC/attr-objc-arc-inert.m index e830250b624217..bbfe6b3c17d94c 100644 --- a/clang/test/CodeGenObjC/attr-objc-arc-inert.m +++ b/clang/test/CodeGenObjC/attr-objc-arc-inert.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fblocks -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fblocks -emit-llvm -o - %s | FileCheck %s -// CHECK: @{{.*}} = private global %{{.*}} { i32* getelementptr inbounds ([0 x i32], [0 x i32]* @__CFConstantStringClassReference, i32 0, i32 0), i32 1992, i8* getelementptr inbounds ([4 x i8], [4 x i8]* @{{.*}}, i32 0, i32 0), i64 3 }, section "__DATA,__cfstring", align 8 #[[ATTRNUM0:[0-9]+]] -// CHECK: @{{.*}} = internal constant { i8**, i32, i32, i8*, %{{.*}}* } { i8** @_NSConcreteGlobalBlock, i32 1342177280, i32 0, i8* bitcast (i32 (i8*)* @{{.*}} to i8*), %{{.*}}* bitcast ({ i64, i64, i8*, i8* }* @{{.*}} to %{{.*}}*) }, align 8 #[[ATTRNUM0]] +// CHECK: @{{.*}} = private global %{{.*}} { ptr @__CFConstantStringClassReference, i32 1992, ptr @{{.*}}, i64 3 }, section "__DATA,__cfstring", align 8 #[[ATTRNUM0:[0-9]+]] +// CHECK: @{{.*}} = internal constant { ptr, i32, i32, ptr, ptr } { ptr @_NSConcreteGlobalBlock, i32 1342177280, i32 0, ptr @{{.*}}, ptr @{{.*}} }, align 8 #[[ATTRNUM0]] @class NSString; diff --git a/clang/test/CodeGenObjC/attr-objc-runtime-visible.m b/clang/test/CodeGenObjC/attr-objc-runtime-visible.m index 4899ad9c5074af..21415cc8ac7726 100644 --- a/clang/test/CodeGenObjC/attr-objc-runtime-visible.m +++ b/clang/test/CodeGenObjC/attr-objc-runtime-visible.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -fobjc-runtime=macosx-10.9.0 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -fobjc-runtime=macosx-10.9.0 -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.9.0 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.9.0 -emit-llvm %s -o - | FileCheck %s @interface Root +(Class)class; @@ -12,8 +12,8 @@ @interface A : Root @end // CHECK: [[CLASSNAME:@.*]] = private unnamed_addr constant [22 x i8] c"MyRuntimeVisibleClass -// CHECK: define{{.*}} i8* @getClass() #0 { +// CHECK: define{{.*}} ptr @getClass() #0 { Class getClass(void) { - // CHECK: call i8* @objc_lookUpClass(i8* getelementptr inbounds ([22 x i8], [22 x i8]* [[CLASSNAME]], i32 0, i32 0)) #2 + // CHECK: call ptr @objc_lookUpClass(ptr [[CLASSNAME]]) #2 return [A class]; } diff --git a/clang/test/CodeGenObjC/autorelease.m b/clang/test/CodeGenObjC/autorelease.m index a724d221c07715..d7aa831596304d 100644 --- a/clang/test/CodeGenObjC/autorelease.m +++ b/clang/test/CodeGenObjC/autorelease.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-runtime=macosx-10.7 -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin11 -emit-llvm -fobjc-runtime=macosx-10.7 -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-runtime=macosx-10.7 -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -emit-llvm -fobjc-runtime=macosx-10.7 -fexceptions -fobjc-exceptions -o - %s | FileCheck %s // rdar://8881826 // rdar://9412038 @@ -25,8 +25,8 @@ + (id) MyAlloc { } @end -// CHECK: call i8* @llvm.objc.autoreleasePoolPush -// CHECK: [[T:%.*]] = load i8*, i8** [[A:%.*]] +// CHECK: call ptr @llvm.objc.autoreleasePoolPush +// CHECK: [[T:%.*]] = load ptr, ptr [[A:%.*]] // CHECK: call void @llvm.objc.autoreleasePoolPop // rdar://13660038 @@ -39,15 +39,15 @@ int tryTo(int (*f)(void)) { return 0; } } -// CHECK-LABEL: define{{.*}} i32 @tryTo(i32 ()* +// CHECK-LABEL: define{{.*}} i32 @tryTo(ptr // CHECK: [[RET:%.*]] = alloca i32, -// CHECK: [[T0:%.*]] = call i8* @llvm.objc.autoreleasePoolPush() -// CHECK-NEXT: [[T1:%.*]] = load i32 ()*, i32 ()** {{%.*}}, +// CHECK: [[T0:%.*]] = call ptr @llvm.objc.autoreleasePoolPush() +// CHECK-NEXT: [[T1:%.*]] = load ptr, ptr {{%.*}}, // CHECK-NEXT: [[T2:%.*]] = invoke i32 [[T1]]() -// CHECK: store i32 [[T2]], i32* [[RET]] -// CHECK: invoke void @objc_autoreleasePoolPop(i8* [[T0]]) -// CHECK: landingpad { i8*, i32 } -// CHECK-NEXT: catch i8* null -// CHECK: call i8* @objc_begin_catch -// CHECK-NEXT: store i32 0, i32* [[RET]] +// CHECK: store i32 [[T2]], ptr [[RET]] +// CHECK: invoke void @objc_autoreleasePoolPop(ptr [[T0]]) +// CHECK: landingpad { ptr, i32 } +// CHECK-NEXT: catch ptr null +// CHECK: call ptr @objc_begin_catch +// CHECK-NEXT: store i32 0, ptr [[RET]] // CHECK: call void @objc_end_catch() diff --git a/clang/test/CodeGenObjC/availability-cf-link-guard.m b/clang/test/CodeGenObjC/availability-cf-link-guard.m index 770eef87aed01c..cb21c2e79ade3d 100644 --- a/clang/test/CodeGenObjC/availability-cf-link-guard.m +++ b/clang/test/CodeGenObjC/availability-cf-link-guard.m @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.11 -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D USE_BUILTIN %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D DEF_CF %s | FileCheck --check-prefixes=CHECK_CF,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.12 -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macos10.15 -DCHECK_OS="macos 10.15.1" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios13.0 -DCHECK_OS="ios 14" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-tvos13.0 -DCHECK_OS="tvos 14" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-watchos6.0 -DCHECK_OS="watchos 7" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios12.0 -DCHECK_OS="ios 13" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-tvos12.0 -DCHECK_OS="tvos 13" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-watchos5.0 -DCHECK_OS="watchos 6" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D USE_BUILTIN %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.11 -emit-llvm -o - -D DEF_CF %s | FileCheck --check-prefixes=CHECK_CF,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.12 -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple x86_64-unknown-linux -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple x86_64-apple-macos10.15 -DCHECK_OS="macos 10.15.1" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple arm64-apple-ios13.0 -DCHECK_OS="ios 14" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple arm64-apple-tvos13.0 -DCHECK_OS="tvos 14" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple arm64-apple-watchos6.0 -DCHECK_OS="watchos 7" -emit-llvm -o - %s | FileCheck --check-prefix=CHECK_NO_GUARD %s +// RUN: %clang_cc1 -triple arm64-apple-ios12.0 -DCHECK_OS="ios 13" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple arm64-apple-tvos12.0 -DCHECK_OS="tvos 13" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s +// RUN: %clang_cc1 -triple arm64-apple-watchos5.0 -DCHECK_OS="watchos 6" -emit-llvm -o - %s | FileCheck --check-prefixes=CHECK,CHECK_LINK_OPT %s #ifdef DEF_CF struct CFBundle; typedef struct CFBundle *CFBundleRef; unsigned CFBundleGetVersionNumber(CFBundleRef bundle); -// CHECK_CF: declare i32 @CFBundleGetVersionNumber(%struct.CFBundle* noundef) +// CHECK_CF: declare i32 @CFBundleGetVersionNumber(ptr noundef) // CHECK_CF: @__clang_at_available_requires_core_foundation_framework // CHECK_CF-NEXT: call {{.*}}@CFBundleGetVersionNumber #endif @@ -39,10 +39,10 @@ void use_at_available(void) { // CHECK: @llvm.compiler.used{{.*}}@__clang_at_available_requires_core_foundation_framework -// CHECK: declare i32 @CFBundleGetVersionNumber(i8*) +// CHECK: declare i32 @CFBundleGetVersionNumber(ptr) // CHECK-LABEL: linkonce hidden void @__clang_at_available_requires_core_foundation_framework -// CHECK: call i32 @CFBundleGetVersionNumber(i8* null) +// CHECK: call i32 @CFBundleGetVersionNumber(ptr null) // CHECK-NEXT: unreachable // CHECK_NO_GUARD-NOT: __clang_at_available_requires_core_foundation_framework diff --git a/clang/test/CodeGenObjC/bitfield-access.m b/clang/test/CodeGenObjC/bitfield-access.m index 273eba2b7fbb28..0ba73776b21251 100644 --- a/clang/test/CodeGenObjC/bitfield-access.m +++ b/clang/test/CodeGenObjC/bitfield-access.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t1 %s +// RUN: %clang_cc1 -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t1 %s // RUN: FileCheck -check-prefix=CHECK-I386 < %t1 %s -// RUN: %clang_cc1 -no-opaque-pointers -triple armv6-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -target-abi apcs-gnu -emit-llvm -o %t2 %s +// RUN: %clang_cc1 -triple armv6-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -target-abi apcs-gnu -emit-llvm -o %t2 %s // RUN: FileCheck -check-prefix=CHECK-ARM < %t2 %s @interface I0 { @@ -15,7 +15,7 @@ @interface I0 { // end of the structure. // // CHECK-I386-LABEL: define{{.*}} i32 @f0( -// CHECK-I386: [[t0_0:%.*]] = load i8, i8* {{.*}}, align 1 +// CHECK-I386: [[t0_0:%.*]] = load i8, ptr {{.*}}, align 1 // CHECK-I386: lshr i8 [[t0_0]], 7 // CHECK-I386: } int f0(I0 *a) { @@ -26,8 +26,7 @@ int f0(I0 *a) { // // CHECK-ARM-LABEL: define{{.*}} i32 @f1( // CHECK-ARM: [[t1_ptr:%.*]] = getelementptr -// CHECK-ARM: [[t1_base:%.*]] = bitcast i8* [[t1_ptr]] to i40* -// CHECK-ARM: [[t1_0:%.*]] = load i40, i40* [[t1_base]], align 1 +// CHECK-ARM: [[t1_0:%.*]] = load i40, ptr [[t1_ptr]], align 1 // CHECK-ARM: [[t1_1:%.*]] = lshr i40 [[t1_0]], 1 // CHECK-ARM: [[t1_2:%.*]] = and i40 [[t1_1]], // CHECK-ARM: trunc i40 [[t1_2]] to i32 diff --git a/clang/test/CodeGenObjC/block-byref-variable-layout.m b/clang/test/CodeGenObjC/block-byref-variable-layout.m index eac168d88bcdd0..63c338bc4be669 100644 --- a/clang/test/CodeGenObjC/block-byref-variable-layout.m +++ b/clang/test/CodeGenObjC/block-byref-variable-layout.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -fobjc-arc -fobjc-runtime-has-weak -triple x86_64-apple-darwin -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fblocks -fobjc-arc -fobjc-runtime-has-weak -triple x86_64-apple-darwin -emit-llvm %s -o - | FileCheck %s // rdar://12759433 @class NSString; @@ -8,7 +8,7 @@ void Test12759433(void) { void (^block)(void) = ^{ uuByref = 0; }; block(); } -// CHECK: %struct.__block_byref_uuByref = type { i8*, %struct.__block_byref_uuByref*, i32, i32, [[ZERO:%.*]]* } +// CHECK: %struct.__block_byref_uuByref = type { ptr, ptr, i32, i32, ptr } int main(void) { __block __weak id wid; __block long XXX; @@ -21,20 +21,20 @@ int main(void) { } import; void (^c)(void) = ^{ // Inline flag for BYREF variable layout (1107296256): BLOCK_BYREF_HAS_COPY_DISPOSE BLOCK_BYREF_LAYOUT_WEAK -// CHECK: store i32 1107296256, i32* [[T0:%.*]] +// CHECK: store i32 1107296256, ptr [[T0:%.*]] wid = 0; // Inline flag for BYREF variable layout (536870912): BLOCK_BYREF_LAYOUT_NON_OBJECT -// CHECK: store i32 536870912, i32* [[T1:%.*]] +// CHECK: store i32 536870912, ptr [[T1:%.*]] XXX = 12345; // Inline flag for BYREF variable layout (838860800): BLOCK_BYREF_HAS_COPY_DISPOSE BLOCK_BYREF_LAYOUT_STRONG -// CHECK: store i32 838860800, i32* [[T2:%.*]] +// CHECK: store i32 838860800, ptr [[T2:%.*]] ID = 0; // Inline flag for BYREF variable layout (268435456): BLOCK_BYREF_LAYOUT_EXTENDED // BYREF variable layout: BL_NON_OBJECT_WORD:3, BL_UNRETAINED:1, BL_OPERATOR:0 -// CHECK: store i32 268435456, i32* [[T3:%.*]] +// CHECK: store i32 268435456, ptr [[T3:%.*]] import.iD = 3.14; }; diff --git a/clang/test/CodeGenObjC/blocks-1.m b/clang/test/CodeGenObjC/blocks-1.m index 141bd5be4373ee..6a25e5c854e270 100644 --- a/clang/test/CodeGenObjC/blocks-1.m +++ b/clang/test/CodeGenObjC/blocks-1.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -emit-llvm -o - -fobjc-gc -fblocks -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 | FileCheck %s --check-prefix=CHECK --check-prefix=OBJC -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ %s -emit-llvm -o - -fobjc-gc -fblocks -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 | FileCheck %s --check-prefix=CHECK --check-prefix=OBJCXX +// RUN: %clang_cc1 %s -emit-llvm -o - -fobjc-gc -fblocks -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 | FileCheck %s --check-prefix=CHECK --check-prefix=OBJC +// RUN: %clang_cc1 -x objective-c++ %s -emit-llvm -o - -fobjc-gc -fblocks -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 | FileCheck %s --check-prefix=CHECK --check-prefix=OBJCXX // OBJC-LABEL: define{{.*}} void @test1( // OBJCXX-LABEL: define{{.*}} void @_Z5test1P12NSDictionary( @@ -12,13 +12,13 @@ // OBJC-LABEL: define{{.*}} void @foo( // OBJCXX-LABEL: define{{.*}} void @_Z3foov( -// CHECK: call i8* @objc_read_weak( -// CHECK: call i8* @objc_assign_weak( +// CHECK: call ptr @objc_read_weak( +// CHECK: call ptr @objc_assign_weak( // CHECK: call void @_Block_object_dispose( // OBJC-LABEL: define{{.*}} void @test2( // OBJCXX-LABEL: define{{.*}} void @_Z5test2v( -// CHECK: call i8* @objc_assign_weak( +// CHECK: call ptr @objc_assign_weak( // CHECK: call void @_Block_object_dispose( // CHECK-LABEL: define linkonce_odr hidden void @__copy_helper_block_ diff --git a/clang/test/CodeGenObjC/builtin-memfns.m b/clang/test/CodeGenObjC/builtin-memfns.m index 7a5e5a63090a39..ed78d2fd556db0 100644 --- a/clang/test/CodeGenObjC/builtin-memfns.m +++ b/clang/test/CodeGenObjC/builtin-memfns.m @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.8.0 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.8.0 -emit-llvm -o - %s | FileCheck %s void *memcpy(void *restrict s1, const void *restrict s2, unsigned long n); // PR13697 void test1(int *a, id b) { // CHECK: @test1 - // CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* {{.*}}, i8* {{.*}}, i64 8, i1 false) + // CHECK: call void @llvm.memcpy.p0.p0.i64(ptr {{.*}}, ptr {{.*}}, i64 8, i1 false) memcpy(a, b, 8); } diff --git a/clang/test/CodeGenObjC/builtins.m b/clang/test/CodeGenObjC/builtins.m index 131e94b23fea53..4ad9d479968e50 100644 --- a/clang/test/CodeGenObjC/builtins.m +++ b/clang/test/CodeGenObjC/builtins.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s id objc_msgSend(id, SEL, ...); @@ -6,4 +6,4 @@ void test0(id receiver, SEL sel, const char *str) { short s = ((short (*)(id, SEL, const char*)) objc_msgSend)(receiver, sel, str); } // CHECK-LABEL: define{{.*}} void @test0( -// CHECK: call signext i16 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i16 (i8*, i8*, i8*)*)( +// CHECK: call signext i16 @objc_msgSend( diff --git a/clang/test/CodeGenObjC/category-super-class-meth.m b/clang/test/CodeGenObjC/category-super-class-meth.m index 50401c384d73f9..dabd0c202239d7 100644 --- a/clang/test/CodeGenObjC/category-super-class-meth.m +++ b/clang/test/CodeGenObjC/category-super-class-meth.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s // rdar://12459358 @interface NSObject -(id)copy; @@ -21,9 +21,8 @@ -(id)copy { return [super copy]; } // ok: instance method in category +(id)copy { return [super copy]; } // BAD: class method in category @end -// CHECK: define internal i8* @"\01+[Sub2(Category) copy] -// CHECK: [[ONE:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_SUP_REFS_$_.3" -// CHECK: [[TWO:%.*]] = bitcast %struct._class_t* [[ONE]] to i8* -// CHECK: [[THREE:%.*]] = getelementptr inbounds %struct._objc_super, %struct._objc_super* [[OBJC_SUPER:%.*]], i32 0, i32 1 -// CHECK: store i8* [[TWO]], i8** [[THREE]] -// CHECK: [[FOUR:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ +// CHECK: define internal ptr @"\01+[Sub2(Category) copy] +// CHECK: [[ONE:%.*]] = load ptr, ptr @"OBJC_CLASSLIST_SUP_REFS_$_.3" +// CHECK: [[THREE:%.*]] = getelementptr inbounds %struct._objc_super, ptr [[OBJC_SUPER:%.*]], i32 0, i32 1 +// CHECK: store ptr [[ONE]], ptr [[THREE]] +// CHECK: [[FOUR:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_ diff --git a/clang/test/CodeGenObjC/compound-literal-property-access.m b/clang/test/CodeGenObjC/compound-literal-property-access.m index 1a1a93b2e8316f..df3a5eaec08ae3 100644 --- a/clang/test/CodeGenObjC/compound-literal-property-access.m +++ b/clang/test/CodeGenObjC/compound-literal-property-access.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s // rdar://20407999 typedef __attribute__((__ext_vector_type__(2))) float vector_float2; @@ -17,5 +17,5 @@ -(void)getForce { @end // CHECK: [[CL:%.*]] = alloca <2 x float>, align 8 -// CHECK: store <2 x float> [[VECINIT:%.*]], <2 x float>* [[CL]] -// CHECK: [[FOURTEEN:%.*]] = load <2 x float>, <2 x float>* [[CL]] +// CHECK: store <2 x float> [[VECINIT:%.*]], ptr [[CL]] +// CHECK: [[FOURTEEN:%.*]] = load <2 x float>, ptr [[CL]] diff --git a/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m b/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m index 61c7a199be6d30..788b3220af3067 100644 --- a/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m +++ b/clang/test/CodeGenObjC/constant-non-fragile-ivar-offset.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.14.0 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.14.0 -emit-llvm %s -o - | FileCheck %s // CHECK: @"OBJC_IVAR_$_StaticLayout.static_layout_ivar" = hidden constant i64 20 // CHECK: @"OBJC_IVAR_$_NotStaticLayout.not_static_layout_ivar" = hidden global i64 12 @@ -16,7 +16,7 @@ @implementation StaticLayout { } -(void)meth { static_layout_ivar = 0; - // CHECK-NOT: load i64, i64* @"OBJC_IVAR_$_StaticLayout + // CHECK-NOT: load i64, ptr @"OBJC_IVAR_$_StaticLayout } @end @@ -33,6 +33,6 @@ @implementation NotStaticLayout { } -(void)meth { not_static_layout_ivar = 0; - // CHECK: load i64, i64* @"OBJC_IVAR_$_NotStaticLayout.not_static_layout_ivar + // CHECK: load i64, ptr @"OBJC_IVAR_$_NotStaticLayout.not_static_layout_ivar } @end diff --git a/clang/test/CodeGenObjC/constant-strings.m b/clang/test/CodeGenObjC/constant-strings.m index 172df36b51ed76..fb5865ea754f64 100644 --- a/clang/test/CodeGenObjC/constant-strings.m +++ b/clang/test/CodeGenObjC/constant-strings.m @@ -1,28 +1,28 @@ // REQUIRES: x86-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-macho -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple x86_64-macho -emit-llvm -o %t %s // RUN: FileCheck --check-prefix=CHECK-NEXT < %t %s // Check that we set alignment 1 on the string. // // CHECK-NEXT: @.str = {{.*}}constant [13 x i8] c"Hello World!\00", section "__TEXT,__cstring,cstring_literals", align 1 -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-macho -fobjc-runtime=gcc -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple x86_64-macho -fobjc-runtime=gcc -emit-llvm -o %t %s // RUN: FileCheck --check-prefix=CHECK-GNU < %t %s // CHECK-GNU: NXConstantString -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-macho -fobjc-runtime=gcc -fconstant-string-class NSConstantString -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple x86_64-macho -fobjc-runtime=gcc -fconstant-string-class NSConstantString -emit-llvm -o %t %s // RUN: FileCheck --check-prefix=CHECK-GNU-WITH-CLASS < %t %s // CHECK-GNU-WITH-CLASS: NSConstantString // -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-2.0 -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-2.0 -emit-llvm -o %t %s // RUN: FileCheck --check-prefix=CHECK-GNUSTEP2 < %t %s -// CHECK-GNUSTEP2: @._OBJC_CLASS_NSConstantString = external global i8* +// CHECK-GNUSTEP2: @._OBJC_CLASS_NSConstantString = external global ptr // CHECK-GNUSTEP2: @0 = private unnamed_addr constant [13 x i8] c"Hello World!\00", align 1 -// CHECK-GNUSTEP2: @.objc_string = private global { i8**, i32, i32, i32, i32, i8* } { i8** @._OBJC_CLASS_NSConstantString, i32 0, i32 12, i32 12, i32 0, i8* getelementptr inbounds ([13 x i8], [13 x i8]* @0, i64 0, i64 0) }, section "__objc_constant_string", align 8 -// CHECK-GNUSTEP2: @b ={{.*}} global i8* inttoptr (i64 -3340545023602065388 to i8*), align 8 -// CHECK-GNUSTEP2: @.objc_str_Hello_World = linkonce_odr hidden global { i8**, i32, i32, i32, i32, i8* } { i8** @._OBJC_CLASS_NSConstantString, i32 0, i32 11, i32 11, i32 0, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @1, i64 0, i64 0) }, section "__objc_constant_string", comdat, align 8 +// CHECK-GNUSTEP2: @.objc_string = private global { ptr, i32, i32, i32, i32, ptr } { ptr @._OBJC_CLASS_NSConstantString, i32 0, i32 12, i32 12, i32 0, ptr @0 }, section "__objc_constant_string", align 8 +// CHECK-GNUSTEP2: @b ={{.*}} global ptr inttoptr (i64 -3340545023602065388 to ptr), align 8 +// CHECK-GNUSTEP2: @.objc_str_Hello_World = linkonce_odr hidden global { ptr, i32, i32, i32, i32, ptr } { ptr @._OBJC_CLASS_NSConstantString, i32 0, i32 11, i32 11, i32 0, ptr @1 }, section "__objc_constant_string", comdat, align 8 // CHECK-GNUSTEP2: @c = // CHECK-SAME-GNUSTEP2: @.objc_str_Hello_World // diff --git a/clang/test/CodeGenObjC/debug-info-default-synth-ivar.m b/clang/test/CodeGenObjC/debug-info-default-synth-ivar.m index a69967c3dab952..fb2641265bde35 100644 --- a/clang/test/CodeGenObjC/debug-info-default-synth-ivar.m +++ b/clang/test/CodeGenObjC/debug-info-default-synth-ivar.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -debug-info-kind=limited %s -o %t +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -debug-info-kind=limited %s -o %t // RUN: grep DW_TAG_member %t | count 5 // rdar://8493239 diff --git a/clang/test/CodeGenObjC/debug-info-getter-name.m b/clang/test/CodeGenObjC/debug-info-getter-name.m index dbdf4dc22fca9d..3e0f52be864626 100644 --- a/clang/test/CodeGenObjC/debug-info-getter-name.m +++ b/clang/test/CodeGenObjC/debug-info-getter-name.m @@ -1,5 +1,5 @@ // REQUIRES: x86-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin10 -fexceptions -fobjc-exceptions -debug-info-kind=limited %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 -fexceptions -fobjc-exceptions -debug-info-kind=limited %s -o - | FileCheck %s // CHECK: !DISubprogram(name: "-[InstanceVariablesEverywhereButTheInterface someString]" diff --git a/clang/test/CodeGenObjC/debug-info-nested-blocks.m b/clang/test/CodeGenObjC/debug-info-nested-blocks.m index b66a6dd301aafa..3f35ef7003e218 100644 --- a/clang/test/CodeGenObjC/debug-info-nested-blocks.m +++ b/clang/test/CodeGenObjC/debug-info-nested-blocks.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -dwarf-version=2 -debug-info-kind=limited -fblocks -o - -x objective-c %s| FileCheck %s +// RUN: %clang_cc1 -emit-llvm -dwarf-version=2 -debug-info-kind=limited -fblocks -o - -x objective-c %s| FileCheck %s // This code triggered a bug where a dbg.declare intrinsic ended up with the // wrong parent and subsequently failed the Verifier. void baz(id b); @@ -21,6 +21,6 @@ void bar(void) { // Verify that debug info for BlockPointerDbgLoc is emitted for the // innermost block. // -// CHECK: define {{.*}}void @__bar_block_invoke_3(i8* noundef %.block_descriptor) -// CHECK: %[[BLOCKADDR:.*]] = alloca <{{.*}}>*, align +// CHECK: define {{.*}}void @__bar_block_invoke_3(ptr noundef %.block_descriptor) +// CHECK: %[[BLOCKADDR:.*]] = alloca ptr, align // CHECK: call void @llvm.dbg.declare(metadata {{.*}}%[[BLOCKADDR]] diff --git a/clang/test/CodeGenObjC/debug-info-objc-property-dwarf5.m b/clang/test/CodeGenObjC/debug-info-objc-property-dwarf5.m index 9ccd6db9c0a536..2b3a86fe399712 100644 --- a/clang/test/CodeGenObjC/debug-info-objc-property-dwarf5.m +++ b/clang/test/CodeGenObjC/debug-info-objc-property-dwarf5.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -debug-info-kind=standalone -dwarf-version=5 %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -debug-info-kind=standalone -dwarf-version=5 %s -o - | FileCheck %s @protocol NSObject @end diff --git a/clang/test/CodeGenObjC/direct-method-ret-mismatch.m b/clang/test/CodeGenObjC/direct-method-ret-mismatch.m index 51a31e0b1a306c..889a6d68da0d73 100644 --- a/clang/test/CodeGenObjC/direct-method-ret-mismatch.m +++ b/clang/test/CodeGenObjC/direct-method-ret-mismatch.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -o - | FileCheck %s __attribute__((objc_root_class)) @interface Root @@ -6,13 +6,13 @@ - (Root *)method __attribute__((objc_direct)); @end @implementation Root -// CHECK-LABEL: define internal i8* @"\01-[Root something]"( +// CHECK-LABEL: define internal ptr @"\01-[Root something]"( - (id)something { // CHECK: %{{[^ ]*}} = call {{.*}} @"\01-[Root method]" return [self method]; } -// CHECK-LABEL: define hidden i8* @"\01-[Root method]"( +// CHECK-LABEL: define hidden ptr @"\01-[Root method]"( - (id)method { return self; } diff --git a/clang/test/CodeGenObjC/disable-direct-method.m b/clang/test/CodeGenObjC/disable-direct-method.m index 6ea003e59c7e52..3fca36f18271ff 100644 --- a/clang/test/CodeGenObjC/disable-direct-method.m +++ b/clang/test/CodeGenObjC/disable-direct-method.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin10 -fobjc-disable-direct-methods-for-testing %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin10 -fobjc-disable-direct-methods-for-testing %s -o - | FileCheck %s @interface Y @property (direct) int direct_property; @@ -17,5 +17,5 @@ -(void)m __attribute__((objc_direct)); void f(X *x) { [x m]; - // CHECK: call void bitcast ({{.*}} @objc_msgSend to {{.*}}) + // CHECK: call void @objc_msgSend } diff --git a/clang/test/CodeGenObjC/encode-test-2.m b/clang/test/CodeGenObjC/encode-test-2.m index 93fe82bf4a7ce7..c82bf4c1142b65 100644 --- a/clang/test/CodeGenObjC/encode-test-2.m +++ b/clang/test/CodeGenObjC/encode-test-2.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple=i686-apple-darwin9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple=i686-apple-darwin9 -emit-llvm -o - %s | FileCheck %s // CHECK: private unnamed_addr constant [7 x i8] c"@\22\22\00", // CHECK: private unnamed_addr constant [10 x i8] c"@\22\22\00", @@ -7,7 +7,7 @@ // CHECK: private unnamed_addr constant [13 x i8] c"{Intf=@@@@#}\00", // CHECK: @[[PROP_NAME_ATTR:.*]] = private unnamed_addr constant [5 x i8] c"T@,D\00", -// CHECK: @"_OBJC_$_PROP_LIST_C0" = internal global { i32, i32, [1 x %{{.*}}] } { i32 8, i32 1, [1 x %{{.*}}] [%{{.*}} { {{.*}}, i8* getelementptr inbounds ([5 x i8], [5 x i8]* @[[PROP_NAME_ATTR]], i32 0, i32 0) }] }, +// CHECK: @"_OBJC_$_PROP_LIST_C0" = internal global { i32, i32, [1 x %{{.*}}] } { i32 8, i32 1, [1 x %{{.*}}] [%{{.*}} { {{.*}}, ptr @[[PROP_NAME_ATTR]] }] }, @protocol X, Y, Z; @class Foo; diff --git a/clang/test/CodeGenObjC/encode-test-5.m b/clang/test/CodeGenObjC/encode-test-5.m index 0de3e759ee9fa0..997220b2c206c3 100644 --- a/clang/test/CodeGenObjC/encode-test-5.m +++ b/clang/test/CodeGenObjC/encode-test-5.m @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c -triple=x86_64-apple-darwin9 -emit-llvm -o - < %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c -triple=x86_64-apple-darwin9 -emit-llvm -o - < %s | FileCheck %s // CHECK-DAG: @[[complex_int:.*]] = private unnamed_addr constant [3 x i8] c"ji\00", align 1 -// CHECK-DAG: @a ={{.*}} global i8* getelementptr inbounds ([3 x i8], [3 x i8]* @[[complex_int]], i32 0, i32 0), align 8 +// CHECK-DAG: @a ={{.*}} global ptr @[[complex_int]], align 8 char *a = @encode(_Complex int); // CHECK-DAG: @[[complex_float:.*]] = private unnamed_addr constant [3 x i8] c"jf\00", align 1 -// CHECK-DAG: @b ={{.*}} global i8* getelementptr inbounds ([3 x i8], [3 x i8]* @[[complex_float]], i32 0, i32 0), align 8 +// CHECK-DAG: @b ={{.*}} global ptr @[[complex_float]], align 8 char *b = @encode(_Complex float); // CHECK-DAG: @[[complex_double:.*]] = private unnamed_addr constant [3 x i8] c"jd\00", align 1 -// CHECK-DAG: @c ={{.*}} global i8* getelementptr inbounds ([3 x i8], [3 x i8]* @[[complex_double]], i32 0, i32 0), align 8 +// CHECK-DAG: @c ={{.*}} global ptr @[[complex_double]], align 8 char *c = @encode(_Complex double); // CHECK-DAG: @[[int_128:.*]] = private unnamed_addr constant [2 x i8] c"t\00", align 1 -// CHECK-DAG: @e ={{.*}} global i8* getelementptr inbounds ([2 x i8], [2 x i8]* @[[int_128]], i32 0, i32 0), align 8 +// CHECK-DAG: @e ={{.*}} global ptr @[[int_128]], align 8 char *e = @encode(__int128_t); // CHECK-DAG: @[[uint_128:.*]] = private unnamed_addr constant [2 x i8] c"T\00", align 1 -// CHECK-DAG: @f ={{.*}} global i8* getelementptr inbounds ([2 x i8], [2 x i8]* @[[uint_128]], i32 0, i32 0), align 8 +// CHECK-DAG: @f ={{.*}} global ptr @[[uint_128]], align 8 char *f = @encode(__uint128_t); diff --git a/clang/test/CodeGenObjC/encode-test-6.m b/clang/test/CodeGenObjC/encode-test-6.m index fd4f2b9931f954..7c07289210e4d8 100644 --- a/clang/test/CodeGenObjC/encode-test-6.m +++ b/clang/test/CodeGenObjC/encode-test-6.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -emit-llvm -o %t %s // RUN: FileCheck < %t %s // rdar://11777609 @@ -62,5 +62,5 @@ @implementation SCNCamera return e; } // CHECK: @e ={{.*}} global [2 x i8] c"i\00", align 1 -// CHECK: define{{.*}} i8* @Test() -// CHECK: ret i8* getelementptr inbounds ([2 x i8], [2 x i8]* @e, i64 0, i64 0) +// CHECK: define{{.*}} ptr @Test() +// CHECK: ret ptr @e diff --git a/clang/test/CodeGenObjC/encode-test.m b/clang/test/CodeGenObjC/encode-test.m index 528f240202d2da..3e03ea81993ccb 100644 --- a/clang/test/CodeGenObjC/encode-test.m +++ b/clang/test/CodeGenObjC/encode-test.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple i686-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t %s // RUN: FileCheck < %t %s // // CHECK: @OBJC_METH_VAR_TYPE_{{.*}} = private unnamed_addr constant [16 x i8] c"v12@0:4[3[4@]]8\00" @@ -187,7 +187,7 @@ @implementation Derived1X @end // CHECK-LABEL: @test_strlen( // CHECK: %[[i:.*]] = alloca i32 // CHECK: %[[call:.*]] = call i32 @strlen -// CHECK: store i32 %[[call]], i32* %[[i]] +// CHECK: store i32 %[[call]], ptr %[[i]] void test_strlen(void) { const char array[] = @encode(int); int i = strlen(array); diff --git a/clang/test/CodeGenObjC/extern-void-class-decl.m b/clang/test/CodeGenObjC/extern-void-class-decl.m index 43eee02fd4e922..a01b5b74fc9db1 100644 --- a/clang/test/CodeGenObjC/extern-void-class-decl.m +++ b/clang/test/CodeGenObjC/extern-void-class-decl.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.14.0 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.14.0 %s -emit-llvm -o - | FileCheck %s // rdar://45077269 @@ -10,5 +10,5 @@ @implementation f @end // Check that we override the initializer for c, and that OBJC_CLASS_$_f gets // the right definition. -// CHECK: @c ={{.*}} global i8* bitcast (%struct._class_t* @"OBJC_CLASS_$_f" to i8*) +// CHECK: @c ={{.*}} global ptr @"OBJC_CLASS_$_f" // CHECK: @"OBJC_CLASS_$_f" ={{.*}} global %struct._class_t diff --git a/clang/test/CodeGenObjC/forward-protocol-metadata-symbols.m b/clang/test/CodeGenObjC/forward-protocol-metadata-symbols.m index 646913050bdde8..88c07c1a41034c 100644 --- a/clang/test/CodeGenObjC/forward-protocol-metadata-symbols.m +++ b/clang/test/CodeGenObjC/forward-protocol-metadata-symbols.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.14 -emit-llvm -x objective-c %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.14 -emit-llvm -x objective-c %s -o - | FileCheck %s // rdar://16203115 @interface NSObject @end @@ -23,12 +23,12 @@ int main(void) { // CHECK: @"_OBJC_CLASS_PROTOCOLS_$_A" = internal global // CHECK: @"_OBJC_PROTOCOL_REFERENCE_$_P0" = weak hidden global -// CHECK: llvm.used = appending global [3 x i8*] +// CHECK: llvm.used = appending global [3 x ptr] // CHECK-SAME: "_OBJC_PROTOCOL_$_P0" // CHECK-SAME: "_OBJC_LABEL_PROTOCOL_$_P0" // CHECK-SAME: "_OBJC_PROTOCOL_REFERENCE_$_P0" -// CHECK: llvm.compiler.used = appending global [7 x i8*] +// CHECK: llvm.compiler.used = appending global [7 x ptr] // CHECK-SAME: OBJC_CLASS_NAME_ // CHECK-SAME: OBJC_METH_VAR_NAME_ // CHECK-SAME: OBJC_METH_VAR_TYPE_ diff --git a/clang/test/CodeGenObjC/gc-weak-attribute.m b/clang/test/CodeGenObjC/gc-weak-attribute.m index 551b42941c5f62..500fd112eef82a 100644 --- a/clang/test/CodeGenObjC/gc-weak-attribute.m +++ b/clang/test/CodeGenObjC/gc-weak-attribute.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck %s // rdar://10073896 @interface I @@ -17,12 +17,12 @@ @implementation I @synthesize wRandom; @synthesize wAnother; @end -// CHECK: call i8* @objc_read_weak -// CHECK: call i8* @objc_assign_weak -// CHECK: call i8* @objc_read_weak -// CHECK: call i8* @objc_assign_weak -// CHECK: call i8* @objc_read_weak -// CHECK: call i8* @objc_assign_weak -// CHECK: call i8* @objc_read_weak -// CHECK: call i8* @objc_assign_weak +// CHECK: call ptr @objc_read_weak +// CHECK: call ptr @objc_assign_weak +// CHECK: call ptr @objc_read_weak +// CHECK: call ptr @objc_assign_weak +// CHECK: call ptr @objc_read_weak +// CHECK: call ptr @objc_assign_weak +// CHECK: call ptr @objc_read_weak +// CHECK: call ptr @objc_assign_weak diff --git a/clang/test/CodeGenObjC/gc.m b/clang/test/CodeGenObjC/gc.m index a57ecd89c5998a..a55e9bea5578e9 100644 --- a/clang/test/CodeGenObjC/gc.m +++ b/clang/test/CodeGenObjC/gc.m @@ -1,15 +1,15 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-gc -emit-llvm -o - %s | FileCheck %s void test0(void) { extern id test0_helper(void); __attribute__((objc_precise_lifetime)) id x = test0_helper(); test0_helper(); // CHECK-LABEL: define{{.*}} void @test0() - // CHECK: [[T0:%.*]] = call i8* @test0_helper() - // CHECK-NEXT: store i8* [[T0]], i8** [[X:%.*]], align 8 - // CHECK-NEXT: call i8* @test0_helper() - // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]], align 8 - // CHECK-NEXT: call void asm sideeffect "", "r"(i8* [[T0]]) [[NUW:#[0-9]+]] + // CHECK: [[T0:%.*]] = call ptr @test0_helper() + // CHECK-NEXT: store ptr [[T0]], ptr [[X:%.*]], align 8 + // CHECK-NEXT: call ptr @test0_helper() + // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[X]], align 8 + // CHECK-NEXT: call void asm sideeffect "", "r"(ptr [[T0]]) [[NUW:#[0-9]+]] // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenObjC/getter-property-mismatch.m b/clang/test/CodeGenObjC/getter-property-mismatch.m index aed5f911a5b9ef..64a1d8cbc84d6f 100644 --- a/clang/test/CodeGenObjC/getter-property-mismatch.m +++ b/clang/test/CodeGenObjC/getter-property-mismatch.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s +// RUN: %clang_cc1 %s -emit-llvm -triple x86_64-apple-darwin -o - | FileCheck %s // rdar://11323676 @interface NSDictionary @end @@ -13,6 +13,5 @@ @implementation CalDAVAddManagedAttachmentsTaskGroup @synthesize filenamesToServerLocation=_filenamesToServerLocation; @end -// CHECK: [[CALL:%.*]] = tail call i8* @objc_getProperty -// CHECK: [[ONE:%.*]] = bitcast i8* [[CALL:%.*]] to [[T1:%.*]]* -// CHECK: ret [[T1]]* [[ONE]] +// CHECK: [[CALL:%.*]] = tail call ptr @objc_getProperty +// CHECK: ret ptr [[CALL:%.*]] diff --git a/clang/test/CodeGenObjC/getter-property-type-mismatch.m b/clang/test/CodeGenObjC/getter-property-type-mismatch.m index 60466c996dd9fb..d09a00c7ea9aa1 100644 --- a/clang/test/CodeGenObjC/getter-property-type-mismatch.m +++ b/clang/test/CodeGenObjC/getter-property-type-mismatch.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // rdar://11515196 @interface NSArray @end @@ -29,7 +29,6 @@ - (void)applicationDidFinishLaunching @end -// CHECK: define internal [[RET:%.*]]* @"\01-[BPXLAppDelegate arrayOfThings -// CHECK: [[THREE:%.*]] = bitcast [[OPQ:%.*]]* [[TWO:%.*]] to [[RET]]* -// CHECK: ret [[RET]]* [[THREE]] +// CHECK: define internal ptr @"\01-[BPXLAppDelegate arrayOfThings +// CHECK: ret ptr [[TWO:%.*]] diff --git a/clang/test/CodeGenObjC/gnu-deterministic-selectors.m b/clang/test/CodeGenObjC/gnu-deterministic-selectors.m index 2ff1d00214f5b6..03747663b5f1ab 100644 --- a/clang/test/CodeGenObjC/gnu-deterministic-selectors.m +++ b/clang/test/CodeGenObjC/gnu-deterministic-selectors.m @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-1.5 %s -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -fobjc-runtime=gcc %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-1.5 %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -fobjc-runtime=gcc %s -emit-llvm -o - | FileCheck %s // Check that these selectors are emitted in alphabetical order. // The order doesn't actually matter, only that it doesn't vary across runs. // Clang sorts them when targeting a GCC-like ABI to guarantee determinism. -// CHECK: @.objc_selector_list = internal global [6 x { i8*, i8* }] [{ i8*, i8* } { i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_sel_namea, i64 0, i64 0), i8* null }, { i8*, i8* } { i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_sel_nameg, i64 0, i64 0), i8* null }, { i8*, i8* } { i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_sel_namej, i64 0, i64 0), i8* null }, { i8*, i8* } { i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_sel_namel, i64 0, i64 0), i8* null }, { i8*, i8* } { i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_sel_namez, i64 0, i64 0), i8* null }, { i8*, i8* } zeroinitializer], align 8 +// CHECK: @.objc_selector_list = internal global [6 x { ptr, ptr }] [{ ptr, ptr } { ptr @.objc_sel_namea, ptr null }, { ptr, ptr } { ptr @.objc_sel_nameg, ptr null }, { ptr, ptr } { ptr @.objc_sel_namej, ptr null }, { ptr, ptr } { ptr @.objc_sel_namel, ptr null }, { ptr, ptr } { ptr @.objc_sel_namez, ptr null }, { ptr, ptr } zeroinitializer], align 8 void f(void) { diff --git a/clang/test/CodeGenObjC/gnu-empty-protocol-v3.m b/clang/test/CodeGenObjC/gnu-empty-protocol-v3.m index 360e7312dfbc5a..d7ec0e65880d3a 100644 --- a/clang/test/CodeGenObjC/gnu-empty-protocol-v3.m +++ b/clang/test/CodeGenObjC/gnu-empty-protocol-v3.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-pc-linux-gnu -fobjc-runtime=gnustep-1.9 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i686-pc-linux-gnu -fobjc-runtime=gnustep-1.9 -emit-llvm -o - %s | FileCheck %s @protocol X; @@ -10,17 +10,17 @@ @implementation Z @end -// CHECK: @.objc_protocol_list = internal global { i8*, i32, [0 x i8*] } zeroinitializer, align 4 -// CHECK: @.objc_method_list = internal global { i32, [0 x { i8*, i8* }] } zeroinitializer, align 4 +// CHECK: @.objc_protocol_list = internal global { ptr, i32, [0 x ptr] } zeroinitializer, align 4 +// CHECK: @.objc_method_list = internal global { i32, [0 x { ptr, ptr }] } zeroinitializer, align 4 // CHECK: @.objc_protocol_name = private unnamed_addr constant [2 x i8] c"X\00", align 1 -// CHECK: @._OBJC_PROTOCOL_X = internal global { i8*, i8*, { i8*, i32, [0 x i8*] }*, i8*, i8*, i8*, i8*, i8*, i8* } { -// CHECK-SAME: i8* inttoptr (i32 3 to i8*), -// CHECK-SAME: i8* getelementptr inbounds ([2 x i8], [2 x i8]* @.objc_protocol_name, i32 0, i32 0), -// CHECK-SAME: { i8*, i32, [0 x i8*] }* @.objc_protocol_list -// CHECK-SAME: { i32, [0 x { i8*, i8* }] }* @.objc_method_list -// CHECK-SAME: { i32, [0 x { i8*, i8* }] }* @.objc_method_list -// CHECK-SAME: { i32, [0 x { i8*, i8* }] }* @.objc_method_list -// CHECK-SAME: { i32, [0 x { i8*, i8* }] }* @.objc_method_list -// CHECK-SAME: i8* null -// CHECK-SAME: i8* null +// CHECK: @._OBJC_PROTOCOL_X = internal global { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } { +// CHECK-SAME: ptr inttoptr (i32 3 to ptr), +// CHECK-SAME: ptr @.objc_protocol_name, +// CHECK-SAME: ptr @.objc_protocol_list +// CHECK-SAME: ptr @.objc_method_list +// CHECK-SAME: ptr @.objc_method_list +// CHECK-SAME: ptr @.objc_method_list +// CHECK-SAME: ptr @.objc_method_list +// CHECK-SAME: ptr null +// CHECK-SAME: ptr null // CHECK-SAME: }, align 4 diff --git a/clang/test/CodeGenObjC/gnu-exceptions.m b/clang/test/CodeGenObjC/gnu-exceptions.m index fcf8132d8ee987..cde4c3786a9a06 100644 --- a/clang/test/CodeGenObjC/gnu-exceptions.m +++ b/clang/test/CodeGenObjC/gnu-exceptions.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -o - %s | FileCheck -check-prefix=NEW-ABI %s +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -o - %s | FileCheck -check-prefix=NEW-ABI %s void opaque(void); void log(int i); @@ -7,7 +7,7 @@ @class C; // CHECK: define{{.*}} void @test0() [[TF:#[0-9]+]] -// CHECK-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) +// CHECK-SAME: personality ptr @__gnu_objc_personality_v0 void test0(void) { @try { // CHECK: invoke void @opaque() @@ -16,8 +16,8 @@ void test0(void) { // CHECK: call void @log(i32 noundef 1) } @catch (C *c) { - // CHECK: landingpad { i8*, i32 } - // CHECK-NEXT: catch i8* getelementptr inbounds ([2 x i8], [2 x i8]* @0, i64 0, i64 0) + // CHECK: landingpad { ptr, i32 } + // CHECK-NEXT: catch ptr @0 // CHECK: br i1 // CHECK: call void @log(i32 noundef 0) diff --git a/clang/test/CodeGenObjC/gnu-init.m b/clang/test/CodeGenObjC/gnu-init.m index 0f7fb022b3bac2..d0aa6fdc4ac9fb 100644 --- a/clang/test/CodeGenObjC/gnu-init.m +++ b/clang/test/CodeGenObjC/gnu-init.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-NEW -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-windows-msvc -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-WIN -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-1.8 -o - %s | FileCheck %s -check-prefix=CHECK-OLD -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-INIT_ARRAY +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-NEW +// RUN: %clang_cc1 -triple x86_64-pc-windows-msvc -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-WIN +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fno-use-init-array -fobjc-runtime=gnustep-1.8 -o - %s | FileCheck %s -check-prefix=CHECK-OLD +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-INIT_ARRAY // Almost minimal Objective-C file, check that it emits calls to the correct // runtime entry points. @@ -18,43 +18,43 @@ @implementation X @end // CHECK-NEW-SAME: @._OBJC_CLASS_X, section "__objc_classes" // Check that we emit the section start and end symbols as hidden globals. -// CHECK-NEW: @__start___objc_selectors = external hidden global i8* -// CHECK-NEW: @__stop___objc_selectors = external hidden global i8* -// CHECK-NEW: @__start___objc_classes = external hidden global i8* -// CHECK-NEW: @__stop___objc_classes = external hidden global i8* -// CHECK-NEW: @__start___objc_class_refs = external hidden global i8* -// CHECK-NEW: @__stop___objc_class_refs = external hidden global i8* -// CHECK-NEW: @__start___objc_cats = external hidden global i8* -// CHECK-NEW: @__stop___objc_cats = external hidden global i8* -// CHECK-NEW: @__start___objc_protocols = external hidden global i8* -// CHECK-NEW: @__stop___objc_protocols = external hidden global i8* -// CHECK-NEW: @__start___objc_protocol_refs = external hidden global i8* -// CHECK-NEW: @__stop___objc_protocol_refs = external hidden global i8* -// CHECK-NEW: @__start___objc_class_aliases = external hidden global i8* -// CHECK-NEW: @__stop___objc_class_aliases = external hidden global i8* -// CHECK-NEW: @__start___objc_constant_string = external hidden global i8* -// CHECK-NEW: @__stop___objc_constant_string = external hidden global i8* +// CHECK-NEW: @__start___objc_selectors = external hidden global ptr +// CHECK-NEW: @__stop___objc_selectors = external hidden global ptr +// CHECK-NEW: @__start___objc_classes = external hidden global ptr +// CHECK-NEW: @__stop___objc_classes = external hidden global ptr +// CHECK-NEW: @__start___objc_class_refs = external hidden global ptr +// CHECK-NEW: @__stop___objc_class_refs = external hidden global ptr +// CHECK-NEW: @__start___objc_cats = external hidden global ptr +// CHECK-NEW: @__stop___objc_cats = external hidden global ptr +// CHECK-NEW: @__start___objc_protocols = external hidden global ptr +// CHECK-NEW: @__stop___objc_protocols = external hidden global ptr +// CHECK-NEW: @__start___objc_protocol_refs = external hidden global ptr +// CHECK-NEW: @__stop___objc_protocol_refs = external hidden global ptr +// CHECK-NEW: @__start___objc_class_aliases = external hidden global ptr +// CHECK-NEW: @__stop___objc_class_aliases = external hidden global ptr +// CHECK-NEW: @__start___objc_constant_string = external hidden global ptr +// CHECK-NEW: @__stop___objc_constant_string = external hidden global ptr // Check that we emit the init structure correctly, including in a comdat. -// CHECK-NEW: @.objc_init = linkonce_odr hidden global { i64, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8**, i8** } { i64 0, i8** @__start___objc_selectors, i8** @__stop___objc_selectors, i8** @__start___objc_classes, i8** @__stop___objc_classes, i8** @__start___objc_class_refs, i8** @__stop___objc_class_refs, i8** @__start___objc_cats, i8** @__stop___objc_cats, i8** @__start___objc_protocols, i8** @__stop___objc_protocols, i8** @__start___objc_protocol_refs, i8** @__stop___objc_protocol_refs, i8** @__start___objc_class_aliases, i8** @__stop___objc_class_aliases, i8** @__start___objc_constant_string, i8** @__stop___objc_constant_string }, comdat, align 8 +// CHECK-NEW: @.objc_init = linkonce_odr hidden global { i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } { i64 0, ptr @__start___objc_selectors, ptr @__stop___objc_selectors, ptr @__start___objc_classes, ptr @__stop___objc_classes, ptr @__start___objc_class_refs, ptr @__stop___objc_class_refs, ptr @__start___objc_cats, ptr @__stop___objc_cats, ptr @__start___objc_protocols, ptr @__stop___objc_protocols, ptr @__start___objc_protocol_refs, ptr @__stop___objc_protocol_refs, ptr @__start___objc_class_aliases, ptr @__stop___objc_class_aliases, ptr @__start___objc_constant_string, ptr @__stop___objc_constant_string }, comdat, align 8 // Check that the load function is manually inserted into .ctors. -// CHECK-NEW: @.objc_ctor = linkonce hidden global void ()* @.objcv2_load_function, section ".ctors", comdat -// CHECK-INIT_ARRAY: @.objc_ctor = linkonce hidden global void ()* @.objcv2_load_function, section ".init_array", comdat +// CHECK-NEW: @.objc_ctor = linkonce hidden global ptr @.objcv2_load_function, section ".ctors", comdat +// CHECK-INIT_ARRAY: @.objc_ctor = linkonce hidden global ptr @.objcv2_load_function, section ".init_array", comdat // Make sure that we provide null versions of everything so the __start / // __stop symbols work. -// CHECK-NEW: @.objc_null_selector = linkonce_odr hidden global { i8*, i8* } zeroinitializer, section "__objc_selectors", comdat, align 8 -// CHECK-NEW: @.objc_null_category = linkonce_odr hidden global { i8*, i8*, i8*, i8*, i8*, i8*, i8* } zeroinitializer, section "__objc_cats", comdat, align 8 -// CHECK-NEW: @.objc_null_protocol = linkonce_odr hidden global { i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* } zeroinitializer, section "__objc_protocols", comdat, align 8 -// CHECK-NEW: @.objc_null_protocol_ref = linkonce_odr hidden global { i8* } zeroinitializer, section "__objc_protocol_refs", comdat, align 8 -// CHECK-NEW: @.objc_null_class_alias = linkonce_odr hidden global { i8*, i8* } zeroinitializer, section "__objc_class_aliases", comdat, align 8 -// CHECK-NEW: @.objc_null_constant_string = linkonce_odr hidden global { i8*, i32, i32, i32, i32, i8* } zeroinitializer, section "__objc_constant_string", comdat, align 8 +// CHECK-NEW: @.objc_null_selector = linkonce_odr hidden global { ptr, ptr } zeroinitializer, section "__objc_selectors", comdat, align 8 +// CHECK-NEW: @.objc_null_category = linkonce_odr hidden global { ptr, ptr, ptr, ptr, ptr, ptr, ptr } zeroinitializer, section "__objc_cats", comdat, align 8 +// CHECK-NEW: @.objc_null_protocol = linkonce_odr hidden global { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } zeroinitializer, section "__objc_protocols", comdat, align 8 +// CHECK-NEW: @.objc_null_protocol_ref = linkonce_odr hidden global { ptr } zeroinitializer, section "__objc_protocol_refs", comdat, align 8 +// CHECK-NEW: @.objc_null_class_alias = linkonce_odr hidden global { ptr, ptr } zeroinitializer, section "__objc_class_aliases", comdat, align 8 +// CHECK-NEW: @.objc_null_constant_string = linkonce_odr hidden global { ptr, i32, i32, i32, i32, ptr } zeroinitializer, section "__objc_constant_string", comdat, align 8 // Make sure that the null symbols are not going to be removed, even by linking. -// CHECK-NEW: @llvm.used = appending global [8 x i8*] [i8* bitcast ({ { i8*, i8*, i8*, i64, i64, i64, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i64, i8* }*, i8*, i8*, i64, i64, i64, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i64, i8* }** @._OBJC_INIT_CLASS_X to i8*), i8* bitcast (void ()** @.objc_ctor to i8*), i8* bitcast ({ i8*, i8* }* @.objc_null_selector to i8*), i8* bitcast ({ i8*, i8*, i8*, i8*, i8*, i8*, i8* }* @.objc_null_category to i8*), i8* bitcast ({ i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8* }* @.objc_null_protocol to i8*), i8* bitcast ({ i8* }* @.objc_null_protocol_ref to i8*), i8* bitcast ({ i8*, i8* }* @.objc_null_class_alias to i8*), i8* bitcast ({ i8*, i32, i32, i32, i32, i8* }* @.objc_null_constant_string to i8*)], section "llvm.metadata" +// CHECK-NEW: @llvm.used = appending global [8 x ptr] [ptr @._OBJC_INIT_CLASS_X, ptr @.objc_ctor, ptr @.objc_null_selector, ptr @.objc_null_category, ptr @.objc_null_protocol, ptr @.objc_null_protocol_ref, ptr @.objc_null_class_alias, ptr @.objc_null_constant_string], section "llvm.metadata" // Make sure that the load function and the reference to it are marked as used. -// CHECK-NEW: @llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @.objcv2_load_function to i8*)], section "llvm.metadata" +// CHECK-NEW: @llvm.compiler.used = appending global [1 x ptr] [ptr @.objcv2_load_function], section "llvm.metadata" // Check that we emit the load function in a comdat and that it does the right thing. // CHECK-NEW: define linkonce_odr hidden void @.objcv2_load_function() comdat { @@ -63,12 +63,12 @@ @implementation X @end // CHECK-NEW-SAME: @.objc_init // CHECK-NEW-NEXT: ret void -// CHECK-OLD: @4 = internal global { i64, i64, i8*, { i64, { i8*, i8* }*, i16, i16, [4 x i8*] }* } { i64 9, i64 32, i8* getelementptr inbounds ([{{[0-9]+}} x i8], [{{[0-9]+}} x i8]* @.objc_source_file_name, i64 0, i64 0), { i64, { i8*, i8* }*, i16, i16, [4 x i8*] }* @3 }, align 8 -// CHECK-OLD: @llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @.objc_load_function, i8* null }] +// CHECK-OLD: @4 = internal global { i64, i64, ptr, ptr } { i64 9, i64 32, ptr @.objc_source_file_name, ptr @3 }, align 8 +// CHECK-OLD: @llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @.objc_load_function, ptr null }] // CHECK-OLD: define internal void @.objc_load_function() { // CHECK-OLD-NEXT: entry: -// CHECK-OLD-NEXT: call void ({ i64, i64, i8*, { i64, { i8*, i8* }*, i16, i16, [4 x i8*] }* }*, ...) @__objc_exec_class({ i64, i64, i8*, { i64, { i8*, i8* }*, i16, i16, [4 x i8*] }* }* @4) +// CHECK-OLD-NEXT: call void (ptr, ...) @__objc_exec_class(ptr @4) @@ -88,14 +88,14 @@ @implementation X @end // CHECK-WIN-DAG: @"__stop.objcrt$CAL" = linkonce_odr hidden global %.objc_section_sentinel zeroinitializer, section ".objcrt$CAL$z", comdat, align 8 // CHECK-WIN-DAG: @"__start_.objcrt$STR" = linkonce_odr hidden global %.objc_section_sentinel zeroinitializer, section ".objcrt$STR$a", comdat, align 8 // CHECK-WIN-DAG: @"__stop.objcrt$STR" = linkonce_odr hidden global %.objc_section_sentinel zeroinitializer, section ".objcrt$STR$z", comdat, align 8 -// CHECK-WIN-DAG: @.objc_init = linkonce_odr hidden global { i64, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel*, %.objc_section_sentinel* } { i64 0, %.objc_section_sentinel* @"__start_.objcrt$SEL", %.objc_section_sentinel* @"__stop.objcrt$SEL", %.objc_section_sentinel* @"__start_.objcrt$CLS", %.objc_section_sentinel* @"__stop.objcrt$CLS", %.objc_section_sentinel* @"__start_.objcrt$CLR", %.objc_section_sentinel* @"__stop.objcrt$CLR", %.objc_section_sentinel* @"__start_.objcrt$CAT", %.objc_section_sentinel* @"__stop.objcrt$CAT", %.objc_section_sentinel* @"__start_.objcrt$PCL", %.objc_section_sentinel* @"__stop.objcrt$PCL", %.objc_section_sentinel* @"__start_.objcrt$PCR", %.objc_section_sentinel* @"__stop.objcrt$PCR", %.objc_section_sentinel* @"__start_.objcrt$CAL", %.objc_section_sentinel* @"__stop.objcrt$CAL", %.objc_section_sentinel* @"__start_.objcrt$STR", %.objc_section_sentinel* @"__stop.objcrt$STR" }, comdat, align 8 +// CHECK-WIN-DAG: @.objc_init = linkonce_odr hidden global { i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr } { i64 0, ptr @"__start_.objcrt$SEL", ptr @"__stop.objcrt$SEL", ptr @"__start_.objcrt$CLS", ptr @"__stop.objcrt$CLS", ptr @"__start_.objcrt$CLR", ptr @"__stop.objcrt$CLR", ptr @"__start_.objcrt$CAT", ptr @"__stop.objcrt$CAT", ptr @"__start_.objcrt$PCL", ptr @"__stop.objcrt$PCL", ptr @"__start_.objcrt$PCR", ptr @"__stop.objcrt$PCR", ptr @"__start_.objcrt$CAL", ptr @"__stop.objcrt$CAL", ptr @"__start_.objcrt$STR", ptr @"__stop.objcrt$STR" }, comdat, align 8 // Make sure our init variable is in the correct section for late library init. -// CHECK-WIN: @.objc_ctor = linkonce hidden global void ()* @.objcv2_load_function, section ".CRT$XCLz", comdat +// CHECK-WIN: @.objc_ctor = linkonce hidden global ptr @.objcv2_load_function, section ".CRT$XCLz", comdat // We shouldn't have emitted any null placeholders on Windows. -// CHECK-WIN: @llvm.used = appending global [2 x i8*] [i8* bitcast ({ { i8*, i8*, i8*, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8* }*, i8*, i8*, i32, i32, i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i32, i8* }** @"$_OBJC_INIT_CLASS_X" to i8*), i8* bitcast (void ()** @.objc_ctor to i8*)], section "llvm.metadata" -// CHECK-WIN: @llvm.compiler.used = appending global [1 x i8*] [i8* bitcast (void ()* @.objcv2_load_function to i8*)], section "llvm.metadata" +// CHECK-WIN: @llvm.used = appending global [2 x ptr] [ptr @"$_OBJC_INIT_CLASS_X", ptr @.objc_ctor], section "llvm.metadata" +// CHECK-WIN: @llvm.compiler.used = appending global [1 x ptr] [ptr @.objcv2_load_function], section "llvm.metadata" // Check our load function is in a comdat. // CHECK-WIN: define linkonce_odr hidden void @.objcv2_load_function() comdat { diff --git a/clang/test/CodeGenObjC/gnu-method-only-once.m b/clang/test/CodeGenObjC/gnu-method-only-once.m index 186adca2f95339..639209e02116e8 100644 --- a/clang/test/CodeGenObjC/gnu-method-only-once.m +++ b/clang/test/CodeGenObjC/gnu-method-only-once.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-NEW -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-1.8 -o - %s | FileCheck %s -check-prefix=CHECK-OLD +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s -check-prefix=CHECK-NEW +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-1.8 -o - %s | FileCheck %s -check-prefix=CHECK-OLD // Clang 9 or 10 changed the handling of method lists so that methods provided // from synthesised properties showed up in the method list, where previously @@ -19,5 +19,5 @@ @implementation X @end // Check that the method list has precisely 2 methods. -// CHECK-NEW: @.objc_method_list = internal global { i8*, i32, i64, [2 x -// CHECK-OLD: @.objc_method_list = internal global { i8*, i32, [2 x +// CHECK-NEW: @.objc_method_list = internal global { ptr, i32, i64, [2 x +// CHECK-OLD: @.objc_method_list = internal global { ptr, i32, [2 x diff --git a/clang/test/CodeGenObjC/gnu-nil-receiver.m b/clang/test/CodeGenObjC/gnu-nil-receiver.m index 27f3126aff8b23..7a1ee8afca6d60 100644 --- a/clang/test/CodeGenObjC/gnu-nil-receiver.m +++ b/clang/test/CodeGenObjC/gnu-nil-receiver.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -fobjc-arc -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -fobjc-arc -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s typedef struct { int x[12]; @@ -34,13 +34,13 @@ - (void) test_super_send { @end // CHECK-LABEL: define{{.*}} void @test_loop_zeroing( -// CHECK: [[P:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, // CHECK: [[BIG:%.*]] = alloca %struct.Big, // CHECK: br label %for.cond // // CHECK: for.cond: -// CHECK-NEXT: [[RECEIVER:%.*]] = load i8*, i8** [[P]], -// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq i8* [[RECEIVER]], null +// CHECK-NEXT: [[RECEIVER:%.*]] = load ptr, ptr [[P]], +// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq ptr [[RECEIVER]], null // CHECK-NEXT: br i1 [[ISNIL]], label %nilReceiverCleanup, label %msgSend // // CHECK: msgSend: @@ -49,8 +49,7 @@ - (void) test_super_send { // CHECK: br label %continue // // CHECK: nilReceiverCleanup: -// CHECK-NEXT: [[T0:%.*]] = bitcast %struct.Big* [[BIG]] to i8* -// CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[T0]], i8 0, i64 48, i1 false) +// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[BIG]], i8 0, i64 48, i1 false) // CHECK-NEXT: br label %continue // // CHECK: continue: @@ -62,16 +61,16 @@ void test_loop_zeroing(id

p) { } // CHECK-LABEL: define{{.*}} void @test_zeroing_and_consume( -// CHECK: [[P:%.*]] = alloca i8*, -// CHECK: [[Q:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK: [[Q:%.*]] = alloca ptr, // CHECK: [[BIG:%.*]] = alloca %struct.Big, // CHECK: br label %for.cond // // CHECK: for.cond: -// CHECK-NEXT: [[RECEIVER:%.*]] = load i8*, i8** [[P]], -// CHECK-NEXT: [[Q_LOAD:%.*]] = load i8*, i8** [[Q]], -// CHECK-NEXT: [[Q_RETAIN:%.*]] = call i8* @llvm.objc.retain(i8* [[Q_LOAD]]) -// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq i8* [[RECEIVER]], null +// CHECK-NEXT: [[RECEIVER:%.*]] = load ptr, ptr [[P]], +// CHECK-NEXT: [[Q_LOAD:%.*]] = load ptr, ptr [[Q]], +// CHECK-NEXT: [[Q_RETAIN:%.*]] = call ptr @llvm.objc.retain(ptr [[Q_LOAD]]) +// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq ptr [[RECEIVER]], null // CHECK-NEXT: br i1 [[ISNIL]], label %nilReceiverCleanup, label %msgSend // // CHECK: msgSend: @@ -80,9 +79,8 @@ void test_loop_zeroing(id

p) { // CHECK: br label %continue // // CHECK: nilReceiverCleanup: -// CHECK-NEXT: call void @llvm.objc.release(i8* [[Q_RETAIN]]) -// CHECK-NEXT: [[T0:%.*]] = bitcast %struct.Big* [[BIG]] to i8* -// CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 4 [[T0]], i8 0, i64 48, i1 false) +// CHECK-NEXT: call void @llvm.objc.release(ptr [[Q_RETAIN]]) +// CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 4 [[BIG]], i8 0, i64 48, i1 false) // CHECK-NEXT: br label %continue // // CHECK: continue: @@ -94,9 +92,9 @@ void test_zeroing_and_consume(id

p, id q) { } // CHECK-LABEL: define{{.*}} void @test_complex( -// CHECK: [[P:%.*]] = alloca i8*, -// CHECK: [[RECEIVER:%.*]] = load i8*, i8** [[P]], -// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq i8* [[RECEIVER]], null +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK: [[RECEIVER:%.*]] = load ptr, ptr [[P]], +// CHECK-NEXT: [[ISNIL:%.*]] = icmp eq ptr [[RECEIVER]], null // CHECK-NEXT: br i1 [[ISNIL]], label %continue, label %msgSend // CHECK: msgSend: // CHECK: @objc_msg_lookup_sender diff --git a/clang/test/CodeGenObjC/gnustep2-category.m b/clang/test/CodeGenObjC/gnustep2-category.m index 05ffba4e786b34..6114a5979dbc62 100644 --- a/clang/test/CodeGenObjC/gnustep2-category.m +++ b/clang/test/CodeGenObjC/gnustep2-category.m @@ -1,8 +1,8 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s // Check that we have a method list that refers to the correct thing method: -// CHECK: internal global { i8*, i32, i64, [1 x { i8* (i8*, i8*, ...)*, i8*, i8* }] } { i8* null, i32 1, i64 24, +// CHECK: internal global { ptr, i32, i64, [1 x { ptr, ptr, ptr }] } { ptr null, i32 1, i64 24, // CHECK-SAME: @_i_X_Cat_x // CHECK-SAME: @".objc_selector_x_i16\010:8" @@ -10,9 +10,9 @@ // CHECK: c"Ti,R\00" // Check that we emit a single-element property list of the correct form. -// CHECK: internal global { i32, i32, i8*, [1 x { i8*, i8*, i8*, i8*, i8* }] } +// CHECK: internal global { i32, i32, ptr, [1 x { ptr, ptr, ptr, ptr, ptr }] } -// CHECK: @.objc_category_XCat = internal global { i8*, i8*, i8*, i8*, i8*, i8*, i8* } +// CHECK: @.objc_category_XCat = internal global { ptr, ptr, ptr, ptr, ptr, ptr, ptr } // CHECK-SAME: section "__objc_cats", align 8 @interface X @end diff --git a/clang/test/CodeGenObjC/gnustep2-class.m b/clang/test/CodeGenObjC/gnustep2-class.m index 490b422bce839e..28f9ad12c6b448 100644 --- a/clang/test/CodeGenObjC/gnustep2-class.m +++ b/clang/test/CodeGenObjC/gnustep2-class.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s @interface Super @end @@ -23,17 +23,17 @@ - (id)meth { return ivar2; } // CHECK: @"__objc_ivar_offset_X.y.\01" = hidden global i32 16 // // Check that we get a sensible metaclass method list. -// CHECK: internal global { i8*, i32, i64, [1 x { i8* (i8*, i8*, ...)*, i8*, i8* }] } +// CHECK: internal global { ptr, i32, i64, [1 x { ptr, ptr, ptr }] } // CHECK-SAME: @_c_X__clsMeth // Check that we get a metaclass and that it is not an exposed symbol: // CHECK: @._OBJC_METACLASS_X = internal global // Check that we get a reference to the superclass symbol: -// CHECK: @._OBJC_CLASS_Super = external global i8* +// CHECK: @._OBJC_CLASS_Super = external global ptr // Check that we get an ivar list with all three ivars, in the correct order -// CHECK: private global { i32, i64, [3 x { i8*, i8*, i32*, i32, i32 }] } +// CHECK: private global { i32, i64, [3 x { ptr, ptr, ptr, i32, i32 }] } // CHECK-SAME: @__objc_ivar_offset_X.ivar1.i // CHECK-SAME: @"__objc_ivar_offset_X.ivar2.\01" // CHECK-SAME: @"__objc_ivar_offset_X.y.\01" @@ -41,10 +41,10 @@ - (id)meth { return ivar2; } // Check that we get some plausible property metadata. // CHECK: private unnamed_addr constant [5 x i8] c"Ti,R\00", align 1 // CHECK: private unnamed_addr constant [6 x i8] c"T@,Vy\00", align 1 -// CHECK: = internal global { i32, i32, i8*, [2 x { i8*, i8*, i8*, i8*, i8* }] } { i32 2, i32 40, i8* null, +// CHECK: = internal global { i32, i32, ptr, [2 x { ptr, ptr, ptr, ptr, ptr }] } { i32 2, i32 40, ptr null, // Check that we get a class structure. -// CHECK: @._OBJC_CLASS_X = global { { i8*, i8*, i8*, i64, i64, i64, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i64, i8* }*, i8*, i8*, i64, i64, i64, { i32, i64, [3 x { i8*, i8*, i32*, i32, i32 }] }*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i64, { i32, i32, i8*, [2 x { i8*, i8*, i8*, i8*, i8* }] }* } +// CHECK: @._OBJC_CLASS_X = global { ptr, ptr, ptr, i64, i64, i64, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i64, ptr } // CHECK-SAME: @._OBJC_METACLASS_X // CHECK-SAME: @._OBJC_CLASS_Super diff --git a/clang/test/CodeGenObjC/gnustep2-ivar-offset.m b/clang/test/CodeGenObjC/gnustep2-ivar-offset.m index a9d96a4ff17e9f..1f838cdd7563f2 100644 --- a/clang/test/CodeGenObjC/gnustep2-ivar-offset.m +++ b/clang/test/CodeGenObjC/gnustep2-ivar-offset.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s @class NSString; @@ -25,6 +25,6 @@ @interface ANObject { @implementation ANObject @end // Check that the ivar metadata contains 3 entries of the correct form and correctly sets the size. -// CHECK: @.objc_ivar_list = private global { i32, i64, [4 x { i8*, i8*, i32*, i32, i32 }] } { i32 4, i64 32, +// CHECK: @.objc_ivar_list = private global { i32, i64, [4 x { ptr, ptr, ptr, i32, i32 }] } { i32 4, i64 32, // Check that we emit 1 as the size of _Bool, not 0. // CHECK-SAME: @__objc_ivar_offset_ANObject.boolIvar.B, i32 1, i32 4 diff --git a/clang/test/CodeGenObjC/gnustep2-proto.m b/clang/test/CodeGenObjC/gnustep2-proto.m index 1e56e157e15093..d5b61a43655e8b 100644 --- a/clang/test/CodeGenObjC/gnustep2-proto.m +++ b/clang/test/CodeGenObjC/gnustep2-proto.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-freebsd -S -emit-llvm -fobjc-runtime=gnustep-2.0 -o - %s | FileCheck %s @protocol X @optional @@ -11,10 +11,10 @@ + (void*)y; @end // Check that we get some plausible-looking method lists. -// CHECK: internal global { i32, i32, [2 x { i8*, i8* }] } { i32 2, i32 16, +// CHECK: internal global { i32, i32, [2 x { ptr, ptr }] } { i32 2, i32 16, // CHECK-SAME: @".objc_selector_reqProp_i16\010:8" // CHECK-SAME: @".objc_selector_setReqProp:_v20\010:8i16" -// CHECK: internal global { i32, i32, [3 x { i8*, i8* }] } { i32 3, i32 16, +// CHECK: internal global { i32, i32, [3 x { ptr, ptr }] } { i32 3, i32 16, // CHECK-SAME: @".objc_selector_x_\0116\010:8" // CHECK-SAME: @".objc_selector_optProp_i16\010:8" // CHECK-SAME: @".objc_selector_setOptProp:_v20\010:8i16" @@ -30,7 +30,7 @@ + (void*)y; // Check that we load from the indirection variable on protocol references. -// CHECK: define{{.*}} i8* @x() +// CHECK: define{{.*}} ptr @x() // CHECK: = load // CHECK-SAME: @._OBJC_REF_PROTOCOL_X, align 8 void *x(void) diff --git a/clang/test/CodeGenObjC/id-isa-codegen.m b/clang/test/CodeGenObjC/id-isa-codegen.m index 1d591888bc8cd1..46c0b7181ee521 100644 --- a/clang/test/CodeGenObjC/id-isa-codegen.m +++ b/clang/test/CodeGenObjC/id-isa-codegen.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP32 %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP64 %s +// RUN: %clang_cc1 -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-LP32 %s typedef struct objc_class *Class; @@ -64,10 +64,8 @@ + (void)geneticallyAlterCat:(Cat *)cat { ((id)cat)->isa = dynamicSubclass; } @end -// CHECK-LP64: %{{.*}} = load i8*, i8** % -// CHECK-NEXT: %{{.*}} = bitcast i8* %{{.*}} to i8** -// CHECK-NEXT: store i8* %{{.*}}, i8** %{{.*}} +// CHECK-LP64: %{{.*}} = load ptr, ptr % +// CHECK-NEXT: store ptr %{{.*}}, ptr %{{.*}} -// CHECK-LP32: %{{.*}} = load i8*, i8** % -// CHECK-NEXT: %{{.*}} = bitcast i8* %{{.*}} to i8** -// CHECK-NEXT: store i8* %{{.*}}, i8** %{{.*}} +// CHECK-LP32: %{{.*}} = load ptr, ptr % +// CHECK-NEXT: store ptr %{{.*}}, ptr %{{.*}} diff --git a/clang/test/CodeGenObjC/implicit-objc_msgSend.m b/clang/test/CodeGenObjC/implicit-objc_msgSend.m index 2c56108903b449..079a7f8b1d8319 100644 --- a/clang/test/CodeGenObjC/implicit-objc_msgSend.m +++ b/clang/test/CodeGenObjC/implicit-objc_msgSend.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -Wno-implicit-function-declaration -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t %s -// RUN: grep -F 'declare i8* @objc_msgSend(i8* noundef, i8* noundef, ...)' %t +// RUN: %clang_cc1 -Wno-implicit-function-declaration -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o %t %s +// RUN: grep -F 'declare ptr @objc_msgSend(ptr noundef, ptr noundef, ...)' %t typedef struct objc_selector *SEL; id f0(id x, SEL s) { diff --git a/clang/test/CodeGenObjC/instance-method-metadata.m b/clang/test/CodeGenObjC/instance-method-metadata.m index 8ebe893a5a068b..e08de8fdacec20 100644 --- a/clang/test/CodeGenObjC/instance-method-metadata.m +++ b/clang/test/CodeGenObjC/instance-method-metadata.m @@ -1,5 +1,5 @@ // REQUIRES: x86-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -S %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -S %s -o - | FileCheck %s // rdar://9072317 diff --git a/clang/test/CodeGenObjC/ivar-base-as-invariant-load.m b/clang/test/CodeGenObjC/ivar-base-as-invariant-load.m index 25ecea4ec5a6e3..f48436e72a98bb 100644 --- a/clang/test/CodeGenObjC/ivar-base-as-invariant-load.m +++ b/clang/test/CodeGenObjC/ivar-base-as-invariant-load.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin -x objective-c %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin -x objective-c %s -o - | FileCheck %s // rdar://10840980 @interface A { @@ -23,7 +23,7 @@ - (id)init { @end -// CHECK: [[T1:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM:[0-9]+]] -// CHECK: [[T2:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]] -// CHECK: [[T3:%.*]] = load i64, i64* @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]] +// CHECK: [[T1:%.*]] = load i64, ptr @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM:[0-9]+]] +// CHECK: [[T2:%.*]] = load i64, ptr @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]] +// CHECK: [[T3:%.*]] = load i64, ptr @"OBJC_IVAR_$_A._flags", align 8, !invariant.load ![[MD_NUM]] // diff --git a/clang/test/CodeGenObjC/ivar-invariant.m b/clang/test/CodeGenObjC/ivar-invariant.m index 6cc454311f0276..d4cdcb97b78fc0 100644 --- a/clang/test/CodeGenObjC/ivar-invariant.m +++ b/clang/test/CodeGenObjC/ivar-invariant.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -fblocks -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin -fblocks -emit-llvm -o - %s | FileCheck %s @interface NSObject + (id) new; @@ -28,8 +28,8 @@ - (id) init } @end -// CHECK: define internal i8* @"\01-[Derived init]" -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load +// CHECK: define internal ptr @"\01-[Derived init]" +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load void * variant_load_1(int i) { void *ptr; @@ -40,8 +40,8 @@ - (id) init return ptr; } -// CHECK-LABEL: define{{.*}} i8* @variant_load_1(i32 noundef %i) -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8{{$}} +// CHECK-LABEL: define{{.*}} ptr @variant_load_1(i32 noundef %i) +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_Derived.member", align 8{{$}} @interface Container : Derived @end @implementation Container @@ -51,8 +51,8 @@ - (void *) invariant_load_1 } @end -// CHECK-LABEL: define internal i8* @"\01-[Container invariant_load_1]" -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load +// CHECK-LABEL: define internal ptr @"\01-[Container invariant_load_1]" +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_Derived.member", align 8, !invariant.load @interface ForBlock { @@ -61,8 +61,8 @@ @interface ForBlock } @end -// CHECK-LABEL: define internal i8* @block_block_invoke -// CHECK: load i64, i64* @"OBJC_IVAR_$_ForBlock.foo" +// CHECK-LABEL: define internal ptr @block_block_invoke +// CHECK: load i64, ptr @"OBJC_IVAR_$_ForBlock.foo" id (^block)(ForBlock*) = ^(ForBlock* a) { return a->foo; }; diff --git a/clang/test/CodeGenObjC/local-static-block.m b/clang/test/CodeGenObjC/local-static-block.m index 6c8ed885328613..d4962beeb58263 100644 --- a/clang/test/CodeGenObjC/local-static-block.m +++ b/clang/test/CodeGenObjC/local-static-block.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fblocks -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s // rdar: // 8390455 // CHECK: @ArrayRecurs = internal global @@ -59,7 +59,7 @@ static void (^const block1)(int) = ^(int a){ // CHECK-LABEL: define{{.*}} void @FUNC2( // CHECK: define internal void @_block_invoke{{.*}}( -// CHECK: call void %{{.*}}(i8* noundef bitcast ({ i8**, i32, i32, i8*, %struct.__block_descriptor* }* @__block_literal_global{{.*}} to i8*), i32 noundef %{{.*}}) +// CHECK: call void %{{.*}}(ptr noundef @__block_literal_global{{.*}}, i32 noundef %{{.*}}) void FUNC1(void) { diff --git a/clang/test/CodeGenObjC/matrix-type-builtins.m b/clang/test/CodeGenObjC/matrix-type-builtins.m index acda3ac8f5c19e..4b19820d2c85ea 100644 --- a/clang/test/CodeGenObjC/matrix-type-builtins.m +++ b/clang/test/CodeGenObjC/matrix-type-builtins.m @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fenable-matrix -emit-llvm -disable-llvm-optzns -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fenable-matrix -emit-llvm -disable-llvm-optzns -o - %s | FileCheck %s // Check that we correctly deal with placeholder expressions. @@ -40,22 +40,22 @@ @interface IntValue @end void test_column_major_load(PtrValue *Ptr, IntValue *Stride) { - // CHECK-LABEL: define{{.*}} void @test_column_major_load(%2* noundef %Ptr, %3* noundef %Stride) #4 { - // CHECK: [[STRIDE:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*) + // CHECK-LABEL: define{{.*}} void @test_column_major_load(ptr noundef %Ptr, ptr noundef %Stride) #4 { + // CHECK: [[STRIDE:%.*]] = call i32 @objc_msgSend // CHECK-NEXT: [[STRIDE_EXT:%.*]] = sext i32 [[STRIDE]] to i64 - // CHECK: [[PTR:%.*]] = call i32* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32* (i8*, i8*)*) - // CHECK-NEXT: call <12 x i32> @llvm.matrix.column.major.load.v12i32.i64(i32* align 4 [[PTR]], i64 [[STRIDE_EXT]], i1 false, i32 3, i32 4) + // CHECK: [[PTR:%.*]] = call ptr @objc_msgSend + // CHECK-NEXT: call <12 x i32> @llvm.matrix.column.major.load.v12i32.i64(ptr align 4 [[PTR]], i64 [[STRIDE_EXT]], i1 false, i32 3, i32 4) u3x4 m = __builtin_matrix_column_major_load(Ptr.value, 3, 4, Stride.value); } void test_column_major_store(UnsignedMatrixValue *M, PtrValue *Ptr, IntValue *Stride) { - // CHECK-LABEL: define{{.*}} void @test_column_major_store(%1* noundef %M, %2* noundef %Ptr, %3* noundef %Stride) #3 { - // CHECK: [[M:%.*]] = call <12 x i32> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <12 x i32> (i8*, i8*)*) - // CHECK: [[PTR:%.*]] = call i32* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32* (i8*, i8*)*) - // CHECK: [[IDX:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*) + // CHECK-LABEL: define{{.*}} void @test_column_major_store(ptr noundef %M, ptr noundef %Ptr, ptr noundef %Stride) #3 { + // CHECK: [[M:%.*]] = call <12 x i32> @objc_msgSend + // CHECK: [[PTR:%.*]] = call ptr @objc_msgSend + // CHECK: [[IDX:%.*]] = call i32 @objc_msgSend // CHECK-NEXT: [[IDX_EXT:%.*]] = sext i32 [[IDX]] to i64 - // CHECK-NEXT: call void @llvm.matrix.column.major.store.v12i32.i64(<12 x i32> [[M]], i32* align 4 [[PTR]], i64 [[IDX_EXT]], i1 false, i32 3, i32 4) + // CHECK-NEXT: call void @llvm.matrix.column.major.store.v12i32.i64(<12 x i32> [[M]], ptr align 4 [[PTR]], i64 [[IDX_EXT]], i1 false, i32 3, i32 4) __builtin_matrix_column_major_store(M.value, Ptr.value, Stride.value); } diff --git a/clang/test/CodeGenObjC/matrix-type-operators.m b/clang/test/CodeGenObjC/matrix-type-operators.m index 36f294f6e8b93b..179bb180daf90e 100644 --- a/clang/test/CodeGenObjC/matrix-type-operators.m +++ b/clang/test/CodeGenObjC/matrix-type-operators.m @@ -1,5 +1,5 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fenable-matrix -emit-llvm -disable-llvm-optzns -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fenable-matrix -emit-llvm -disable-llvm-optzns -o - %s | FileCheck %s __attribute__((objc_root_class)) @interface IntValue @@ -12,19 +12,17 @@ @interface IntValue // CHECK-LABEL: @test_index_placeholders( // CHECK-NEXT: entry: -// CHECK: [[IV:%.*]] = load %0*, %0** [[IV_ADDR:%.*]], align 8 -// CHECK-NEXT: [[IV_PTR:%.*]] = bitcast %0* [[IV]] to i8* -// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 -// CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* noundef [[IV_PTR]], i8* noundef [[SEL]]) +// CHECK: [[IV:%.*]] = load ptr, ptr [[IV_ADDR:%.*]], align 8 +// CHECK-NEXT: [[SEL:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[CALL:%.*]] = call i32 @objc_msgSend(ptr noundef [[IV]], ptr noundef [[SEL]]) // CHECK-NEXT: [[CONV:%.*]] = sext i32 [[CALL]] to i64 -// CHECK-NEXT: [[IV2:%.*]] = load %0*, %0** [[IV_ADDR]], align 8 -// CHECK-NEXT: [[IV2_PTR:%.*]] = bitcast %0* [[IV2]] to i8* -// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 -// CHECK-NEXT: [[CALL1:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* noundef [[IV2_PTR]], i8* noundef [[SEL2]]) +// CHECK-NEXT: [[IV2:%.*]] = load ptr, ptr [[IV_ADDR]], align 8 +// CHECK-NEXT: [[SEL2:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[CALL1:%.*]] = call i32 @objc_msgSend(ptr noundef [[IV2]], ptr noundef [[SEL2]]) // CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[CALL1]] to i64 // CHECK-NEXT: [[IDX1:%.*]] = mul i64 [[CONV2]], 4 // CHECK-NEXT: [[IDX2:%.*]] = add i64 [[IDX1]], [[CONV]] -// CHECK-NEXT: [[MAT:%.*]] = load <16 x double>, <16 x double>* {{.*}} align 8 +// CHECK-NEXT: [[MAT:%.*]] = load <16 x double>, ptr {{.*}} align 8 // CHECK-NEXT: [[MATEXT:%.*]] = extractelement <16 x double> [[MAT]], i64 [[IDX2]] // CHECK-NEXT: ret double [[MATEXT]] // @@ -39,22 +37,19 @@ @interface MatrixValue @end // CHECK-LABEL: @test_base_and_index_placeholders( -// CHECK: [[IV:%.*]] = load %0*, %0** [[IV_ADDR:%.*]], align 8 -// CHECK-NEXT: [[IV_PTR:%.*]] = bitcast %0* [[IV]] to i8* -// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 -// CHECK-NEXT: [[CALL:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* noundef [[IV_PTR]], i8* noundef [[SEL]]) +// CHECK: [[IV:%.*]] = load ptr, ptr [[IV_ADDR:%.*]], align 8 +// CHECK-NEXT: [[SEL:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[CALL:%.*]] = call i32 @objc_msgSend(ptr noundef [[IV]], ptr noundef [[SEL]]) // CHECK-NEXT: [[CONV:%.*]] = sext i32 [[CALL]] to i64 -// CHECK-NEXT: [[IV2:%.*]] = load %0*, %0** [[IV_ADDR]], align 8 -// CHECK-NEXT: [[IV2_PTR:%.*]] = bitcast %0* [[IV2]] to i8* -// CHECK-NEXT: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 -// CHECK-NEXT: [[CALL1:%.*]] = call i32 bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 (i8*, i8*)*)(i8* noundef [[IV2_PTR]], i8* noundef [[SEL2]]) +// CHECK-NEXT: [[IV2:%.*]] = load ptr, ptr [[IV_ADDR]], align 8 +// CHECK-NEXT: [[SEL2:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[CALL1:%.*]] = call i32 @objc_msgSend(ptr noundef [[IV2]], ptr noundef [[SEL2]]) // CHECK-NEXT: [[CONV2:%.*]] = sext i32 [[CALL1]] to i64 // CHECK-NEXT: [[IDX1:%.*]] = mul i64 [[CONV2]], 4 // CHECK-NEXT: [[IDX2:%.*]] = add i64 [[IDX1]], [[CONV]] -// CHECK-NEXT: [[M:%.*]] = load %1*, %1** %m.addr, align 8 -// CHECK-NEXT: [[M_PTR:%.*]] = bitcast %1* [[M]] to i8* -// CHECK-NEXT: [[SEL3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 -// CHECK-NEXT: [[MAT:%.*]] = call <16 x double> bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to <16 x double> (i8*, i8*)*)(i8* noundef [[M_PTR]], i8* noundef [[SEL3]]) +// CHECK-NEXT: [[M:%.*]] = load ptr, ptr %m.addr, align 8 +// CHECK-NEXT: [[SEL3:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load !7 +// CHECK-NEXT: [[MAT:%.*]] = call <16 x double> @objc_msgSend(ptr noundef [[M]], ptr noundef [[SEL3]]) // CHECK-NEXT: [[MATEXT:%.*]] = extractelement <16 x double> [[MAT]], i64 [[IDX2]] // CHECK-NEXT: ret double [[MATEXT]] // diff --git a/clang/test/CodeGenObjC/misc-atomic-property.m b/clang/test/CodeGenObjC/misc-atomic-property.m index d141bf682f493a..4c8cc669705dd0 100644 --- a/clang/test/CodeGenObjC/misc-atomic-property.m +++ b/clang/test/CodeGenObjC/misc-atomic-property.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s // rdar: //8808439 typedef struct { diff --git a/clang/test/CodeGenObjC/mrc-weak.m b/clang/test/CodeGenObjC/mrc-weak.m index 23079a52a97399..499a41a510ec5a 100644 --- a/clang/test/CodeGenObjC/mrc-weak.m +++ b/clang/test/CodeGenObjC/mrc-weak.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MODERN -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-FRAGILE +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MODERN +// RUN: %clang_cc1 -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-FRAGILE @interface Object - (instancetype) retain; @@ -52,7 +52,7 @@ @implementation Foo void test1(__weak id x) {} // CHECK-LABEL: define{{.*}} void @test1 -// CHECK: [[X:%.*]] = alloca i8*, +// CHECK: [[X:%.*]] = alloca ptr, // CHECK-NEXT: @llvm.objc.initWeak // CHECK-NEXT: @llvm.objc.destroyWeak // CHECK-NEXT: ret void @@ -61,12 +61,12 @@ void test2(id y) { __weak id z = y; } // CHECK-LABEL: define{{.*}} void @test2 -// CHECK: [[Y:%.*]] = alloca i8*, -// CHECK-NEXT: [[Z:%.*]] = alloca i8*, +// CHECK: [[Y:%.*]] = alloca ptr, +// CHECK-NEXT: [[Z:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[Z]], i8* [[T0]]) -// CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[Z]]) +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call ptr @llvm.objc.initWeak(ptr [[Z]], ptr [[T0]]) +// CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[Z]]) // CHECK-NEXT: ret void void test3(id y) { @@ -74,51 +74,49 @@ void test3(id y) { z = y; } // CHECK-LABEL: define{{.*}} void @test3 -// CHECK: [[Y:%.*]] = alloca i8*, -// CHECK-NEXT: [[Z:%.*]] = alloca i8*, +// CHECK: [[Y:%.*]] = alloca ptr, +// CHECK-NEXT: [[Z:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: store i8* null, i8** [[Z]] -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call i8* @llvm.objc.storeWeak(i8** [[Z]], i8* [[T0]]) -// CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[Z]]) +// CHECK-NEXT: store ptr null, ptr [[Z]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call ptr @llvm.objc.storeWeak(ptr [[Z]], ptr [[T0]]) +// CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[Z]]) // CHECK-NEXT: ret void void test4(__weak id *p) { id y = *p; } // CHECK-LABEL: define{{.*}} void @test4 -// CHECK: [[P:%.*]] = alloca i8**, -// CHECK-NEXT: [[Y:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8**, i8*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.loadWeak(i8** [[T0]]) -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.loadWeak(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T1]], ptr [[Y]] // CHECK-NEXT: ret void void test5(__weak id *p) { id y = [*p retain]; } // CHECK-LABEL: define{{.*}} void @test5 -// CHECK: [[P:%.*]] = alloca i8**, -// CHECK-NEXT: [[Y:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8**, i8*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[T0]]) -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T1]], ptr [[Y]] // CHECK-NEXT: ret void void test6(__weak Foo **p) { Foo *y = [*p retain]; } // CHECK-LABEL: define{{.*}} void @test6 -// CHECK: [[P:%.*]] = alloca [[FOO:%.*]]**, -// CHECK-NEXT: [[Y:%.*]] = alloca [[FOO]]*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load [[FOO]]**, [[FOO]]*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = bitcast [[FOO]]** [[T0]] to i8** -// CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[T1]]) -// CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[FOO]]* -// CHECK-NEXT: store [[FOO]]* [[T3]], [[FOO]]** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T2:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T2]], ptr [[Y]] // CHECK-NEXT: ret void extern id get_object(void); @@ -129,12 +127,9 @@ void test7(void) { use_block(^{ [p run ]; }); } // CHECK-LABEL: define{{.*}} void @test7 -// CHECK: [[P:%.*]] = alloca [[FOO]]*, -// CHECK: [[T0:%.*]] = call i8* @get_object() -// CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[FOO]]* -// CHECK-NEXT: [[T2:%.*]] = bitcast [[FOO]]** [[P]] to i8** -// CHECK-NEXT: [[T3:%.*]] = bitcast [[FOO]]* [[T1]] to i8* -// CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[T2]], i8* [[T3]]) +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK: [[T0:%.*]] = call ptr @get_object() +// CHECK-NEXT: call ptr @llvm.objc.initWeak(ptr [[P]], ptr [[T0]]) // CHECK: call void @llvm.objc.copyWeak // CHECK: call void @use_block // CHECK: call void @llvm.objc.destroyWeak @@ -150,7 +145,7 @@ void test8(void) { use_block(^{ [p run ]; }); } // CHECK-LABEL: define{{.*}} void @test8 -// CHECK: call i8* @llvm.objc.initWeak +// CHECK: call ptr @llvm.objc.initWeak // CHECK-NOT: call void @llvm.objc.copyWeak // CHECK: call void @use_block // CHECK: call void @llvm.objc.destroyWeak diff --git a/clang/test/CodeGenObjC/newproperty-nested-synthesis-1.m b/clang/test/CodeGenObjC/newproperty-nested-synthesis-1.m index d97a2f3670d0ec..aa0c8c923971ee 100644 --- a/clang/test/CodeGenObjC/newproperty-nested-synthesis-1.m +++ b/clang/test/CodeGenObjC/newproperty-nested-synthesis-1.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -o %t %s +// RUN: %clang_cc1 -emit-llvm -o %t %s // REQUIRES: LP64 @interface Object diff --git a/clang/test/CodeGenObjC/next-objc-dispatch.m b/clang/test/CodeGenObjC/next-objc-dispatch.m index 835509a55e5ba8..e3a304d909505d 100644 --- a/clang/test/CodeGenObjC/next-objc-dispatch.m +++ b/clang/test/CodeGenObjC/next-objc-dispatch.m @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s \ +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s \ // RUN: -fobjc-dispatch-method=legacy | \ // RUN: FileCheck -check-prefix CHECK-FRAGILE_LEGACY %s // -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ // RUN: -fobjc-dispatch-method=legacy | \ // RUN: FileCheck -check-prefix CHECK-NONFRAGILE_LEGACY %s // -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ // RUN: -fobjc-dispatch-method=non-legacy | \ // RUN: FileCheck -check-prefix CHECK-NONFRAGILE_NONLEGACY %s // -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -emit-llvm -o - %s \ // RUN: -fobjc-dispatch-method=mixed | \ // RUN: FileCheck -check-prefix CHECK-NONFRAGILE_MIXED %s // @@ -27,25 +27,25 @@ // they use some different API calls (objc_msgSendSuper vs objc_msgSendSuper2). // CHECK-FRAGILE_LEGACY: ModuleID -// CHECK-FRAGILE_LEGACY-NOT: declare i8* @objc_msgSendSuper2_fixup( -// CHECK-FRAGILE_LEGACY-NOT: declare i8* @objc_msgSend_fixup( -// CHECK-FRAGILE_LEGACY: declare i8* @objc_msgSendSuper( -// CHECK-FRAGILE_LEGACY: declare i8* @objc_msgSend( +// CHECK-FRAGILE_LEGACY-NOT: declare ptr @objc_msgSendSuper2_fixup( +// CHECK-FRAGILE_LEGACY-NOT: declare ptr @objc_msgSend_fixup( +// CHECK-FRAGILE_LEGACY: declare ptr @objc_msgSendSuper( +// CHECK-FRAGILE_LEGACY: declare ptr @objc_msgSend( // CHECK-NONFRAGILE_LEGACY: ModuleID -// CHECK-NONFRAGILE_LEGACY-NOT: declare i8* @objc_msgSendSuper2_fixup( -// CHECK-NONFRAGILE_LEGACY-NOT: declare i8* @objc_msgSend_fixup( -// CHECK-NONFRAGILE_LEGACY: declare i8* @objc_msgSendSuper2( -// CHECK-NONFRAGILE_LEGACY: declare i8* @objc_msgSend( +// CHECK-NONFRAGILE_LEGACY-NOT: declare ptr @objc_msgSendSuper2_fixup( +// CHECK-NONFRAGILE_LEGACY-NOT: declare ptr @objc_msgSend_fixup( +// CHECK-NONFRAGILE_LEGACY: declare ptr @objc_msgSendSuper2( +// CHECK-NONFRAGILE_LEGACY: declare ptr @objc_msgSend( // CHECK-NONFRAGILE_NONLEGACY: ModuleID -// CHECK-NONFRAGILE_NONLEGACY: declare i8* @objc_msgSendSuper2_fixup( -// CHECK-NONFRAGILE_NONLEGACY: declare i8* @objc_msgSend_fixup( +// CHECK-NONFRAGILE_NONLEGACY: declare ptr @objc_msgSendSuper2_fixup( +// CHECK-NONFRAGILE_NONLEGACY: declare ptr @objc_msgSend_fixup( -// CHECK-NONFRAGILE_MIXED: declare i8* @objc_msgSendSuper2_fixup( -// CHECK-NONFRAGILE_MIXED: declare i8* @objc_msgSendSuper2( -// CHECK-NONFRAGILE_MIXED: declare i8* @objc_msgSend_fixup( -// CHECK-NONFRAGILE_MIXED: declare i8* @objc_msgSend( +// CHECK-NONFRAGILE_MIXED: declare ptr @objc_msgSendSuper2_fixup( +// CHECK-NONFRAGILE_MIXED: declare ptr @objc_msgSendSuper2( +// CHECK-NONFRAGILE_MIXED: declare ptr @objc_msgSend_fixup( +// CHECK-NONFRAGILE_MIXED: declare ptr @objc_msgSend( @interface NSObject + (id)alloc; diff --git a/clang/test/CodeGenObjC/non-runtime-protocol.m b/clang/test/CodeGenObjC/non-runtime-protocol.m index a6d0d5f1b0caae..889bf0835270ca 100644 --- a/clang/test/CodeGenObjC/non-runtime-protocol.m +++ b/clang/test/CodeGenObjC/non-runtime-protocol.m @@ -1,29 +1,29 @@ -// RUN: not %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DPROTOEXPR -o - 2>&1 \ +// RUN: not %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DPROTOEXPR -o - 2>&1 \ // RUN: | FileCheck -check-prefix=PROTOEXPR %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DREDUNDANCY -o - \ +// RUN: %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DREDUNDANCY -o - \ // RUN: | FileCheck -check-prefix=REDUNDANCY1 %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DREDUNDANCY -o - \ +// RUN: %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DREDUNDANCY -o - \ // RUN: | FileCheck -check-prefix=REDUNDANCY2 %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DBASE -o - \ +// RUN: %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DBASE -o - \ // RUN: | FileCheck -check-prefix=NONFRAGILE %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DINHERITANCE -o - \ +// RUN: %clang_cc1 -emit-llvm -fobjc-arc -triple x86_64-apple-darwin10 %s -DINHERITANCE -o - \ // RUN: | FileCheck -check-prefix=INHERITANCE %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 %s -DBASE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 %s -DBASE -o - \ // RUN: | FileCheck -check-prefix=FRAGILE %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 %s -DINHERITANCE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 %s -DINHERITANCE -o - \ // RUN: | FileCheck -check-prefix=FRAGILEINHERITANCE %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep %s -DBASE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep %s -DBASE -o - \ // RUN: | FileCheck -check-prefix=GNU %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep %s -DINHERITANCE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep %s -DINHERITANCE -o - \ // RUN: | FileCheck -check-prefix=GNUINHERITANCE %s // -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep-2 %s -DBASE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep-2 %s -DBASE -o - \ // RUN: | FileCheck -check-prefix=GNU2 %s -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep-2 %s -DINHERITANCE -o - \ +// RUN: %clang_cc1 -emit-llvm -triple x86_64-linux-gnu -fobjc-runtime=gnustep-2 %s -DINHERITANCE -o - \ // RUN: | FileCheck -check-prefix=GNU2INHERITANCE %s __attribute__((objc_root_class)) @@ -71,8 +71,8 @@ @protocol NonRuntimeProtocol - (void)doThing; + (void)doClassThing; @end -// NONFRAGILE: @"_OBJC_METACLASS_RO_$_NonRuntimeImplementer" {{.*}} %struct._objc_protocol_list* null -// NONFRAGILE: @"_OBJC_CLASS_RO_$_NonRuntimeImplementer" {{.*}} %struct._objc_protocol_list* null +// NONFRAGILE: @"_OBJC_METACLASS_RO_$_NonRuntimeImplementer" {{.*}} ptr null +// NONFRAGILE: @"_OBJC_CLASS_RO_$_NonRuntimeImplementer" {{.*}} ptr null @interface NonRuntimeImplementer : Root - (void)doThing; + (void)doClassThing; diff --git a/clang/test/CodeGenObjC/nonlazy-msgSend.m b/clang/test/CodeGenObjC/nonlazy-msgSend.m index 06db9a31f36c99..eb1dd2aac0979d 100644 --- a/clang/test/CodeGenObjC/nonlazy-msgSend.m +++ b/clang/test/CodeGenObjC/nonlazy-msgSend.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck %s -// CHECK: declare i8* @objc_msgSend(i8*, i8*, ...) [[NLB:#[0-9]+]] +// CHECK: declare ptr @objc_msgSend(ptr, ptr, ...) [[NLB:#[0-9]+]] void f0(id x) { [x foo]; } diff --git a/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m b/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m index 4c1e210765d7e6..c2a8ab88f2fda7 100644 --- a/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m +++ b/clang/test/CodeGenObjC/nontrivial-c-struct-within-struct-name.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios11 -fobjc-arc -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple arm64-apple-ios11 -fobjc-arc -emit-llvm -o - %s | FileCheck %s @class I; @@ -22,23 +22,23 @@ void f(void) { Baz baz = {bar}; } -// CHECK: define linkonce_odr hidden void @__destructor_8_S_S_s0(i8** noundef %[[DST:.*]]) -// CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// CHECK: call void @__destructor_8_S_s0(i8** %[[V0]]) +// CHECK: define linkonce_odr hidden void @__destructor_8_S_S_s0(ptr noundef %[[DST:.*]]) +// CHECK: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// CHECK: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// CHECK: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// CHECK: call void @__destructor_8_S_s0(ptr %[[V0]]) // CHECK: ret void -// CHECK: define linkonce_odr hidden void @__destructor_8_S_s0(i8** noundef %[[DST:.*]]) -// CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// CHECK: call void @__destructor_8_s0(i8** %[[V0]]) +// CHECK: define linkonce_odr hidden void @__destructor_8_S_s0(ptr noundef %[[DST:.*]]) +// CHECK: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// CHECK: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// CHECK: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// CHECK: call void @__destructor_8_s0(ptr %[[V0]]) // CHECK: ret void -// CHECK: define linkonce_odr hidden void @__destructor_8_s0(i8** noundef %dst) -// CHECK: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// CHECK: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// CHECK: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// CHECK: call void @llvm.objc.storeStrong(i8** %[[V0]], i8* null) +// CHECK: define linkonce_odr hidden void @__destructor_8_s0(ptr noundef %dst) +// CHECK: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// CHECK: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// CHECK: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// CHECK: call void @llvm.objc.storeStrong(ptr %[[V0]], ptr null) // CHECK: ret void diff --git a/clang/test/CodeGenObjC/nontrivial-struct-param-init.m b/clang/test/CodeGenObjC/nontrivial-struct-param-init.m index dc4b27e9d00957..79c97d98185437 100644 --- a/clang/test/CodeGenObjC/nontrivial-struct-param-init.m +++ b/clang/test/CodeGenObjC/nontrivial-struct-param-init.m @@ -1,17 +1,16 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-watchos6.0-simulator -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-watchos6.0-simulator -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s -// CHECK: %[[STRUCT_S:.*]] = type { i8* } +// CHECK: %[[STRUCT_S:.*]] = type { ptr } typedef struct { id x; } S; -// CHECK: define{{.*}} void @test0(i8* %[[A_0:.*]]) +// CHECK: define{{.*}} void @test0(ptr %[[A_0:.*]]) // CHECK: %[[A:.*]] = alloca %[[STRUCT_S]], align 4 -// CHECK: %[[X:.*]] = getelementptr inbounds %[[STRUCT_S]], %[[STRUCT_S]]* %[[A]], i32 0, i32 0 -// CHECK: store i8* %[[A_0]], i8** %[[X]], align 4 -// CHECK: %[[V0:.*]] = bitcast %[[STRUCT_S]]* %[[A]] to i8** -// CHECK: call void @__destructor_4_s0(i8** %[[V0]]) #2 +// CHECK: %[[X:.*]] = getelementptr inbounds %[[STRUCT_S]], ptr %[[A]], i32 0, i32 0 +// CHECK: store ptr %[[A_0]], ptr %[[X]], align 4 +// CHECK: call void @__destructor_4_s0(ptr %[[A]]) #2 void test0(S a) { } diff --git a/clang/test/CodeGenObjC/null-objc-empty-vtable.m b/clang/test/CodeGenObjC/null-objc-empty-vtable.m index 9348dbe91a476e..de35778fc4be1f 100644 --- a/clang/test/CodeGenObjC/null-objc-empty-vtable.m +++ b/clang/test/CodeGenObjC/null-objc-empty-vtable.m @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.9 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-OSX %s -// RUN: %clang_cc1 -no-opaque-pointers -triple thumbv7-apple-ios3.0.0 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-IOS %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.9 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-OSX %s +// RUN: %clang_cc1 -triple thumbv7-apple-ios3.0.0 -emit-llvm -o - %s | FileCheck -check-prefix CHECK-IOS %s // rdar://14802916 @interface I @end @implementation I @end -// CHECK-OSX: %struct._class_t* null, %struct._objc_cache* @_objc_empty_cache, i8* (i8*, i8*)** null -// CHECK-IOS: %struct._class_t* null, %struct._objc_cache* @_objc_empty_cache, i8* (i8*, i8*)** null +// CHECK-OSX: ptr null, ptr @_objc_empty_cache, ptr null +// CHECK-IOS: ptr null, ptr @_objc_empty_cache, ptr null diff --git a/clang/test/CodeGenObjC/objc-alloc-init.m b/clang/test/CodeGenObjC/objc-alloc-init.m index 2fe8a8860ef507..0e8260ad858bdc 100644 --- a/clang/test/CodeGenObjC/objc-alloc-init.m +++ b/clang/test/CodeGenObjC/objc-alloc-init.m @@ -1,7 +1,7 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -fobjc-exceptions -fexceptions -fobjc-runtime=macosx-10.14.4 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=OPTIMIZED --check-prefix=EITHER -// RUN: %clang_cc1 -no-opaque-pointers %s -fobjc-exceptions -fexceptions -fobjc-runtime=macosx-10.14.3 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=NOT_OPTIMIZED --check-prefix=EITHER -// RUN: %clang_cc1 -no-opaque-pointers %s -fobjc-exceptions -fexceptions -fobjc-runtime=ios-12.2 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=OPTIMIZED --check-prefix=EITHER -// RUN: %clang_cc1 -no-opaque-pointers %s -fobjc-exceptions -fexceptions -fobjc-runtime=ios-12.1 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=NOT_OPTIMIZED --check-prefix=EITHER +// RUN: %clang_cc1 %s -fobjc-exceptions -fexceptions -fobjc-runtime=macosx-10.14.4 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=OPTIMIZED --check-prefix=EITHER +// RUN: %clang_cc1 %s -fobjc-exceptions -fexceptions -fobjc-runtime=macosx-10.14.3 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=NOT_OPTIMIZED --check-prefix=EITHER +// RUN: %clang_cc1 %s -fobjc-exceptions -fexceptions -fobjc-runtime=ios-12.2 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=OPTIMIZED --check-prefix=EITHER +// RUN: %clang_cc1 %s -fobjc-exceptions -fexceptions -fobjc-runtime=ios-12.1 -emit-llvm -O0 -o - | FileCheck %s --check-prefix=NOT_OPTIMIZED --check-prefix=EITHER @interface X +(X *)alloc; @@ -10,15 +10,15 @@ -(X *)init; void f(void) { [[X alloc] init]; - // OPTIMIZED: call i8* @objc_alloc_init( - // NOT_OPTIMIZED: call i8* @objc_alloc( + // OPTIMIZED: call ptr @objc_alloc_init( + // NOT_OPTIMIZED: call ptr @objc_alloc( @try { [[X alloc] init]; } @catch (X *x) { } - // OPTIMIZED: invoke i8* @objc_alloc_init( - // NOT_OPTIMIZED: invoke i8* @objc_alloc( + // OPTIMIZED: invoke ptr @objc_alloc_init( + // NOT_OPTIMIZED: invoke ptr @objc_alloc( } @interface Y : X @@ -33,16 +33,16 @@ +(Class)class { } +(void)meth { [[self alloc] init]; - // OPTIMIZED: call i8* @objc_alloc_init( - // NOT_OPTIMIZED: call i8* @objc_alloc( + // OPTIMIZED: call ptr @objc_alloc_init( + // NOT_OPTIMIZED: call ptr @objc_alloc( } + (void)meth2 { [[[self class] alloc] init]; - // OPTIMIZED: call i8* @objc_alloc_init( - // NOT_OPTIMIZED: call i8* @objc_alloc( + // OPTIMIZED: call ptr @objc_alloc_init( + // NOT_OPTIMIZED: call ptr @objc_alloc( } -(void)instanceMeth { - // EITHER-NOT: call i8* @objc_alloc + // EITHER-NOT: call ptr @objc_alloc // EITHER: call {{.*}} @objc_msgSend // EITHER: call {{.*}} @objc_msgSend [[(id)self alloc] init]; diff --git a/clang/test/CodeGenObjC/objc-asm-attribute-test.m b/clang/test/CodeGenObjC/objc-asm-attribute-test.m index 875de5b5014ebe..fbb4b4d915d6c5 100644 --- a/clang/test/CodeGenObjC/objc-asm-attribute-test.m +++ b/clang/test/CodeGenObjC/objc-asm-attribute-test.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple x86_64-apple-darwin %s -o - | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -triple x86_64-apple-darwin %s -o - | FileCheck %s // rdar://16462586 __attribute__((objc_runtime_name("MySecretNamespace.Protocol"))) @@ -64,5 +64,5 @@ id Test16877359(void) { // CHECK: private unnamed_addr constant [50 x i8] c"T@\22\22,&,V_idProtoProp\00" // CHECK: @"OBJC_CLASS_$_foo" = external global %struct._class_t -// CHECK: define internal i8* @"\01-[Message MyMethod]" -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_MySecretNamespace.Message.MyIVAR" +// CHECK: define internal ptr @"\01-[Message MyMethod]" +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_MySecretNamespace.Message.MyIVAR" diff --git a/clang/test/CodeGenObjC/objc-dispatch-null-check.m b/clang/test/CodeGenObjC/objc-dispatch-null-check.m index 08e9c2169145d5..d7ee2441cc2522 100644 --- a/clang/test/CodeGenObjC/objc-dispatch-null-check.m +++ b/clang/test/CodeGenObjC/objc-dispatch-null-check.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin9 -fobjc-dispatch-method=non-legacy -fobjc-arc -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin9 -fobjc-dispatch-method=non-legacy -fobjc-arc -emit-llvm -o - %s | FileCheck %s -// CHECK: %[[STRUCT_STRONG:.*]] = type { i8* } +// CHECK: %[[STRUCT_STRONG:.*]] = type { ptr } typedef struct { id x; @@ -14,19 +14,17 @@ - (void)passStrong:(Strong)a; // CHECK-LABEL: define{{.*}} void @test0( // CHECK: %[[AGG_TMP:.*]] = alloca %[[STRUCT_STRONG]], align 8 -// CHECK: %[[CALL:.*]] = call i8* @getStrong() -// CHECK-NEXT: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[AGG_TMP]], i32 0, i32 0 -// CHECK-NEXT: store i8* %[[CALL]], i8** %[[COERCE_DIVE]], align 8 - -// CHECK: %[[MSGSEND_FN:.*]] = load i8*, i8** -// CHECK: %[[V5:.*]] = bitcast i8* %[[MSGSEND_FN]] to void (i8*, i8*, i8*)* -// CHECK: %[[COERCE_DIVE1:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[AGG_TMP]], i32 0, i32 0 -// CHECK: %[[V6:.*]] = load i8*, i8** %[[COERCE_DIVE1]], align 8 -// CHECK: call void %[[V5]]({{.*}}, i8* %[[V6]]) +// CHECK: %[[CALL:.*]] = call ptr @getStrong() +// CHECK-NEXT: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], ptr %[[AGG_TMP]], i32 0, i32 0 +// CHECK-NEXT: store ptr %[[CALL]], ptr %[[COERCE_DIVE]], align 8 + +// CHECK: %[[MSGSEND_FN:.*]] = load ptr, ptr +// CHECK: %[[COERCE_DIVE1:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], ptr %[[AGG_TMP]], i32 0, i32 0 +// CHECK: %[[V6:.*]] = load ptr, ptr %[[COERCE_DIVE1]], align 8 +// CHECK: call void %[[MSGSEND_FN]]({{.*}}, ptr %[[V6]]) // CHECK: br -// CHECK: %[[V7:.*]] = bitcast %[[STRUCT_STRONG]]* %[[AGG_TMP]] to i8** -// CHECK: call void @__destructor_8_s0(i8** %[[V7]]) +// CHECK: call void @__destructor_8_s0(ptr %[[AGG_TMP]]) // CHECK: br void test0(I0 *a) { diff --git a/clang/test/CodeGenObjC/objc-gc-aggr-assign.m b/clang/test/CodeGenObjC/objc-gc-aggr-assign.m index e82fa33f8b0568..3b46588db0be72 100644 --- a/clang/test/CodeGenObjC/objc-gc-aggr-assign.m +++ b/clang/test/CodeGenObjC/objc-gc-aggr-assign.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-C %s -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-CP %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-C %s +// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck -check-prefix CHECK-CP %s static int count; @@ -52,11 +52,11 @@ void foo(Derived* src, Derived* dest) { } #endif -// CHECK-C: call i8* @objc_memmove_collectable -// CHECK-C: call i8* @objc_memmove_collectable -// CHECK-C: call i8* @objc_memmove_collectable +// CHECK-C: call ptr @objc_memmove_collectable +// CHECK-C: call ptr @objc_memmove_collectable +// CHECK-C: call ptr @objc_memmove_collectable -// CHECK-CP: call i8* @objc_memmove_collectable -// CHECK-CP: call i8* @objc_memmove_collectable -// CHECK-CP: call i8* @objc_memmove_collectable -// CHECK-CP: call i8* @objc_memmove_collectable +// CHECK-CP: call ptr @objc_memmove_collectable +// CHECK-CP: call ptr @objc_memmove_collectable +// CHECK-CP: call ptr @objc_memmove_collectable +// CHECK-CP: call ptr @objc_memmove_collectable diff --git a/clang/test/CodeGenObjC/objc-literal-debugger-test.m b/clang/test/CodeGenObjC/objc-literal-debugger-test.m index 05228053914120..62aa8574091b4b 100644 --- a/clang/test/CodeGenObjC/objc-literal-debugger-test.m +++ b/clang/test/CodeGenObjC/objc-literal-debugger-test.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fdebugger-objc-literal -emit-llvm -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fdebugger-objc-literal -emit-llvm -o - %s -DINCLUDE_INTERFACES=1 | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fdebugger-objc-literal -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fdebugger-objc-literal -emit-llvm -o - %s -DINCLUDE_INTERFACES=1 | FileCheck %s // We need two different RUN lines here because the first time a class/method is absent, // it will be added for -fdebugger-objc-literal. @@ -50,6 +50,6 @@ int main(void) { #endif } -// CHECK: declare i8* @objc_msgSend(i8*, i8*, ...) [[NLB:#[0-9]+]] +// CHECK: declare ptr @objc_msgSend(ptr, ptr, ...) [[NLB:#[0-9]+]] // CHECK: attributes [[NLB]] = { nonlazybind } diff --git a/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m b/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m index da320b2b3bfa38..effba8c9584418 100644 --- a/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m +++ b/clang/test/CodeGenObjC/objc-non-trivial-struct-nrvo.m @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -fobjc-runtime-has-weak -o - %s | FileCheck %s // CHECK: %[[STRUCT_TRIVIAL:.*]] = type { i32 } // CHECK: %[[STRUCT_TRIVIALBIG:.*]] = type { [64 x i32] } -// CHECK: %[[STRUCT_STRONG:.*]] = type { i8* } -// CHECK: %[[STRUCT_WEAK:.*]] = type { i8* } +// CHECK: %[[STRUCT_STRONG:.*]] = type { ptr } +// CHECK: %[[STRUCT_WEAK:.*]] = type { ptr } typedef struct { int x; @@ -23,7 +23,7 @@ // CHECK: define{{.*}} i32 @testTrivial() // CHECK: %[[RETVAL:.*]] = alloca %[[STRUCT_TRIVIAL]], align 4 -// CHECK-NEXT: call void @func0(%[[STRUCT_TRIVIAL]]* noundef %[[RETVAL]]) +// CHECK-NEXT: call void @func0(ptr noundef %[[RETVAL]]) // CHECK-NOT: memcpy // CHECK: ret i32 % @@ -37,8 +37,8 @@ Trivial testTrivial(void) { void func1(TrivialBig *); -// CHECK: define{{.*}} void @testTrivialBig(%[[STRUCT_TRIVIALBIG]]* noalias sret(%[[STRUCT_TRIVIALBIG]]) align 4 %[[AGG_RESULT:.*]]) -// CHECK: call void @func1(%[[STRUCT_TRIVIALBIG]]* noundef %[[AGG_RESULT]]) +// CHECK: define{{.*}} void @testTrivialBig(ptr noalias sret(%[[STRUCT_TRIVIALBIG]]) align 4 %[[AGG_RESULT:.*]]) +// CHECK: call void @func1(ptr noundef %[[AGG_RESULT]]) // CHECK-NEXT: ret void TrivialBig testTrivialBig(void) { @@ -47,38 +47,34 @@ TrivialBig testTrivialBig(void) { return a; } -// CHECK: define{{.*}} i8* @testStrong() +// CHECK: define{{.*}} ptr @testStrong() // CHECK: %[[RETVAL:.*]] = alloca %[[STRUCT_STRONG]], align 8 // CHECK: %[[NRVO:.*]] = alloca i1, align 1 -// CHECK: %[[V0:.*]] = bitcast %[[STRUCT_STRONG]]* %[[RETVAL]] to i8** -// CHECK: call void @__default_constructor_8_s0(i8** %[[V0]]) -// CHECK: store i1 true, i1* %[[NRVO]], align 1 -// CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 +// CHECK: call void @__default_constructor_8_s0(ptr %[[RETVAL]]) +// CHECK: store i1 true, ptr %[[NRVO]], align 1 +// CHECK: %[[NRVO_VAL:.*]] = load i1, ptr %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], -// CHECK: %[[V1:.*]] = bitcast %[[STRUCT_STRONG]]* %[[RETVAL]] to i8** -// CHECK: call void @__destructor_8_s0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_s0(ptr %[[RETVAL]]) // CHECK: br -// CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], %[[STRUCT_STRONG]]* %[[RETVAL]], i32 0, i32 0 -// CHECK: %[[V2:.*]] = load i8*, i8** %[[COERCE_DIVE]], align 8 -// CHECK: ret i8* %[[V2]] +// CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds %[[STRUCT_STRONG]], ptr %[[RETVAL]], i32 0, i32 0 +// CHECK: %[[V2:.*]] = load ptr, ptr %[[COERCE_DIVE]], align 8 +// CHECK: ret ptr %[[V2]] Strong testStrong(void) { Strong a; return a; } -// CHECK: define{{.*}} void @testWeak(%[[STRUCT_WEAK]]* noalias sret(%[[STRUCT_WEAK]]) align 8 %[[AGG_RESULT:.*]]) +// CHECK: define{{.*}} void @testWeak(ptr noalias sret(%[[STRUCT_WEAK]]) align 8 %[[AGG_RESULT:.*]]) // CHECK: %[[NRVO:.*]] = alloca i1, align 1 -// CHECK: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__default_constructor_8_w0(i8** %[[V0]]) -// CHECK: store i1 true, i1* %[[NRVO]], align 1 -// CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 +// CHECK: call void @__default_constructor_8_w0(ptr %[[AGG_RESULT]]) +// CHECK: store i1 true, ptr %[[NRVO]], align 1 +// CHECK: %[[NRVO_VAL:.*]] = load i1, ptr %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], -// CHECK: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__destructor_8_w0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_w0(ptr %[[AGG_RESULT]]) // CHECK: br // CHECK-NOT: call @@ -105,16 +101,14 @@ Weak testWeak2(int c) { return b; } -// CHECK: define internal void @"\01-[C1 foo1]"(%[[STRUCT_WEAK]]* noalias sret(%[[STRUCT_WEAK]]) align 8 %[[AGG_RESULT:.*]], %{{.*}}* noundef %{{.*}}, i8* noundef %{{.*}}) +// CHECK: define internal void @"\01-[C1 foo1]"(ptr noalias sret(%[[STRUCT_WEAK]]) align 8 %[[AGG_RESULT:.*]], ptr noundef %{{.*}}, ptr noundef %{{.*}}) // CHECK: %[[NRVO:.*]] = alloca i1, align 1 -// CHECK: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__default_constructor_8_w0(i8** %[[V0]]) -// CHECK: store i1 true, i1* %[[NRVO]], align 1 -// CHECK: %[[NRVO_VAL:.*]] = load i1, i1* %[[NRVO]], align 1 +// CHECK: call void @__default_constructor_8_w0(ptr %[[AGG_RESULT]]) +// CHECK: store i1 true, ptr %[[NRVO]], align 1 +// CHECK: %[[NRVO_VAL:.*]] = load i1, ptr %[[NRVO]], align 1 // CHECK: br i1 %[[NRVO_VAL]], -// CHECK: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// CHECK: call void @__destructor_8_w0(i8** %[[V1]]) +// CHECK: call void @__destructor_8_w0(ptr %[[AGG_RESULT]]) // CHECK: br // CHECK-NOT: call diff --git a/clang/test/CodeGenObjC/objc-read-weak-byref.m b/clang/test/CodeGenObjC/objc-read-weak-byref.m index 5637a596f99394..87b05ef97ad177 100644 --- a/clang/test/CodeGenObjC/objc-read-weak-byref.m +++ b/clang/test/CodeGenObjC/objc-read-weak-byref.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -fobjc-gc -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -fblocks -fobjc-gc -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | \ // RUN: FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -fobjc-gc -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | \ +// RUN: %clang_cc1 -fblocks -fobjc-gc -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | \ // RUN: FileCheck %s @interface NSObject @@ -18,5 +18,5 @@ int main(void) { return 0; } -// CHECK: call i8* @objc_read_weak -// CHECK: call i8* @objc_read_weak +// CHECK: call ptr @objc_read_weak +// CHECK: call ptr @objc_read_weak diff --git a/clang/test/CodeGenObjC/objc-runtime-name.m b/clang/test/CodeGenObjC/objc-runtime-name.m index d590d30c06a321..c838b8c2c6f1ac 100644 --- a/clang/test/CodeGenObjC/objc-runtime-name.m +++ b/clang/test/CodeGenObjC/objc-runtime-name.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-macosx10.13.0 -fobjc-runtime=macosx-fragile-10.13.0 -fobjc-subscripting-legacy-runtime -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-macosx10.13.0 -fobjc-runtime=macosx-fragile-10.13.0 -fobjc-subscripting-legacy-runtime -emit-llvm -o - %s | FileCheck %s // Check that the runtime name is emitted and used instead of the class // identifier. @@ -8,7 +8,7 @@ // CHECK: module asm {{.*}}lazy_reference .objc_class_name_XYZ // CHECK: @[[OBJC_CLASS_NAME:.*]] = private unnamed_addr constant [4 x i8] c"XYZ{{.*}}, section "__TEXT,__cstring,cstring_literals", -// CHECK: = private global {{.*}} bitcast ([4 x i8]* @[[OBJC_CLASS_NAME]] to {{.*}}), section "__OBJC,__cls_refs,literal_pointers,no_dead_strip" +// CHECK: = private global {{.*}} @[[OBJC_CLASS_NAME]], section "__OBJC,__cls_refs,literal_pointers,no_dead_strip" __attribute__((objc_root_class,objc_runtime_name("XYZ"))) @interface A diff --git a/clang/test/CodeGenObjC/objc2-protocol-metadata.m b/clang/test/CodeGenObjC/objc2-protocol-metadata.m index 1809dc47380e36..38f723709e0291 100644 --- a/clang/test/CodeGenObjC/objc2-protocol-metadata.m +++ b/clang/test/CodeGenObjC/objc2-protocol-metadata.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.10 -emit-llvm -o - %s | FileCheck %s // rdar://20286356 @protocol P1 @@ -14,4 +14,4 @@ @implementation INTF + ClsP { return 0; } @end -// CHECK: %struct._protocol_t = type { i8*, i8*, %struct._objc_protocol_list*, %struct.__method_list_t*, %struct.__method_list_t*, %struct.__method_list_t*, %struct.__method_list_t*, %struct._prop_list_t*, i32, i32, i8**, i8*, %struct._prop_list_t* } +// CHECK: %struct._protocol_t = type { ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, ptr, ptr, ptr } diff --git a/clang/test/CodeGenObjC/objc2-strong-cast-block-import.m b/clang/test/CodeGenObjC/objc2-strong-cast-block-import.m index 92ca283badac3e..bdb3804787ed76 100644 --- a/clang/test/CodeGenObjC/objc2-strong-cast-block-import.m +++ b/clang/test/CodeGenObjC/objc2-strong-cast-block-import.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-gc-only -fblocks -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-gc-only -fblocks -emit-llvm -o - %s | FileCheck %s // rdar://10150823 @interface Test { @@ -20,6 +20,6 @@ - (void)testWithObjectInBlock { } @end -// CHECK: call i8* @objc_assign_strongCast -// CHECK: call i8* @objc_assign_strongCast +// CHECK: call ptr @objc_assign_strongCast +// CHECK: call ptr @objc_assign_strongCast diff --git a/clang/test/CodeGenObjC/objc2-weak-block-call.m b/clang/test/CodeGenObjC/objc2-weak-block-call.m index cffc325579ecab..8519b13a5eacff 100644 --- a/clang/test/CodeGenObjC/objc2-weak-block-call.m +++ b/clang/test/CodeGenObjC/objc2-weak-block-call.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -fobjc-gc -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64 %s -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -fobjc-gc -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP32 %s +// RUN: %clang_cc1 -fblocks -fobjc-gc -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP64 %s +// RUN: %clang_cc1 -fblocks -fobjc-gc -triple i386-apple-darwin -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck -check-prefix CHECK-LP32 %s @interface MyView - (void)MyView_sharedInit; @@ -19,6 +19,6 @@ - (void)MyView_sharedInit { } @end -// CHECK-LP64: call i8* @objc_read_weak -// CHECK-LP32: call i8* @objc_read_weak +// CHECK-LP64: call ptr @objc_read_weak +// CHECK-LP32: call ptr @objc_read_weak diff --git a/clang/test/CodeGenObjC/objc_copyStruct.m b/clang/test/CodeGenObjC/objc_copyStruct.m index 97cadbd94e245e..7bbad866e2b1fb 100644 --- a/clang/test/CodeGenObjC/objc_copyStruct.m +++ b/clang/test/CodeGenObjC/objc_copyStruct.m @@ -1,5 +1,5 @@ -// RUN: %clang -Xclang -no-opaque-pointers -target x86_64-unknown-windows-msvc -fobjc-runtime=ios -Wno-objc-root-class -S -o - -emit-llvm %s | FileCheck %s -// RUN: %clang -Xclang -no-opaque-pointers -target x86_64-apple-ios -fobjc-runtime=ios -Wno-objc-root-class -S -o - -emit-llvm %s | FileCheck %s +// RUN: %clang -target x86_64-unknown-windows-msvc -fobjc-runtime=ios -Wno-objc-root-class -S -o - -emit-llvm %s | FileCheck %s +// RUN: %clang -target x86_64-apple-ios -fobjc-runtime=ios -Wno-objc-root-class -S -o - -emit-llvm %s | FileCheck %s struct S { float f, g; @@ -12,5 +12,5 @@ @interface I @implementation I @end -// CHECK: declare {{.*}}void @objc_copyStruct(i8*, i8*, i64, i1, i1) +// CHECK: declare {{.*}}void @objc_copyStruct(ptr, ptr, i64, i1, i1) diff --git a/clang/test/CodeGenObjC/objfw.m b/clang/test/CodeGenObjC/objfw.m index da31d69a498c96..15284f43e53b3f 100644 --- a/clang/test/CodeGenObjC/objfw.m +++ b/clang/test/CodeGenObjC/objfw.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-linux-gnu -fobjc-runtime=objfw -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -fobjc-runtime=objfw -emit-llvm -o - %s | FileCheck %s // Test the ObjFW runtime. @@ -9,7 +9,6 @@ void test0(void) { [Test0 test]; } // CHECK-LABEL: define{{.*}} void @test0() -// CHECK: [[T0:%.*]] = call i8* (i8*, i8*, ...)* @objc_msg_lookup(i8* bitcast (i64* @_OBJC_CLASS_Test0 to i8*), -// CHECK-NEXT: [[T1:%.*]] = bitcast i8* (i8*, i8*, ...)* [[T0]] to void (i8*, i8*)* -// CHECK-NEXT: call void [[T1]](i8* noundef bitcast (i64* @_OBJC_CLASS_Test0 to i8*), +// CHECK: [[T0:%.*]] = call ptr @objc_msg_lookup(ptr @_OBJC_CLASS_Test0, +// CHECK-NEXT: call void [[T0]](ptr noundef @_OBJC_CLASS_Test0, // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/optimize-ivar-offset-load.m b/clang/test/CodeGenObjC/optimize-ivar-offset-load.m index 95d534ec224d0d..b943dbe678c847 100644 --- a/clang/test/CodeGenObjC/optimize-ivar-offset-load.m +++ b/clang/test/CodeGenObjC/optimize-ivar-offset-load.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -O0 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -O0 -emit-llvm %s -o - | FileCheck %s // rdar://16095748 @interface MyNSObject @@ -26,11 +26,9 @@ - (void)application } } @end -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_SampleClass._value", align 8 -// CHECK: [[THREE:%.*]] = bitcast [[ONE:%.*]]* [[CALL:%.*]] to i8* -// CHECK: [[ADDPTR:%.*]] = getelementptr inbounds i8, i8* [[THREE]], i64 [[IVAR]] -// CHECK: [[FOUR:%.*]] = bitcast i8* [[ADDPTR]] to i32* -// CHECK: [[FIVE:%.*]] = load i32, i32* [[FOUR]], align 4 +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_SampleClass._value", align 8 +// CHECK: [[ADDPTR:%.*]] = getelementptr inbounds i8, ptr [[CALL:%.*]], i64 [[IVAR]] +// CHECK: [[FIVE:%.*]] = load i32, ptr [[ADDPTR]], align 4 // CHECK: call void @foo(i32 noundef [[FIVE]]) @implementation SampleClass @@ -44,8 +42,8 @@ - (void) SampleClassApplication } } @end -// CHECK: [[ZERO:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_SampleClass._value", align 8, !invariant.load +// CHECK: [[ZERO:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_SampleClass._value", align 8, !invariant.load @interface Sample : SampleClass @end @@ -59,6 +57,6 @@ - (void) SampleApplication } } @end -// CHECK: [[ZERO:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load -// CHECK: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_SampleClass._value", align 8, !invariant.load +// CHECK: [[ZERO:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load +// CHECK: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_SampleClass._value", align 8, !invariant.load diff --git a/clang/test/CodeGenObjC/pass-by-value-noalias.m b/clang/test/CodeGenObjC/pass-by-value-noalias.m index df2faac8d003c5..ed94d4c80b5253 100644 --- a/clang/test/CodeGenObjC/pass-by-value-noalias.m +++ b/clang/test/CodeGenObjC/pass-by-value-noalias.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fpass-by-value-is-noalias -triple arm64-apple-iphoneos -emit-llvm -disable-llvm-optzns -fobjc-runtime-has-weak -fobjc-arc -fobjc-dispatch-method=mixed %s -o - 2>&1 | FileCheck --check-prefix=WITH_NOALIAS %s -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-iphoneos -emit-llvm -disable-llvm-optzns -fobjc-runtime-has-weak -fobjc-arc -fobjc-dispatch-method=mixed %s -o - 2>&1 | FileCheck --check-prefix=NO_NOALIAS %s +// RUN: %clang_cc1 -fpass-by-value-is-noalias -triple arm64-apple-iphoneos -emit-llvm -disable-llvm-optzns -fobjc-runtime-has-weak -fobjc-arc -fobjc-dispatch-method=mixed %s -o - 2>&1 | FileCheck --check-prefix=WITH_NOALIAS %s +// RUN: %clang_cc1 -triple arm64-apple-iphoneos -emit-llvm -disable-llvm-optzns -fobjc-runtime-has-weak -fobjc-arc -fobjc-dispatch-method=mixed %s -o - 2>&1 | FileCheck --check-prefix=NO_NOALIAS %s @interface Bar @property char value; @@ -17,6 +17,6 @@ @interface Bar Bar *__weak f; }; -// WITH_NOALIAS: define{{.*}} void @take(%struct.Foo* noundef %arg) -// NO_NOALIAS: define{{.*}} void @take(%struct.Foo* noundef %arg) +// WITH_NOALIAS: define{{.*}} void @take(ptr noundef %arg) +// NO_NOALIAS: define{{.*}} void @take(ptr noundef %arg) void take(struct Foo arg) {} diff --git a/clang/test/CodeGenObjC/personality.m b/clang/test/CodeGenObjC/personality.m index 3ebbf1b103d347..6ec67ace3f1ac3 100644 --- a/clang/test/CodeGenObjC/personality.m +++ b/clang/test/CodeGenObjC/personality.m @@ -1,59 +1,59 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-DWARF -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-DWARF +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-MINGW-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ void g(void); -// CHECK-MACOSX-FRAGILE: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) -// CHECK-NS: personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) -// CHECK-GNUSTEP-1_7: personality i8* bitcast (i32 (...)* @__gnustep_objc_personality_v0 to i8*) -// CHECK-GNUSTEP: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-GCC: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-GCC-SEH: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_seh0 to i8*) -// CHECK-GCC-SJLJ: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*) -// CHECK-OBJFW: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-OBJFW-SEH: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_seh0 to i8*) -// CHECK-OBJFW-SJLJ: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*) +// CHECK-MACOSX-FRAGILE: personality ptr @__gcc_personality_v0 +// CHECK-NS: personality ptr @__objc_personality_v0 +// CHECK-GNUSTEP-1_7: personality ptr @__gnustep_objc_personality_v0 +// CHECK-GNUSTEP: personality ptr @__gnu_objc_personality_v0 +// CHECK-GCC: personality ptr @__gnu_objc_personality_v0 +// CHECK-GCC-SEH: personality ptr @__gnu_objc_personality_seh0 +// CHECK-GCC-SJLJ: personality ptr @__gnu_objc_personality_sj0 +// CHECK-OBJFW: personality ptr @__gnu_objc_personality_v0 +// CHECK-OBJFW-SEH: personality ptr @__gnu_objc_personality_seh0 +// CHECK-OBJFW-SJLJ: personality ptr @__gnu_objc_personality_sj0 -// CHECK-WIN-MSVC: personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) +// CHECK-WIN-MSVC: personality ptr @__CxxFrameHandler3 -// CHECK-MACOSX-FRAGILE-MINGW-DWARF: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) -// CHECK-MACOSX-FRAGILE-MINGW-SEH: personality i8* bitcast (i32 (...)* @__gcc_personality_seh0 to i8*) -// CHECK-MACOSX-FRAGILE-MINGW-SJLJ: personality i8* bitcast (i32 (...)* @__gcc_personality_sj0 to i8*) +// CHECK-MACOSX-FRAGILE-MINGW-DWARF: personality ptr @__gcc_personality_v0 +// CHECK-MACOSX-FRAGILE-MINGW-SEH: personality ptr @__gcc_personality_seh0 +// CHECK-MACOSX-FRAGILE-MINGW-SJLJ: personality ptr @__gcc_personality_sj0 void f(void) { @try { @@ -63,8 +63,8 @@ void f(void) { } #if defined(__SEH_EXCEPTIONS__) -// CHECK-WIN-SEH-X86: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// CHECK-WIN-SEH-X64: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) +// CHECK-WIN-SEH-X86: personality ptr @_except_handler3 +// CHECK-WIN-SEH-X64: personality ptr @__C_specific_handler void h(void) { __try { diff --git a/clang/test/CodeGenObjC/ppc32-varargs-id.m b/clang/test/CodeGenObjC/ppc32-varargs-id.m index 65a268d069e70e..7b1348245c6d44 100644 --- a/clang/test/CodeGenObjC/ppc32-varargs-id.m +++ b/clang/test/CodeGenObjC/ppc32-varargs-id.m @@ -1,5 +1,5 @@ // REQUIRES: powerpc-registered-target -// RUN: %clang_cc1 -no-opaque-pointers -triple powerpc-unknown-openbsd -fblocks -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple powerpc-unknown-openbsd -fblocks -emit-llvm -o - %s | FileCheck %s #include @@ -8,13 +8,12 @@ id testObject(va_list ap) { } // CHECK: @testObject // CHECK: using_regs: -// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4 -// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4 +// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, ptr %{{[0-9]+}}, i32 0, i32 4 +// CHECK-NEXT: load ptr, ptr %{{[0-9]+}}, align 4 // CHECK-NEXT: mul i8 %numUsedRegs, 4 -// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}} -// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to i8** +// CHECK-NEXT: getelementptr inbounds i8, ptr %{{[0-9]+}}, i8 %{{[0-9]+}} // CHECK-NEXT: add i8 %numUsedRegs, 1 -// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4 +// CHECK-NEXT: store i8 %{{[0-9]+}}, ptr %gpr, align 4 // CHECK-NEXT: br label %cont typedef void (^block)(void); @@ -23,11 +22,10 @@ block testBlock(va_list ap) { } // CHECK: @testBlock // CHECK: using_regs: -// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, %struct.__va_list_tag* %{{[0-9]+}}, i32 0, i32 4 -// CHECK-NEXT: load i8*, i8** %{{[0-9]+}}, align 4 +// CHECK-NEXT: getelementptr inbounds %struct.__va_list_tag, ptr %{{[0-9]+}}, i32 0, i32 4 +// CHECK-NEXT: load ptr, ptr %{{[0-9]+}}, align 4 // CHECK-NEXT: mul i8 %numUsedRegs, 4 -// CHECK-NEXT: getelementptr inbounds i8, i8* %{{[0-9]+}}, i8 %{{[0-9]+}} -// CHECK-NEXT: bitcast i8* %{{[0-9]+}} to void ()** +// CHECK-NEXT: getelementptr inbounds i8, ptr %{{[0-9]+}}, i8 %{{[0-9]+}} // CHECK-NEXT: add i8 %numUsedRegs, 1 -// CHECK-NEXT: store i8 %{{[0-9]+}}, i8* %gpr, align 4 +// CHECK-NEXT: store i8 %{{[0-9]+}}, ptr %gpr, align 4 // CHECK-NEXT: br label %cont diff --git a/clang/test/CodeGenObjC/property-array-type.m b/clang/test/CodeGenObjC/property-array-type.m index cc3529360ccce3..81939617e08138 100644 --- a/clang/test/CodeGenObjC/property-array-type.m +++ b/clang/test/CodeGenObjC/property-array-type.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // rdar://15610943 struct _GLKMatrix4 @@ -24,7 +24,7 @@ - (void)viewDidLoad { } @end -// CHECK: [[M:%.*]] = getelementptr inbounds %struct._GLKMatrix4, %struct._GLKMatrix4* [[TMP:%.*]], i32 0, i32 0 -// CHECK: [[ARRAYDECAY:%.*]] = getelementptr inbounds [16 x float], [16 x float]* [[M]], i64 0, i64 0 -// CHECK: [[SIX:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float*)*)(i8* noundef [[SEVEN:%.*]], i8* noundef [[SIX]], float* noundef [[ARRAYDECAY]]) +// CHECK: [[M:%.*]] = getelementptr inbounds %struct._GLKMatrix4, ptr [[TMP:%.*]], i32 0, i32 0 +// CHECK: [[ARRAYDECAY:%.*]] = getelementptr inbounds [16 x float], ptr [[M]], i64 0, i64 0 +// CHECK: [[SIX:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES +// CHECK: call void @objc_msgSend(ptr noundef [[SEVEN:%.*]], ptr noundef [[SIX]], ptr noundef [[ARRAYDECAY]]) diff --git a/clang/test/CodeGenObjC/property-atomic-bool.m b/clang/test/CodeGenObjC/property-atomic-bool.m index 5664da86f74db8..4eb3f1b7cb71c8 100644 --- a/clang/test/CodeGenObjC/property-atomic-bool.m +++ b/clang/test/CodeGenObjC/property-atomic-bool.m @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10 -emit-llvm -x objective-c %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10 -emit-llvm -x objective-c %s -o - | FileCheck %s // CHECK: define internal zeroext i1 @"\01-[A0 p]"( -// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} seq_cst, align 1 +// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, ptr %{{.*}} seq_cst, align 1 // CHECK: %[[TOBOOL:.*]] = trunc i8 %[[ATOMIC_LOAD]] to i1 // CHECK: ret i1 %[[TOBOOL]] // CHECK: define internal void @"\01-[A0 setP:]"({{.*}} i1 noundef zeroext {{.*}}) -// CHECK: store atomic i8 %{{.*}}, i8* %{{.*}} seq_cst, align 1 +// CHECK: store atomic i8 %{{.*}}, ptr %{{.*}} seq_cst, align 1 // CHECK: ret void // CHECK: define internal zeroext i1 @"\01-[A1 p]"( -// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, i8* %{{.*}} unordered, align 1 +// CHECK: %[[ATOMIC_LOAD:.*]] = load atomic i8, ptr %{{.*}} unordered, align 1 // CHECK: %[[TOBOOL:.*]] = trunc i8 %load to i1 // CHECK: ret i1 %[[TOBOOL]] // CHECK: define internal void @"\01-[A1 setP:]"({{.*}} i1 noundef zeroext %p) -// CHECK: store atomic i8 %{{.*}}, i8* %{{.*}} unordered, align 1 +// CHECK: store atomic i8 %{{.*}}, ptr %{{.*}} unordered, align 1 // CHECK: ret void @interface A0 diff --git a/clang/test/CodeGenObjC/protocol-property-synth.m b/clang/test/CodeGenObjC/protocol-property-synth.m index 7f3a3959d5392a..c998d631677a79 100644 --- a/clang/test/CodeGenObjC/protocol-property-synth.m +++ b/clang/test/CodeGenObjC/protocol-property-synth.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -o %t %s +// RUN: %clang_cc1 -emit-llvm -o %t %s @interface BaseClass { id _delegate; diff --git a/clang/test/CodeGenObjC/related-result-type.m b/clang/test/CodeGenObjC/related-result-type.m index 7b552a608ff30f..677ac78cb76654 100644 --- a/clang/test/CodeGenObjC/related-result-type.m +++ b/clang/test/CodeGenObjC/related-result-type.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -o - %s | FileCheck %s @interface NSObject + (id)alloc; @@ -14,7 +14,6 @@ void test1(void) { // CHECK: {{call.*@objc_msgSend}} // CHECK: {{call.*@objc_msgSend}} // CHECK: {{call.*@objc_msgSend}} - // CHECK: bitcast i8* NSString *str1 = [[[NSString alloc] init] retain]; } @@ -23,7 +22,6 @@ void test2(void) { // CHECK: {{call.*@objc_msgSend}} // CHECK: {{call.*@objc_msgSend}} // CHECK: {{call.*@objc_msgSend}} - // CHECK: bitcast i8* NSString *str1 = NSString.alloc.init.retain; } @@ -32,10 +30,9 @@ - (id)init; @end @implementation Test2 -// CHECK: define internal {{.*}}i8* @"\01-[Test2 init]" +// CHECK: define internal {{.*}}ptr @"\01-[Test2 init]" - (id)init { // CHECK: {{call.*@objc_msgSendSuper}} - // CHECK-NEXT: bitcast i8* return [super init]; } @end @@ -45,10 +42,9 @@ - (id)init; @end @implementation Test3 -// CHECK: define internal {{.*}}i8* @"\01-[Test3 init]" +// CHECK: define internal {{.*}}ptr @"\01-[Test3 init]" - (id)init { // CHECK: {{call.*@objc_msgSendSuper}} - // CHECK-NEXT: bitcast i8* return [super init]; } @end diff --git a/clang/test/CodeGenObjC/return-objc-object.mm b/clang/test/CodeGenObjC/return-objc-object.mm index 1cead8c3b492fe..24bb5a6cdf1957 100644 --- a/clang/test/CodeGenObjC/return-objc-object.mm +++ b/clang/test/CodeGenObjC/return-objc-object.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64 -emit-llvm -o - %s | FileCheck %s @protocol P1 @end @interface NSOperationQueue @@ -15,5 +15,5 @@ void call_once() { f(); f1(); } -// CHECK: call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z1fv() -// CHECK: call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0* @_Z2f1v() +// CHECK: call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_Z1fv() +// CHECK: call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_Z2f1v() diff --git a/clang/test/CodeGenObjC/runtime-abi-match.m b/clang/test/CodeGenObjC/runtime-abi-match.m index e0f1ad2ce985d6..c8408914bd9cab 100644 --- a/clang/test/CodeGenObjC/runtime-abi-match.m +++ b/clang/test/CodeGenObjC/runtime-abi-match.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple thumbv7--windows-itanium -fobjc-runtime=ios -O1 -fexceptions -fobjc-exceptions -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple thumbv7--windows-itanium -fobjc-runtime=ios -O1 -fexceptions -fobjc-exceptions -emit-llvm %s -o - | FileCheck %s // REQUIRES: arm-registered-target void (*f)(id); @@ -18,8 +18,8 @@ void i(void) { } } -// CHECK: call arm_aapcs_vfpcc i8* @objc_begin_catch +// CHECK: call arm_aapcs_vfpcc ptr @objc_begin_catch // CHECK: call arm_aapcs_vfpcc void @objc_end_catch -// CHECK-NOT: call i8* @objc_begin_catch +// CHECK-NOT: call ptr @objc_begin_catch // CHECK-NOT: call void @objc_end_catch diff --git a/clang/test/CodeGenObjC/selector-ref-invariance.m b/clang/test/CodeGenObjC/selector-ref-invariance.m index 902371e93efd73..cd37b5d8e77d45 100644 --- a/clang/test/CodeGenObjC/selector-ref-invariance.m +++ b/clang/test/CodeGenObjC/selector-ref-invariance.m @@ -1,9 +1,9 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin11 -emit-llvm -fblocks -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin11 -emit-llvm -fblocks -o - %s | FileCheck %s // rdar://6027699 void test(id x) { -// CHECK: load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load +// CHECK: load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load // CHECK: @objc_msgSend [x foo]; } diff --git a/clang/test/CodeGenObjC/stret-1.m b/clang/test/CodeGenObjC/stret-1.m index f3511e00b14d24..ab3f664fb5fec2 100644 --- a/clang/test/CodeGenObjC/stret-1.m +++ b/clang/test/CodeGenObjC/stret-1.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -fblocks -triple arm64-apple-darwin %s -emit-llvm -o - | FileCheck %s // rdar://12416433 struct stret { int x[100]; }; @@ -14,19 +14,18 @@ int main(int argc, const char **argv) { struct stret s; s = [(id)(argc&~255) method]; - // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (%struct.stret*, i8*, i8*)*)(%struct.stret* sret(%struct.stret) align 4 [[T0:%[^,]+]] - // CHECK: [[T0P:%.*]] = bitcast %struct.stret* [[T0]] to i8* - // CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 [[T0P]], i8 0, i64 400, i1 false) + // CHECK: call void @objc_msgSend(ptr sret(%struct.stret) align 4 [[T0:%[^,]+]] + // CHECK: call void @llvm.memset.p0.i64(ptr align 4 [[T0]], i8 0, i64 400, i1 false) s = [Test method]; - // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (%struct.stret*, i8*, i8*)*)(%struct.stret* sret(%struct.stret) align 4 [[T1:%[^,]+]] - // CHECK-NOT: call void @llvm.memset.p0i8.i64( + // CHECK: call void @objc_msgSend(ptr sret(%struct.stret) align 4 [[T1:%[^,]+]] + // CHECK-NOT: call void @llvm.memset.p0.i64( [(id)(argc&~255) method]; - // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (%struct.stret*, i8*, i8*)*)(%struct.stret* sret(%struct.stret) align 4 [[T1:%[^,]+]] - // CHECK-NOT: call void @llvm.memset.p0i8.i64( + // CHECK: call void @objc_msgSend(ptr sret(%struct.stret) align 4 [[T1:%[^,]+]] + // CHECK-NOT: call void @llvm.memset.p0.i64( [Test method]; - // CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (%struct.stret*, i8*, i8*)*)(%struct.stret* sret(%struct.stret) align 4 [[T1:%[^,]+]] - // CHECK-NOT: call void @llvm.memset.p0i8.i64( + // CHECK: call void @objc_msgSend(ptr sret(%struct.stret) align 4 [[T1:%[^,]+]] + // CHECK-NOT: call void @llvm.memset.p0.i64( } diff --git a/clang/test/CodeGenObjC/super-dotsyntax-struct-property.m b/clang/test/CodeGenObjC/super-dotsyntax-struct-property.m index 6d0329b14a7a07..d1984f8f092fe9 100644 --- a/clang/test/CodeGenObjC/super-dotsyntax-struct-property.m +++ b/clang/test/CodeGenObjC/super-dotsyntax-struct-property.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s // rdar: // 8203426 @@ -44,4 +44,4 @@ - (void)setFrame:(CGRect)frame @end // CHECK-NOT: declare void @objc_msgSendSuper2_stret -// CHECK: declare i8* @objc_msgSendSuper2 +// CHECK: declare ptr @objc_msgSendSuper2 diff --git a/clang/test/CodeGenObjC/super-message-fragileabi.m b/clang/test/CodeGenObjC/super-message-fragileabi.m index 450ce1f7bd1fba..c1b6fecf3c793e 100644 --- a/clang/test/CodeGenObjC/super-message-fragileabi.m +++ b/clang/test/CodeGenObjC/super-message-fragileabi.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm %s -o - | FileCheck %s @class Some; @@ -24,7 +24,7 @@ - (id)initSome:(Some *)arg { { ; } -// CHECK: load %struct._objc_class*, %struct._objc_class** getelementptr inbounds (%struct._objc_class, %struct._objc_class* @OBJC_CLASS_BetterTable, i32 0, i32 1) +// CHECK: load ptr, ptr getelementptr inbounds (%struct._objc_class, ptr @OBJC_CLASS_BetterTable, i32 0, i32 1) return self; } diff --git a/clang/test/CodeGenObjC/synchronized.m b/clang/test/CodeGenObjC/synchronized.m index 9337fd77fb86f2..25feb958c73abd 100644 --- a/clang/test/CodeGenObjC/synchronized.m +++ b/clang/test/CodeGenObjC/synchronized.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -triple i686-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -o - %s -O2 | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -triple i686-apple-darwin9 -fobjc-runtime=macosx-fragile-10.5 -o - %s -O2 | FileCheck %s @interface MyClass { @@ -22,19 +22,19 @@ - (void)method // CHECK-LABEL: define{{.*}} void @foo( void foo(id a) { - // CHECK: [[A:%.*]] = alloca i8* - // CHECK: [[SYNC:%.*]] = alloca i8* + // CHECK: [[A:%.*]] = alloca ptr + // CHECK: [[SYNC:%.*]] = alloca ptr - // CHECK: store i8* [[AVAL:%.*]], i8** [[A]] - // CHECK-NEXT: call i32 @objc_sync_enter(i8* [[AVAL]]) - // CHECK-NEXT: store i8* [[AVAL]], i8** [[SYNC]] + // CHECK: store ptr [[AVAL:%.*]], ptr [[A]] + // CHECK-NEXT: call i32 @objc_sync_enter(ptr [[AVAL]]) + // CHECK-NEXT: store ptr [[AVAL]], ptr [[SYNC]] // CHECK-NEXT: call void @objc_exception_try_enter // CHECK: call i32 @_setjmp @synchronized(a) { // This is unreachable, but the optimizers can't know that. - // CHECK: call void asm sideeffect "", "=*m,=*m,=*m"(i8** nonnull elementtype(i8*) [[A]], i8** nonnull elementtype(i8*) [[SYNC]] + // CHECK: call void asm sideeffect "", "=*m,=*m,=*m"(ptr nonnull elementtype(ptr) [[A]], ptr nonnull elementtype(ptr) [[SYNC]] // CHECK: call i32 @objc_sync_exit - // CHECK: call i8* @objc_exception_extract + // CHECK: call ptr @objc_exception_extract // CHECK: call void @objc_exception_throw // CHECK: unreachable @@ -52,7 +52,7 @@ int f0(id a) { // that x isn't stored to within the synchronized block. // CHECK: [[X:%.*]] = alloca i32 - // CHECK: store i32 1, i32* [[X]] + // CHECK: store i32 1, ptr [[X]] int x = 0; @synchronized((x++, a)) { } diff --git a/clang/test/CodeGenObjC/synthesize_ivar.m b/clang/test/CodeGenObjC/synthesize_ivar.m index 4b9840a0a59afa..92f6096b7e4db4 100644 --- a/clang/test/CodeGenObjC/synthesize_ivar.m +++ b/clang/test/CodeGenObjC/synthesize_ivar.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -o %t %s +// RUN: %clang_cc1 -emit-llvm -o %t %s // PR13820 // REQUIRES: LP64 diff --git a/clang/test/CodeGenObjC/tentative-cfconstantstring.m b/clang/test/CodeGenObjC/tentative-cfconstantstring.m index 1cff9d5d6e3ed9..b4c1bd77c0ba23 100644 --- a/clang/test/CodeGenObjC/tentative-cfconstantstring.m +++ b/clang/test/CodeGenObjC/tentative-cfconstantstring.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // rdar://13598026 @interface NSObject @end @@ -32,11 +32,10 @@ -(void)someMethod { @end // CHECK: @__CFConstantStringClassReference ={{.*}} global [24 x i32] zeroinitializer, align 16 -// CHECK: @_unnamed_cfstring_{{.*}} = private global %struct.__NSConstantString_tag { i32* getelementptr inbounds ([24 x i32], [24 x i32]* @__CFConstantStringClassReference, i32 0, i32 0) +// CHECK: @_unnamed_cfstring_{{.*}} = private global %struct.__NSConstantString_tag { ptr @__CFConstantStringClassReference // CHECK-LABEL: define internal void @_inlineFunction() -// CHECK: [[ZERO:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_REFERENCES_ -// CHECK-NEXT: [[OBJ:%.*]] = bitcast %struct._class_t* [[ZERO]] to i8* -// CHECK-NEXT: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ -// CHECK-NEXT: call void (i8*, i8*, [[T:%.*]]*, ...) bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, [[T:%.*]]*, ...)*)(i8* noundef [[OBJ]], i8* noundef [[SEL]], [[T:%.*]]* noundef bitcast (%struct.__NSConstantString_tag* @_unnamed_cfstring_{{.*}} to [[T:%.*]]*)) +// CHECK: [[ZERO:%.*]] = load ptr, ptr @"OBJC_CLASSLIST_REFERENCES_ +// CHECK-NEXT: [[SEL:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_ +// CHECK-NEXT: call void (ptr, ptr, ptr, ...) @objc_msgSend(ptr noundef [[ZERO]], ptr noundef [[SEL]], ptr noundef @_unnamed_cfstring_{{.*}}) // CHECK-NEXT: ret void diff --git a/clang/test/CodeGenObjC/terminate.m b/clang/test/CodeGenObjC/terminate.m index 0c7562ea58d331..aa24e355fb0c62 100644 --- a/clang/test/CodeGenObjC/terminate.m +++ b/clang/test/CodeGenObjC/terminate.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.8 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -check-prefix=CHECK-WITH -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.7 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -check-prefix=CHECK-WITHOUT +// RUN: %clang_cc1 -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.8 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -check-prefix=CHECK-WITH +// RUN: %clang_cc1 -triple x86_64-apple-darwin -fobjc-runtime=macosx-fragile-10.7 -emit-llvm -fexceptions -fobjc-exceptions -o - %s | FileCheck %s -check-prefix=CHECK-WITHOUT void destroy(void**); @@ -10,22 +10,22 @@ void test0(void) { test0_helper(); // CHECK-WITH-LABEL: define{{.*}} void @test0() - // CHECK-WITH-SAME: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) - // CHECK-WITH: [[PTR:%.*]] = alloca i8*, - // CHECK-WITH: call void @destroy(i8** noundef [[PTR]]) + // CHECK-WITH-SAME: personality ptr @__gcc_personality_v0 + // CHECK-WITH: [[PTR:%.*]] = alloca ptr, + // CHECK-WITH: call void @destroy(ptr noundef [[PTR]]) // CHECK-WITH-NEXT: ret void - // CHECK-WITH: invoke void @destroy(i8** noundef [[PTR]]) - // CHECK-WITH: landingpad { i8*, i32 } - // CHECK-WITH-NEXT: catch i8* null + // CHECK-WITH: invoke void @destroy(ptr noundef [[PTR]]) + // CHECK-WITH: landingpad { ptr, i32 } + // CHECK-WITH-NEXT: catch ptr null // CHECK-WITH-NEXT: call void @objc_terminate() // CHECK-WITHOUT-LABEL: define{{.*}} void @test0() - // CHECK-WITHOUT-SAME: personality i8* bitcast (i32 (...)* @__gcc_personality_v0 to i8*) - // CHECK-WITHOUT: [[PTR:%.*]] = alloca i8*, - // CHECK-WITHOUT: call void @destroy(i8** noundef [[PTR]]) + // CHECK-WITHOUT-SAME: personality ptr @__gcc_personality_v0 + // CHECK-WITHOUT: [[PTR:%.*]] = alloca ptr, + // CHECK-WITHOUT: call void @destroy(ptr noundef [[PTR]]) // CHECK-WITHOUT-NEXT: ret void - // CHECK-WITHOUT: invoke void @destroy(i8** noundef [[PTR]]) - // CHECK-WITHOUT: landingpad { i8*, i32 } - // CHECK-WITHOUT-NEXT: catch i8* null + // CHECK-WITHOUT: invoke void @destroy(ptr noundef [[PTR]]) + // CHECK-WITHOUT: landingpad { ptr, i32 } + // CHECK-WITHOUT-NEXT: catch ptr null // CHECK-WITHOUT-NEXT: call void @abort() } diff --git a/clang/test/CodeGenObjC/ubsan-bool.m b/clang/test/CodeGenObjC/ubsan-bool.m index 4fa133e4a0aa9f..fa5883c01cf4fe 100644 --- a/clang/test/CodeGenObjC/ubsan-bool.m +++ b/clang/test/CodeGenObjC/ubsan-bool.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - -w | FileCheck %s -check-prefixes=SHARED,OBJC -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -x objective-c++ -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - -w | FileCheck %s -check-prefixes=SHARED,OBJC -// RUN: %clang_cc1 -no-opaque-pointers -no-enable-noundef-analysis -x c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - | FileCheck %s -check-prefixes=SHARED,C +// RUN: %clang_cc1 -no-enable-noundef-analysis -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - -w | FileCheck %s -check-prefixes=SHARED,OBJC +// RUN: %clang_cc1 -no-enable-noundef-analysis -x objective-c++ -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - -w | FileCheck %s -check-prefixes=SHARED,OBJC +// RUN: %clang_cc1 -no-enable-noundef-analysis -x c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=bool %s -o - | FileCheck %s -check-prefixes=SHARED,C typedef signed char BOOL; @@ -19,7 +19,7 @@ BOOL f1(void) { // SHARED-LABEL: f2 BOOL f2(struct S1 *s) { - // OBJC: [[LOAD:%.*]] = load i8, i8* {{.*}} + // OBJC: [[LOAD:%.*]] = load i8, ptr {{.*}} // OBJC: [[SHL:%.*]] = shl i8 [[LOAD]], 7 // OBJC: [[ASHR:%.*]] = ashr i8 [[SHL]], 7 // OBJC: icmp ule i8 [[ASHR]], 1, !nosanitize @@ -43,9 +43,9 @@ @implementation I1 // Check the synthesized getter. // OBJC-LABEL: define internal signext i8 @"\01-[I1 b1]" -// OBJC: [[IVAR:%.*]] = load i64, i64* @"OBJC_IVAR_$_I1.b1" -// OBJC: [[ADDR:%.*]] = getelementptr inbounds i8, i8* {{.*}}, i64 [[IVAR]] -// OBJC: [[LOAD:%.*]] = load i8, i8* {{.*}} +// OBJC: [[IVAR:%.*]] = load i64, ptr @"OBJC_IVAR_$_I1.b1" +// OBJC: [[ADDR:%.*]] = getelementptr inbounds i8, ptr {{.*}}, i64 [[IVAR]] +// OBJC: [[LOAD:%.*]] = load i8, ptr {{.*}} // OBJC: [[SHL:%.*]] = shl i8 [[LOAD]], 7 // OBJC: [[ASHR:%.*]] = ashr i8 [[SHL]], 7 // OBJC: icmp ule i8 [[ASHR]], 1, !nosanitize @@ -54,7 +54,7 @@ @implementation I1 // Also check direct accesses to the ivar. // OBJC-LABEL: f3 BOOL f3(I1 *i) { - // OBJC: [[LOAD:%.*]] = load i8, i8* {{.*}} + // OBJC: [[LOAD:%.*]] = load i8, ptr {{.*}} // OBJC: [[SHL:%.*]] = shl i8 [[LOAD]], 7 // OBJC: [[ASHR:%.*]] = ashr i8 [[SHL]], 7 // OBJC: icmp ule i8 [[ASHR]], 1, !nosanitize diff --git a/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m b/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m index ce8d13ad5a6284..b5ef3fa6e6f76b 100644 --- a/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m +++ b/clang/test/CodeGenObjC/ubsan-nonnull-and-nullability.m @@ -1,24 +1,24 @@ // REQUIRES: asserts -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=nullability-return,returns-nonnull-attribute,nullability-arg,nonnull-attribute %s -o - -w | FileCheck %s +// RUN: %clang_cc1 -x objective-c -emit-llvm -triple x86_64-apple-macosx10.10.0 -fsanitize=nullability-return,returns-nonnull-attribute,nullability-arg,nonnull-attribute %s -o - -w | FileCheck %s // If both the annotation and the attribute are present, prefer the attribute, // since it actually affects IRGen. -// CHECK-LABEL: define{{.*}} nonnull i32* @f1 +// CHECK-LABEL: define{{.*}} nonnull ptr @f1 __attribute__((returns_nonnull)) int *_Nonnull f1(int *_Nonnull p) { // CHECK: entry: - // CHECK-NEXT: [[SLOC_PTR:%.*]] = alloca i8* - // CHECK-NEXT: [[ADDR:%.*]] = alloca i32* - // CHECK-NEXT: store i8* null, i8** [[SLOC_PTR]] - // CHECK-NEXT: store i32* [[P:%.*]], i32** [[ADDR]] + // CHECK-NEXT: [[SLOC_PTR:%.*]] = alloca ptr + // CHECK-NEXT: [[ADDR:%.*]] = alloca ptr + // CHECK-NEXT: store ptr null, ptr [[SLOC_PTR]] + // CHECK-NEXT: store ptr [[P:%.*]], ptr [[ADDR]] // CHECK-NEXT: store {{.*}} [[SLOC_PTR]] - // CHECK-NEXT: [[ARG:%.*]] = load i32*, i32** [[ADDR]] + // CHECK-NEXT: [[ARG:%.*]] = load ptr, ptr [[ADDR]] // CHECK-NEXT: [[SLOC:%.*]] = load {{.*}} [[SLOC_PTR]] - // CHECK-NEXT: [[SLOC_NONNULL:%.*]] = icmp ne i8* [[SLOC]], null + // CHECK-NEXT: [[SLOC_NONNULL:%.*]] = icmp ne ptr [[SLOC]], null // CHECK-NEXT: br i1 [[SLOC_NONNULL]], label %nullcheck // // CHECK: nullcheck: - // CHECK-NEXT: [[ICMP:%.*]] = icmp ne i32* [[ARG]], null, !nosanitize + // CHECK-NEXT: [[ICMP:%.*]] = icmp ne ptr [[ARG]], null, !nosanitize // CHECK-NEXT: br i1 [[ICMP]], label %[[CONT:.+]], label %[[HANDLE:[^,]+]] // CHECK: [[HANDLE]]: // CHECK: call void @__ubsan_handle_nonnull_return @@ -26,7 +26,7 @@ // CHECK: [[CONT]]: // CHECK-NEXT: br label %no.nullcheck // CHECK: no.nullcheck: - // CHECK-NEXT: ret i32* [[ARG]] + // CHECK-NEXT: ret ptr [[ARG]] return p; } @@ -41,7 +41,7 @@ void call_f2(void) { } // If the return value isn't meant to be checked, make sure we don't check it. -// CHECK-LABEL: define{{.*}} i32* @f3 +// CHECK-LABEL: define{{.*}} ptr @f3 int *f3(int *p) { // CHECK-NOT: return.sloc // CHECK-NOT: call{{.*}}ubsan @@ -51,11 +51,11 @@ void call_f2(void) { // Check for a valid "return" source location, even when there is no return // statement, to avoid accidentally calling the runtime. -// CHECK-LABEL: define{{.*}} nonnull i32* @f4 +// CHECK-LABEL: define{{.*}} nonnull ptr @f4 __attribute__((returns_nonnull)) int *f4(void) { - // CHECK: store i8* null, i8** [[SLOC_PTR:%.*]] + // CHECK: store ptr null, ptr [[SLOC_PTR:%.*]] // CHECK: [[SLOC:%.*]] = load {{.*}} [[SLOC_PTR]] - // CHECK: [[SLOC_NONNULL:%.*]] = icmp ne i8* [[SLOC]], null + // CHECK: [[SLOC_NONNULL:%.*]] = icmp ne ptr [[SLOC]], null // CHECK: br i1 [[SLOC_NONNULL]], label %nullcheck // CHECK: nullcheck: } diff --git a/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m b/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m index a00739c25441c2..ccfa2254f65644 100644 --- a/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m +++ b/clang/test/CodeGenObjC/ubsan-nullability-return-unreachable.m @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fsanitize=nullability-return -emit-llvm %s -o - -triple x86_64-apple-macosx10.10.0 -Wno-objc-root-class | FileCheck %s +// RUN: %clang_cc1 -fsanitize=nullability-return -emit-llvm %s -o - -triple x86_64-apple-macosx10.10.0 -Wno-objc-root-class | FileCheck %s -// CHECK-LABEL: define internal i8* @"\01-[I init]" +// CHECK-LABEL: define internal ptr @"\01-[I init]" // CHECK: unreachable // CHECK-NEXT: } diff --git a/clang/test/CodeGenObjC/variadic-sends.m b/clang/test/CodeGenObjC/variadic-sends.m index 4139239dfa2db3..0382ac7ad7b845 100644 --- a/clang/test/CodeGenObjC/variadic-sends.m +++ b/clang/test/CodeGenObjC/variadic-sends.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-unknown-unknown -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-X86-32 %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-unknown -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-X86-64 %s +// RUN: %clang_cc1 -triple i386-unknown-unknown -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-X86-32 %s +// RUN: %clang_cc1 -triple x86_64-unknown-unknown -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck -check-prefix=CHECK-X86-64 %s @interface A -(void) im0; @@ -8,33 +8,33 @@ -(void) im2: (int) x, ...; @end void f0(A *a) { - // CHECK-X86-32: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*) - // CHECK-X86-64: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*) + // CHECK-X86-32: call void @objc_msgSend + // CHECK-X86-64: call void @objc_msgSend [a im0]; } void f1(A *a) { - // CHECK-X86-32: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*) - // CHECK-X86-64: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32)*) + // CHECK-X86-32: call void @objc_msgSend + // CHECK-X86-64: call void @objc_msgSend [a im1: 1]; } void f2(A *a) { - // CHECK-X86-32: call void (i8*, i8*, i32, ...) bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32, ...)*) - // CHECK-X86-64: call void (i8*, i8*, i32, ...) bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, i32, ...)*) + // CHECK-X86-32: call void (ptr, ptr, i32, ...) @objc_msgSend + // CHECK-X86-64: call void (ptr, ptr, i32, ...) @objc_msgSend [a im2: 1, 2]; } @interface B : A @end @implementation B : A -(void) foo { - // CHECK-X86-32: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper to void (%struct._objc_super*, i8*, i32)*) - // CHECK-X86-64: call void bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper to void (%struct._objc_super*, i8*, i32)*) + // CHECK-X86-32: call void @objc_msgSendSuper + // CHECK-X86-64: call void @objc_msgSendSuper [super im1: 1]; } -(void) bar { - // CHECK-X86-32: call void (%struct._objc_super*, i8*, i32, ...) bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper to void (%struct._objc_super*, i8*, i32, ...)*) - // CHECK-X86-64: call void (%struct._objc_super*, i8*, i32, ...) bitcast (i8* (%struct._objc_super*, i8*, ...)* @objc_msgSendSuper to void (%struct._objc_super*, i8*, i32, ...)*) + // CHECK-X86-32: call void (ptr, ptr, i32, ...) @objc_msgSendSuper + // CHECK-X86-64: call void (ptr, ptr, i32, ...) @objc_msgSendSuper [super im2: 1, 2]; } diff --git a/clang/test/CodeGenObjC/weak-in-c-struct.m b/clang/test/CodeGenObjC/weak-in-c-struct.m index 38ff778eb374e7..3ec08c2b9f18b1 100644 --- a/clang/test/CodeGenObjC/weak-in-c-struct.m +++ b/clang/test/CodeGenObjC/weak-in-c-struct.m @@ -1,11 +1,11 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-llvm -o - %s | FileCheck -check-prefix=ARM64 -check-prefix=COMMON %s -// RUN: %clang_cc1 -no-opaque-pointers -triple thumbv7-apple-ios10 -fobjc-arc -fblocks -fobjc-runtime=ios-10.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.13 -fobjc-arc -fblocks -fobjc-runtime=macosx-10.13.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-macosx10.13.0 -fobjc-arc -fblocks -fobjc-runtime=macosx-fragile-10.13.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s +// RUN: %clang_cc1 -triple arm64-apple-ios11 -fobjc-arc -fblocks -fobjc-runtime=ios-11.0 -emit-llvm -o - %s | FileCheck -check-prefix=ARM64 -check-prefix=COMMON %s +// RUN: %clang_cc1 -triple thumbv7-apple-ios10 -fobjc-arc -fblocks -fobjc-runtime=ios-10.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.13 -fobjc-arc -fblocks -fobjc-runtime=macosx-10.13.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s +// RUN: %clang_cc1 -triple i386-apple-macosx10.13.0 -fobjc-arc -fblocks -fobjc-runtime=macosx-fragile-10.13.0 -emit-llvm -o - %s | FileCheck -check-prefix=COMMON %s typedef void (^BlockTy)(void); -// COMMON: %[[STRUCT_WEAK:.*]] = type { i32, i8* } +// COMMON: %[[STRUCT_WEAK:.*]] = type { i32, ptr } typedef struct { int f0; @@ -17,30 +17,23 @@ // ARM64: define{{.*}} void @test_constructor_destructor_Weak() // ARM64: %[[T:.*]] = alloca %[[STRUCT_WEAK]], align 8 -// ARM64: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[T]] to i8** -// ARM64: call void @__default_constructor_8_w8(i8** %[[V0]]) -// ARM64: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[T]] to i8** -// ARM64: call void @__destructor_8_w8(i8** %[[V1]]) +// ARM64: call void @__default_constructor_8_w8(ptr %[[T]]) +// ARM64: call void @__destructor_8_w8(ptr %[[T]]) // ARM64: ret void -// ARM64: define linkonce_odr hidden void @__default_constructor_8_w8(i8** noundef %[[DST:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V2:.*]] = getelementptr inbounds i8, i8* %[[V1]], i64 8 -// ARM64: %[[V3:.*]] = bitcast i8* %[[V2]] to i8** -// ARM64: %[[V4:.*]] = bitcast i8** %[[V3]] to i8* -// ARM64: call void @llvm.memset.p0i8.i64(i8* align 8 %[[V4]], i8 0, i64 8, i1 false) - -// ARM64: define linkonce_odr hidden void @__destructor_8_w8(i8** noundef %[[DST:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1:.*]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V2:.*]] = getelementptr inbounds i8, i8* %[[V1]], i64 8 -// ARM64: %[[V3:.*]] = bitcast i8* %[[V2]] to i8** -// ARM64: call void @llvm.objc.destroyWeak(i8** %[[V3]]) +// ARM64: define linkonce_odr hidden void @__default_constructor_8_w8(ptr noundef %[[DST:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V2:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: call void @llvm.memset.p0.i64(ptr align 8 %[[V2]], i8 0, i64 8, i1 false) + +// ARM64: define linkonce_odr hidden void @__destructor_8_w8(ptr noundef %[[DST:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V2:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: call void @llvm.objc.destroyWeak(ptr %[[V2]]) @interface C - (void)m:(Weak)a; @@ -50,146 +43,117 @@ void test_constructor_destructor_Weak(void) { Weak t; } -// ARM64: define{{.*}} void @test_copy_constructor_Weak(%[[STRUCT_WEAK]]* noundef %{{.*}}) -// ARM64: call void @__copy_constructor_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) -// ARM64: call void @__destructor_8_w8(i8** %{{.*}}) - -// ARM64: define linkonce_odr hidden void @__copy_constructor_8_8_t0w4_w8(i8** noundef %[[DST:.*]], i8** noundef %[[SRC:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: store i8** %[[SRC]], i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1:.*]] = load i8**, i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32* -// ARM64: %[[V3:.*]] = bitcast i8** %[[V1]] to i32* -// ARM64: %[[V4:.*]] = load i32, i32* %[[V3]], align 8 -// ARM64: store i32 %[[V4]], i32* %[[V2]], align 8 -// ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V6:.*]] = getelementptr inbounds i8, i8* %[[V5]], i64 8 -// ARM64: %[[V7:.*]] = bitcast i8* %[[V6]] to i8** -// ARM64: %[[V8:.*]] = bitcast i8** %[[V1]] to i8* -// ARM64: %[[V9:.*]] = getelementptr inbounds i8, i8* %[[V8]], i64 8 -// ARM64: %[[V10:.*]] = bitcast i8* %[[V9]] to i8** -// ARM64: call void @llvm.objc.copyWeak(i8** %[[V7]], i8** %[[V10]]) +// ARM64: define{{.*}} void @test_copy_constructor_Weak(ptr noundef %{{.*}}) +// ARM64: call void @__copy_constructor_8_8_t0w4_w8(ptr %{{.*}}, ptr %{{.*}}) +// ARM64: call void @__destructor_8_w8(ptr %{{.*}}) + +// ARM64: define linkonce_odr hidden void @__copy_constructor_8_8_t0w4_w8(ptr noundef %[[DST:.*]], ptr noundef %[[SRC:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: %[[SRC_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: store ptr %[[SRC]], ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V1:.*]] = load ptr, ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V4:.*]] = load i32, ptr %[[V1]], align 8 +// ARM64: store i32 %[[V4]], ptr %[[V0]], align 8 +// ARM64: %[[V6:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: %[[V9:.*]] = getelementptr inbounds i8, ptr %[[V1]], i64 8 +// ARM64: call void @llvm.objc.copyWeak(ptr %[[V6]], ptr %[[V9]]) void test_copy_constructor_Weak(Weak *s) { Weak t = *s; } -// ARM64: define{{.*}} void @test_copy_assignment_Weak(%[[STRUCT_WEAK]]* noundef %{{.*}}, %[[STRUCT_WEAK]]* noundef %{{.*}}) -// ARM64: call void @__copy_assignment_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) - -// ARM64: define linkonce_odr hidden void @__copy_assignment_8_8_t0w4_w8(i8** noundef %[[DST:.*]], i8** noundef %[[SRC:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: store i8** %[[SRC]], i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1:.*]] = load i8**, i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32* -// ARM64: %[[V3:.*]] = bitcast i8** %[[V1]] to i32* -// ARM64: %[[V4:.*]] = load i32, i32* %[[V3]], align 8 -// ARM64: store i32 %[[V4]], i32* %[[V2]], align 8 -// ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V6:.*]] = getelementptr inbounds i8, i8* %[[V5]], i64 8 -// ARM64: %[[V7:.*]] = bitcast i8* %[[V6]] to i8** -// ARM64: %[[V8:.*]] = bitcast i8** %[[V1]] to i8* -// ARM64: %[[V9:.*]] = getelementptr inbounds i8, i8* %[[V8]], i64 8 -// ARM64: %[[V10:.*]] = bitcast i8* %[[V9]] to i8** -// ARM64: %[[V11:.*]] = call i8* @llvm.objc.loadWeakRetained(i8** %[[V10]]) -// ARM64: %[[V12:.*]] = call i8* @llvm.objc.storeWeak(i8** %[[V7]], i8* %[[V11]]) -// ARM64: call void @llvm.objc.release(i8* %[[V11]]) +// ARM64: define{{.*}} void @test_copy_assignment_Weak(ptr noundef %{{.*}}, ptr noundef %{{.*}}) +// ARM64: call void @__copy_assignment_8_8_t0w4_w8(ptr %{{.*}}, ptr %{{.*}}) + +// ARM64: define linkonce_odr hidden void @__copy_assignment_8_8_t0w4_w8(ptr noundef %[[DST:.*]], ptr noundef %[[SRC:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: %[[SRC_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: store ptr %[[SRC]], ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V1:.*]] = load ptr, ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V4:.*]] = load i32, ptr %[[V1]], align 8 +// ARM64: store i32 %[[V4]], ptr %[[V0]], align 8 +// ARM64: %[[V6:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: %[[V9:.*]] = getelementptr inbounds i8, ptr %[[V1]], i64 8 +// ARM64: %[[V11:.*]] = call ptr @llvm.objc.loadWeakRetained(ptr %[[V9]]) +// ARM64: %[[V12:.*]] = call ptr @llvm.objc.storeWeak(ptr %[[V6]], ptr %[[V11]]) +// ARM64: call void @llvm.objc.release(ptr %[[V11]]) void test_copy_assignment_Weak(Weak *d, Weak *s) { *d = *s; } -// ARM64: define internal void @__Block_byref_object_copy_(i8* noundef %0, i8* noundef %1) -// ARM64: call void @__move_constructor_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) - -// ARM64: define linkonce_odr hidden void @__move_constructor_8_8_t0w4_w8(i8** noundef %[[DST:.*]], i8** noundef %[[SRC:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: store i8** %[[SRC]], i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1:.*]] = load i8**, i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32* -// ARM64: %[[V3:.*]] = bitcast i8** %[[V1]] to i32* -// ARM64: %[[V4:.*]] = load i32, i32* %[[V3]], align 8 -// ARM64: store i32 %[[V4]], i32* %[[V2]], align 8 -// ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V6:.*]] = getelementptr inbounds i8, i8* %[[V5]], i64 8 -// ARM64: %[[V7:.*]] = bitcast i8* %[[V6]] to i8** -// ARM64: %[[V8:.*]] = bitcast i8** %[[V1]] to i8* -// ARM64: %[[V9:.*]] = getelementptr inbounds i8, i8* %[[V8]], i64 8 -// ARM64: %[[V10:.*]] = bitcast i8* %[[V9]] to i8** -// ARM64: call void @llvm.objc.moveWeak(i8** %[[V7]], i8** %[[V10]]) +// ARM64: define internal void @__Block_byref_object_copy_(ptr noundef %0, ptr noundef %1) +// ARM64: call void @__move_constructor_8_8_t0w4_w8(ptr %{{.*}}, ptr %{{.*}}) + +// ARM64: define linkonce_odr hidden void @__move_constructor_8_8_t0w4_w8(ptr noundef %[[DST:.*]], ptr noundef %[[SRC:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: %[[SRC_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: store ptr %[[SRC]], ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V1:.*]] = load ptr, ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V4:.*]] = load i32, ptr %[[V1]], align 8 +// ARM64: store i32 %[[V4]], ptr %[[V0]], align 8 +// ARM64: %[[V6:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: %[[V9:.*]] = getelementptr inbounds i8, ptr %[[V1]], i64 8 +// ARM64: call void @llvm.objc.moveWeak(ptr %[[V6]], ptr %[[V9]]) void test_move_constructor_Weak(void) { __block Weak t; BlockTy b = ^{ (void)t; }; } -// ARM64: define{{.*}} void @test_move_assignment_Weak(%[[STRUCT_WEAK]]* noundef %{{.*}}) -// ARM64: call void @__move_assignment_8_8_t0w4_w8(i8** %{{.*}}, i8** %{{.*}}) - -// ARM64: define linkonce_odr hidden void @__move_assignment_8_8_t0w4_w8(i8** noundef %[[DST:.*]], i8** noundef %[[SRC:.*]]) -// ARM64: %[[DST_ADDR:.*]] = alloca i8**, align 8 -// ARM64: %[[SRC_ADDR:.*]] = alloca i8**, align 8 -// ARM64: store i8** %[[DST]], i8*** %[[DST_ADDR]], align 8 -// ARM64: store i8** %[[SRC]], i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V0:.*]] = load i8**, i8*** %[[DST_ADDR]], align 8 -// ARM64: %[[V1:.*]] = load i8**, i8*** %[[SRC_ADDR]], align 8 -// ARM64: %[[V2:.*]] = bitcast i8** %[[V0]] to i32* -// ARM64: %[[V3:.*]] = bitcast i8** %[[V1]] to i32* -// ARM64: %[[V4:.*]] = load i32, i32* %[[V3]], align 8 -// ARM64: store i32 %[[V4]], i32* %[[V2]], align 8 -// ARM64: %[[V5:.*]] = bitcast i8** %[[V0]] to i8* -// ARM64: %[[V6:.*]] = getelementptr inbounds i8, i8* %[[V5]], i64 8 -// ARM64: %[[V7:.*]] = bitcast i8* %[[V6]] to i8** -// ARM64: %[[V8:.*]] = bitcast i8** %[[V1]] to i8* -// ARM64: %[[V9:.*]] = getelementptr inbounds i8, i8* %[[V8]], i64 8 -// ARM64: %[[V10:.*]] = bitcast i8* %[[V9]] to i8** -// ARM64: %[[V11:.*]] = call i8* @llvm.objc.loadWeakRetained(i8** %[[V10]]) -// ARM64: %[[V12:.*]] = call i8* @llvm.objc.storeWeak(i8** %[[V7]], i8* %[[V11]]) -// ARM64: call void @llvm.objc.destroyWeak(i8** %[[V10]]) -// ARM64: call void @llvm.objc.release(i8* %[[V11]]) +// ARM64: define{{.*}} void @test_move_assignment_Weak(ptr noundef %{{.*}}) +// ARM64: call void @__move_assignment_8_8_t0w4_w8(ptr %{{.*}}, ptr %{{.*}}) + +// ARM64: define linkonce_odr hidden void @__move_assignment_8_8_t0w4_w8(ptr noundef %[[DST:.*]], ptr noundef %[[SRC:.*]]) +// ARM64: %[[DST_ADDR:.*]] = alloca ptr, align 8 +// ARM64: %[[SRC_ADDR:.*]] = alloca ptr, align 8 +// ARM64: store ptr %[[DST]], ptr %[[DST_ADDR]], align 8 +// ARM64: store ptr %[[SRC]], ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V0:.*]] = load ptr, ptr %[[DST_ADDR]], align 8 +// ARM64: %[[V1:.*]] = load ptr, ptr %[[SRC_ADDR]], align 8 +// ARM64: %[[V4:.*]] = load i32, ptr %[[V1]], align 8 +// ARM64: store i32 %[[V4]], ptr %[[V0]], align 8 +// ARM64: %[[V6:.*]] = getelementptr inbounds i8, ptr %[[V0]], i64 8 +// ARM64: %[[V9:.*]] = getelementptr inbounds i8, ptr %[[V1]], i64 8 +// ARM64: %[[V11:.*]] = call ptr @llvm.objc.loadWeakRetained(ptr %[[V9]]) +// ARM64: %[[V12:.*]] = call ptr @llvm.objc.storeWeak(ptr %[[V6]], ptr %[[V11]]) +// ARM64: call void @llvm.objc.destroyWeak(ptr %[[V9]]) +// ARM64: call void @llvm.objc.release(ptr %[[V11]]) void test_move_assignment_Weak(Weak *p) { *p = getWeak(); } -// COMMON: define{{.*}} void @test_parameter_Weak(%[[STRUCT_WEAK]]* noundef %[[A:.*]]) -// COMMON: %[[V0:.*]] = bitcast %[[STRUCT_WEAK]]* %[[A]] to i8** -// COMMON: call void @__destructor_{{.*}}(i8** %[[V0]]) +// COMMON: define{{.*}} void @test_parameter_Weak(ptr noundef %[[A:.*]]) +// COMMON: call void @__destructor_{{.*}}(ptr %[[A]]) void test_parameter_Weak(Weak a) { } -// COMMON: define{{.*}} void @test_argument_Weak(%[[STRUCT_WEAK]]* noundef %[[A:.*]]) -// COMMON: %[[A_ADDR:.*]] = alloca %[[STRUCT_WEAK]]* +// COMMON: define{{.*}} void @test_argument_Weak(ptr noundef %[[A:.*]]) +// COMMON: %[[A_ADDR:.*]] = alloca ptr // COMMON: %[[AGG_TMP:.*]] = alloca %[[STRUCT_WEAK]] -// COMMON: store %[[STRUCT_WEAK]]* %[[A]], %[[STRUCT_WEAK]]** %[[A_ADDR]] -// COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]] -// COMMON: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_TMP]] to i8** -// COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8** -// COMMON: call void @__copy_constructor_{{.*}}(i8** %[[V1]], i8** %[[V2]]) -// COMMON: call void @calleeWeak(%[[STRUCT_WEAK]]* noundef %[[AGG_TMP]]) +// COMMON: store ptr %[[A]], ptr %[[A_ADDR]] +// COMMON: %[[V0:.*]] = load ptr, ptr %[[A_ADDR]] +// COMMON: call void @__copy_constructor_{{.*}}(ptr %[[AGG_TMP]], ptr %[[V0]]) +// COMMON: call void @calleeWeak(ptr noundef %[[AGG_TMP]]) // COMMON-NEXT: ret void test_argument_Weak(Weak *a) { calleeWeak(*a); } -// COMMON: define{{.*}} void @test_return_Weak(%[[STRUCT_WEAK]]* noalias sret(%[[STRUCT_WEAK]]) align {{.*}} %[[AGG_RESULT:.*]], %[[STRUCT_WEAK]]* noundef %[[A:.*]]) -// COMMON: %[[A_ADDR:.*]] = alloca %[[STRUCT_WEAK]]* -// COMMON: store %[[STRUCT_WEAK]]* %[[A]], %[[STRUCT_WEAK]]** %[[A_ADDR]] -// COMMON: %[[V0:.*]] = load %[[STRUCT_WEAK]]*, %[[STRUCT_WEAK]]** %[[A_ADDR]] -// COMMON: %[[V1:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_RESULT]] to i8** -// COMMON: %[[V2:.*]] = bitcast %[[STRUCT_WEAK]]* %[[V0]] to i8** -// COMMON: call void @__copy_constructor_{{.*}}(i8** %[[V1]], i8** %[[V2]]) +// COMMON: define{{.*}} void @test_return_Weak(ptr noalias sret(%[[STRUCT_WEAK]]) align {{.*}} %[[AGG_RESULT:.*]], ptr noundef %[[A:.*]]) +// COMMON: %[[A_ADDR:.*]] = alloca ptr +// COMMON: store ptr %[[A]], ptr %[[A_ADDR]] +// COMMON: %[[V0:.*]] = load ptr, ptr %[[A_ADDR]] +// COMMON: call void @__copy_constructor_{{.*}}(ptr %[[AGG_RESULT]], ptr %[[V0]]) // COMMON: ret void Weak test_return_Weak(Weak *a) { @@ -200,11 +164,10 @@ Weak test_return_Weak(Weak *a) { // COMMON: %[[AGG_TMP:.*]] = alloca %[[STRUCT_WEAK]] // COMMON: br i1 -// COMMON: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %[[STRUCT_WEAK]]*)*)({{.*}}, %[[STRUCT_WEAK]]* noundef %[[AGG_TMP]]) +// COMMON: call void @objc_msgSend({{.*}}, ptr noundef %[[AGG_TMP]]) // COMMON: br -// COMMON: %[[V6:.*]] = bitcast %[[STRUCT_WEAK]]* %[[AGG_TMP]] to i8** -// COMMON: call void @__destructor_{{.*}}(i8** %[[V6]]) +// COMMON: call void @__destructor_{{.*}}(ptr %[[AGG_TMP]]) // COMMON: br void test_null_receiver(C *c) { diff --git a/clang/test/CodeGenObjC/x86_64-struct-return-gc.m b/clang/test/CodeGenObjC/x86_64-struct-return-gc.m index 31379c4ded5144..6bc2929c7596f3 100644 --- a/clang/test/CodeGenObjC/x86_64-struct-return-gc.m +++ b/clang/test/CodeGenObjC/x86_64-struct-return-gc.m @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -fobjc-gc -emit-llvm -o - %s | FileCheck %s struct Coerce { id a; }; @@ -9,8 +9,8 @@ void Coerce_test(void) { struct Coerce c; - // CHECK: call i8* @coerce_func - // CHECK: call i8* @objc_memmove_collectable( + // CHECK: call ptr @coerce_func + // CHECK: call ptr @objc_memmove_collectable( c = coerce_func(); } @@ -25,7 +25,7 @@ void Coerce_test(void) { void Indirect_test(void) { struct Indirect i; - // CHECK: call void @indirect_func(%struct.Indirect* sret - // CHECK: call i8* @objc_memmove_collectable( + // CHECK: call void @indirect_func(ptr sret + // CHECK: call ptr @objc_memmove_collectable( i = indirect_func(); } diff --git a/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm b/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm index 28127e3cba9736..f28bf670e5585f 100644 --- a/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm +++ b/clang/test/CodeGenObjCXX/arc-cxx11-member-init.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-arc -std=c++11 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-arc -std=c++11 -emit-llvm -o - %s | FileCheck %s // rdar://16299964 @interface NSObject @@ -22,13 +22,11 @@ - (void)applicationDidFinishLaunching } @end -// CHECK: [[mClipData:%.*]] = getelementptr inbounds %class.XClipboardDataSet, %class.XClipboardDataSet* -// CHECK: [[CLS:%.*]] = load %struct._class_t*, %struct._class_t** @"OBJC_CLASSLIST_REFERENCES_$_" -// CHECK: [[RECV:%.*]] = bitcast %struct._class_t* [[CLS]] to i8* -// CHECK: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ -// CHECK: [[CALL:%.*]] = call noundef i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i8* (i8*, i8*)*)(i8* noundef [[RECV]], i8* noundef [[SEL]]) -// CHECK: [[THREE:%.*]] = bitcast i8* [[CALL]] to [[T:%.*]]* -// CHECK: store [[T]]* [[THREE]], [[T]]** [[mClipData]], align 8 +// CHECK: [[mClipData:%.*]] = getelementptr inbounds %class.XClipboardDataSet, ptr +// CHECK: [[CLS:%.*]] = load ptr, ptr @"OBJC_CLASSLIST_REFERENCES_$_" +// CHECK: [[SEL:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_ +// CHECK: [[CALL:%.*]] = call noundef ptr @objc_msgSend(ptr noundef [[CLS]], ptr noundef [[SEL]]) +// CHECK: store ptr [[CALL]], ptr [[mClipData]], align 8 // rdar://18950072 struct Butt { }; @@ -42,4 +40,4 @@ @interface Foo { @end @implementation Foo @end -// CHECK-NOT: define internal noundef i8* @"\01-[Foo .cxx_construct +// CHECK-NOT: define internal noundef ptr @"\01-[Foo .cxx_construct diff --git a/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm b/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm index 5f85b9617294d0..523370c88a9f1b 100644 --- a/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm +++ b/clang/test/CodeGenObjCXX/arc-forwarded-lambda-call.mm @@ -1,13 +1,13 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-macosx10.12.0 -emit-llvm -disable-llvm-passes -O3 -fblocks -fobjc-arc -fobjc-runtime-has-weak -std=c++11 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-macosx10.12.0 -emit-llvm -disable-llvm-passes -O3 -fblocks -fobjc-arc -fobjc-runtime-has-weak -std=c++11 -o - %s | FileCheck %s void test0(id x) { extern void test0_helper(id (^)(void)); test0_helper([=]() { return x; }); - // CHECK-LABEL: define internal noundef i8* @___Z5test0P11objc_object_block_invoke - // CHECK: [[T0:%.*]] = call noundef i8* @"_ZZ5test0P11objc_objectENK3$_0clEv"{{.*}} [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] - // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(i8* [[T0]]) - // CHECK-NEXT: [[T2:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T0]]) - // CHECK-NEXT: ret i8* [[T2]] + // CHECK-LABEL: define internal noundef ptr @___Z5test0P11objc_object_block_invoke + // CHECK: [[T0:%.*]] = call noundef ptr @"_ZZ5test0P11objc_objectENK3$_0clEv"{{.*}} [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(ptr [[T0]]) + // CHECK-NEXT: [[T2:%.*]] = tail call ptr @llvm.objc.autoreleaseReturnValue(ptr [[T0]]) + // CHECK-NEXT: ret ptr [[T2]] } // Check that the delegating block invoke function doesn't destruct the Weak @@ -26,11 +26,11 @@ void test0(id x) { void test1() { extern void test1_helper(id (*)(void)); test1_helper([](){ return test1_rv; }); - // CHECK-LABEL: define internal noundef i8* @"_ZZ5test1vEN3$_08__invokeEv" - // CHECK: [[T0:%.*]] = call noundef i8* @"_ZZ5test1vENK3$_0clEv"{{.*}} [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] - // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(i8* [[T0]]) - // CHECK-NEXT: [[T2:%.*]] = tail call i8* @llvm.objc.autoreleaseReturnValue(i8* [[T0]]) - // CHECK-NEXT: ret i8* [[T2]] + // CHECK-LABEL: define internal noundef ptr @"_ZZ5test1vEN3$_08__invokeEv" + // CHECK: [[T0:%.*]] = call noundef ptr @"_ZZ5test1vENK3$_0clEv"{{.*}} [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] + // CHECK-NEXT: call void (...) @llvm.objc.clang.arc.noop.use(ptr [[T0]]) + // CHECK-NEXT: [[T2:%.*]] = tail call ptr @llvm.objc.autoreleaseReturnValue(ptr [[T0]]) + // CHECK-NEXT: ret ptr [[T2]] } struct Weak { diff --git a/clang/test/CodeGenObjCXX/arc-indirect.mm b/clang/test/CodeGenObjCXX/arc-indirect.mm index 9aed3d60287e16..c592d898df6296 100644 --- a/clang/test/CodeGenObjCXX/arc-indirect.mm +++ b/clang/test/CodeGenObjCXX/arc-indirect.mm @@ -1,6 +1,6 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=gnustep -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-GNUSTEP %s -// RUN: %clang_cc1 -no-opaque-pointers -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=macosx -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-DARWIN %s -// RUN: %clang_cc1 -no-opaque-pointers -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=ios -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-DARWIN %s +// RUN: %clang_cc1 -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=gnustep -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-GNUSTEP %s +// RUN: %clang_cc1 -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=macosx -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-DARWIN %s +// RUN: %clang_cc1 -std=c++11 -triple i686-unknown-windows-msvc -fobjc-runtime=ios -fobjc-arc -Wno-objc-root-class -emit-llvm -o - %s | FileCheck -check-prefixes CHECK,CHECK-DARWIN %s // non trivially copyable, forces inalloca struct S { @@ -15,8 +15,8 @@ - (void)object:(id)obj struct:(S)s { } @end -// CHECK-GNUSTEP: define internal void @_i_C__object_struct_(<{ %0*, i8*, i8*, %struct.S, [3 x i8] }>* inalloca(<{ %0*, i8*, i8*, %struct.S, [3 x i8] }>) %0) -// CHECK-DARWIN: define internal void @"\01-[C object:struct:]"(<{ %0*, i8*, i8*, %struct.S, [3 x i8] }>* inalloca(<{ %0*, i8*, i8*, %struct.S, [3 x i8] }>) %0) -// CHECK: %obj = getelementptr inbounds <{ %0*, i8*, i8*, %struct.S, [3 x i8] }>, <{ %0*, i8*, i8*, %struct.S, [3 x i8] }>* %0, i32 0, i32 2 -// CHECK: %[[INSTANCE:[0-9]+]] = load i8*, i8** %obj, align 4 -// CHECK: call void @llvm.objc.storeStrong(i8** %obj, i8* %[[INSTANCE]]) +// CHECK-GNUSTEP: define internal void @_i_C__object_struct_(ptr inalloca(<{ ptr, ptr, ptr, %struct.S, [3 x i8] }>) %0) +// CHECK-DARWIN: define internal void @"\01-[C object:struct:]"(ptr inalloca(<{ ptr, ptr, ptr, %struct.S, [3 x i8] }>) %0) +// CHECK: %obj = getelementptr inbounds <{ ptr, ptr, ptr, %struct.S, [3 x i8] }>, ptr %0, i32 0, i32 2 +// CHECK: %[[INSTANCE:[0-9]+]] = load ptr, ptr %obj, align 4 +// CHECK: call void @llvm.objc.storeStrong(ptr %obj, ptr %[[INSTANCE]]) diff --git a/clang/test/CodeGenObjCXX/arc-mangle.mm b/clang/test/CodeGenObjCXX/arc-mangle.mm index 73c7812dfa372b..d0fb1030f43dca 100644 --- a/clang/test/CodeGenObjCXX/arc-mangle.mm +++ b/clang/test/CodeGenObjCXX/arc-mangle.mm @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -DTEST_UNALIGNED -fms-extensions -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s --check-prefix=UNALIGNED +// RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s +// RUN: %clang_cc1 -DTEST_UNALIGNED -fms-extensions -fobjc-arc -fobjc-runtime-has-weak -triple %itanium_abi_triple -emit-llvm -fblocks -o - %s | FileCheck %s --check-prefix=UNALIGNED -// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongP11objc_object(ptr noundef %0) void f(__strong id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakP11objc_object(ptr noundef %0) void f(__weak id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingP11objc_object(ptr noundef %0) void f(__autoreleasing id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPP11objc_object(ptr noundef %0) void f(__unsafe_unretained id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongKP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU8__strongKP11objc_object(ptr noundef %0) void f(const __strong id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakKP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU6__weakKP11objc_object(ptr noundef %0) void f(const __weak id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingKP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPU15__autoreleasingKP11objc_object(ptr noundef %0) void f(const __autoreleasing id *) {} -// CHECK-LABEL: define {{.*}}void @_Z1fPKP11objc_object(i8** noundef %0) +// CHECK-LABEL: define {{.*}}void @_Z1fPKP11objc_object(ptr noundef %0) void f(const __unsafe_unretained id *) {} // CHECK-LABEL: define {{.*}}void @_Z1fPFU19ns_returns_retainedP11objc_objectvE void f(__attribute__((ns_returns_retained)) id (*fn)()) {} @@ -35,10 +35,10 @@ void f(void (^)(__attribute__((ns_consumed)) id)) {} template void g(unsigned_c *); #if TEST_UNALIGNED -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU6__weakU11__unalignedP11objc_object(i8** noundef %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU6__weakU11__unalignedP11objc_object(ptr noundef %0) void g(__weak __unaligned id *) {} -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU8__strongP11objc_object(i8** noundef %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU8__strongP11objc_object(ptr noundef %0) void g(__strong __unaligned id *) {} -// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU15__autoreleasingP11objc_object(i8** noundef %0) +// UNALIGNED-LABEL: define {{.*}}void @_Z1gPU11__unalignedU15__autoreleasingP11objc_object(ptr noundef %0) void g(__autoreleasing __unaligned id *) {} #endif // TEST_UNALIGNED diff --git a/clang/test/CodeGenObjCXX/arc-marker-funclet.mm b/clang/test/CodeGenObjCXX/arc-marker-funclet.mm index 7ab2146a1779f3..58d6b90a365657 100644 --- a/clang/test/CodeGenObjCXX/arc-marker-funclet.mm +++ b/clang/test/CodeGenObjCXX/arc-marker-funclet.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fobjc-runtime=ios-6.0 -fobjc-arc \ +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fobjc-runtime=ios-6.0 -fobjc-arc \ // RUN: -fexceptions -fcxx-exceptions -emit-llvm -o - %s | FileCheck %s id f(); @@ -10,7 +10,7 @@ void g() { } } -// CHECK: call noundef i8* @"?f@@YAPAUobjc_object@@XZ"() [ "funclet"(token %1) ] +// CHECK: call noundef ptr @"?f@@YAPAUobjc_object@@XZ"() [ "funclet"(token %1) ] // CHECK-NEXT: call void asm sideeffect "movl{{.*}}%ebp, %ebp{{.*}}", ""() [ "funclet"(token %1) ] // The corresponding f() call was invoked from the entry basic block. diff --git a/clang/test/CodeGenObjCXX/arc-pseudo-destructors.mm b/clang/test/CodeGenObjCXX/arc-pseudo-destructors.mm index 900588901b1380..c64236800f4b1f 100644 --- a/clang/test/CodeGenObjCXX/arc-pseudo-destructors.mm +++ b/clang/test/CodeGenObjCXX/arc-pseudo-destructors.mm @@ -1,21 +1,21 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-arc -fobjc-runtime-has-weak -fblocks -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fobjc-arc -fobjc-runtime-has-weak -fblocks -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s | FileCheck %s // CHECK-LABEL: define{{.*}} void @_Z28test_objc_object_pseudo_dtorPU8__strongP11objc_objectPU6__weakS0_ void test_objc_object_pseudo_dtor(__strong id *ptr, __weak id *wptr) { - // CHECK: load i8**, i8*** - // CHECK-NEXT: load i8*, i8** + // CHECK: load ptr, ptr + // CHECK-NEXT: load ptr, ptr // CHECK-NEXT: call void @llvm.objc.release ptr->~id(); - // CHECK: call void @llvm.objc.destroyWeak(i8** {{%.*}}) + // CHECK: call void @llvm.objc.destroyWeak(ptr {{%.*}}) wptr->~id(); - // CHECK: load i8**, i8*** - // CHECK-NEXT: load i8*, i8** + // CHECK: load ptr, ptr + // CHECK-NEXT: load ptr, ptr // CHECK-NEXT: call void @llvm.objc.release (*ptr).~id(); - // CHECK: call void @llvm.objc.destroyWeak(i8** {{%.*}}) + // CHECK: call void @llvm.objc.destroyWeak(ptr {{%.*}}) (*wptr).~id(); // CHECK: ret void } diff --git a/clang/test/CodeGenObjCXX/arc-rv-attr.mm b/clang/test/CodeGenObjCXX/arc-rv-attr.mm index 4e40afd0798fcd..c6a2ffb06bf342 100644 --- a/clang/test/CodeGenObjCXX/arc-rv-attr.mm +++ b/clang/test/CodeGenObjCXX/arc-rv-attr.mm @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64-apple-ios9 -fobjc-runtime=ios-9.0 -fobjc-arc -std=c++11 -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK +// RUN: %clang_cc1 -triple arm64-apple-ios9 -fobjc-runtime=ios-9.0 -fobjc-arc -std=c++11 -O -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s -check-prefix=CHECK id foo(void); // CHECK-LABEL: define{{.*}} void @_Z14test_list_initv( -// CHECK: %[[CALL1:.*]] = call noundef i8* @_Z3foov() [ "clang.arc.attachedcall"(i8* (i8*)* @llvm.objc.retainAutoreleasedReturnValue) ] -// CHECK: call i8* @llvm.objc.retain(i8* %[[CALL1]]) +// CHECK: %[[CALL1:.*]] = call noundef ptr @_Z3foov() [ "clang.arc.attachedcall"(ptr @llvm.objc.retainAutoreleasedReturnValue) ] +// CHECK: call ptr @llvm.objc.retain(ptr %[[CALL1]]) void test_list_init() { auto t = id{foo()}; diff --git a/clang/test/CodeGenObjCXX/arc-special-member-functions.mm b/clang/test/CodeGenObjCXX/arc-special-member-functions.mm index b95789eea162e6..2cda52e7f7ee95 100644 --- a/clang/test/CodeGenObjCXX/arc-special-member-functions.mm +++ b/clang/test/CodeGenObjCXX/arc-special-member-functions.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++11 -fobjc-arc -fblocks -triple x86_64-apple-darwin10.0.0 -fobjc-runtime-has-weak -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -std=c++11 -fobjc-arc -fblocks -triple x86_64-apple-darwin10.0.0 -fobjc-runtime-has-weak -emit-llvm -o - %s | FileCheck %s struct ObjCMember { id member; @@ -13,7 +13,7 @@ }; // CHECK: %[[STRUCT_CONTAINSWEAK:.*]] = type { %[[STRUCT_WEAK:.*]] } -// CHECK: %[[STRUCT_WEAK]] = type { i8* } +// CHECK: %[[STRUCT_WEAK]] = type { ptr } // The Weak object that is passed is destructed in this constructor. @@ -151,17 +151,14 @@ void test_ObjCBlockMember_copy_assign(ObjCBlockMember m1, ObjCBlockMember m2) { } // Implicitly-generated copy assignment operator for ObjCBlockMember -// CHECK: define linkonce_odr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) {{%.*}}* @_ZN15ObjCBlockMemberaSERKS_( -// CHECK: [[T0:%.*]] = getelementptr inbounds [[T:%.*]], [[T:%.*]]* {{%.*}}, i32 0, i32 0 -// CHECK-NEXT: [[T1:%.*]] = load i32 (i32)*, i32 (i32)** [[T0]], align 8 -// CHECK-NEXT: [[T2:%.*]] = bitcast i32 (i32)* [[T1]] to i8* -// CHECK-NEXT: [[T3:%.*]] = call i8* @llvm.objc.retainBlock(i8* [[T2]]) -// CHECK-NEXT: [[T4:%.*]] = bitcast i8* [[T3]] to i32 (i32)* -// CHECK-NEXT: [[T5:%.*]] = getelementptr inbounds [[T]], [[T]]* {{%.*}}, i32 0, i32 0 -// CHECK-NEXT: [[T6:%.*]] = load i32 (i32)*, i32 (i32)** [[T5]], align 8 -// CHECK-NEXT: store i32 (i32)* [[T4]], i32 (i32)** [[T5]] -// CHECK-NEXT: [[T7:%.*]] = bitcast i32 (i32)* [[T6]] to i8* -// CHECK-NEXT: call void @llvm.objc.release(i8* [[T7]]) +// CHECK: define linkonce_odr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_ZN15ObjCBlockMemberaSERKS_( +// CHECK: [[T0:%.*]] = getelementptr inbounds [[T:%.*]], ptr {{%.*}}, i32 0, i32 0 +// CHECK-NEXT: [[T1:%.*]] = load ptr, ptr [[T0]], align 8 +// CHECK-NEXT: [[T3:%.*]] = call ptr @llvm.objc.retainBlock(ptr [[T1]]) +// CHECK-NEXT: [[T5:%.*]] = getelementptr inbounds [[T]], ptr {{%.*}}, i32 0, i32 0 +// CHECK-NEXT: [[T6:%.*]] = load ptr, ptr [[T5]], align 8 +// CHECK-NEXT: store ptr [[T3]], ptr [[T5]] +// CHECK-NEXT: call void @llvm.objc.release(ptr [[T6]]) // CHECK-NEXT: ret // Check that the Weak object passed to this constructor is not destructed after @@ -174,7 +171,7 @@ void test_ObjCBlockMember_copy_assign(ObjCBlockMember m1, ObjCBlockMember m2) { // Implicitly-generated default constructor for ObjCMember // CHECK-LABEL: define linkonce_odr void @_ZN10ObjCMemberC2Ev // CHECK-NOT: objc_release -// CHECK: store i8* null +// CHECK: store ptr null // CHECK-NEXT: ret void // Implicitly-generated destructor for ObjCMember @@ -185,31 +182,31 @@ void test_ObjCBlockMember_copy_assign(ObjCBlockMember m1, ObjCBlockMember m2) { // Implicitly-generated copy constructor for ObjCMember // CHECK-LABEL: define linkonce_odr void @_ZN10ObjCMemberC2ERKS_ // CHECK-NOT: objc_release -// CHECK: call i8* @llvm.objc.retain -// CHECK-NEXT: store i8* +// CHECK: call ptr @llvm.objc.retain +// CHECK-NEXT: store ptr // CHECK-NEXT: ret void // Implicitly-generated default constructor for ObjCArrayMember // CHECK-LABEL: define linkonce_odr void @_ZN15ObjCArrayMemberC2Ev -// CHECK: call void @llvm.memset.p0i8.i64 +// CHECK: call void @llvm.memset.p0.i64 // CHECK: ret // Implicitly-generated destructor for ObjCArrayMember // CHECK-LABEL: define linkonce_odr void @_ZN15ObjCArrayMemberD2Ev -// CHECK: [[BEGIN:%.*]] = getelementptr inbounds [2 x [3 x i8*]], [2 x [3 x i8*]]* -// CHECK-NEXT: [[END:%.*]] = getelementptr inbounds i8*, i8** [[BEGIN]], i64 6 +// CHECK: [[BEGIN:%.*]] = getelementptr inbounds [2 x [3 x ptr]], ptr +// CHECK-NEXT: [[END:%.*]] = getelementptr inbounds ptr, ptr [[BEGIN]], i64 6 // CHECK-NEXT: br label -// CHECK: [[PAST:%.*]] = phi i8** [ [[END]], {{%.*}} ], [ [[CUR:%.*]], {{%.*}} ] -// CHECK-NEXT: [[CUR]] = getelementptr inbounds i8*, i8** [[PAST]], i64 -1 -// CHECK-NEXT: call void @llvm.objc.storeStrong(i8** [[CUR]], i8* null) -// CHECK-NEXT: [[T1:%.*]] = icmp eq i8** [[CUR]], [[BEGIN]] +// CHECK: [[PAST:%.*]] = phi ptr [ [[END]], {{%.*}} ], [ [[CUR:%.*]], {{%.*}} ] +// CHECK-NEXT: [[CUR]] = getelementptr inbounds ptr, ptr [[PAST]], i64 -1 +// CHECK-NEXT: call void @llvm.objc.storeStrong(ptr [[CUR]], ptr null) +// CHECK-NEXT: [[T1:%.*]] = icmp eq ptr [[CUR]], [[BEGIN]] // CHECK-NEXT: br i1 [[T1]], // CHECK: ret void // Implicitly-generated copy constructor for ObjCArrayMember // CHECK-LABEL: define linkonce_odr void @_ZN15ObjCArrayMemberC2ERKS_ -// CHECK: call i8* @llvm.objc.retain -// CHECK-NEXT: store i8* +// CHECK: call ptr @llvm.objc.retain +// CHECK-NEXT: store ptr // CHECK: br i1 // CHECK: ret @@ -220,11 +217,11 @@ void test_ObjCBlockMember_copy_assign(ObjCBlockMember m1, ObjCBlockMember m2) { // Implicitly-generated destructor for ObjCBlockMember // CHECK-LABEL: define linkonce_odr void @_ZN15ObjCBlockMemberD2Ev -// CHECK: call void @llvm.objc.storeStrong(i8* +// CHECK: call void @llvm.objc.storeStrong(ptr // CHECK: ret // Implicitly-generated copy constructor for ObjCBlockMember // CHECK-LABEL: define linkonce_odr void @_ZN15ObjCBlockMemberC2ERKS_ -// CHECK: call i8* @llvm.objc.retainBlock +// CHECK: call ptr @llvm.objc.retainBlock // CHECK: ret diff --git a/clang/test/CodeGenObjCXX/arc-weak.mm b/clang/test/CodeGenObjCXX/arc-weak.mm index b95d434d69df2a..07c4e6e71f20b6 100644 --- a/clang/test/CodeGenObjCXX/arc-weak.mm +++ b/clang/test/CodeGenObjCXX/arc-weak.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -std=c++11 -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -fobjc-runtime-has-weak -std=c++11 -o - %s | FileCheck %s __attribute((objc_root_class)) @interface A @end @interface B : A @end @@ -9,26 +9,18 @@ void test0(__weak B **src) { __weak A *dest = *src; } // CHECK-LABEL: define{{.*}} void @_Z5test0PU6__weakP1B( -// CHECK: [[SRC:%.*]] = alloca [[B:%.*]]**, align 8 -// CHECK: [[DEST:%.*]] = alloca [[A:%.*]]*, align 8 -// CHECK: [[T0:%.*]] = load [[B]]**, [[B]]*** [[SRC]], align 8 -// CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]** [[T0]] to [[A]]** -// CHECK-NEXT: [[T2:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK-NEXT: [[T3:%.*]] = bitcast [[A]]** [[T1]] to i8** -// CHECK-NEXT: call void @llvm.objc.copyWeak(i8** [[T2]], i8** [[T3]]) -// CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK: call void @llvm.objc.destroyWeak(i8** [[T0]]) +// CHECK: [[SRC:%.*]] = alloca ptr, align 8 +// CHECK: [[DEST:%.*]] = alloca ptr, align 8 +// CHECK: [[T0:%.*]] = load ptr, ptr [[SRC]], align 8 +// CHECK-NEXT: call void @llvm.objc.copyWeak(ptr [[DEST]], ptr [[T0]]) +// CHECK: call void @llvm.objc.destroyWeak(ptr [[DEST]]) void test1(__weak B **src) { __weak A *dest = static_cast<__weak B*&&>(*src); } // CHECK-LABEL: define{{.*}} void @_Z5test1PU6__weakP1B( -// CHECK: [[SRC:%.*]] = alloca [[B:%.*]]**, align 8 -// CHECK: [[DEST:%.*]] = alloca [[A:%.*]]*, align 8 -// CHECK: [[T0:%.*]] = load [[B]]**, [[B]]*** [[SRC]], align 8 -// CHECK-NEXT: [[T1:%.*]] = bitcast [[B]]** [[T0]] to [[A]]** -// CHECK-NEXT: [[T2:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK-NEXT: [[T3:%.*]] = bitcast [[A]]** [[T1]] to i8** -// CHECK-NEXT: call void @llvm.objc.moveWeak(i8** [[T2]], i8** [[T3]]) -// CHECK-NEXT: [[T0:%.*]] = bitcast [[A]]** [[DEST]] to i8** -// CHECK: call void @llvm.objc.destroyWeak(i8** [[T0]]) +// CHECK: [[SRC:%.*]] = alloca ptr, align 8 +// CHECK: [[DEST:%.*]] = alloca ptr, align 8 +// CHECK: [[T0:%.*]] = load ptr, ptr [[SRC]], align 8 +// CHECK-NEXT: call void @llvm.objc.moveWeak(ptr [[DEST]], ptr [[T0]]) +// CHECK: call void @llvm.objc.destroyWeak(ptr [[DEST]]) diff --git a/clang/test/CodeGenObjCXX/auto-release-result-assert.mm b/clang/test/CodeGenObjCXX/auto-release-result-assert.mm index 96f45e4e1f84a0..f3d5f4d413f704 100644 --- a/clang/test/CodeGenObjCXX/auto-release-result-assert.mm +++ b/clang/test/CodeGenObjCXX/auto-release-result-assert.mm @@ -1,16 +1,16 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -fblocks -fobjc-arc -o - %s | FileCheck %s -// CHECK-LABEL: define{{.*}} %struct.S1* @_Z4foo1i( -// CHECK: %[[CALL:[a-z0-9]+]] = call noundef %struct.S1* @_Z4foo0i -// CHECK: ret %struct.S1* %[[CALL]] +// CHECK-LABEL: define{{.*}} ptr @_Z4foo1i( +// CHECK: %[[CALL:[a-z0-9]+]] = call noundef ptr @_Z4foo0i +// CHECK: ret ptr %[[CALL]] -// CHECK-LABEL: define{{.*}} %struct.S1* @_ZN2S22m1Ev( -// CHECK: %[[CALL:[a-z0-9]+]] = call noundef %struct.S1* @_Z4foo0i -// CHECK: ret %struct.S1* %[[CALL]] +// CHECK-LABEL: define{{.*}} ptr @_ZN2S22m1Ev( +// CHECK: %[[CALL:[a-z0-9]+]] = call noundef ptr @_Z4foo0i +// CHECK: ret ptr %[[CALL]] -// CHECK-LABEL: define internal noundef %struct.S1* @Block1_block_invoke( -// CHECK: %[[CALL:[a-z0-9]+]] = call noundef %struct.S1* @_Z4foo0i -// CHECK: ret %struct.S1* %[[CALL]] +// CHECK-LABEL: define internal noundef ptr @Block1_block_invoke( +// CHECK: %[[CALL:[a-z0-9]+]] = call noundef ptr @_Z4foo0i +// CHECK: ret ptr %[[CALL]] struct S1; diff --git a/clang/test/CodeGenObjCXX/block-default-arg.mm b/clang/test/CodeGenObjCXX/block-default-arg.mm index 228e1d78800187..99c0ac2ea42009 100644 --- a/clang/test/CodeGenObjCXX/block-default-arg.mm +++ b/clang/test/CodeGenObjCXX/block-default-arg.mm @@ -1,9 +1,8 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -std=c++11 -fblocks -fobjc-arc | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -std=c++11 -fblocks -fobjc-arc | FileCheck %s -// CHECK: define internal void @___Z16test_default_argi_block_invoke(i8* noundef %[[BLOCK_DESCRIPTOR:.*]]) -// CHECK: %[[BLOCK:.*]] = bitcast i8* %[[BLOCK_DESCRIPTOR]] to <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* -// CHECK: %[[BLOCK_CAPTURE_ADDR:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %[[BLOCK]], i32 0, i32 5 -// CHECK: %[[V0:.*]] = load i32, i32* %[[BLOCK_CAPTURE_ADDR]] +// CHECK: define internal void @___Z16test_default_argi_block_invoke(ptr noundef %[[BLOCK_DESCRIPTOR:.*]]) +// CHECK: %[[BLOCK_CAPTURE_ADDR:.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr %[[BLOCK_DESCRIPTOR]], i32 0, i32 5 +// CHECK: %[[V0:.*]] = load i32, ptr %[[BLOCK_CAPTURE_ADDR]] // CHECK: call void @_Z4foo1i(i32 noundef %[[V0]]) void foo1(int); diff --git a/clang/test/CodeGenObjCXX/boxing.mm b/clang/test/CodeGenObjCXX/boxing.mm index 1e477d97490bd5..b9b9636daade40 100644 --- a/clang/test/CodeGenObjCXX/boxing.mm +++ b/clang/test/CodeGenObjCXX/boxing.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s @interface NSNumber + (id)numberWithInt:(int)n; @@ -8,5 +8,5 @@ + (id)numberWithInt:(int)n; int m = (@(n++), 0); // CHECK: define {{.*}} @__cxx_global_var_init() -// CHECK: load i32, i32* @n -// CHECK: store i32 %{{.*}}, i32* @n +// CHECK: load i32, ptr @n +// CHECK: store i32 %{{.*}}, ptr @n diff --git a/clang/test/CodeGenObjCXX/catch-id-type.mm b/clang/test/CodeGenObjCXX/catch-id-type.mm index bddd0c18114d7b..910ccfba6f7e93 100644 --- a/clang/test/CodeGenObjCXX/catch-id-type.mm +++ b/clang/test/CodeGenObjCXX/catch-id-type.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-macosx10.6.6 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -fobjc-exceptions -fcxx-exceptions -fexceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple i386-apple-macosx10.6.6 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -fobjc-exceptions -fcxx-exceptions -fexceptions -o - %s | FileCheck %s // rdar://8940528 @interface ns_array @@ -30,10 +30,10 @@ id FUNC() { } catch( id error ) { - // CHECK: landingpad { i8*, i32 } - // CHECK-NEXT: catch i8* bitcast ({ i8*, i8*, i32, i8* }* @_ZTIPU11objcproto1P4INTF to i8*) - // CHECK-NEXT: catch i8* bitcast ({ i8*, i8*, i32, i8* }* @_ZTIP11objc_object to i8*) - // CHECK-NEXT: catch i8* bitcast ({ i8*, i8*, i32, i8* }* @_ZTIP10objc_class to i8*) + // CHECK: landingpad { ptr, i32 } + // CHECK-NEXT: catch ptr @_ZTIPU11objcproto1P4INTF + // CHECK-NEXT: catch ptr @_ZTIP11objc_object + // CHECK-NEXT: catch ptr @_ZTIP10objc_class error = error; groups = [ns_array array]; } diff --git a/clang/test/CodeGenObjCXX/copy.mm b/clang/test/CodeGenObjCXX/copy.mm index 7d1fc70d14a2cd..966c210fe12b1b 100644 --- a/clang/test/CodeGenObjCXX/copy.mm +++ b/clang/test/CodeGenObjCXX/copy.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s // rdar://problem/9158302 // This should not use a memmove_collectable in non-GC mode. @@ -7,15 +7,12 @@ id x; }; - // CHECK: define{{.*}} [[A:%.*]]* @_ZN5test04testENS_1AE( + // CHECK: define{{.*}} ptr @_ZN5test04testENS_1AE( // CHECK: alloca // CHECK-NEXT: getelementptr // CHECK-NEXT: store - // CHECK-NEXT: [[CALL:%.*]] = call noalias noundef nonnull i8* @_Znwm( - // CHECK-NEXT: bitcast - // CHECK-NEXT: bitcast - // CHECK-NEXT: bitcast - // CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64( + // CHECK-NEXT: [[CALL:%.*]] = call noalias noundef nonnull ptr @_Znwm( + // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64( // CHECK-NEXT: ret A *test(A a) { return new A(a); diff --git a/clang/test/CodeGenObjCXX/debug-info-line.mm b/clang/test/CodeGenObjCXX/debug-info-line.mm index 0d5505e9818308..bb6eaa50d7cca3 100644 --- a/clang/test/CodeGenObjCXX/debug-info-line.mm +++ b/clang/test/CodeGenObjCXX/debug-info-line.mm @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-windows-gnu -fcxx-exceptions -fexceptions -debug-info-kind=line-tables-only -fblocks -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-windows-gnu -fcxx-exceptions -fexceptions -debug-info-kind=line-directives-only -fblocks -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-windows-gnu -fcxx-exceptions -fexceptions -debug-info-kind=line-tables-only -fblocks -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-unknown-windows-gnu -fcxx-exceptions -fexceptions -debug-info-kind=line-directives-only -fblocks -emit-llvm %s -o - | FileCheck %s void fn(); @@ -16,7 +16,7 @@ void f1() { }(); } -// CHECK-LABEL: define internal {{.*}}i8* @"\01-[TNSObject init]" +// CHECK-LABEL: define internal {{.*}}ptr @"\01-[TNSObject init]" @implementation TNSObject - (id)init { diff --git a/clang/test/CodeGenObjCXX/destroy.mm b/clang/test/CodeGenObjCXX/destroy.mm index 9e33bb66a6d74f..d9f62e64848ecb 100644 --- a/clang/test/CodeGenObjCXX/destroy.mm +++ b/clang/test/CodeGenObjCXX/destroy.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++11 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -disable-llvm-passes -o - %s | FileCheck %s +// RUN: %clang_cc1 -std=c++11 -triple x86_64-apple-darwin10 -emit-llvm -fobjc-arc -disable-llvm-passes -o - %s | FileCheck %s // rdar://18249673 @class MyObject; @@ -44,7 +44,7 @@ void test4() { // CHECK: call void @_ZN8tderivedIiED1Ev // CHECK-LABEL: define linkonce_odr void @_ZN7derivedD2Ev -// CHECK: call void @llvm.objc.storeStrong(i8** {{.*}}, i8* null) +// CHECK: call void @llvm.objc.storeStrong(ptr {{.*}}, ptr null) // CHECK-LABEL: define linkonce_odr void @_ZN8tderivedIiED2Ev -// CHECK: call void @llvm.objc.storeStrong(i8** {{.*}}, i8* null) +// CHECK: call void @llvm.objc.storeStrong(ptr {{.*}}, ptr null) diff --git a/clang/test/CodeGenObjCXX/exception-cxx.mm b/clang/test/CodeGenObjCXX/exception-cxx.mm index 076d562f26f350..61f3d32127132f 100644 --- a/clang/test/CodeGenObjCXX/exception-cxx.mm +++ b/clang/test/CodeGenObjCXX/exception-cxx.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s // rdar://problem/22155434 namespace test0 { @@ -9,5 +9,5 @@ void foo() { return; } } -// CHECK: define{{.*}} void @_ZN5test03fooEv() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) +// CHECK: define{{.*}} void @_ZN5test03fooEv() #0 personality ptr @__gxx_personality_v0 } diff --git a/clang/test/CodeGenObjCXX/exceptions.mm b/clang/test/CodeGenObjCXX/exceptions.mm index ae4e37ae71ae76..26cc48d2c22381 100644 --- a/clang/test/CodeGenObjCXX/exceptions.mm +++ b/clang/test/CodeGenObjCXX/exceptions.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s @interface OCType @end void opaque(); @@ -6,14 +6,14 @@ @interface OCType @end namespace test0 { // CHECK-LABEL: define{{.*}} void @_ZN5test03fooEv - // CHECK-SAME: personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) + // CHECK-SAME: personality ptr @__objc_personality_v0 void foo() { try { // CHECK: invoke void @_Z6opaquev opaque(); } catch (OCType *T) { - // CHECK: landingpad { i8*, i32 } - // CHECK-NEXT: catch %struct._objc_typeinfo* @"OBJC_EHTYPE_$_OCType" + // CHECK: landingpad { ptr, i32 } + // CHECK-NEXT: catch ptr @"OBJC_EHTYPE_$_OCType" } } } @@ -30,7 +30,7 @@ void bar() { } @catch (id i) { } } -// CHECK: invoke void @objc_exception_throw(i8* [[CALL:%.*]]) [[NR:#[0-9]+]] +// CHECK: invoke void @objc_exception_throw(ptr [[CALL:%.*]]) [[NR:#[0-9]+]] // CHECK: to label [[INVOKECONT1:%.*]] unwind label [[LPAD:%.*]] } diff --git a/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm b/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm index 7ddb9273f17ce3..78520fa08a589b 100644 --- a/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm +++ b/clang/test/CodeGenObjCXX/implicit-copy-assign-operator.mm @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-gc -emit-llvm -triple x86_64-apple-darwin10.0.0 -fobjc-runtime=macosx-fragile-10.5 -o - %s | FileCheck %s -check-prefix=CHECK-OBJ -// RUN: %clang_cc1 -no-opaque-pointers -x c++ -emit-llvm -triple x86_64-apple-darwin10.0.0 -o - %s | FileCheck %s -check-prefix=CHECK-CPP +// RUN: %clang_cc1 -fobjc-gc -emit-llvm -triple x86_64-apple-darwin10.0.0 -fobjc-runtime=macosx-fragile-10.5 -o - %s | FileCheck %s -check-prefix=CHECK-OBJ +// RUN: %clang_cc1 -x c++ -emit-llvm -triple x86_64-apple-darwin10.0.0 -o - %s | FileCheck %s -check-prefix=CHECK-CPP #ifdef __OBJC__ struct A { A &operator=(const A&); @@ -43,16 +43,16 @@ void test_D(D d1, D d2) { d1 = d2; } -// CHECK-OBJ-LABEL: define linkonce_odr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.D* @_ZN1DaSERS_ +// CHECK-OBJ-LABEL: define linkonce_odr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_ZN1DaSERS_ // CHECK-OBJ: {{call.*_ZN1AaSERS_}} // CHECK-OBJ: {{call.*_ZN1BaSERS_}} // CHECK-OBJ: {{call.*_ZN1CaSERKS_}} -// CHECK-OBJ: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 24}} +// CHECK-OBJ: {{call void @llvm.memcpy.p0.p0.i64.*i64 24}} // CHECK-OBJ: {{call.*_ZN1BaSERS_}} // CHECK-OBJ: br // CHECK-OBJ: {{call.*_ZN1CaSERKS_}} // CHECK-OBJ: {{call.*@objc_memmove_collectable}} -// CHECK-OBJ: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 12}} +// CHECK-OBJ: {{call void @llvm.memcpy.p0.p0.i64.*i64 12}} // CHECK-OBJ: call void @_ZN11CopyByValueC1ERKS_ // CHECK-OBJ: {{call.*_ZN11CopyByValueaSES_}} // CHECK-OBJ: ret diff --git a/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm b/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm index c6fcef167e7e20..10e3c85abfc756 100644 --- a/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm +++ b/clang/test/CodeGenObjCXX/implicit-copy-constructor.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fobjc-gc -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -fobjc-gc -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 -emit-llvm -o - %s | FileCheck %s struct A { A(); @@ -41,13 +41,13 @@ void f(D d) { D d2(d); } -// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(%struct.D* {{[^,]*}} %this, %struct.D* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr +// CHECK-LABEL: define linkonce_odr void @_ZN1DC1ERS_(ptr {{[^,]*}} %this, ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %0) unnamed_addr // CHECK: call void @_ZN1AC1Ev // CHECK: call void @_ZN1CC2ERS_1A // CHECK: call void @_ZN1AD1Ev // CHECK: call void @_ZN1AC2ERS_ // CHECK: call void @_ZN1BC2ERS_ -// CHECK: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 24}} +// CHECK: {{call void @llvm.memcpy.p0.p0.i64.*i64 24}} // CHECK: call void @_ZN1BC1ERS_ // CHECK: br label // CHECK: call void @_ZN1AC1Ev @@ -58,7 +58,7 @@ void f(D d) { // CHECK: {{icmp eq.*, 2}} // CHECK: br i1 // CHECK: {{call.*@objc_memmove_collectable}} -// CHECK: {{call void @llvm.memcpy.p0i8.p0i8.i64.*i64 12}} +// CHECK: {{call void @llvm.memcpy.p0.p0.i64.*i64 12}} // CHECK: ret void diff --git a/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm b/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm index a4ebace4794ada..6756653bd95b80 100644 --- a/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm +++ b/clang/test/CodeGenObjCXX/inheriting-constructor-cleanup.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-darwin -std=c++11 -fobjc-arc -emit-llvm -o - %s | FileCheck %s --implicit-check-not "call\ " +// RUN: %clang_cc1 -triple x86_64-darwin -std=c++11 -fobjc-arc -emit-llvm -o - %s | FileCheck %s --implicit-check-not "call\ " // rdar://problem/45805151 struct Strong { @@ -22,22 +22,22 @@ void f() { Inheritor({g()}); } // CHECK-LABEL: define{{.*}} void @_Z1fv -// CHECK: %[[TMP:.*]] = call noundef i8* @_Z1gv() -// CHECK: {{.*}} = notail call i8* @llvm.objc.retainAutoreleasedReturnValue(i8* %[[TMP]]) -// CHECK: call void (%struct.Base*, i8*, ...) @_ZN4BaseC2E6Strongz(%struct.Base* {{.*}}, i8* {{.*}}) -// CHECK-NEXT: call void @_ZN9InheritorD1Ev(%struct.Inheritor* {{.*}}) +// CHECK: %[[TMP:.*]] = call noundef ptr @_Z1gv() +// CHECK: {{.*}} = notail call ptr @llvm.objc.retainAutoreleasedReturnValue(ptr %[[TMP]]) +// CHECK: call void (ptr, ptr, ...) @_ZN4BaseC2E6Strongz(ptr {{.*}}, ptr {{.*}}) +// CHECK-NEXT: call void @_ZN9InheritorD1Ev(ptr {{.*}}) -// CHECK-LABEL: define linkonce_odr void @_ZN4BaseC2E6Strongz(%struct.Base* {{.*}}, i8* {{.*}}, ...) -// CHECK: call void @_ZN6StrongD1Ev(%struct.Strong* {{.*}}) +// CHECK-LABEL: define linkonce_odr void @_ZN4BaseC2E6Strongz(ptr {{.*}}, ptr {{.*}}, ...) +// CHECK: call void @_ZN6StrongD1Ev(ptr {{.*}}) -// CHECK-LABEL: define linkonce_odr void @_ZN9InheritorD1Ev(%struct.Inheritor* {{.*}}) -// CHECK: call void @_ZN9InheritorD2Ev(%struct.Inheritor* {{.*}}) +// CHECK-LABEL: define linkonce_odr void @_ZN9InheritorD1Ev(ptr {{.*}}) +// CHECK: call void @_ZN9InheritorD2Ev(ptr {{.*}}) -// CHECK-LABEL: define linkonce_odr void @_ZN6StrongD1Ev(%struct.Strong* {{.*}}) -// CHECK: call void @_ZN6StrongD2Ev(%struct.Strong* {{.*}}) +// CHECK-LABEL: define linkonce_odr void @_ZN6StrongD1Ev(ptr {{.*}}) +// CHECK: call void @_ZN6StrongD2Ev(ptr {{.*}}) -// CHECK-LABEL: define linkonce_odr void @_ZN6StrongD2Ev(%struct.Strong* {{.*}}) -// CHECK: call void @llvm.objc.storeStrong(i8** {{.*}}, i8* null) +// CHECK-LABEL: define linkonce_odr void @_ZN6StrongD2Ev(ptr {{.*}}) +// CHECK: call void @llvm.objc.storeStrong(ptr {{.*}}, ptr null) -// CHECK-LABEL: define linkonce_odr void @_ZN9InheritorD2Ev(%struct.Inheritor* {{.*}}) -// CHECK: call void @_ZN14NonTrivialDtorD2Ev(%struct.NonTrivialDtor* {{.*}}) +// CHECK-LABEL: define linkonce_odr void @_ZN9InheritorD2Ev(ptr {{.*}}) +// CHECK: call void @_ZN14NonTrivialDtorD2Ev(ptr {{.*}}) diff --git a/clang/test/CodeGenObjCXX/lambda-expressions.mm b/clang/test/CodeGenObjCXX/lambda-expressions.mm index d81603d7b9b12b..d50607ca217f2f 100644 --- a/clang/test/CodeGenObjCXX/lambda-expressions.mm +++ b/clang/test/CodeGenObjCXX/lambda-expressions.mm @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -fexceptions -std=c++11 -fblocks -fobjc-arc -fobjc-runtime-has-weak -DWEAK_SUPPORTED | FileCheck -check-prefix=ARC %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -fexceptions -std=c++11 -fblocks | FileCheck -check-prefix=MRC %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -fexceptions -std=c++11 -fblocks -fobjc-arc -fobjc-runtime-has-weak -DWEAK_SUPPORTED | FileCheck -check-prefix=ARC %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10.0.0 -emit-llvm -o - %s -fexceptions -std=c++11 -fblocks | FileCheck -check-prefix=MRC %s typedef int (^fp)(); fp f() { auto x = []{ return 3; }; return x; } @@ -8,34 +8,34 @@ // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [5 x i8] c"copy\00" // MRC: @OBJC_METH_VAR_NAME{{.*}} = private unnamed_addr constant [12 x i8] c"autorelease\00" -// MRC-LABEL: define{{.*}} i32 ()* @_Z1fv( -// MRC-LABEL: define internal noundef i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" -// MRC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) -// MRC: store i8* bitcast (i32 (i8*)* @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" to i8*) -// MRC: call noundef i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) -// MRC: call noundef i32 ()* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to i32 ()* (i8*, i8*)*) -// MRC: ret i32 ()* - -// ARC-LABEL: define{{.*}} i32 ()* @_Z1fv( -// ARC-LABEL: define internal noundef i32 ()* @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" -// ARC: store i8* bitcast (i8** @_NSConcreteStackBlock to i8*) -// ARC: store i8* bitcast (i32 (i8*)* @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" to i8*) -// ARC: call i8* @llvm.objc.retainBlock -// ARC: call i8* @llvm.objc.autoreleaseReturnValue +// MRC-LABEL: define{{.*}} ptr @_Z1fv( +// MRC-LABEL: define internal noundef ptr @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" +// MRC: store ptr @_NSConcreteStackBlock +// MRC: store ptr @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" +// MRC: call noundef ptr @objc_msgSend +// MRC: call noundef ptr @objc_msgSend +// MRC: ret ptr + +// ARC-LABEL: define{{.*}} ptr @_Z1fv( +// ARC-LABEL: define internal noundef ptr @"_ZZ1fvENK3$_0cvU13block_pointerFivEEv" +// ARC: store ptr @_NSConcreteStackBlock +// ARC: store ptr @"___ZZ1fvENK3$_0cvU13block_pointerFivEEv_block_invoke" +// ARC: call ptr @llvm.objc.retainBlock +// ARC: call ptr @llvm.objc.autoreleaseReturnValue typedef int (^fp)(); fp global; void f2() { global = []{ return 3; }; } // MRC: define{{.*}} void @_Z2f2v() [[NUW:#[0-9]+]] { -// MRC: store i8* bitcast (i32 (i8*)* @___Z2f2v_block_invoke to i8*), +// MRC: store ptr @___Z2f2v_block_invoke, // MRC-NOT: call // MRC: ret void // ("global" contains a dangling pointer after this function runs.) // ARC: define{{.*}} void @_Z2f2v() [[NUW:#[0-9]+]] { -// ARC: store i8* bitcast (i32 (i8*)* @___Z2f2v_block_invoke to i8*), -// ARC: call i8* @llvm.objc.retainBlock +// ARC: store ptr @___Z2f2v_block_invoke, +// ARC: call ptr @llvm.objc.retainBlock // ARC: call void @llvm.objc.release // ARC-LABEL: define internal noundef i32 @___Z2f2v_block_invoke // ARC: call noundef i32 @"_ZZ2f2vENK3$_0clEv @@ -62,27 +62,27 @@ - (void) test { } @end -// ARC: define{{.*}} void @_ZN13LambdaCapture4foo1ERi(i32* noundef nonnull align 4 dereferenceable(4) %{{.*}}) -// ARC: %[[CAPTURE0:.*]] = getelementptr inbounds %[[LAMBDACLASS]], %[[LAMBDACLASS]]* %{{.*}}, i32 0, i32 0 -// ARC: store i32 %{{.*}}, i32* %[[CAPTURE0]] +// ARC: define{{.*}} void @_ZN13LambdaCapture4foo1ERi(ptr noundef nonnull align 4 dereferenceable(4) %{{.*}}) +// ARC: %[[CAPTURE0:.*]] = getelementptr inbounds %[[LAMBDACLASS]], ptr %{{.*}}, i32 0, i32 0 +// ARC: store i32 %{{.*}}, ptr %[[CAPTURE0]] -// ARC: define internal void @"_ZZN13LambdaCapture4foo1ERiENK3$_0clEv"(%[[LAMBDACLASS]]* {{[^,]*}} %{{.*}}) -// ARC: %[[BLOCK:.*]] = alloca <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }> -// ARC: %[[CAPTURE1:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %[[BLOCK]], i32 0, i32 5 -// ARC: store i32 %{{.*}}, i32* %[[CAPTURE1]] +// ARC: define internal void @"_ZZN13LambdaCapture4foo1ERiENK3$_0clEv"(ptr {{[^,]*}} %{{.*}}) +// ARC: %[[BLOCK:.*]] = alloca <{ ptr, i32, i32, ptr, ptr, i32 }> +// ARC: %[[CAPTURE1:.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr %[[BLOCK]], i32 0, i32 5 +// ARC: store i32 %{{.*}}, ptr %[[CAPTURE1]] // ARC-LABEL: define internal void @"_ZZ10-[Foo foo]ENK3$_4clEv"( // ARC-NOT: @llvm.objc.storeStrong( // ARC: ret void // ARC: define internal void @"___ZZN13LambdaCapture4foo1ERiENK3$_0clEv_block_invoke" -// ARC: %[[CAPTURE2:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %{{.*}}, i32 0, i32 5 -// ARC: store i32 %{{.*}}, i32* %[[CAPTURE2]] +// ARC: %[[CAPTURE2:.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr %{{.*}}, i32 0, i32 5 +// ARC: store i32 %{{.*}}, ptr %[[CAPTURE2]] -// ARC: define internal void @"___ZZN13LambdaCapture4foo1ERiENK3$_0clEv_block_invoke_2"(i8* noundef %{{.*}}) -// ARC: %[[CAPTURE3:.*]] = getelementptr inbounds <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>, <{ i8*, i32, i32, i8*, %struct.__block_descriptor*, i32 }>* %{{.*}}, i32 0, i32 5 -// ARC: %[[V1:.*]] = load i32, i32* %[[CAPTURE3]] -// ARC: store i32 %[[V1]], i32* @_ZN13LambdaCapture1iE +// ARC: define internal void @"___ZZN13LambdaCapture4foo1ERiENK3$_0clEv_block_invoke_2"(ptr noundef %{{.*}}) +// ARC: %[[CAPTURE3:.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, i32 }>, ptr %{{.*}}, i32 0, i32 5 +// ARC: %[[V1:.*]] = load i32, ptr %[[CAPTURE3]] +// ARC: store i32 %[[V1]], ptr @_ZN13LambdaCapture1iE namespace LambdaCapture { int i; @@ -100,12 +100,12 @@ void foo1(int &a) { } } -// ARC-LABEL: define linkonce_odr noundef i32 ()* @_ZZNK13StaticMembersIfE1fMUlvE_clEvENKUlvE_cvU13block_pointerFivEEv +// ARC-LABEL: define linkonce_odr noundef ptr @_ZZNK13StaticMembersIfE1fMUlvE_clEvENKUlvE_cvU13block_pointerFivEEv // Check lines for BlockInLambda test below // ARC-LABEL: define internal noundef i32 @___ZZN13BlockInLambda1X1fEvENKUlvE_clEv_block_invoke -// ARC: [[Y:%.*]] = getelementptr inbounds %"struct.BlockInLambda::X", %"struct.BlockInLambda::X"* {{.*}}, i32 0, i32 1 -// ARC-NEXT: [[YVAL:%.*]] = load i32, i32* [[Y]], align 4 +// ARC: [[Y:%.*]] = getelementptr inbounds %"struct.BlockInLambda::X", ptr {{.*}}, i32 0, i32 1 +// ARC-NEXT: [[YVAL:%.*]] = load i32, ptr [[Y]], align 4 // ARC-NEXT: ret i32 [[YVAL]] typedef int (^fptr)(); diff --git a/clang/test/CodeGenObjCXX/mangle-blocks.mm b/clang/test/CodeGenObjCXX/mangle-blocks.mm index 65ca4a65e0ec14..3110ae7d9b7c3c 100644 --- a/clang/test/CodeGenObjCXX/mangle-blocks.mm +++ b/clang/test/CodeGenObjCXX/mangle-blocks.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fblocks -o - -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 %s | FileCheck %s +// RUN: %clang_cc1 -emit-llvm -fblocks -o - -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-fragile-10.5 %s | FileCheck %s // CHECK-DAG: @_ZZZN26externally_visible_statics1S3fooEiEd_Ub_E1k = linkonce_odr global i32 0 // CHECK-DAG: @_ZZZN26externally_visible_statics10inlinefuncEvEUb_E1i = linkonce_odr global i32 0 @@ -9,7 +9,7 @@ void foo() { // CHECK-LABEL: define internal noundef i32 @___Z3foov_block_invoke - // CHECK: call i32 @__cxa_guard_acquire(i64* @_ZGVZZ3foovEUb_E5value + // CHECK: call i32 @__cxa_guard_acquire(ptr @_ZGVZZ3foovEUb_E5value (void)^(int x) { static int value = f(); return x + value; diff --git a/clang/test/CodeGenObjCXX/message.mm b/clang/test/CodeGenObjCXX/message.mm index 8b3b35877e77a5..0be92f65216096 100644 --- a/clang/test/CodeGenObjCXX/message.mm +++ b/clang/test/CodeGenObjCXX/message.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.7 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.7 -emit-llvm -o - %s | FileCheck %s // Properly instantiate a non-dependent message expression which // requires a contextual conversion to ObjC pointer type. @@ -16,9 +16,8 @@ - (void) foo; } template void foo(); // CHECK-LABEL: define weak_odr void @_ZN5test03fooIiEEvv() - // CHECK: [[T0:%.*]] = call noundef [[TEST0:%.*]]* @_ZN5test01AcvP5Test0Ev( - // CHECK-NEXT: [[T2:%.*]] = bitcast [[TEST0]]* [[T0]] to i8* - // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** - // CHECK-NEXT: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*)*)(i8* noundef [[T2]], i8* noundef [[T1]]) + // CHECK: [[T0:%.*]] = call noundef ptr @_ZN5test01AcvP5Test0Ev( + // CHECK-NEXT: [[T1:%.*]] = load ptr, ptr + // CHECK-NEXT: call void @objc_msgSend(ptr noundef [[T0]], ptr noundef [[T1]]) // CHECK-NEXT: ret void } diff --git a/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm b/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm index a97b296e989af8..37fe30544c59c6 100644 --- a/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm +++ b/clang/test/CodeGenObjCXX/microsoft-abi-arc-param-order.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -mconstructor-aliases -fobjc-arc -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -mconstructor-aliases -fobjc-arc -triple i686-pc-win32 -emit-llvm -o - %s | FileCheck %s struct A { A(); @@ -10,11 +10,11 @@ // Verify that we destruct things from left to right in the MS C++ ABI: a, b, c, d. // // CHECK-LABEL: define dso_local void @"?test_arc_order@@YAXUA@@PAUobjc_object@@01@Z" -// CHECK: (<{ %struct.A, i8*, %struct.A, i8* }>* inalloca(<{ %struct.A, i8*, %struct.A, i8* }>) %0) +// CHECK: (ptr inalloca(<{ %struct.A, ptr, %struct.A, ptr }>) %0) void test_arc_order(A a, id __attribute__((ns_consumed)) b , A c, id __attribute__((ns_consumed)) d) { - // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* {{[^,]*}} %{{.*}}) - // CHECK: call void @llvm.objc.storeStrong(i8** %{{.*}}, i8* null) - // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(%struct.A* {{[^,]*}} %{{.*}}) - // CHECK: call void @llvm.objc.storeStrong(i8** %{{.*}}, i8* null) + // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(ptr {{[^,]*}} %{{.*}}) + // CHECK: call void @llvm.objc.storeStrong(ptr %{{.*}}, ptr null) + // CHECK: call x86_thiscallcc void @"??1A@@QAE@XZ"(ptr {{[^,]*}} %{{.*}}) + // CHECK: call void @llvm.objc.storeStrong(ptr %{{.*}}, ptr null) // CHECK: ret void } diff --git a/clang/test/CodeGenObjCXX/mrc-weak.mm b/clang/test/CodeGenObjCXX/mrc-weak.mm index 9ae8fb3c7c6382..9e22885541c641 100644 --- a/clang/test/CodeGenObjCXX/mrc-weak.mm +++ b/clang/test/CodeGenObjCXX/mrc-weak.mm @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MODERN -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-FRAGILE +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-MODERN +// RUN: %clang_cc1 -triple i386-apple-darwin10 -fobjc-runtime=macosx-fragile-10.10 -emit-llvm -fblocks -fobjc-weak -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-FRAGILE @interface Object - (instancetype) retain; @@ -32,7 +32,7 @@ @implementation Foo void test1(__weak id x) {} // CHECK-LABEL: define{{.*}} void @_Z5test1P11objc_object( -// CHECK: [[X:%.*]] = alloca i8*, +// CHECK: [[X:%.*]] = alloca ptr, // CHECK-NEXT: llvm.objc.initWeak // CHECK-NEXT: llvm.objc.destroyWeak // CHECK-NEXT: ret void @@ -41,12 +41,12 @@ void test2(id y) { __weak id z = y; } // CHECK-LABEL: define{{.*}} void @_Z5test2P11objc_object( -// CHECK: [[Y:%.*]] = alloca i8*, -// CHECK-NEXT: [[Z:%.*]] = alloca i8*, +// CHECK: [[Y:%.*]] = alloca ptr, +// CHECK-NEXT: [[Z:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[Z]], i8* [[T0]]) -// CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[Z]]) +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call ptr @llvm.objc.initWeak(ptr [[Z]], ptr [[T0]]) +// CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[Z]]) // CHECK-NEXT: ret void void test3(id y) { @@ -54,51 +54,49 @@ void test3(id y) { z = y; } // CHECK-LABEL: define{{.*}} void @_Z5test3P11objc_object( -// CHECK: [[Y:%.*]] = alloca i8*, -// CHECK-NEXT: [[Z:%.*]] = alloca i8*, +// CHECK: [[Y:%.*]] = alloca ptr, +// CHECK-NEXT: [[Z:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: store i8* null, i8** [[Z]] -// CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[Y]] -// CHECK-NEXT: call i8* @llvm.objc.storeWeak(i8** [[Z]], i8* [[T0]]) -// CHECK-NEXT: call void @llvm.objc.destroyWeak(i8** [[Z]]) +// CHECK-NEXT: store ptr null, ptr [[Z]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[Y]] +// CHECK-NEXT: call ptr @llvm.objc.storeWeak(ptr [[Z]], ptr [[T0]]) +// CHECK-NEXT: call void @llvm.objc.destroyWeak(ptr [[Z]]) // CHECK-NEXT: ret void void test4(__weak id *p) { id y = *p; } // CHECK-LABEL: define{{.*}} void @_Z5test4PU6__weakP11objc_object( -// CHECK: [[P:%.*]] = alloca i8**, -// CHECK-NEXT: [[Y:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8**, i8*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.loadWeak(i8** [[T0]]) -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.loadWeak(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T1]], ptr [[Y]] // CHECK-NEXT: ret void void test5(__weak id *p) { id y = [*p retain]; } // CHECK-LABEL: define{{.*}} void @_Z5test5PU6__weakP11objc_object -// CHECK: [[P:%.*]] = alloca i8**, -// CHECK-NEXT: [[Y:%.*]] = alloca i8*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load i8**, i8*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[T0]]) -// CHECK-NEXT: store i8* [[T1]], i8** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T1:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T1]], ptr [[Y]] // CHECK-NEXT: ret void void test6(__weak Foo **p) { Foo *y = [*p retain]; } // CHECK-LABEL: define{{.*}} void @_Z5test6PU6__weakP3Foo -// CHECK: [[P:%.*]] = alloca [[FOO:%.*]]**, -// CHECK-NEXT: [[Y:%.*]] = alloca [[FOO]]*, +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK-NEXT: [[Y:%.*]] = alloca ptr, // CHECK-NEXT: store -// CHECK-NEXT: [[T0:%.*]] = load [[FOO]]**, [[FOO]]*** [[P]] -// CHECK-NEXT: [[T1:%.*]] = bitcast [[FOO]]** [[T0]] to i8** -// CHECK-NEXT: [[T2:%.*]] = call i8* @llvm.objc.loadWeakRetained(i8** [[T1]]) -// CHECK-NEXT: [[T3:%.*]] = bitcast i8* [[T2]] to [[FOO]]* -// CHECK-NEXT: store [[FOO]]* [[T3]], [[FOO]]** [[Y]] +// CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[P]] +// CHECK-NEXT: [[T2:%.*]] = call ptr @llvm.objc.loadWeakRetained(ptr [[T0]]) +// CHECK-NEXT: store ptr [[T2]], ptr [[Y]] // CHECK-NEXT: ret void extern "C" id get_object(void); @@ -109,12 +107,9 @@ void test7(void) { use_block(^{ [p run ]; }); } // CHECK-LABEL: define{{.*}} void @_Z5test7v -// CHECK: [[P:%.*]] = alloca [[FOO]]*, -// CHECK: [[T0:%.*]] = call i8* @get_object() -// CHECK-NEXT: [[T1:%.*]] = bitcast i8* [[T0]] to [[FOO]]* -// CHECK-NEXT: [[T2:%.*]] = bitcast [[FOO]]** [[P]] to i8** -// CHECK-NEXT: [[T3:%.*]] = bitcast [[FOO]]* [[T1]] to i8* -// CHECK-NEXT: call i8* @llvm.objc.initWeak(i8** [[T2]], i8* [[T3]]) +// CHECK: [[P:%.*]] = alloca ptr, +// CHECK: [[T0:%.*]] = call ptr @get_object() +// CHECK-NEXT: call ptr @llvm.objc.initWeak(ptr [[P]], ptr [[T0]]) // CHECK: call void @llvm.objc.copyWeak // CHECK: call void @use_block // CHECK: call void @llvm.objc.destroyWeak @@ -130,7 +125,7 @@ void test8(void) { use_block(^{ [p run ]; }); } // CHECK-LABEL: define{{.*}} void @_Z5test8v -// CHECK: call i8* @llvm.objc.initWeak +// CHECK: call ptr @llvm.objc.initWeak // CHECK-NOT: call void @llvm.objc.copyWeak // CHECK: call void @use_block // CHECK: call void @llvm.objc.destroyWeak diff --git a/clang/test/CodeGenObjCXX/msabi-stret.mm b/clang/test/CodeGenObjCXX/msabi-stret.mm index 577a75923edf1b..fbed6f7bb8cb92 100644 --- a/clang/test/CodeGenObjCXX/msabi-stret.mm +++ b/clang/test/CodeGenObjCXX/msabi-stret.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fobjc-runtime=ios-6.0 -Os -S -emit-llvm -o - %s -mframe-pointer=all | FileCheck %s +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fobjc-runtime=ios-6.0 -Os -S -emit-llvm -o - %s -mframe-pointer=all | FileCheck %s struct S { S() = default; @@ -13,5 +13,5 @@ S f() { return [I m:S()]; } -// CHECK: declare dso_local void @objc_msgSend_stret(i8*, i8*, ...) -// CHECK-NOT: declare dllimport void @objc_msgSend(i8*, i8*, ...) +// CHECK: declare dso_local void @objc_msgSend_stret(ptr, ptr, ...) +// CHECK-NOT: declare dllimport void @objc_msgSend(ptr, ptr, ...) diff --git a/clang/test/CodeGenObjCXX/objfw-exceptions.mm b/clang/test/CodeGenObjCXX/objfw-exceptions.mm index 610a87f7bd44ab..256d05d448d810 100644 --- a/clang/test/CodeGenObjCXX/objfw-exceptions.mm +++ b/clang/test/CodeGenObjCXX/objfw-exceptions.mm @@ -1,17 +1,17 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -fcxx-exceptions -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-DWARF -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -fcxx-exceptions -exception-model=sjlj -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SJLJ +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -fcxx-exceptions -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-DWARF +// RUN: %clang_cc1 -triple x86_64-pc-linux-gnu -emit-llvm -fexceptions -fobjc-exceptions -fobjc-runtime=objfw -fcxx-exceptions -exception-model=sjlj -o - %s | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-SJLJ @interface OCType @end void opaque(); // CHECK: define{{.*}} void @_Z3foov() -// CHECK-DWARF-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-SJLJ-SAME: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*) +// CHECK-DWARF-SAME: personality ptr @__gnu_objc_personality_v0 +// CHECK-SJLJ-SAME: personality ptr @__gnu_objc_personality_sj0 void foo() { try { // CHECK: invoke void @_Z6opaquev opaque(); } catch (OCType *T) { -// CHECK: landingpad { i8*, i32 } +// CHECK: landingpad { ptr, i32 } } } diff --git a/clang/test/CodeGenObjCXX/personality-abuse.mm b/clang/test/CodeGenObjCXX/personality-abuse.mm index 672f64ce4ca95b..d82a4e3d685d79 100644 --- a/clang/test/CodeGenObjCXX/personality-abuse.mm +++ b/clang/test/CodeGenObjCXX/personality-abuse.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s +// RUN: %clang_cc1 -x objective-c++ -triple x86_64-apple-darwin10 -emit-llvm -fcxx-exceptions -fexceptions -fobjc-exceptions -o - %s | FileCheck %s extern "C" { int __objc_personality_v0(); @@ -16,4 +16,4 @@ void foo() { } } -// CHECK: define{{.*}} void @_Z3foov() {{#[0-9]+}} personality i8* bitcast (i32 ()* @__objc_personality_v0 to i8*) +// CHECK: define{{.*}} void @_Z3foov() {{#[0-9]+}} personality ptr @__objc_personality_v0 diff --git a/clang/test/CodeGenObjCXX/personality.mm b/clang/test/CodeGenObjCXX/personality.mm index b2481987153d84..c6debe6f60c2a2 100644 --- a/clang/test/CodeGenObjCXX/personality.mm +++ b/clang/test/CodeGenObjCXX/personality.mm @@ -1,65 +1,65 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SEH +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH +// RUN: %clang_cc1 -triple i686-unknown-linux-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC +// RUN: %clang_cc1 -triple i686-unknown-windows-msvc -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-WIN-MSVC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH -// RUN: %clang_cc1 -no-opaque-pointers -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx-fragile -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-MACOSX-FRAGILE-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=macosx -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=ios -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=watchos -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-NS +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep-1.7 -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP-1_7 +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gnustep -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GNUSTEP +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=gcc -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-GCC-SJLJ +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=dwarf -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=seh -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SEH +// RUN: %clang_cc1 -triple i686-unknown-windows-gnu -fexceptions -exception-model=sjlj -fobjc-exceptions -fcxx-exceptions -fobjc-runtime=objfw -S -emit-llvm %s -o - | FileCheck %s -check-prefix CHECK-OBJFW-SJLJ void g(void); @@ -67,20 +67,20 @@ @interface use + (void)e:(id)xception; @end -// CHECK-MACOSX-FRAGILE: personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) -// CHECK-MACOSX-FRAGILE-SEH: personality i8* bitcast (i32 (...)* @__gxx_personality_seh0 to i8*) -// CHECK-MACOSX-FRAGILE-SJLJ: personality i8* bitcast (i32 (...)* @__gxx_personality_sj0 to i8*) -// CHECK-NS: personality i8* bitcast (i32 (...)* @__objc_personality_v0 to i8*) -// CHECK-GNUSTEP-1_7: personality i8* bitcast (i32 (...)* @__gnustep_objcxx_personality_v0 to i8*) -// CHECK-GNUSTEP: personality i8* bitcast (i32 (...)* @__gnustep_objcxx_personality_v0 to i8*) -// CHECK-GCC: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-GCC-SEH: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_seh0 to i8*) -// CHECK-GCC-SJLJ: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*) -// CHECK-OBJFW: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_v0 to i8*) -// CHECK-OBJFW-SEH: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_seh0 to i8*) -// CHECK-OBJFW-SJLJ: personality i8* bitcast (i32 (...)* @__gnu_objc_personality_sj0 to i8*) +// CHECK-MACOSX-FRAGILE: personality ptr @__gxx_personality_v0 +// CHECK-MACOSX-FRAGILE-SEH: personality ptr @__gxx_personality_seh0 +// CHECK-MACOSX-FRAGILE-SJLJ: personality ptr @__gxx_personality_sj0 +// CHECK-NS: personality ptr @__objc_personality_v0 +// CHECK-GNUSTEP-1_7: personality ptr @__gnustep_objcxx_personality_v0 +// CHECK-GNUSTEP: personality ptr @__gnustep_objcxx_personality_v0 +// CHECK-GCC: personality ptr @__gnu_objc_personality_v0 +// CHECK-GCC-SEH: personality ptr @__gnu_objc_personality_seh0 +// CHECK-GCC-SJLJ: personality ptr @__gnu_objc_personality_sj0 +// CHECK-OBJFW: personality ptr @__gnu_objc_personality_v0 +// CHECK-OBJFW-SEH: personality ptr @__gnu_objc_personality_seh0 +// CHECK-OBJFW-SJLJ: personality ptr @__gnu_objc_personality_sj0 -// CHECK-WIN-MSVC: personality i8* bitcast (i32 (...)* @__CxxFrameHandler3 to i8*) +// CHECK-WIN-MSVC: personality ptr @__CxxFrameHandler3 void f(void) { @try { @@ -91,8 +91,8 @@ void f(void) { } #if defined(__SEH_EXCEPTIONS__) -// CHECK-WIN-SEH-X86: personality i8* bitcast (i32 (...)* @_except_handler3 to i8*) -// CHECK-WIN-SEH-X64: personality i8* bitcast (i32 (...)* @__C_specific_handler to i8*) +// CHECK-WIN-SEH-X86: personality ptr @_except_handler3 +// CHECK-WIN-SEH-X64: personality ptr @__C_specific_handler void h(void) { __try { diff --git a/clang/test/CodeGenObjCXX/property-lvalue-capture.mm b/clang/test/CodeGenObjCXX/property-lvalue-capture.mm index cbbb6f5b42b0b3..76c218bcff05d9 100644 --- a/clang/test/CodeGenObjCXX/property-lvalue-capture.mm +++ b/clang/test/CodeGenObjCXX/property-lvalue-capture.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -emit-llvm -o - %s | FileCheck %s // rdar://15118128 template struct Quad2 { @@ -24,12 +24,10 @@ - (void)transformFrame:(PAGeometryFrame *)frame { } @end -// CHECK: [[OBJ:%.*]] = bitcast [[ONET:%.*]]* [[ONE:%.*]] to i8* -// CHECK: [[SEL:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load ![[MD_NUM:[0-9]+]] -// CHECK: [[CALL:%.*]] = call noundef nonnull align 1 %struct.Quad2* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to %struct.Quad2* (i8*, i8*)*)(i8* noundef [[OBJ]], i8* noundef [[SEL]]) -// CHECK: [[OBJ2:%.*]] = bitcast [[ONET]]* [[ZERO:%.*]] to i8* -// CHECK: [[SEL2:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.2, align 8, !invariant.load ![[MD_NUM]] -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.Quad2*)*)(i8* noundef [[OBJ2]], i8* noundef [[SEL2]], %struct.Quad2* noundef nonnull align 1 [[CALL]]) +// CHECK: [[SEL:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_, align 8, !invariant.load ![[MD_NUM:[0-9]+]] +// CHECK: [[CALL:%.*]] = call noundef nonnull align 1 ptr @objc_msgSend(ptr noundef [[ONE:%.*]], ptr noundef [[SEL]]) +// CHECK: [[SEL2:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_.2, align 8, !invariant.load ![[MD_NUM]] +// CHECK: call void @objc_msgSend(ptr noundef [[ZERO:%.*]], ptr noundef [[SEL2]], ptr noundef nonnull align 1 [[CALL]]) struct A { @@ -46,8 +44,7 @@ void test(C *c, const A &a) { const A &result = c.prop = a; } -// CHECK: [[ONE1:%.*]] = load %struct.A*, %struct.A** [[AADDR:%.*]], align 8 -// CHECK: [[OBJ3:%.*]] = bitcast [[TWOT:%.*]]* [[ZERO1:%.*]] to i8* -// CHECK: [[SEL3:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_.5, align 8, !invariant.load ![[MD_NUM]] -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, %struct.A*)*)(i8* noundef [[OBJ3]], i8* noundef [[SEL3]], %struct.A* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[ONE1]]) -// CHECK: store %struct.A* [[ONE1]], %struct.A** [[RESULT:%.*]], align 8 +// CHECK: [[ONE1:%.*]] = load ptr, ptr [[AADDR:%.*]], align 8 +// CHECK: [[SEL3:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_.5, align 8, !invariant.load ![[MD_NUM]] +// CHECK: call void @objc_msgSend(ptr noundef [[ZERO1:%.*]], ptr noundef [[SEL3]], ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[ONE1]]) +// CHECK: store ptr [[ONE1]], ptr [[RESULT:%.*]], align 8 diff --git a/clang/test/CodeGenObjCXX/property-object-reference-2.mm b/clang/test/CodeGenObjCXX/property-object-reference-2.mm index 19d1806fb8a69b..a29d11466fdb8e 100644 --- a/clang/test/CodeGenObjCXX/property-object-reference-2.mm +++ b/clang/test/CodeGenObjCXX/property-object-reference-2.mm @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.7 -emit-llvm -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers %s -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-1.7 -emit-llvm -o - | FileCheck -check-prefix=CHECK-GNUSTEP %s +// RUN: %clang_cc1 %s -triple x86_64-apple-darwin10 -fobjc-runtime=macosx-10.7 -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 %s -triple x86_64-unknown-freebsd -fobjc-runtime=gnustep-1.7 -emit-llvm -o - | FileCheck -check-prefix=CHECK-GNUSTEP %s // rdar://6137845 extern int DEFAULT(); @@ -29,31 +29,25 @@ @implementation MyDocument @synthesize MyProperty1 = _cppObject1; @end -// CHECK-LABEL: define internal void @__copy_helper_atomic_property_(%struct.TCPPObject* noundef %0, %struct.TCPPObject* noundef %1) # -// CHECK: [[TWO:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR:%.*]], align 8 -// CHECK: [[THREE:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR1:%.*]], align 8 +// CHECK-LABEL: define internal void @__copy_helper_atomic_property_(ptr noundef %0, ptr noundef %1) # +// CHECK: [[TWO:%.*]] = load ptr, ptr [[ADDR:%.*]], align 8 +// CHECK: [[THREE:%.*]] = load ptr, ptr [[ADDR1:%.*]], align 8 // CHECK: [[CALL:%.*]] = call noundef i32 @_Z7DEFAULTv() -// CHECK: call void @_ZN10TCPPObjectC1ERKS_i(%struct.TCPPObject* {{[^,]*}} [[TWO]], %struct.TCPPObject* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]], i32 noundef [[CALL]]) +// CHECK: call void @_ZN10TCPPObjectC1ERKS_i(ptr {{[^,]*}} [[TWO]], ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]], i32 noundef [[CALL]]) // CHECK: ret void // CHECK: define internal void @"\01-[MyDocument MyProperty]"( -// CHECK: [[ONE:%.*]] = bitcast i8* [[ADDPTR:%.*]] to %struct.TCPPObject* -// CHECK: [[TWO:%.*]] = bitcast %struct.TCPPObject* [[ONE]] to i8* -// CHECK: [[THREE:%.*]] = bitcast %struct.TCPPObject* [[AGGRESULT:%.*]] to i8* -// CHECK: call void @objc_copyCppObjectAtomic(i8* noundef [[THREE]], i8* noundef [[TWO]], i8* noundef bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__copy_helper_atomic_property_ to i8*)) +// CHECK: call void @objc_copyCppObjectAtomic(ptr noundef [[AGGRESULT:%.*]], ptr noundef [[ADDPTR:%.*]], ptr noundef @__copy_helper_atomic_property_) // CHECK: ret void -// CHECK-LABEL: define internal void @__assign_helper_atomic_property_(%struct.TCPPObject* noundef %0, %struct.TCPPObject* noundef %1) # -// CHECK: [[THREE:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR1:%.*]], align 8 -// CHECK: [[TWO:%.*]] = load %struct.TCPPObject*, %struct.TCPPObject** [[ADDR:%.*]], align 8 -// CHECK: [[CALL:%.*]] = call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %struct.TCPPObject* @_ZN10TCPPObjectaSERKS_(%struct.TCPPObject* {{[^,]*}} [[TWO]], %struct.TCPPObject* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]]) +// CHECK-LABEL: define internal void @__assign_helper_atomic_property_(ptr noundef %0, ptr noundef %1) # +// CHECK: [[THREE:%.*]] = load ptr, ptr [[ADDR1:%.*]], align 8 +// CHECK: [[TWO:%.*]] = load ptr, ptr [[ADDR:%.*]], align 8 +// CHECK: [[CALL:%.*]] = call noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) ptr @_ZN10TCPPObjectaSERKS_(ptr {{[^,]*}} [[TWO]], ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) [[THREE]]) // CHECK: ret void // CHECK: define internal void @"\01-[MyDocument setMyProperty:]"( -// CHECK: [[ONE:%.*]] = bitcast i8* [[ADDRPTR:%.*]] to %struct.TCPPObject* -// CHECK: [[TWO:%.*]] = bitcast %struct.TCPPObject* [[ONE]] to i8* -// CHECK: [[THREE:%.*]] = bitcast %struct.TCPPObject* [[MYPROPERTY:%.*]] to i8* -// CHECK: call void @objc_copyCppObjectAtomic(i8* noundef [[TWO]], i8* noundef [[THREE]], i8* noundef bitcast (void (%struct.TCPPObject*, %struct.TCPPObject*)* @__assign_helper_atomic_property_ to i8*)) +// CHECK: call void @objc_copyCppObjectAtomic(ptr noundef [[ADDRPTR:%.*]], ptr noundef [[MYPROPERTY:%.*]], ptr noundef @__assign_helper_atomic_property_) // CHECK: ret void // CHECK-GNUSTEP: objc_getCppObjectAtomic diff --git a/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm b/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm index 32206c159a24a1..6d9c617ac41937 100644 --- a/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm +++ b/clang/test/CodeGenObjCXX/synthesized-property-cleanup.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple arm64e-apple-ios13.0 -debug-info-kind=standalone -fobjc-arc -fsanitize=nullability-return \ +// RUN: %clang_cc1 -triple arm64e-apple-ios13.0 -debug-info-kind=standalone -fobjc-arc -fsanitize=nullability-return \ // RUN: %s -emit-llvm -o - | FileCheck %s @interface NSObject @@ -10,7 +10,7 @@ @interface NSString : NSObject // CHECK: define {{.*}}@"\01-[MyData setData:]" // CHECK: [[DATA:%.*]] = alloca %struct.Data -// CHECK: call noundef %struct.Data* @_ZN4DataD1Ev(%struct.Data* {{[^,]*}} [[DATA]]){{.*}}, !dbg [[DATA_PROPERTY_LOC:![0-9]+]] +// CHECK: call noundef ptr @_ZN4DataD1Ev(ptr {{[^,]*}} [[DATA]]){{.*}}, !dbg [[DATA_PROPERTY_LOC:![0-9]+]] // CHECK-NEXT: ret void // CHECK: define {{.*}}@"\01-[MyData string]" diff --git a/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm b/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm index 93da391c8f7c1e..3a4bb81cfc4c43 100644 --- a/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm +++ b/clang/test/CodeGenObjCXX/ubsan-nullability-return-notypeloc.mm @@ -1,10 +1,10 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fsanitize=nullability-return -emit-llvm %s -o - -triple x86_64-apple-macosx10.10.0 | FileCheck %s +// RUN: %clang_cc1 -fsanitize=nullability-return -emit-llvm %s -o - -triple x86_64-apple-macosx10.10.0 | FileCheck %s // CHECK: [[ATTR_LOC:@[0-9]+]] = {{.*}} global { {{.*}} i32 15, i32 38 -// CHECK-LABEL: define{{.*}} i8* @_Z3foov() -// CHECK: [[CALL:%.*]] = call noundef i8* @_Z6helperv() -// CHECK: icmp ne i8* [[CALL]] +// CHECK-LABEL: define{{.*}} ptr @_Z3foov() +// CHECK: [[CALL:%.*]] = call noundef ptr @_Z6helperv() +// CHECK: icmp ne ptr [[CALL]] // CHECK: call void @__ubsan_handle_nullability_return_v1_abort({{.*}}[[ATTR_LOC]] struct S { diff --git a/clang/test/CodeGenObjCXX/unknown-anytype.mm b/clang/test/CodeGenObjCXX/unknown-anytype.mm index dee93c6fe1a6a3..71b49e38c0da00 100644 --- a/clang/test/CodeGenObjCXX/unknown-anytype.mm +++ b/clang/test/CodeGenObjCXX/unknown-anytype.mm @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fdebugger-support -funknown-anytype -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fdebugger-support -funknown-anytype -emit-llvm -o - %s | FileCheck %s // rdar://13025708 @@ -7,7 +7,7 @@ void test0(A *a) { (void) [a test0: (float) 2.0]; } // CHECK-LABEL: define{{.*}} void @_Z5test0P1A( -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float)*)( +// CHECK: call void @objc_msgSend( @interface B - (void) test1: (__unknown_anytype) x; @@ -16,5 +16,5 @@ void test1(B *b) { (void) [b test1: (float) 2.0]; } // CHECK-LABEL: define{{.*}} void @_Z5test1P1B( -// CHECK: call void bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to void (i8*, i8*, float)*)( +// CHECK: call void @objc_msgSend( diff --git a/clang/test/CodeGenOpenCL/backend-unsupported-warning.ll b/clang/test/CodeGenOpenCL/backend-unsupported-warning.ll index 597fe94885e34b..8d253c76e4a83d 100644 --- a/clang/test/CodeGenOpenCL/backend-unsupported-warning.ll +++ b/clang/test/CodeGenOpenCL/backend-unsupported-warning.ll @@ -11,7 +11,7 @@ target triple = "amdgcn-amd-amdhsa" @lds = external addrspace(3) global i32, align 4 define i32 @use_lds_global_in_func() !dbg !5 { - %load = load i32, i32 addrspace(3)* @lds, !dbg !9 + %load = load i32, ptr addrspace(3) @lds, !dbg !9 ret i32 %load, !dbg !10 } diff --git a/clang/test/CodeGenOpenCLCXX/address-space-castoperators.cpp b/clang/test/CodeGenOpenCLCXX/address-space-castoperators.cpp index 093309e3d55fe4..4aaa05e2606496 100644 --- a/clang/test/CodeGenOpenCLCXX/address-space-castoperators.cpp +++ b/clang/test/CodeGenOpenCLCXX/address-space-castoperators.cpp @@ -1,13 +1,13 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s +// RUN: %clang_cc1 %s -triple spir-unknown-unknown -cl-std=clc++ -emit-llvm -O0 -o - | FileCheck %s void test_reinterpret_cast(){ __private float x; __private float& y = x; // We don't need bitcast to cast pointer type and // address space at the same time. -//CHECK: addrspacecast float* %x to i32 addrspace(4)* -//CHECK: [[REG:%[0-9]+]] = load float*, float** %y -//CHECK: addrspacecast float* [[REG]] to i32 addrspace(4)* +//CHECK: addrspacecast ptr %x to ptr addrspace(4) +//CHECK: [[REG:%[0-9]+]] = load ptr, ptr %y +//CHECK: addrspacecast ptr [[REG]] to ptr addrspace(4) //CHECK-NOT: bitcast __generic int& rc1 = reinterpret_cast<__generic int&>(x); __generic int& rc2 = reinterpret_cast<__generic int&>(y); diff --git a/clang/test/CodeGenSYCL/address-space-conversions.cpp b/clang/test/CodeGenSYCL/address-space-conversions.cpp index dd9f53cf7f4958..3933ad375412da 100644 --- a/clang/test/CodeGenSYCL/address-space-conversions.cpp +++ b/clang/test/CodeGenSYCL/address-space-conversions.cpp @@ -1,138 +1,138 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s void bar(int &Data) {} -// CHECK-DAG: define{{.*}} spir_func void @[[RAW_REF:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef align 4 dereferenceable(4) % +// CHECK-DAG: define{{.*}} spir_func void @[[RAW_REF:[a-zA-Z0-9_]+]](ptr addrspace(4) noundef align 4 dereferenceable(4) % void bar2(int &Data) {} -// CHECK-DAG: define{{.*}} spir_func void @[[RAW_REF2:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef align 4 dereferenceable(4) % +// CHECK-DAG: define{{.*}} spir_func void @[[RAW_REF2:[a-zA-Z0-9_]+]](ptr addrspace(4) noundef align 4 dereferenceable(4) % void bar(__attribute__((opencl_local)) int &Data) {} -// CHECK-DAG: define{{.*}} spir_func void [[LOC_REF:@[a-zA-Z0-9_]+]](i32 addrspace(3)* noundef align 4 dereferenceable(4) % +// CHECK-DAG: define{{.*}} spir_func void [[LOC_REF:@[a-zA-Z0-9_]+]](ptr addrspace(3) noundef align 4 dereferenceable(4) % void foo(int *Data) {} -// CHECK-DAG: define{{.*}} spir_func void @[[RAW_PTR:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef % +// CHECK-DAG: define{{.*}} spir_func void @[[RAW_PTR:[a-zA-Z0-9_]+]](ptr addrspace(4) noundef % void foo2(int *Data) {} -// CHECK-DAG: define{{.*}} spir_func void @[[RAW_PTR2:[a-zA-Z0-9_]+]](i32 addrspace(4)* noundef % +// CHECK-DAG: define{{.*}} spir_func void @[[RAW_PTR2:[a-zA-Z0-9_]+]](ptr addrspace(4) noundef % void foo(__attribute__((opencl_local)) int *Data) {} -// CHECK-DAG: define{{.*}} spir_func void [[LOC_PTR:@[a-zA-Z0-9_]+]](i32 addrspace(3)* noundef % +// CHECK-DAG: define{{.*}} spir_func void [[LOC_PTR:@[a-zA-Z0-9_]+]](ptr addrspace(3) noundef % template void tmpl(T t) {} // See Check Lines below. void usages() { - // CHECK-DAG: [[GLOB:%[a-zA-Z0-9]+]] = alloca i32 addrspace(1)* - // CHECK-DAG: [[GLOB]].ascast = addrspacecast i32 addrspace(1)** [[GLOB]] to i32 addrspace(1)* addrspace(4)* + // CHECK-DAG: [[GLOB:%[a-zA-Z0-9]+]] = alloca ptr addrspace(1) + // CHECK-DAG: [[GLOB]].ascast = addrspacecast ptr [[GLOB]] to ptr addrspace(4) __attribute__((opencl_global)) int *GLOB; - // CHECK-DAG: [[LOC:%[a-zA-Z0-9]+]] = alloca i32 addrspace(3)* - // CHECK-DAG: [[LOC]].ascast = addrspacecast i32 addrspace(3)** [[LOC]] to i32 addrspace(3)* addrspace(4)* + // CHECK-DAG: [[LOC:%[a-zA-Z0-9]+]] = alloca ptr addrspace(3) + // CHECK-DAG: [[LOC]].ascast = addrspacecast ptr [[LOC]] to ptr addrspace(4) __attribute__((opencl_local)) int *LOC; - // CHECK-DAG: [[NoAS:%[a-zA-Z0-9]+]] = alloca i32 addrspace(4)* - // CHECK-DAG: [[NoAS]].ascast = addrspacecast i32 addrspace(4)** [[NoAS]] to i32 addrspace(4)* addrspace(4)* + // CHECK-DAG: [[NoAS:%[a-zA-Z0-9]+]] = alloca ptr addrspace(4) + // CHECK-DAG: [[NoAS]].ascast = addrspacecast ptr [[NoAS]] to ptr addrspace(4) int *NoAS; - // CHECK-DAG: [[PRIV:%[a-zA-Z0-9]+]] = alloca i32* - // CHECK-DAG: [[PRIV]].ascast = addrspacecast i32** [[PRIV]] to i32* addrspace(4)* + // CHECK-DAG: [[PRIV:%[a-zA-Z0-9]+]] = alloca ptr + // CHECK-DAG: [[PRIV]].ascast = addrspacecast ptr [[PRIV]] to ptr addrspace(4) __attribute__((opencl_private)) int *PRIV; - // CHECK-DAG: [[GLOB_DEVICE:%[a-zA-Z0-9]+]] = alloca i32 addrspace(5)* + // CHECK-DAG: [[GLOB_DEVICE:%[a-zA-Z0-9]+]] = alloca ptr addrspace(5) __attribute__((opencl_global_device)) int *GLOBDEVICE; - // CHECK-DAG: [[GLOB_HOST:%[a-zA-Z0-9]+]] = alloca i32 addrspace(6)* + // CHECK-DAG: [[GLOB_HOST:%[a-zA-Z0-9]+]] = alloca ptr addrspace(6) __attribute__((opencl_global_host)) int *GLOBHOST; // Explicit conversions // From named address spaces to default address space - // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: store i32 addrspace(4)* [[GLOB_CAST]], i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast + // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(1) [[GLOB_LOAD]] to ptr addrspace(4) + // CHECK-DAG: store ptr addrspace(4) [[GLOB_CAST]], ptr addrspace(4) [[NoAS]].ascast NoAS = (int *)GLOB; - // CHECK-DAG: [[LOC_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: [[LOC_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOC_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: store i32 addrspace(4)* [[LOC_CAST]], i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast + // CHECK-DAG: [[LOC_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: [[LOC_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(3) [[LOC_LOAD]] to ptr addrspace(4) + // CHECK-DAG: store ptr addrspace(4) [[LOC_CAST]], ptr addrspace(4) [[NoAS]].ascast NoAS = (int *)LOC; - // CHECK-DAG: [[PRIV_LOAD:%[a-zA-Z0-9]+]] = load i32*, i32* addrspace(4)* [[PRIV]].ascast - // CHECK-DAG: [[PRIV_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32* [[PRIV_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: store i32 addrspace(4)* [[PRIV_CAST]], i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast + // CHECK-DAG: [[PRIV_LOAD:%[a-zA-Z0-9]+]] = load ptr, ptr addrspace(4) [[PRIV]].ascast + // CHECK-DAG: [[PRIV_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr [[PRIV_LOAD]] to ptr addrspace(4) + // CHECK-DAG: store ptr addrspace(4) [[PRIV_CAST]], ptr addrspace(4) [[NoAS]].ascast NoAS = (int *)PRIV; // From default address space to named address space - // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(4)* [[NoAS_LOAD]] to i32 addrspace(1)* - // CHECK-DAG: store i32 addrspace(1)* [[NoAS_CAST]], i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast + // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(4) [[NoAS_LOAD]] to ptr addrspace(1) + // CHECK-DAG: store ptr addrspace(1) [[NoAS_CAST]], ptr addrspace(4) [[GLOB]].ascast GLOB = (__attribute__((opencl_global)) int *)NoAS; - // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(4)* [[NoAS_LOAD]] to i32 addrspace(3)* - // CHECK-DAG: store i32 addrspace(3)* [[NoAS_CAST]], i32 addrspace(3)* addrspace(4)* [[LOC]].ascast + // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(4) [[NoAS_LOAD]] to ptr addrspace(3) + // CHECK-DAG: store ptr addrspace(3) [[NoAS_CAST]], ptr addrspace(4) [[LOC]].ascast LOC = (__attribute__((opencl_local)) int *)NoAS; - // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(4)* [[NoAS_LOAD]] to i32* - // CHECK-DAG: store i32* [[NoAS_CAST]], i32* addrspace(4)* [[PRIV]].ascast + // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: [[NoAS_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(4) [[NoAS_LOAD]] to ptr + // CHECK-DAG: store ptr [[NoAS_CAST]], ptr addrspace(4) [[PRIV]].ascast PRIV = (__attribute__((opencl_private)) int *)NoAS; // From opencl_global_[host/device] address spaces to opencl_global - // CHECK-DAG: [[GLOBDEVICE_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(5)*, i32 addrspace(5)* addrspace(4)* [[GLOB_DEVICE]].ascast - // CHECK-DAG: [[GLOBDEVICE_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(5)* [[GLOBDEVICE_LOAD]] to i32 addrspace(1)* - // CHECK-DAG: store i32 addrspace(1)* [[GLOBDEVICE_CAST]], i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast + // CHECK-DAG: [[GLOBDEVICE_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(5), ptr addrspace(4) [[GLOB_DEVICE]].ascast + // CHECK-DAG: [[GLOBDEVICE_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(5) [[GLOBDEVICE_LOAD]] to ptr addrspace(1) + // CHECK-DAG: store ptr addrspace(1) [[GLOBDEVICE_CAST]], ptr addrspace(4) [[GLOB]].ascast GLOB = (__attribute__((opencl_global)) int *)GLOBDEVICE; - // CHECK-DAG: [[GLOBHOST_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(6)*, i32 addrspace(6)* addrspace(4)* [[GLOB_HOST]].ascast - // CHECK-DAG: [[GLOBHOST_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(6)* [[GLOBHOST_LOAD]] to i32 addrspace(1)* - // CHECK-DAG: store i32 addrspace(1)* [[GLOBHOST_CAST]], i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast + // CHECK-DAG: [[GLOBHOST_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(6), ptr addrspace(4) [[GLOB_HOST]].ascast + // CHECK-DAG: [[GLOBHOST_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(6) [[GLOBHOST_LOAD]] to ptr addrspace(1) + // CHECK-DAG: store ptr addrspace(1) [[GLOBHOST_CAST]], ptr addrspace(4) [[GLOB]].ascast GLOB = (__attribute__((opencl_global)) int *)GLOBHOST; bar(*GLOB); - // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOB_CAST]]) + // CHECK-DAG: [[GLOB_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: [[GLOB_CAST:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(1) [[GLOB_LOAD]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_REF]](ptr addrspace(4) noundef align 4 dereferenceable(4) [[GLOB_CAST]]) bar2(*GLOB); - // CHECK-DAG: [[GLOB_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: [[GLOB_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[GLOB_CAST2]]) + // CHECK-DAG: [[GLOB_LOAD2:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: [[GLOB_CAST2:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(1) [[GLOB_LOAD2]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_REF2]](ptr addrspace(4) noundef align 4 dereferenceable(4) [[GLOB_CAST2]]) bar(*LOC); - // CHECK-DAG: [[LOC_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: call spir_func void [[LOC_REF]](i32 addrspace(3)* noundef align 4 dereferenceable(4) [[LOC_LOAD]]) + // CHECK-DAG: [[LOC_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: call spir_func void [[LOC_REF]](ptr addrspace(3) noundef align 4 dereferenceable(4) [[LOC_LOAD]]) bar2(*LOC); - // CHECK-DAG: [[LOC_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: [[LOC_CAST2:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOC_LOAD2]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[LOC_CAST2]]) + // CHECK-DAG: [[LOC_LOAD2:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: [[LOC_CAST2:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(3) [[LOC_LOAD2]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_REF2]](ptr addrspace(4) noundef align 4 dereferenceable(4) [[LOC_CAST2]]) bar(*NoAS); - // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: call spir_func void @[[RAW_REF]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[NoAS_LOAD]]) + // CHECK-DAG: [[NoAS_LOAD:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: call spir_func void @[[RAW_REF]](ptr addrspace(4) noundef align 4 dereferenceable(4) [[NoAS_LOAD]]) bar2(*NoAS); - // CHECK-DAG: [[NoAS_LOAD2:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: call spir_func void @[[RAW_REF2]](i32 addrspace(4)* noundef align 4 dereferenceable(4) [[NoAS_LOAD2]]) + // CHECK-DAG: [[NoAS_LOAD2:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: call spir_func void @[[RAW_REF2]](ptr addrspace(4) noundef align 4 dereferenceable(4) [[NoAS_LOAD2]]) foo(GLOB); - // CHECK-DAG: [[GLOB_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: [[GLOB_CAST3:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD3]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[GLOB_CAST3]]) + // CHECK-DAG: [[GLOB_LOAD3:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: [[GLOB_CAST3:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(1) [[GLOB_LOAD3]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_PTR]](ptr addrspace(4) noundef [[GLOB_CAST3]]) foo2(GLOB); - // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: [[GLOB_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(1)* [[GLOB_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[GLOB_CAST4]]) + // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: [[GLOB_CAST4:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(1) [[GLOB_LOAD4]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_PTR2]](ptr addrspace(4) noundef [[GLOB_CAST4]]) foo(LOC); - // CHECK-DAG: [[LOC_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: call spir_func void [[LOC_PTR]](i32 addrspace(3)* noundef [[LOC_LOAD3]]) + // CHECK-DAG: [[LOC_LOAD3:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: call spir_func void [[LOC_PTR]](ptr addrspace(3) noundef [[LOC_LOAD3]]) foo2(LOC); - // CHECK-DAG: [[LOC_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: [[LOC_CAST4:%[a-zA-Z0-9]+]] = addrspacecast i32 addrspace(3)* [[LOC_LOAD4]] to i32 addrspace(4)* - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[LOC_CAST4]]) + // CHECK-DAG: [[LOC_LOAD4:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: [[LOC_CAST4:%[a-zA-Z0-9]+]] = addrspacecast ptr addrspace(3) [[LOC_LOAD4]] to ptr addrspace(4) + // CHECK-DAG: call spir_func void @[[RAW_PTR2]](ptr addrspace(4) noundef [[LOC_CAST4]]) foo(NoAS); - // CHECK-DAG: [[NoAS_LOAD3:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: call spir_func void @[[RAW_PTR]](i32 addrspace(4)* noundef [[NoAS_LOAD3]]) + // CHECK-DAG: [[NoAS_LOAD3:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: call spir_func void @[[RAW_PTR]](ptr addrspace(4) noundef [[NoAS_LOAD3]]) foo2(NoAS); - // CHECK-DAG: [[NoAS_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: call spir_func void @[[RAW_PTR2]](i32 addrspace(4)* noundef [[NoAS_LOAD4]]) + // CHECK-DAG: [[NoAS_LOAD4:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: call spir_func void @[[RAW_PTR2]](ptr addrspace(4) noundef [[NoAS_LOAD4]]) // Ensure that we still get 3 different template instantiations. tmpl(GLOB); - // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(4)* [[GLOB]].ascast - // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS1iEvT_(i32 addrspace(1)* noundef [[GLOB_LOAD4]]) + // CHECK-DAG: [[GLOB_LOAD4:%[a-zA-Z0-9]+]] = load ptr addrspace(1), ptr addrspace(4) [[GLOB]].ascast + // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS1iEvT_(ptr addrspace(1) noundef [[GLOB_LOAD4]]) tmpl(LOC); - // CHECK-DAG: [[LOC_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(3)*, i32 addrspace(3)* addrspace(4)* [[LOC]].ascast - // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS3iEvT_(i32 addrspace(3)* noundef [[LOC_LOAD5]]) + // CHECK-DAG: [[LOC_LOAD5:%[a-zA-Z0-9]+]] = load ptr addrspace(3), ptr addrspace(4) [[LOC]].ascast + // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS3iEvT_(ptr addrspace(3) noundef [[LOC_LOAD5]]) tmpl(PRIV); - // CHECK-DAG: [[PRIV_LOAD5:%[a-zA-Z0-9]+]] = load i32*, i32* addrspace(4)* [[PRIV]].ascast - // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS0iEvT_(i32* noundef [[PRIV_LOAD5]]) + // CHECK-DAG: [[PRIV_LOAD5:%[a-zA-Z0-9]+]] = load ptr, ptr addrspace(4) [[PRIV]].ascast + // CHECK-DAG: call spir_func void @_Z4tmplIPU3AS0iEvT_(ptr noundef [[PRIV_LOAD5]]) tmpl(NoAS); - // CHECK-DAG: [[NoAS_LOAD5:%[a-zA-Z0-9]+]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[NoAS]].ascast - // CHECK-DAG: call spir_func void @_Z4tmplIPiEvT_(i32 addrspace(4)* noundef [[NoAS_LOAD5]]) + // CHECK-DAG: [[NoAS_LOAD5:%[a-zA-Z0-9]+]] = load ptr addrspace(4), ptr addrspace(4) [[NoAS]].ascast + // CHECK-DAG: call spir_func void @_Z4tmplIPiEvT_(ptr addrspace(4) noundef [[NoAS_LOAD5]]) } -// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS1iEvT_(i32 addrspace(1)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS3iEvT_(i32 addrspace(3)* noundef % -// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS0iEvT_(i32* noundef % -// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPiEvT_(i32 addrspace(4)* noundef % +// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS1iEvT_(ptr addrspace(1) noundef % +// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS3iEvT_(ptr addrspace(3) noundef % +// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPU3AS0iEvT_(ptr noundef % +// CHECK-DAG: define linkonce_odr spir_func void @_Z4tmplIPiEvT_(ptr addrspace(4) noundef % diff --git a/clang/test/CodeGenSYCL/address-space-deduction.cpp b/clang/test/CodeGenSYCL/address-space-deduction.cpp index 730bcae4e4f79b..96075a47343fe9 100644 --- a/clang/test/CodeGenSYCL/address-space-deduction.cpp +++ b/clang/test/CodeGenSYCL/address-space-deduction.cpp @@ -1,90 +1,88 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s // CHECK-LABEL: @_Z4testv( // CHECK-NEXT: entry: // CHECK-NEXT: [[I:%.*]] = alloca i32, align 4 -// CHECK-NEXT: [[PPTR:%.*]] = alloca i32 addrspace(4)*, align 8 +// CHECK-NEXT: [[PPTR:%.*]] = alloca ptr addrspace(4), align 8 // CHECK-NEXT: [[IS_I_PTR:%.*]] = alloca i8, align 1 // CHECK-NEXT: [[VAR23:%.*]] = alloca i32, align 4 -// CHECK-NEXT: [[CP:%.*]] = alloca i8 addrspace(4)*, align 8 +// CHECK-NEXT: [[CP:%.*]] = alloca ptr addrspace(4), align 8 // CHECK-NEXT: [[ARR:%.*]] = alloca [42 x i32], align 4 -// CHECK-NEXT: [[CPP:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[APTR:%.*]] = alloca i32 addrspace(4)*, align 8 -// CHECK-NEXT: [[STR:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[PHI_STR:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[SELECT_NULL:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[SELECT_STR_TRIVIAL1:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[SELECT_STR_TRIVIAL2:%.*]] = alloca i8 addrspace(4)*, align 8 -// CHECK-NEXT: [[I_ASCAST:%.*]] = addrspacecast i32* [[I]] to i32 addrspace(4)* -// CHECK-NEXT: [[PPTR_ASCAST:%.*]] = addrspacecast i32 addrspace(4)** [[PPTR]] to i32 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[IS_I_PTR_ASCAST:%.*]] = addrspacecast i8* [[IS_I_PTR]] to i8 addrspace(4)* -// CHECK-NEXT: [[VAR23_ASCAST:%.*]] = addrspacecast i32* [[VAR23]] to i32 addrspace(4)* -// CHECK-NEXT: [[CP_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[CP]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[ARR_ASCAST:%.*]] = addrspacecast [42 x i32]* [[ARR]] to [42 x i32] addrspace(4)* -// CHECK-NEXT: [[CPP_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[CPP]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[APTR_ASCAST:%.*]] = addrspacecast i32 addrspace(4)** [[APTR]] to i32 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[STR_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[STR]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[PHI_STR_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[PHI_STR]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[SELECT_NULL_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[SELECT_NULL]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[SELECT_STR_TRIVIAL1_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[SELECT_STR_TRIVIAL1]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: [[SELECT_STR_TRIVIAL2_ASCAST:%.*]] = addrspacecast i8 addrspace(4)** [[SELECT_STR_TRIVIAL2]] to i8 addrspace(4)* addrspace(4)* -// CHECK-NEXT: store i32 0, i32 addrspace(4)* [[I_ASCAST]], align 4 -// CHECK-NEXT: store i32 addrspace(4)* [[I_ASCAST]], i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8 -// CHECK-NEXT: [[TMP0:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8 -// CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 addrspace(4)* [[TMP0]], [[I_ASCAST]] +// CHECK-NEXT: [[CPP:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[APTR:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[STR:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[PHI_STR:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[SELECT_NULL:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[SELECT_STR_TRIVIAL1:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[SELECT_STR_TRIVIAL2:%.*]] = alloca ptr addrspace(4), align 8 +// CHECK-NEXT: [[I_ASCAST:%.*]] = addrspacecast ptr [[I]] to ptr addrspace(4) +// CHECK-NEXT: [[PPTR_ASCAST:%.*]] = addrspacecast ptr [[PPTR]] to ptr addrspace(4) +// CHECK-NEXT: [[IS_I_PTR_ASCAST:%.*]] = addrspacecast ptr [[IS_I_PTR]] to ptr addrspace(4) +// CHECK-NEXT: [[VAR23_ASCAST:%.*]] = addrspacecast ptr [[VAR23]] to ptr addrspace(4) +// CHECK-NEXT: [[CP_ASCAST:%.*]] = addrspacecast ptr [[CP]] to ptr addrspace(4) +// CHECK-NEXT: [[ARR_ASCAST:%.*]] = addrspacecast ptr [[ARR]] to ptr addrspace(4) +// CHECK-NEXT: [[CPP_ASCAST:%.*]] = addrspacecast ptr [[CPP]] to ptr addrspace(4) +// CHECK-NEXT: [[APTR_ASCAST:%.*]] = addrspacecast ptr [[APTR]] to ptr addrspace(4) +// CHECK-NEXT: [[STR_ASCAST:%.*]] = addrspacecast ptr [[STR]] to ptr addrspace(4) +// CHECK-NEXT: [[PHI_STR_ASCAST:%.*]] = addrspacecast ptr [[PHI_STR]] to ptr addrspace(4) +// CHECK-NEXT: [[SELECT_NULL_ASCAST:%.*]] = addrspacecast ptr [[SELECT_NULL]] to ptr addrspace(4) +// CHECK-NEXT: [[SELECT_STR_TRIVIAL1_ASCAST:%.*]] = addrspacecast ptr [[SELECT_STR_TRIVIAL1]] to ptr addrspace(4) +// CHECK-NEXT: [[SELECT_STR_TRIVIAL2_ASCAST:%.*]] = addrspacecast ptr [[SELECT_STR_TRIVIAL2]] to ptr addrspace(4) +// CHECK-NEXT: store i32 0, ptr addrspace(4) [[I_ASCAST]], align 4 +// CHECK-NEXT: store ptr addrspace(4) [[I_ASCAST]], ptr addrspace(4) [[PPTR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[PPTR_ASCAST]], align 8 +// CHECK-NEXT: [[CMP:%.*]] = icmp eq ptr addrspace(4) [[TMP0]], [[I_ASCAST]] // CHECK-NEXT: [[FROMBOOL:%.*]] = zext i1 [[CMP]] to i8 -// CHECK-NEXT: store i8 [[FROMBOOL]], i8 addrspace(4)* [[IS_I_PTR_ASCAST]], align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[PPTR_ASCAST]], align 8 -// CHECK-NEXT: store i32 66, i32 addrspace(4)* [[TMP1]], align 4 -// CHECK-NEXT: store i32 23, i32 addrspace(4)* [[VAR23_ASCAST]], align 4 -// CHECK-NEXT: [[TMP2:%.*]] = bitcast i32 addrspace(4)* [[VAR23_ASCAST]] to i8 addrspace(4)* -// CHECK-NEXT: store i8 addrspace(4)* [[TMP2]], i8 addrspace(4)* addrspace(4)* [[CP_ASCAST]], align 8 -// CHECK-NEXT: [[TMP3:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[CP_ASCAST]], align 8 -// CHECK-NEXT: store i8 41, i8 addrspace(4)* [[TMP3]], align 1 -// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4)* [[ARR_ASCAST]], i64 0, i64 0 -// CHECK-NEXT: [[TMP4:%.*]] = bitcast i32 addrspace(4)* [[ARRAYDECAY]] to i8 addrspace(4)* -// CHECK-NEXT: store i8 addrspace(4)* [[TMP4]], i8 addrspace(4)* addrspace(4)* [[CPP_ASCAST]], align 8 -// CHECK-NEXT: [[TMP5:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[CPP_ASCAST]], align 8 -// CHECK-NEXT: store i8 43, i8 addrspace(4)* [[TMP5]], align 1 -// CHECK-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4)* [[ARR_ASCAST]], i64 0, i64 0 -// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, i32 addrspace(4)* [[ARRAYDECAY1]], i64 10 -// CHECK-NEXT: store i32 addrspace(4)* [[ADD_PTR]], i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8 -// CHECK-NEXT: [[TMP6:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8 -// CHECK-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [42 x i32], [42 x i32] addrspace(4)* [[ARR_ASCAST]], i64 0, i64 0 -// CHECK-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i32, i32 addrspace(4)* [[ARRAYDECAY2]], i64 168 -// CHECK-NEXT: [[CMP4:%.*]] = icmp ult i32 addrspace(4)* [[TMP6]], [[ADD_PTR3]] +// CHECK-NEXT: store i8 [[FROMBOOL]], ptr addrspace(4) [[IS_I_PTR_ASCAST]], align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[PPTR_ASCAST]], align 8 +// CHECK-NEXT: store i32 66, ptr addrspace(4) [[TMP1]], align 4 +// CHECK-NEXT: store i32 23, ptr addrspace(4) [[VAR23_ASCAST]], align 4 +// CHECK-NEXT: store ptr addrspace(4) [[VAR23_ASCAST]], ptr addrspace(4) [[CP_ASCAST]], align 8 +// CHECK-NEXT: [[TMP3:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[CP_ASCAST]], align 8 +// CHECK-NEXT: store i8 41, ptr addrspace(4) [[TMP3]], align 1 +// CHECK-NEXT: [[ARRAYDECAY:%.*]] = getelementptr inbounds [42 x i32], ptr addrspace(4) [[ARR_ASCAST]], i64 0, i64 0 +// CHECK-NEXT: store ptr addrspace(4) [[ARRAYDECAY]], ptr addrspace(4) [[CPP_ASCAST]], align 8 +// CHECK-NEXT: [[TMP5:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[CPP_ASCAST]], align 8 +// CHECK-NEXT: store i8 43, ptr addrspace(4) [[TMP5]], align 1 +// CHECK-NEXT: [[ARRAYDECAY1:%.*]] = getelementptr inbounds [42 x i32], ptr addrspace(4) [[ARR_ASCAST]], i64 0, i64 0 +// CHECK-NEXT: [[ADD_PTR:%.*]] = getelementptr inbounds i32, ptr addrspace(4) [[ARRAYDECAY1]], i64 10 +// CHECK-NEXT: store ptr addrspace(4) [[ADD_PTR]], ptr addrspace(4) [[APTR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP6:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[APTR_ASCAST]], align 8 +// CHECK-NEXT: [[ARRAYDECAY2:%.*]] = getelementptr inbounds [42 x i32], ptr addrspace(4) [[ARR_ASCAST]], i64 0, i64 0 +// CHECK-NEXT: [[ADD_PTR3:%.*]] = getelementptr inbounds i32, ptr addrspace(4) [[ARRAYDECAY2]], i64 168 +// CHECK-NEXT: [[CMP4:%.*]] = icmp ult ptr addrspace(4) [[TMP6]], [[ADD_PTR3]] // CHECK-NEXT: br i1 [[CMP4]], label [[IF_THEN:%.*]], label [[IF_END:%.*]] // CHECK: if.then: -// CHECK-NEXT: [[TMP7:%.*]] = load i32 addrspace(4)*, i32 addrspace(4)* addrspace(4)* [[APTR_ASCAST]], align 8 -// CHECK-NEXT: store i32 44, i32 addrspace(4)* [[TMP7]], align 4 +// CHECK-NEXT: [[TMP7:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[APTR_ASCAST]], align 8 +// CHECK-NEXT: store i32 44, ptr addrspace(4) [[TMP7]], align 4 // CHECK-NEXT: br label [[IF_END]] // CHECK: if.end: -// CHECK-NEXT: store i8 addrspace(4)* getelementptr inbounds ([14 x i8], [14 x i8] addrspace(4)* addrspacecast ([14 x i8] addrspace(1)* @.str to [14 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8 -// CHECK-NEXT: [[TMP8:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8 -// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, i8 addrspace(4)* [[TMP8]], i64 0 -// CHECK-NEXT: [[TMP9:%.*]] = load i8, i8 addrspace(4)* [[ARRAYIDX]], align 1 +// CHECK-NEXT: store ptr addrspace(4) addrspacecast (ptr addrspace(1) @.str to ptr addrspace(4)), ptr addrspace(4) [[STR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP8:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[STR_ASCAST]], align 8 +// CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i8, ptr addrspace(4) [[TMP8]], i64 0 +// CHECK-NEXT: [[TMP9:%.*]] = load i8, ptr addrspace(4) [[ARRAYIDX]], align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP9]] to i32 -// CHECK-NEXT: store i32 [[CONV]], i32 addrspace(4)* [[I_ASCAST]], align 4 -// CHECK-NEXT: [[TMP10:%.*]] = load i32, i32 addrspace(4)* [[I_ASCAST]], align 4 +// CHECK-NEXT: store i32 [[CONV]], ptr addrspace(4) [[I_ASCAST]], align 4 +// CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr addrspace(4) [[I_ASCAST]], align 4 // CHECK-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], 2 // CHECK-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]] // CHECK: cond.true: -// CHECK-NEXT: [[TMP11:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP11:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[STR_ASCAST]], align 8 // CHECK-NEXT: br label [[COND_END:%.*]] // CHECK: cond.false: // CHECK-NEXT: br label [[COND_END]] // CHECK: cond.end: -// CHECK-NEXT: [[COND:%.*]] = phi i8 addrspace(4)* [ [[TMP11]], [[COND_TRUE]] ], [ getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @.str.1 to [21 x i8] addrspace(4)*), i64 0, i64 0), [[COND_FALSE]] ] -// CHECK-NEXT: store i8 addrspace(4)* [[COND]], i8 addrspace(4)* addrspace(4)* [[PHI_STR_ASCAST]], align 8 -// CHECK-NEXT: [[TMP12:%.*]] = load i32, i32 addrspace(4)* [[I_ASCAST]], align 4 +// CHECK-NEXT: [[COND:%.*]] = phi ptr addrspace(4) [ [[TMP11]], [[COND_TRUE]] ], [ addrspacecast (ptr addrspace(1) @.str.1 to ptr addrspace(4)), [[COND_FALSE]] ] +// CHECK-NEXT: store ptr addrspace(4) [[COND]], ptr addrspace(4) [[PHI_STR_ASCAST]], align 8 +// CHECK-NEXT: [[TMP12:%.*]] = load i32, ptr addrspace(4) [[I_ASCAST]], align 4 // CHECK-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP12]], 2 // CHECK-NEXT: [[TMP13:%.*]] = zext i1 [[CMP6]] to i64 -// CHECK-NEXT: [[COND7:%.*]] = select i1 [[CMP6]], i8 addrspace(4)* getelementptr inbounds ([24 x i8], [24 x i8] addrspace(4)* addrspacecast ([24 x i8] addrspace(1)* @.str.2 to [24 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* null -// CHECK-NEXT: store i8 addrspace(4)* [[COND7]], i8 addrspace(4)* addrspace(4)* [[SELECT_NULL_ASCAST]], align 8 -// CHECK-NEXT: [[TMP14:%.*]] = load i8 addrspace(4)*, i8 addrspace(4)* addrspace(4)* [[STR_ASCAST]], align 8 -// CHECK-NEXT: store i8 addrspace(4)* [[TMP14]], i8 addrspace(4)* addrspace(4)* [[SELECT_STR_TRIVIAL1_ASCAST]], align 8 -// CHECK-NEXT: store i8 addrspace(4)* getelementptr inbounds ([21 x i8], [21 x i8] addrspace(4)* addrspacecast ([21 x i8] addrspace(1)* @.str.1 to [21 x i8] addrspace(4)*), i64 0, i64 0), i8 addrspace(4)* addrspace(4)* [[SELECT_STR_TRIVIAL2_ASCAST]], align 8 +// CHECK-NEXT: [[COND7:%.*]] = select i1 [[CMP6]], ptr addrspace(4) addrspacecast (ptr addrspace(1) @.str.2 to ptr addrspace(4)), ptr addrspace(4) null +// CHECK-NEXT: store ptr addrspace(4) [[COND7]], ptr addrspace(4) [[SELECT_NULL_ASCAST]], align 8 +// CHECK-NEXT: [[TMP14:%.*]] = load ptr addrspace(4), ptr addrspace(4) [[STR_ASCAST]], align 8 +// CHECK-NEXT: store ptr addrspace(4) [[TMP14]], ptr addrspace(4) [[SELECT_STR_TRIVIAL1_ASCAST]], align 8 +// CHECK-NEXT: store ptr addrspace(4) addrspacecast (ptr addrspace(1) @.str.1 to ptr addrspace(4)), ptr addrspace(4) [[SELECT_STR_TRIVIAL2_ASCAST]], align 8 // CHECK-NEXT: ret void // void test() { diff --git a/clang/test/CodeGenSYCL/address-space-mangling.cpp b/clang/test/CodeGenSYCL/address-space-mangling.cpp index be0e1edff6bd0b..868bf8ccbdcf87 100644 --- a/clang/test/CodeGenSYCL/address-space-mangling.cpp +++ b/clang/test/CodeGenSYCL/address-space-mangling.cpp @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s --check-prefix=SPIR -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s --check-prefix=X86 +// RUN: %clang_cc1 -triple spir64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s --check-prefix=SPIR +// RUN: %clang_cc1 -triple x86_64 -fsycl-is-device -disable-llvm-passes -emit-llvm %s -o - | FileCheck %s --check-prefix=X86 // REQUIRES: x86-registered-target @@ -8,15 +8,15 @@ void foo(__attribute__((opencl_local)) int *); void foo(__attribute__((opencl_private)) int *); void foo(int *); -// SPIR: declare spir_func void @_Z3fooPU3AS1i(i32 addrspace(1)* noundef) #1 -// SPIR: declare spir_func void @_Z3fooPU3AS3i(i32 addrspace(3)* noundef) #1 -// SPIR: declare spir_func void @_Z3fooPU3AS0i(i32* noundef) #1 -// SPIR: declare spir_func void @_Z3fooPi(i32 addrspace(4)* noundef) #1 +// SPIR: declare spir_func void @_Z3fooPU3AS1i(ptr addrspace(1) noundef) #1 +// SPIR: declare spir_func void @_Z3fooPU3AS3i(ptr addrspace(3) noundef) #1 +// SPIR: declare spir_func void @_Z3fooPU3AS0i(ptr noundef) #1 +// SPIR: declare spir_func void @_Z3fooPi(ptr addrspace(4) noundef) #1 -// X86: declare void @_Z3fooPU8SYglobali(i32* noundef) #1 -// X86: declare void @_Z3fooPU7SYlocali(i32* noundef) #1 -// X86: declare void @_Z3fooPU9SYprivatei(i32* noundef) #1 -// X86: declare void @_Z3fooPi(i32* noundef) #1 +// X86: declare void @_Z3fooPU8SYglobali(ptr noundef) #1 +// X86: declare void @_Z3fooPU7SYlocali(ptr noundef) #1 +// X86: declare void @_Z3fooPU9SYprivatei(ptr noundef) #1 +// X86: declare void @_Z3fooPi(ptr noundef) #1 void test() { __attribute__((opencl_global)) int *glob; diff --git a/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp b/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp index 44a574a546fb0d..361ce0abb1044a 100644 --- a/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp +++ b/clang/test/CodeGenSYCL/debug-info-kernel-variables.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers %s -o - -O0 -emit-llvm \ +// RUN: %clang_cc1 %s -o - -O0 -emit-llvm \ // RUN: -triple spir64-unknown-unknown \ // RUN: -aux-triple x86_64-unknown-linux-gnu \ // RUN: -fsycl-is-device \ @@ -35,12 +35,12 @@ int my_host() { // CHECK: %my_param.addr = alloca i32, align 4 // CHECK: %my_local = alloca i32, align 4 // CHECK: call void @llvm.dbg.declare( -// CHECK-SAME: metadata i32* %my_param.addr, +// CHECK-SAME: metadata ptr %my_param.addr, // CHECK-SAME: metadata [[MY_PARAM:![0-9]+]], // CHECK-SAME: metadata !DIExpression(DW_OP_constu, 4, DW_OP_swap, DW_OP_xderef) // CHECK-SAME: ) // CHECK: call void @llvm.dbg.declare( -// CHECK-SAME: metadata i32* %my_local, +// CHECK-SAME: metadata ptr %my_local, // CHECK-SAME: metadata [[MY_LOCAL:![0-9]+]], // CHECK-SAME: metadata !DIExpression(DW_OP_constu, 4, DW_OP_swap, DW_OP_xderef) // CHECK-SAME: ) diff --git a/clang/test/CodeGenSYCL/functionptr-addrspace.cpp b/clang/test/CodeGenSYCL/functionptr-addrspace.cpp index 6fc25427944721..340caa1e62c593 100644 --- a/clang/test/CodeGenSYCL/functionptr-addrspace.cpp +++ b/clang/test/CodeGenSYCL/functionptr-addrspace.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -fsycl-is-device -emit-llvm -triple spir64 -verify -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -fsycl-is-device -emit-llvm -triple spir64 -verify -emit-llvm %s -o - | FileCheck %s // expected-no-diagnostics @@ -7,7 +7,7 @@ __attribute__((sycl_kernel)) void kernel_single_task(const Func &kernelFunc) { kernelFunc(); } -// CHECK: define dso_local spir_func{{.*}}invoke_function{{.*}}(i32 ()* noundef %fptr, i32 addrspace(4)* noundef %ptr) +// CHECK: define dso_local spir_func{{.*}}invoke_function{{.*}}(ptr noundef %fptr, ptr addrspace(4) noundef %ptr) void invoke_function(int (*fptr)(), int *ptr) {} int f() { return 0; } diff --git a/clang/test/Coverage/codegen-gnu.m b/clang/test/Coverage/codegen-gnu.m index 10be6fbabca272..67f99064a6ab4e 100644 --- a/clang/test/Coverage/codegen-gnu.m +++ b/clang/test/Coverage/codegen-gnu.m @@ -1,3 +1,3 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple i386-unknown-unknown -fobjc-exceptions -fobjc-runtime=gcc -emit-llvm -o %t %s +// RUN: %clang_cc1 -triple i386-unknown-unknown -fobjc-exceptions -fobjc-runtime=gcc -emit-llvm -o %t %s #include "objc-language-features.inc" diff --git a/clang/test/Coverage/codegen-next.m b/clang/test/Coverage/codegen-next.m index d9f012d6020644..5430cf28daf062 100644 --- a/clang/test/Coverage/codegen-next.m +++ b/clang/test/Coverage/codegen-next.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -fobjc-exceptions -triple x86_64-apple-darwin -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -debug-info-kind=limited -emit-llvm -fobjc-exceptions -triple x86_64-apple-darwin -o %t %s +// RUN: %clang_cc1 -emit-llvm -fobjc-exceptions -triple x86_64-apple-darwin -o %t %s +// RUN: %clang_cc1 -debug-info-kind=limited -emit-llvm -fobjc-exceptions -triple x86_64-apple-darwin -o %t %s // An error could be seen for targeting x86_64-win32; // diff --git a/clang/test/CoverageMapping/ir.c b/clang/test/CoverageMapping/ir.c index 62276189b98e90..6fa9281ab70df6 100644 --- a/clang/test/CoverageMapping/ir.c +++ b/clang/test/CoverageMapping/ir.c @@ -1,5 +1,5 @@ // Check the data structures emitted by coverage mapping -// RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -triple x86_64-apple-macosx10.9 -main-file-name ir.c %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -mllvm -enable-name-compression=false -no-opaque-pointers | FileCheck %s -check-prefixes=COMMON,DARWIN +// RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -triple x86_64-apple-macosx10.9 -main-file-name ir.c %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -mllvm -enable-name-compression=false | FileCheck %s -check-prefixes=COMMON,DARWIN // RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -triple x86_64-apple-macosx10.9 -main-file-name ir.c %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -mllvm -enable-name-compression=false -opaque-pointers | FileCheck %s -check-prefixes=COMMON,DARWIN // RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -triple x86_64--windows-msvc -main-file-name ir.c %s -o - -emit-llvm -fprofile-instrument=clang -fcoverage-mapping -mllvm -enable-name-compression=false | FileCheck %s -check-prefixes=COMMON,WINDOWS diff --git a/clang/test/Frontend/fixed_point_add.c b/clang/test/Frontend/fixed_point_add.c index 5096d8fc447654..1f1b8d642707b1 100644 --- a/clang/test/Frontend/fixed_point_add.c +++ b/clang/test/Frontend/fixed_point_add.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a, a2, a3, a4; @@ -30,10 +30,10 @@ _Bool b; // CHECK-LABEL: @sadd_sasasa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sadd_sasasa(void) { @@ -42,12 +42,12 @@ void sadd_sasasa(void) { // CHECK-LABEL: @sadd_asaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[UPSCALE]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sadd_asaa(void) { @@ -56,11 +56,11 @@ void sadd_asaa(void) { // CHECK-LABEL: @sadd_sasasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[RESIZE]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sadd_sasasf(void) { @@ -69,15 +69,15 @@ void sadd_sasasf(void) { // CHECK-LABEL: @sadd_sasaf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = add i24 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sadd_sasaf(void) { @@ -86,12 +86,12 @@ void sadd_sasaf(void) { // CHECK-LABEL: @sadd_aasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], [[UPSCALE]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sadd_aasf(void) { @@ -100,15 +100,15 @@ void sadd_aasf(void) { // CHECK-LABEL: @sadd_aalf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i48 // CHECK-NEXT: [[TMP2:%.*]] = add i48 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i48 [[TMP2]], 16 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sadd_aalf(void) { @@ -117,23 +117,23 @@ void sadd_aalf(void) { // SIGNED-LABEL: @sadd_sasausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = add i17 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sadd_sasausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[TMP1]] -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sadd_sasausa(void) { @@ -142,25 +142,25 @@ void sadd_sasausa(void) { // SIGNED-LABEL: @sadd_asaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = add i33 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sadd_asaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i32 [[UPSCALE]], [[TMP1]] -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void sadd_asaua(void) { @@ -169,24 +169,24 @@ void sadd_asaua(void) { // SIGNED-LABEL: @sadd_sasausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = add i17 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sadd_sasausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[RESIZE]] -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sadd_sasausf(void) { @@ -195,28 +195,28 @@ void sadd_sasausf(void) { // SIGNED-LABEL: @sadd_sasaulf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41 // SIGNED-NEXT: [[TMP2:%.*]] = add i41 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sadd_sasaulf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 24 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i40 [[UPSCALE]], [[RESIZE1]] // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i40 [[TMP2]], 24 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sadd_sasaulf(void) { @@ -225,14 +225,14 @@ void sadd_sasaulf(void) { // CHECK-LABEL: @sadd_aaaaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a2, align 4 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @a3, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a3, align 4 // CHECK-NEXT: [[TMP4:%.*]] = add i32 [[TMP2]], [[TMP3]] -// CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a4, align 4 +// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a4, align 4 // CHECK-NEXT: [[TMP6:%.*]] = add i32 [[TMP4]], [[TMP5]] -// CHECK-NEXT: store i32 [[TMP6]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP6]], ptr @a, align 4 // CHECK-NEXT: ret void // void sadd_aaaaa(void) { @@ -242,10 +242,10 @@ void sadd_aaaaa(void) { // CHECK-LABEL: @uadd_usausausa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void uadd_usausausa(void) { @@ -254,12 +254,12 @@ void uadd_usausausa(void) { // CHECK-LABEL: @uadd_uausaua( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[UPSCALE]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void uadd_uausaua(void) { @@ -268,11 +268,11 @@ void uadd_uausaua(void) { // CHECK-LABEL: @uadd_usausausf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], [[RESIZE]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void uadd_usausausf(void) { @@ -281,15 +281,15 @@ void uadd_usausausf(void) { // CHECK-LABEL: @uadd_usausauf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = add i24 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void uadd_usausauf(void) { @@ -299,14 +299,14 @@ void uadd_usausauf(void) { // CHECK-LABEL: @int_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = add i39 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasai(void) { @@ -315,14 +315,14 @@ void int_sasai(void) { // CHECK-LABEL: @int_sasaui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = add i40 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasaui(void) { @@ -331,26 +331,26 @@ void int_sasaui(void) { // SIGNED-LABEL: @int_usausai( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = add i40 [[RESIZE]], [[UPSCALE]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausai( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i39 [[RESIZE]], [[UPSCALE]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausai(void) { @@ -359,26 +359,26 @@ void int_usausai(void) { // SIGNED-LABEL: @int_usausaui( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = add i40 [[RESIZE]], [[UPSCALE]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausaui( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i39 [[RESIZE]], [[UPSCALE]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausaui(void) { @@ -387,14 +387,14 @@ void int_usausaui(void) { // CHECK-LABEL: @int_lflfui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE1]], 31 // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i64 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void int_lflfui(void) { @@ -403,8 +403,8 @@ void int_lflfui(void) { // CHECK-LABEL: @int_aab( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @b, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 // CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 @@ -412,7 +412,7 @@ void int_lflfui(void) { // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = add i47 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aab(void) { @@ -422,10 +422,10 @@ void int_aab(void) { // CHECK-LABEL: @sat_sassasas( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa_sat, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa_sat, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasas(void) { @@ -434,20 +434,20 @@ void sat_sassasas(void) { // SIGNED-LABEL: @sat_usasusausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusausas(void) { @@ -456,24 +456,24 @@ void sat_usasusausas(void) { // SIGNED-LABEL: @sat_uasuausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]]) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_uasuausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]]) // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE2]], i32* @ua_sat, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE2]], ptr @ua_sat, align 4 // UNSIGNED-NEXT: ret void // void sat_uasuausas(void) { @@ -482,8 +482,8 @@ void sat_uasuausas(void) { // CHECK-LABEL: @sat_sassasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -493,7 +493,7 @@ void sat_uasuausas(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 -32768, i39 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasi(void) { @@ -502,8 +502,8 @@ void sat_sassasi(void) { // CHECK-LABEL: @sat_sassasui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 @@ -513,7 +513,7 @@ void sat_sassasi(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 -32768, i40 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasui(void) { @@ -522,20 +522,20 @@ void sat_sassasui(void) { // SIGNED-LABEL: @sat_ufsufsufs( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @uf_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_ufsufsufs( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @uf_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @uf_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_ufsufsufs(void) { @@ -544,8 +544,8 @@ void sat_ufsufsufs(void) { // SIGNED-LABEL: @sat_usasusasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 @@ -555,13 +555,13 @@ void sat_ufsufsufs(void) { // SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -571,7 +571,7 @@ void sat_ufsufsufs(void) { // UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 0, i39 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusasi(void) { diff --git a/clang/test/Frontend/fixed_point_comparisons.c b/clang/test/Frontend/fixed_point_comparisons.c index b920e77fb07535..a59f06b9c9420e 100644 --- a/clang/test/Frontend/fixed_point_comparisons.c +++ b/clang/test/Frontend/fixed_point_comparisons.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNPADDED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PADDED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNPADDED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,PADDED // Fixed point against other fixed point _Bool b_eq_true = 2.5hk == 2.5uhk; // CHECK-DAG: @b_eq_true = {{.*}}global i8 1, align 1 @@ -62,71 +62,71 @@ void TestComparisons(void) { // Each of these should be a fixed point conversion followed by the actual // comparison operation. sa == a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp eq i32 [[UPSCALE_A]], [[A2]] sa != a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp ne i32 [[UPSCALE_A]], [[A2]] sa > a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp sgt i32 [[UPSCALE_A]], [[A2]] sa >= a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp sge i32 [[UPSCALE_A]], [[A2]] sa < a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp slt i32 [[UPSCALE_A]], [[A2]] sa <= a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp sle i32 [[UPSCALE_A]], [[A2]] usa > ua; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %ua, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp ugt i32 [[UPSCALE_A]], [[A2]] usa >= ua; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %ua, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp uge i32 [[UPSCALE_A]], [[A2]] usa < ua; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %ua, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp ult i32 [[UPSCALE_A]], [[A2]] usa <= ua; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %ua, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp ule i32 [[UPSCALE_A]], [[A2]] @@ -148,56 +148,56 @@ void TestIntComparisons(void) { // These comparisons shouldn't be that different from comparing against fixed // point types with other fixed point types. sa == i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp eq i39 [[RESIZE_A]], [[UPSCALE_I]] sa != i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp ne i39 [[RESIZE_A]], [[UPSCALE_I]] sa > i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp sgt i39 [[RESIZE_A]], [[UPSCALE_I]] sa >= i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp sge i39 [[RESIZE_A]], [[UPSCALE_I]] sa < i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp slt i39 [[RESIZE_A]], [[UPSCALE_I]] sa <= i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i39 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i39 [[RESIZE_I]], 7 // CHECK-NEXT: {{.*}} = icmp sle i39 [[RESIZE_A]], [[UPSCALE_I]] usa > ui; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %ui, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %ui, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -208,8 +208,8 @@ void TestIntComparisons(void) { // PADDED-NEXT: {{.*}} = icmp ugt i39 [[RESIZE_A]], [[UPSCALE_I]] usa >= ui; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %ui, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %ui, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -220,8 +220,8 @@ void TestIntComparisons(void) { // PADDED-NEXT: {{.*}} = icmp uge i39 [[RESIZE_A]], [[UPSCALE_I]] usa < ui; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %ui, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %ui, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -232,8 +232,8 @@ void TestIntComparisons(void) { // PADDED-NEXT: {{.*}} = icmp ult i39 [[RESIZE_A]], [[UPSCALE_I]] usa <= ui; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %ui, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %ui, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -247,8 +247,8 @@ void TestIntComparisons(void) { // from comparing to an int other than varying sizes. The integer types are // still converted to ints or unsigned ints from UsualUnaryConversions(). sa == b; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[B:%[0-9]+]] = load i8, i8* %b, align 1 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[B:%[0-9]+]] = load i8, ptr %b, align 1 // CHECK-NEXT: %tobool = trunc i8 [[B]] to i1 // CHECK-NEXT: [[CONV_B:%[a-z0-9]+]] = zext i1 %tobool to i32 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 @@ -257,8 +257,8 @@ void TestIntComparisons(void) { // CHECK-NEXT: {{.*}} = icmp eq i39 [[RESIZE_A]], [[UPSCALE_B]] sa == c; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[C:%[0-9]+]] = load i8, i8* %c, align 1 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[C:%[0-9]+]] = load i8, ptr %c, align 1 // CHECK-NEXT: [[CONV_C:%[a-z0-9]+]] = sext i8 [[C]] to i32 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_C:%[a-z0-9]+]] = sext i32 [[CONV_C]] to i39 @@ -266,8 +266,8 @@ void TestIntComparisons(void) { // CHECK-NEXT: {{.*}} = icmp eq i39 [[RESIZE_A]], [[UPSCALE_C]] sa == s; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[S:%[0-9]+]] = load i16, i16* %s, align 2 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[S:%[0-9]+]] = load i16, ptr %s, align 2 // CHECK-NEXT: [[CONV_S:%[a-z0-9]+]] = sext i16 [[S]] to i32 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i39 // CHECK-NEXT: [[RESIZE_S:%[a-z0-9]+]] = sext i32 [[CONV_S]] to i39 @@ -276,8 +276,8 @@ void TestIntComparisons(void) { // An enum value is IntegralCast to an unsigned int. usa == e; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %e, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %e, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -296,8 +296,8 @@ void TestComparisonSignage(void) { // Signed vs unsigned fixed point comparison sa == usa; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i16, i16* %usa, align 2 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i16, ptr %usa, align 2 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i17 // UNPADDED-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i17 [[RESIZE_A]], 1 // UNPADDED-NEXT: [[RESIZE_A2:%[a-z0-9]+]] = zext i16 [[A2]] to i17 @@ -306,8 +306,8 @@ void TestComparisonSignage(void) { // Signed int vs unsigned fixed point sa == ui; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %ui, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %ui, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i40 // CHECK-NEXT: [[RESIZE_I:%[a-z0-9]+]] = zext i32 [[I]] to i40 // CHECK-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 7 @@ -315,8 +315,8 @@ void TestComparisonSignage(void) { // Signed fixed point vs unsigned int usa == i; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %usa, align 2 - // CHECK-NEXT: [[I:%[0-9]+]] = load i32, i32* %i, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %usa, align 2 + // CHECK-NEXT: [[I:%[0-9]+]] = load i32, ptr %i, align 4 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = zext i16 [[A]] to i40 // UNPADDED-NEXT: [[RESIZE_I:%[a-z0-9]+]] = sext i32 [[I]] to i40 // UNPADDED-NEXT: [[UPSCALE_I:%[a-z0-9]+]] = shl i40 [[RESIZE_I]], 8 @@ -338,22 +338,22 @@ void TestSaturationComparisons(void) { // counterparts since when comparing, we convert both operands to a common // type that should be able to hold both values. sat_sa == sat_a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sat_sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %sat_a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sat_sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %sat_a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp eq i32 [[UPSCALE_A]], [[A2]] sat_sa == a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sat_sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sat_sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: {{.*}} = icmp eq i32 [[UPSCALE_A]], [[A2]] sat_sa == sat_usa; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sat_sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i16, i16* %sat_usa, align 2 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sat_sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i16, ptr %sat_usa, align 2 // UNPADDED-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i17 // UNPADDED-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i17 [[RESIZE_A]], 1 // UNPADDED-NEXT: [[RESIZE_A2:%[a-z0-9]+]] = zext i16 [[A2]] to i17 @@ -368,11 +368,11 @@ void StoreBooleanResult(void) { // Check that the result can properly be stored as an int. res = sa == a; - // CHECK: [[A:%[0-9]+]] = load i16, i16* %sa, align 2 - // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, i32* %a, align 4 + // CHECK: [[A:%[0-9]+]] = load i16, ptr %sa, align 2 + // CHECK-NEXT: [[A2:%[0-9]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[RESIZE_A:%[a-z0-9]+]] = sext i16 [[A]] to i32 // CHECK-NEXT: [[UPSCALE_A:%[a-z0-9]+]] = shl i32 [[RESIZE_A]], 8 // CHECK-NEXT: [[RES:%[0-9]+]] = icmp eq i32 [[UPSCALE_A]], [[A2]] // CHECK-NEXT: %conv = zext i1 [[RES]] to i32 - // CHECK-NEXT: store i32 %conv, i32* %res, align 4 + // CHECK-NEXT: store i32 %conv, ptr %res, align 4 } diff --git a/clang/test/Frontend/fixed_point_compound.c b/clang/test/Frontend/fixed_point_compound.c index 264e6442355b82..a1d6ff19912bff 100644 --- a/clang/test/Frontend/fixed_point_compound.c +++ b/clang/test/Frontend/fixed_point_compound.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Fract shf; _Accum a; @@ -21,14 +21,14 @@ float fl; // CHECK-LABEL: @add_shfa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @shf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @shf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[UPSCALE]], [[TMP0]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE1]], i8* @shf, align 1 +// CHECK-NEXT: store i8 [[RESIZE1]], ptr @shf, align 1 // CHECK-NEXT: ret void // void add_shfa(void) { @@ -37,24 +37,24 @@ void add_shfa(void) { // SIGNED-LABEL: @add_auf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = add i33 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_auf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], [[RESIZE]] -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void add_auf(void) { @@ -63,14 +63,14 @@ void add_auf(void) { // CHECK-LABEL: @add_ufula( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 16 // CHECK-NEXT: [[TMP2:%.*]] = add i64 [[UPSCALE]], [[TMP0]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = lshr i64 [[TMP2]], 16 // CHECK-NEXT: [[RESIZE1:%.*]] = trunc i64 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE1]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[RESIZE1]], ptr @uf, align 2 // CHECK-NEXT: ret void // void add_ufula(void) { @@ -79,8 +79,8 @@ void add_ufula(void) { // SIGNED-LABEL: @add_ulashf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @shf, align 1 -// SIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @ula, align 8 +// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @shf, align 1 +// SIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @ula, align 8 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i64 [[TMP1]] to i65 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i8 [[TMP0]] to i65 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i65 [[RESIZE1]], 25 @@ -88,17 +88,17 @@ void add_ufula(void) { // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i65 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i65 [[DOWNSCALE]] to i64 // SIGNED-NEXT: [[UPSCALE3:%.*]] = shl i64 [[RESIZE2]], 1 -// SIGNED-NEXT: store i64 [[UPSCALE3]], i64* @ula, align 8 +// SIGNED-NEXT: store i64 [[UPSCALE3]], ptr @ula, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_ulashf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @shf, align 1 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @ula, align 8 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @shf, align 1 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @ula, align 8 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i64 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 24 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[UPSCALE]] -// UNSIGNED-NEXT: store i64 [[TMP2]], i64* @ula, align 8 +// UNSIGNED-NEXT: store i64 [[TMP2]], ptr @ula, align 8 // UNSIGNED-NEXT: ret void // void add_ulashf(void) { @@ -107,8 +107,8 @@ void add_ulashf(void) { // SIGNED-LABEL: @add_ufshf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @shf, align 1 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @shf, align 1 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i17 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i8 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE1]], 9 @@ -116,17 +116,17 @@ void add_ulashf(void) { // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 // SIGNED-NEXT: [[UPSCALE3:%.*]] = shl i16 [[RESIZE2]], 1 -// SIGNED-NEXT: store i16 [[UPSCALE3]], i16* @uf, align 2 +// SIGNED-NEXT: store i16 [[UPSCALE3]], ptr @uf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_ufshf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @shf, align 1 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @shf, align 1 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i16 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i16 [[TMP1]], [[UPSCALE]] -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @uf, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @uf, align 2 // UNSIGNED-NEXT: ret void // void add_ufshf(void) { @@ -135,12 +135,12 @@ void add_ufshf(void) { // CHECK-LABEL: @add_ashf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @shf, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @shf, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = add i32 [[TMP1]], [[UPSCALE]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void add_ashf(void) { @@ -149,14 +149,14 @@ void add_ashf(void) { // CHECK-LABEL: @add_ai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = add i47 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void add_ai(void) { @@ -165,14 +165,14 @@ void add_ai(void) { // CHECK-LABEL: @add_au( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @u, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @u, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i48 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = add i48 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void add_au(void) { @@ -181,24 +181,24 @@ void add_au(void) { // SIGNED-LABEL: @add_ulai( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @ula, align 8 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @ula, align 8 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i64 [[TMP1]] to i65 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i65 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i65 [[RESIZE1]], 32 // SIGNED-NEXT: [[TMP2:%.*]] = add i65 [[RESIZE]], [[UPSCALE]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i65 [[TMP2]] to i64 -// SIGNED-NEXT: store i64 [[RESIZE2]], i64* @ula, align 8 +// SIGNED-NEXT: store i64 [[RESIZE2]], ptr @ula, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_ulai( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @ula, align 8 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @ula, align 8 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 31 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[UPSCALE]] -// UNSIGNED-NEXT: store i64 [[TMP2]], i64* @ula, align 8 +// UNSIGNED-NEXT: store i64 [[TMP2]], ptr @ula, align 8 // UNSIGNED-NEXT: ret void // void add_ulai(void) { @@ -207,8 +207,8 @@ void add_ulai(void) { // SIGNED-LABEL: @add_iula( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i65 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i65 [[RESIZE]], 32 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i64 [[TMP0]] to i65 @@ -216,19 +216,19 @@ void add_ulai(void) { // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i65 [[TMP2]] to i64 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i64 [[RESIZE2]], 32 // SIGNED-NEXT: [[RESIZE3:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE3]], i32* @i, align 4 +// SIGNED-NEXT: store i32 [[RESIZE3]], ptr @i, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_iula( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i64 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 31 // UNSIGNED-NEXT: [[TMP2:%.*]] = add i64 [[UPSCALE]], [[TMP0]] // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i64 [[TMP2]], 31 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE1]], i32* @i, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @i, align 4 // UNSIGNED-NEXT: ret void // void add_iula(void) { @@ -237,8 +237,8 @@ void add_iula(void) { // CHECK-LABEL: @add_ca( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @c, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @c, align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[CONV]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 @@ -250,7 +250,7 @@ void add_iula(void) { // CHECK-NEXT: [[TMP5:%.*]] = select i1 [[TMP3]], i32 [[TMP4]], i32 [[RESIZE2]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP5]], 15 // CHECK-NEXT: [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE3]], i8* @c, align 1 +// CHECK-NEXT: store i8 [[RESIZE3]], ptr @c, align 1 // CHECK-NEXT: ret void // void add_ca(void) { @@ -259,8 +259,8 @@ void add_ca(void) { // CHECK-LABEL: @add_sai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 @@ -270,7 +270,7 @@ void add_ca(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i47 [[SATMAX]], -2147483648 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i47 -2147483648, i47 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[SATMIN]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @sa, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @sa, align 4 // CHECK-NEXT: ret void // void add_sai(void) { @@ -279,8 +279,8 @@ void add_sai(void) { // CHECK-LABEL: @add_csa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @c, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @c, align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[CONV]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 @@ -296,7 +296,7 @@ void add_sai(void) { // CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i32 [[TMP6]], i32 [[RESIZE2]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP7]], 15 // CHECK-NEXT: [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE3]], i8* @c, align 1 +// CHECK-NEXT: store i8 [[RESIZE3]], ptr @c, align 1 // CHECK-NEXT: ret void // void add_csa(void) { @@ -305,24 +305,24 @@ void add_csa(void) { // SIGNED-LABEL: @add_sulau( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @u, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @sula, align 8 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @u, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @sula, align 8 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i64 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 32 // SIGNED-NEXT: [[TMP2:%.*]] = call i64 @llvm.uadd.sat.i64(i64 [[TMP1]], i64 [[UPSCALE]]) -// SIGNED-NEXT: store i64 [[TMP2]], i64* @sula, align 8 +// SIGNED-NEXT: store i64 [[TMP2]], ptr @sula, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_sulau( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @u, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, i64* @sula, align 8 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @u, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i64, ptr @sula, align 8 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i64 [[TMP1]] to i63 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP0]] to i63 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i63 [[RESIZE1]], 31 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i63 @llvm.uadd.sat.i63(i63 [[RESIZE]], i63 [[UPSCALE]]) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i63 [[TMP2]] to i64 -// UNSIGNED-NEXT: store i64 [[RESIZE2]], i64* @sula, align 8 +// UNSIGNED-NEXT: store i64 [[RESIZE2]], ptr @sula, align 8 // UNSIGNED-NEXT: ret void // void add_sulau(void) { @@ -331,8 +331,8 @@ void add_sulau(void) { // SIGNED-LABEL: @add_sshsuf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @sshf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @sshf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 9 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i17 @@ -341,19 +341,19 @@ void add_sulau(void) { // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 // SIGNED-NEXT: [[DOWNSCALE3:%.*]] = ashr i16 [[RESIZE2]], 8 // SIGNED-NEXT: [[RESIZE4:%.*]] = trunc i16 [[DOWNSCALE3]] to i8 -// SIGNED-NEXT: store i8 [[RESIZE4]], i8* @sshf, align 1 +// SIGNED-NEXT: store i8 [[RESIZE4]], ptr @sshf, align 1 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @add_sshsuf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @sshf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @sshf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[UPSCALE]], i16 [[TMP0]]) // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i16 [[TMP2]], 8 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i16 [[DOWNSCALE]] to i8 -// UNSIGNED-NEXT: store i8 [[RESIZE1]], i8* @sshf, align 1 +// UNSIGNED-NEXT: store i8 [[RESIZE1]], ptr @sshf, align 1 // UNSIGNED-NEXT: ret void // void add_sshsuf(void) { @@ -362,14 +362,14 @@ void add_sshsuf(void) { // CHECK-LABEL: @add_afl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float // CHECK-NEXT: [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000 // CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP3]], [[TMP0]] // CHECK-NEXT: [[TMP4:%.*]] = fmul float [[ADD]], 3.276800e+04 // CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32 -// CHECK-NEXT: store i32 [[TMP5]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP5]], ptr @a, align 4 // CHECK-NEXT: ret void // void add_afl(void) { @@ -378,12 +378,12 @@ void add_afl(void) { // CHECK-LABEL: @add_fla( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000 -// CHECK-NEXT: [[TMP3:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP3]], [[TMP2]] -// CHECK-NEXT: store float [[ADD]], float* @fl, align 4 +// CHECK-NEXT: store float [[ADD]], ptr @fl, align 4 // CHECK-NEXT: ret void // void add_fla(void) { @@ -392,14 +392,14 @@ void add_fla(void) { // CHECK-LABEL: @add_safl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float // CHECK-NEXT: [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000 // CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP3]], [[TMP0]] // CHECK-NEXT: [[TMP4:%.*]] = fmul float [[ADD]], 3.276800e+04 // CHECK-NEXT: [[TMP5:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP4]]) -// CHECK-NEXT: store i32 [[TMP5]], i32* @sa, align 4 +// CHECK-NEXT: store i32 [[TMP5]], ptr @sa, align 4 // CHECK-NEXT: ret void // void add_safl(void) { @@ -408,12 +408,12 @@ void add_safl(void) { // CHECK-LABEL: @add_flsa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000 -// CHECK-NEXT: [[TMP3:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[ADD:%.*]] = fadd float [[TMP3]], [[TMP2]] -// CHECK-NEXT: store float [[ADD]], float* @fl, align 4 +// CHECK-NEXT: store float [[ADD]], ptr @fl, align 4 // CHECK-NEXT: ret void // void add_flsa(void) { @@ -425,24 +425,24 @@ void add_flsa(void) { // SIGNED-LABEL: @sub_auf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = sub i33 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sub_auf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i32 [[TMP1]], [[RESIZE]] -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void sub_auf(void) { @@ -451,14 +451,14 @@ void sub_auf(void) { // CHECK-LABEL: @sub_ai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = sub i47 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sub_ai(void) { @@ -467,8 +467,8 @@ void sub_ai(void) { // CHECK-LABEL: @sub_csa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @c, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @c, align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[CONV]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 @@ -484,7 +484,7 @@ void sub_ai(void) { // CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i32 [[TMP6]], i32 [[RESIZE2]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP7]], 15 // CHECK-NEXT: [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE3]], i8* @c, align 1 +// CHECK-NEXT: store i8 [[RESIZE3]], ptr @c, align 1 // CHECK-NEXT: ret void // void sub_csa(void) { @@ -493,14 +493,14 @@ void sub_csa(void) { // CHECK-LABEL: @sub_afl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float // CHECK-NEXT: [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000 // CHECK-NEXT: [[SUB:%.*]] = fsub float [[TMP3]], [[TMP0]] // CHECK-NEXT: [[TMP4:%.*]] = fmul float [[SUB]], 3.276800e+04 // CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32 -// CHECK-NEXT: store i32 [[TMP5]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP5]], ptr @a, align 4 // CHECK-NEXT: ret void // void sub_afl(void) { @@ -510,24 +510,24 @@ void sub_afl(void) { // SIGNED-LABEL: @mul_auf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = call i33 @llvm.smul.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @mul_auf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[TMP1]], i32 [[RESIZE]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void mul_auf(void) { @@ -536,14 +536,14 @@ void mul_auf(void) { // CHECK-LABEL: @mul_ai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.smul.fix.i47(i47 [[RESIZE]], i47 [[UPSCALE]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void mul_ai(void) { @@ -552,8 +552,8 @@ void mul_ai(void) { // CHECK-LABEL: @mul_csa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @c, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @c, align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[CONV]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 @@ -569,7 +569,7 @@ void mul_ai(void) { // CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i32 [[TMP6]], i32 [[RESIZE2]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP7]], 15 // CHECK-NEXT: [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE3]], i8* @c, align 1 +// CHECK-NEXT: store i8 [[RESIZE3]], ptr @c, align 1 // CHECK-NEXT: ret void // void mul_csa(void) { @@ -578,14 +578,14 @@ void mul_csa(void) { // CHECK-LABEL: @mul_afl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float // CHECK-NEXT: [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000 // CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP3]], [[TMP0]] // CHECK-NEXT: [[TMP4:%.*]] = fmul float [[MUL]], 3.276800e+04 // CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32 -// CHECK-NEXT: store i32 [[TMP5]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP5]], ptr @a, align 4 // CHECK-NEXT: ret void // void mul_afl(void) { @@ -595,24 +595,24 @@ void mul_afl(void) { // SIGNED-LABEL: @div_auf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = call i33 @llvm.sdiv.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @div_auf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP1]], i32 [[RESIZE]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void div_auf(void) { @@ -621,14 +621,14 @@ void div_auf(void) { // CHECK-LABEL: @div_ai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.sdiv.fix.i47(i47 [[RESIZE]], i47 [[UPSCALE]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void div_ai(void) { @@ -637,8 +637,8 @@ void div_ai(void) { // CHECK-LABEL: @div_csa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @c, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @c, align 1 // CHECK-NEXT: [[CONV:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[CONV]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 @@ -654,7 +654,7 @@ void div_ai(void) { // CHECK-NEXT: [[TMP7:%.*]] = select i1 [[TMP5]], i32 [[TMP6]], i32 [[RESIZE2]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP7]], 15 // CHECK-NEXT: [[RESIZE3:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE3]], i8* @c, align 1 +// CHECK-NEXT: store i8 [[RESIZE3]], ptr @c, align 1 // CHECK-NEXT: ret void // void div_csa(void) { @@ -663,14 +663,14 @@ void div_csa(void) { // CHECK-LABEL: @div_afl( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sitofp i32 [[TMP1]] to float // CHECK-NEXT: [[TMP3:%.*]] = fmul float [[TMP2]], 0x3F00000000000000 // CHECK-NEXT: [[DIV:%.*]] = fdiv float [[TMP3]], [[TMP0]] // CHECK-NEXT: [[TMP4:%.*]] = fmul float [[DIV]], 3.276800e+04 // CHECK-NEXT: [[TMP5:%.*]] = fptosi float [[TMP4]] to i32 -// CHECK-NEXT: store i32 [[TMP5]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP5]], ptr @a, align 4 // CHECK-NEXT: ret void // void div_afl(void) { @@ -680,10 +680,10 @@ void div_afl(void) { // CHECK-LABEL: @shft_ai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP1]], [[TMP0]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void shft_ai(void) { @@ -692,20 +692,20 @@ void shft_ai(void) { // SIGNED-LABEL: @shft_sufi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @suf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @suf, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP0]] to i16 // SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP1]], i16 [[TMP2]]) -// SIGNED-NEXT: store i16 [[TMP3]], i16* @suf, align 2 +// SIGNED-NEXT: store i16 [[TMP3]], ptr @suf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @shft_sufi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @suf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @suf, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP0]] to i16 // UNSIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP1]], i16 [[TMP2]]) -// UNSIGNED-NEXT: store i16 [[TMP3]], i16* @suf, align 2 +// UNSIGNED-NEXT: store i16 [[TMP3]], ptr @suf, align 2 // UNSIGNED-NEXT: ret void // void shft_sufi(void) { @@ -714,11 +714,11 @@ void shft_sufi(void) { // CHECK-LABEL: @shft_ulai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i64, i64* @ula, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr @ula, align 8 // CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP0]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP1]], [[TMP2]] -// CHECK-NEXT: store i64 [[TMP3]], i64* @ula, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @ula, align 8 // CHECK-NEXT: ret void // void shft_ulai(void) { diff --git a/clang/test/Frontend/fixed_point_conversions.c b/clang/test/Frontend/fixed_point_conversions.c index f362f036c6761d..ebd1d7e521df43 100644 --- a/clang/test/Frontend/fixed_point_conversions.c +++ b/clang/test/Frontend/fixed_point_conversions.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a, a2; @@ -37,8 +37,8 @@ double d; // CHECK-LABEL: @fix_same1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @a2, align 4 // CHECK-NEXT: ret void // void fix_same1(void) { @@ -47,8 +47,8 @@ void fix_same1(void) { // CHECK-LABEL: @fix_same2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @a2, align 4 // CHECK-NEXT: ret void // void fix_same2(void) { @@ -58,10 +58,10 @@ void fix_same2(void) { // CHECK-LABEL: @fix_castdown1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castdown1(void) { @@ -70,10 +70,10 @@ void fix_castdown1(void) { // CHECK-LABEL: @fix_castdown2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castdown2(void) { @@ -82,10 +82,10 @@ void fix_castdown2(void) { // CHECK-LABEL: @fix_castdown3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @sa, align 2 // CHECK-NEXT: ret void // void fix_castdown3(void) { @@ -94,10 +94,10 @@ void fix_castdown3(void) { // CHECK-LABEL: @fix_castdown4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @sa, align 2 // CHECK-NEXT: ret void // void fix_castdown4(void) { @@ -107,10 +107,10 @@ void fix_castdown4(void) { // CHECK-LABEL: @fix_castup1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 -// CHECK-NEXT: store i32 [[UPSCALE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castup1(void) { @@ -119,10 +119,10 @@ void fix_castup1(void) { // CHECK-LABEL: @fix_castup2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 -// CHECK-NEXT: store i32 [[UPSCALE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castup2(void) { @@ -131,10 +131,10 @@ void fix_castup2(void) { // CHECK-LABEL: @fix_castup3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castup3(void) { @@ -143,10 +143,10 @@ void fix_castup3(void) { // CHECK-LABEL: @fix_castup4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i64 [[TMP0]], 16 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i64 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_castup4(void) { @@ -156,15 +156,15 @@ void fix_castup4(void) { // SIGNED-LABEL: @fix_sign1( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[TMP0]], 1 -// SIGNED-NEXT: store i32 [[UPSCALE]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[UPSCALE]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sign1( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// UNSIGNED-NEXT: store i32 [[TMP0]], i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void fix_sign1(void) { @@ -173,15 +173,15 @@ void fix_sign1(void) { // SIGNED-LABEL: @fix_sign2( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i32 [[TMP0]], 1 -// SIGNED-NEXT: store i32 [[DOWNSCALE]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[DOWNSCALE]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sign2( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: store i32 [[TMP0]], i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void fix_sign2(void) { @@ -190,15 +190,15 @@ void fix_sign2(void) { // SIGNED-LABEL: @fix_sign3( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[TMP0]], 1 -// SIGNED-NEXT: store i32 [[UPSCALE]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[UPSCALE]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sign3( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// UNSIGNED-NEXT: store i32 [[TMP0]], i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void fix_sign3(void) { @@ -207,15 +207,15 @@ void fix_sign3(void) { // SIGNED-LABEL: @fix_sign4( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i32 [[TMP0]], 1 -// SIGNED-NEXT: store i32 [[DOWNSCALE]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[DOWNSCALE]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sign4( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: store i32 [[TMP0]], i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP0]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void fix_sign4(void) { @@ -224,18 +224,18 @@ void fix_sign4(void) { // SIGNED-LABEL: @fix_sign5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 17 -// SIGNED-NEXT: store i64 [[UPSCALE]], i64* @ula, align 8 +// SIGNED-NEXT: store i64 [[UPSCALE]], ptr @ula, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sign5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 16 -// UNSIGNED-NEXT: store i64 [[UPSCALE]], i64* @ula, align 8 +// UNSIGNED-NEXT: store i64 [[UPSCALE]], ptr @ula, align 8 // UNSIGNED-NEXT: ret void // void fix_sign5(void) { @@ -245,14 +245,14 @@ void fix_sign5(void) { // CHECK-LABEL: @fix_sat1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 32767 // CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[DOWNSCALE]] // CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -32768, i32 [[SATMAX]] // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @sat_sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @sat_sa, align 2 // CHECK-NEXT: ret void // void fix_sat1(void) { @@ -262,14 +262,14 @@ void fix_sat1(void) { // CHECK-LABEL: @fix_sat2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 127 // CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 127, i32 [[DOWNSCALE]] // CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -128 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -128, i32 [[SATMAX]] // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i8 -// CHECK-NEXT: store i8 [[RESIZE]], i8* @sat_sf, align 1 +// CHECK-NEXT: store i8 [[RESIZE]], ptr @sat_sf, align 1 // CHECK-NEXT: ret void // void fix_sat2(void) { @@ -279,13 +279,13 @@ void fix_sat2(void) { // CHECK-LABEL: @fix_sat3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 32767 // CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[TMP0]] // CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 -32768, i32 [[SATMAX]] // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @sat_f, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @sat_f, align 2 // CHECK-NEXT: ret void // void fix_sat3(void) { @@ -295,7 +295,7 @@ void fix_sat3(void) { // CHECK-LABEL: @fix_sat4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16 // CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i48 [[UPSCALE]], 2147483647 @@ -303,7 +303,7 @@ void fix_sat3(void) { // CHECK-NEXT: [[TMP2:%.*]] = icmp slt i48 [[SATMAX]], -2147483648 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i48 -2147483648, i48 [[SATMAX]] // CHECK-NEXT: [[RESIZE1:%.*]] = trunc i48 [[SATMIN]] to i32 -// CHECK-NEXT: store i32 [[RESIZE1]], i32* @sat_lf, align 4 +// CHECK-NEXT: store i32 [[RESIZE1]], ptr @sat_lf, align 4 // CHECK-NEXT: ret void // void fix_sat4(void) { @@ -313,26 +313,26 @@ void fix_sat4(void) { // SIGNED-LABEL: @fix_sat5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 7 // SIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 65535 // SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 65535, i32 [[DOWNSCALE]] // SIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[SATMAX]] // SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE]], i16* @sat_usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE]], ptr @sat_usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sat5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // UNSIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[DOWNSCALE]], 32767 // UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i32 32767, i32 [[DOWNSCALE]] // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE]], i16* @sat_usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE]], ptr @sat_usa, align 2 // UNSIGNED-NEXT: ret void // void fix_sat5(void) { @@ -342,21 +342,21 @@ void fix_sat5(void) { // SIGNED-LABEL: @fix_sat6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 1 // SIGNED-NEXT: [[TMP1:%.*]] = icmp slt i33 [[UPSCALE]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i33 0, i33 [[UPSCALE]] // SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i33 [[SATMIN]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE1]], i32* @sat_ua, align 4 +// SIGNED-NEXT: store i32 [[RESIZE1]], ptr @sat_ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sat6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[TMP0]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[TMP0]] -// UNSIGNED-NEXT: store i32 [[SATMIN]], i32* @sat_ua, align 4 +// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4 // UNSIGNED-NEXT: ret void // void fix_sat6(void) { @@ -366,8 +366,8 @@ void fix_sat6(void) { // CHECK-LABEL: @fix_sat7( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @sat_a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @sat_a, align 4 // CHECK-NEXT: ret void // void fix_sat7(void) { @@ -377,8 +377,8 @@ void fix_sat7(void) { // CHECK-LABEL: @fix_sat8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sat_a, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sat_a, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_sat8(void) { @@ -388,9 +388,9 @@ void fix_sat8(void) { // CHECK-LABEL: @fix_sat9( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sat_f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sat_f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @sat_a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @sat_a, align 4 // CHECK-NEXT: ret void // void fix_sat9(void) { @@ -400,22 +400,22 @@ void fix_sat9(void) { // SIGNED-LABEL: @fix_sat10( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @sat_sf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @sat_sf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 9 // SIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[UPSCALE]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[UPSCALE]] -// SIGNED-NEXT: store i32 [[SATMIN]], i32* @sat_ua, align 4 +// SIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_sat10( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @sat_sf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @sat_sf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP1:%.*]] = icmp slt i32 [[UPSCALE]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP1]], i32 0, i32 [[UPSCALE]] -// UNSIGNED-NEXT: store i32 [[SATMIN]], i32* @sat_ua, align 4 +// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4 // UNSIGNED-NEXT: ret void // void fix_sat10(void) { @@ -426,10 +426,10 @@ void fix_sat10(void) { // CHECK-LABEL: @fix_fract1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i32 [[TMP0]], 8 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[DOWNSCALE]] to i8 -// CHECK-NEXT: store i8 [[RESIZE]], i8* @sf, align 1 +// CHECK-NEXT: store i8 [[RESIZE]], ptr @sf, align 1 // CHECK-NEXT: ret void // void fix_fract1(void) { @@ -439,10 +439,10 @@ void fix_fract1(void) { // CHECK-LABEL: @fix_fract2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 -// CHECK-NEXT: store i32 [[UPSCALE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[UPSCALE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_fract2(void) { @@ -452,9 +452,9 @@ void fix_fract2(void) { // CHECK-LABEL: @fix_fract3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @f, align 2 // CHECK-NEXT: ret void // void fix_fract3(void) { @@ -464,9 +464,9 @@ void fix_fract3(void) { // CHECK-LABEL: @fix_fract4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @a, align 4 // CHECK-NEXT: ret void // void fix_fract4(void) { @@ -475,9 +475,9 @@ void fix_fract4(void) { // CHECK-LABEL: @fix_fract5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @ua, align 4 // CHECK-NEXT: ret void // void fix_fract5(void) { @@ -487,9 +487,9 @@ void fix_fract5(void) { // CHECK-LABEL: @fix_fract6( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 -// CHECK-NEXT: store i16 [[RESIZE]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[RESIZE]], ptr @uf, align 2 // CHECK-NEXT: ret void // void fix_fract6(void) { @@ -499,13 +499,13 @@ void fix_fract6(void) { // CHECK-LABEL: @fix_int1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP1:%.*]] = icmp slt i16 [[TMP0]], 0 // CHECK-NEXT: [[TMP2:%.*]] = add i16 [[TMP0]], 127 // CHECK-NEXT: [[TMP3:%.*]] = select i1 [[TMP1]], i16 [[TMP2]], i16 [[TMP0]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i16 [[TMP3]], 7 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE]], i32* @i, align 4 +// CHECK-NEXT: store i32 [[RESIZE]], ptr @i, align 4 // CHECK-NEXT: ret void // void fix_int1(void) { @@ -515,18 +515,18 @@ void fix_int1(void) { // SIGNED-LABEL: @fix_int2( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i16 [[TMP0]], 8 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE]], i32* @i, align 4 +// SIGNED-NEXT: store i32 [[RESIZE]], ptr @i, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_int2( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i16 [[TMP0]], 7 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[DOWNSCALE]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE]], i32* @i, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE]], ptr @i, align 4 // UNSIGNED-NEXT: ret void // void fix_int2(void) { @@ -537,10 +537,10 @@ void fix_int2(void) { // CHECK-LABEL: @int_fix1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7 -// CHECK-NEXT: store i16 [[UPSCALE]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[UPSCALE]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_fix1(void) { @@ -549,10 +549,10 @@ void int_fix1(void) { // CHECK-LABEL: @int_fix2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7 -// CHECK-NEXT: store i16 [[UPSCALE]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[UPSCALE]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_fix2(void) { @@ -561,18 +561,18 @@ void int_fix2(void) { // SIGNED-LABEL: @int_fix3( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8 -// SIGNED-NEXT: store i16 [[UPSCALE]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_fix3( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7 -// UNSIGNED-NEXT: store i16 [[UPSCALE]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_fix3(void) { @@ -581,18 +581,18 @@ void int_fix3(void) { // SIGNED-LABEL: @int_fix4( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 8 -// SIGNED-NEXT: store i16 [[UPSCALE]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_fix4( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP0]] to i16 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i16 [[RESIZE]], 7 -// UNSIGNED-NEXT: store i16 [[UPSCALE]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[UPSCALE]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_fix4(void) { @@ -601,10 +601,10 @@ void int_fix4(void) { // CHECK-LABEL: @int_fix5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @s, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @s, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE]], 31 -// CHECK-NEXT: store i64 [[UPSCALE]], i64* @la, align 8 +// CHECK-NEXT: store i64 [[UPSCALE]], ptr @la, align 8 // CHECK-NEXT: ret void // void int_fix5(void) { @@ -614,7 +614,7 @@ void int_fix5(void) { // CHECK-LABEL: @int_sat1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i39 [[UPSCALE]], 32767 @@ -622,7 +622,7 @@ void int_fix5(void) { // CHECK-NEXT: [[TMP2:%.*]] = icmp slt i39 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i39 -32768, i39 [[SATMAX]] // CHECK-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE1]], i16* @sat_sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE1]], ptr @sat_sa, align 2 // CHECK-NEXT: ret void // void int_sat1(void) { @@ -631,13 +631,13 @@ void int_sat1(void) { // CHECK-LABEL: @int_sat2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i39 [[UPSCALE]], 32767 // CHECK-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]] // CHECK-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMAX]] to i16 -// CHECK-NEXT: store i16 [[RESIZE1]], i16* @sat_sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE1]], ptr @sat_sa, align 2 // CHECK-NEXT: ret void // void int_sat2(void) { @@ -646,7 +646,7 @@ void int_sat2(void) { // SIGNED-LABEL: @int_sat3( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i40 [[UPSCALE]], 65535 @@ -654,12 +654,12 @@ void int_sat2(void) { // SIGNED-NEXT: [[TMP2:%.*]] = icmp slt i40 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i40 0, i40 [[SATMAX]] // SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i40 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE1]], i16* @sat_usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_sat3( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // UNSIGNED-NEXT: [[TMP1:%.*]] = icmp sgt i39 [[UPSCALE]], 32767 @@ -667,7 +667,7 @@ void int_sat2(void) { // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i39 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i39 0, i39 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @sat_usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2 // UNSIGNED-NEXT: ret void // void int_sat3(void) { @@ -676,24 +676,24 @@ void int_sat3(void) { // SIGNED-LABEL: @int_sat4( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP1:%.*]] = icmp ugt i40 [[UPSCALE]], 65535 // SIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i40 65535, i40 [[UPSCALE]] // SIGNED-NEXT: [[RESIZE1:%.*]] = trunc i40 [[SATMAX]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE1]], i16* @sat_usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_sat4( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // UNSIGNED-NEXT: [[TMP1:%.*]] = icmp ugt i39 [[UPSCALE]], 32767 // UNSIGNED-NEXT: [[SATMAX:%.*]] = select i1 [[TMP1]], i39 32767, i39 [[UPSCALE]] // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i39 [[SATMAX]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @sat_usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @sat_usa, align 2 // UNSIGNED-NEXT: ret void // void int_sat4(void) { @@ -703,10 +703,10 @@ void int_sat4(void) { // CHECK-LABEL: @float_fix1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02 // CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i16 -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void float_fix1(void) { @@ -715,10 +715,10 @@ void float_fix1(void) { // CHECK-LABEL: @float_fix2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32 -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void float_fix2(void) { @@ -727,10 +727,10 @@ void float_fix2(void) { // CHECK-LABEL: @float_fix3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000 // CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i64 -// CHECK-NEXT: store i64 [[TMP2]], i64* @la, align 8 +// CHECK-NEXT: store i64 [[TMP2]], ptr @la, align 8 // CHECK-NEXT: ret void // void float_fix3(void) { @@ -739,10 +739,10 @@ void float_fix3(void) { // CHECK-LABEL: @float_fix4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02 // CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i8 -// CHECK-NEXT: store i8 [[TMP2]], i8* @sf, align 1 +// CHECK-NEXT: store i8 [[TMP2]], ptr @sf, align 1 // CHECK-NEXT: ret void // void float_fix4(void) { @@ -751,10 +751,10 @@ void float_fix4(void) { // CHECK-LABEL: @float_fix5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000 // CHECK-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32 -// CHECK-NEXT: store i32 [[TMP2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void float_fix5(void) { @@ -763,18 +763,18 @@ void float_fix5(void) { // SIGNED-LABEL: @float_fix6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04 // SIGNED-NEXT: [[TMP2:%.*]] = fptoui float [[TMP1]] to i32 -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @float_fix6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i32 -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void float_fix6(void) { @@ -783,18 +783,18 @@ void float_fix6(void) { // SIGNED-LABEL: @float_fix7( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04 // SIGNED-NEXT: [[TMP2:%.*]] = fptoui float [[TMP1]] to i16 -// SIGNED-NEXT: store i16 [[TMP2]], i16* @uf, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @float_fix7( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi float [[TMP1]] to i16 -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @uf, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @uf, align 2 // UNSIGNED-NEXT: ret void // void float_fix7(void) { @@ -804,10 +804,10 @@ void float_fix7(void) { // CHECK-LABEL: @fix_float1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i16 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03 -// CHECK-NEXT: store float [[TMP2]], float* @fl, align 4 +// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4 // CHECK-NEXT: ret void // void fix_float1(void) { @@ -816,10 +816,10 @@ void fix_float1(void) { // CHECK-LABEL: @fix_float2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000 -// CHECK-NEXT: store float [[TMP2]], float* @fl, align 4 +// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4 // CHECK-NEXT: ret void // void fix_float2(void) { @@ -828,10 +828,10 @@ void fix_float2(void) { // CHECK-LABEL: @fix_float3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000 -// CHECK-NEXT: store float [[TMP2]], float* @fl, align 4 +// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4 // CHECK-NEXT: ret void // void fix_float3(void) { @@ -840,10 +840,10 @@ void fix_float3(void) { // CHECK-LABEL: @fix_float4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i8 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 7.812500e-03 -// CHECK-NEXT: store float [[TMP2]], float* @fl, align 4 +// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4 // CHECK-NEXT: ret void // void fix_float4(void) { @@ -852,10 +852,10 @@ void fix_float4(void) { // CHECK-LABEL: @fix_float5( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000 -// CHECK-NEXT: store float [[TMP2]], float* @fl, align 4 +// CHECK-NEXT: store float [[TMP2]], ptr @fl, align 4 // CHECK-NEXT: ret void // void fix_float5(void) { @@ -864,18 +864,18 @@ void fix_float5(void) { // SIGNED-LABEL: @fix_float6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000 -// SIGNED-NEXT: store float [[TMP2]], float* @fl, align 4 +// SIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_float6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i32 [[TMP0]] to float // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000 -// UNSIGNED-NEXT: store float [[TMP2]], float* @fl, align 4 +// UNSIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4 // UNSIGNED-NEXT: ret void // void fix_float6(void) { @@ -884,18 +884,18 @@ void fix_float6(void) { // SIGNED-LABEL: @fix_float7( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3EF0000000000000 -// SIGNED-NEXT: store float [[TMP2]], float* @fl, align 4 +// SIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_float7( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3F00000000000000 -// UNSIGNED-NEXT: store float [[TMP2]], float* @fl, align 4 +// UNSIGNED-NEXT: store float [[TMP2]], ptr @fl, align 4 // UNSIGNED-NEXT: ret void // void fix_float7(void) { @@ -905,10 +905,10 @@ void fix_float7(void) { // CHECK-LABEL: @float_sat1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]]) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sat_sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sat_sa, align 2 // CHECK-NEXT: ret void // void float_sat1(void) { @@ -917,10 +917,10 @@ void float_sat1(void) { // CHECK-LABEL: @float_sat2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]]) -// CHECK-NEXT: store i32 [[TMP2]], i32* @sat_a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @sat_a, align 4 // CHECK-NEXT: ret void // void float_sat2(void) { @@ -929,10 +929,10 @@ void float_sat2(void) { // CHECK-LABEL: @float_sat3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 0x41E0000000000000 // CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP1]]) -// CHECK-NEXT: store i64 [[TMP2]], i64* @sat_la, align 8 +// CHECK-NEXT: store i64 [[TMP2]], ptr @sat_la, align 8 // CHECK-NEXT: ret void // void float_sat3(void) { @@ -941,10 +941,10 @@ void float_sat3(void) { // CHECK-LABEL: @float_sat4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // CHECK-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 1.280000e+02 // CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f32(float [[TMP1]]) -// CHECK-NEXT: store i8 [[TMP2]], i8* @sat_sf, align 1 +// CHECK-NEXT: store i8 [[TMP2]], ptr @sat_sf, align 1 // CHECK-NEXT: ret void // void float_sat4(void) { @@ -953,20 +953,20 @@ void float_sat4(void) { // SIGNED-LABEL: @float_sat5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptoui.sat.i32.f32(float [[TMP1]]) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @sat_ua, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @sat_ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @float_sat5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP1]]) // UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i32 [[TMP2]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i32 0, i32 [[TMP2]] -// UNSIGNED-NEXT: store i32 [[SATMIN]], i32* @sat_ua, align 4 +// UNSIGNED-NEXT: store i32 [[SATMIN]], ptr @sat_ua, align 4 // UNSIGNED-NEXT: ret void // void float_sat5(void) { @@ -975,20 +975,20 @@ void float_sat5(void) { // SIGNED-LABEL: @float_sat6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 6.553600e+04 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP1]]) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @sat_uf, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @sat_uf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @float_sat6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, float* @fl, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load float, ptr @fl, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul float [[TMP0]], 3.276800e+04 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f32(float [[TMP1]]) // UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]] -// UNSIGNED-NEXT: store i16 [[SATMIN]], i16* @sat_uf, align 2 +// UNSIGNED-NEXT: store i16 [[SATMIN]], ptr @sat_uf, align 2 // UNSIGNED-NEXT: ret void // void float_sat6(void) { diff --git a/clang/test/Frontend/fixed_point_conversions_half.c b/clang/test/Frontend/fixed_point_conversions_half.c index a636593ed86877..4094b6af5dee66 100644 --- a/clang/test/Frontend/fixed_point_conversions_half.c +++ b/clang/test/Frontend/fixed_point_conversions_half.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple arm64-unknown-linux-gnu -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Fract sf; long _Fract lf; @@ -25,10 +25,10 @@ _Float16 h; // CHECK-LABEL: @half_fix1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // CHECK-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i8 -// CHECK-NEXT: store i8 [[TMP2]], i8* @sf, align 1 +// CHECK-NEXT: store i8 [[TMP2]], ptr @sf, align 1 // CHECK-NEXT: ret void // void half_fix1(void) { @@ -37,11 +37,11 @@ void half_fix1(void) { // CHECK-LABEL: @half_fix2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // CHECK-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[TMP3]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP3]], ptr @lf, align 4 // CHECK-NEXT: ret void // void half_fix2(void) { @@ -50,10 +50,10 @@ void half_fix2(void) { // CHECK-LABEL: @half_fix3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // CHECK-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i16 -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void half_fix3(void) { @@ -62,11 +62,11 @@ void half_fix3(void) { // CHECK-LABEL: @half_fix4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // CHECK-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i64 -// CHECK-NEXT: store i64 [[TMP3]], i64* @la, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @la, align 8 // CHECK-NEXT: ret void // void half_fix4(void) { @@ -75,19 +75,19 @@ void half_fix4(void) { // SIGNED-LABEL: @half_fix5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02 // SIGNED-NEXT: [[TMP3:%.*]] = fptoui float [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[TMP3]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP3]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @half_fix5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // UNSIGNED-NEXT: [[TMP2:%.*]] = fptosi half [[TMP1]] to i16 -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void half_fix5(void) { @@ -96,20 +96,20 @@ void half_fix5(void) { // SIGNED-LABEL: @half_fix6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000 // SIGNED-NEXT: [[TMP3:%.*]] = fptoui float [[TMP2]] to i64 -// SIGNED-NEXT: store i64 [[TMP3]], i64* @ula, align 8 +// SIGNED-NEXT: store i64 [[TMP3]], ptr @ula, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @half_fix6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // UNSIGNED-NEXT: [[TMP3:%.*]] = fptosi float [[TMP2]] to i64 -// UNSIGNED-NEXT: store i64 [[TMP3]], i64* @ula, align 8 +// UNSIGNED-NEXT: store i64 [[TMP3]], ptr @ula, align 8 // UNSIGNED-NEXT: ret void // void half_fix6(void) { @@ -119,10 +119,10 @@ void half_fix6(void) { // CHECK-LABEL: @half_sat1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // CHECK-NEXT: [[TMP2:%.*]] = call i8 @llvm.fptosi.sat.i8.f16(half [[TMP1]]) -// CHECK-NEXT: store i8 [[TMP2]], i8* @sf_sat, align 1 +// CHECK-NEXT: store i8 [[TMP2]], ptr @sf_sat, align 1 // CHECK-NEXT: ret void // void half_sat1(void) { @@ -131,11 +131,11 @@ void half_sat1(void) { // CHECK-LABEL: @half_sat2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // CHECK-NEXT: [[TMP3:%.*]] = call i32 @llvm.fptosi.sat.i32.f32(float [[TMP2]]) -// CHECK-NEXT: store i32 [[TMP3]], i32* @lf_sat, align 4 +// CHECK-NEXT: store i32 [[TMP3]], ptr @lf_sat, align 4 // CHECK-NEXT: ret void // void half_sat2(void) { @@ -144,10 +144,10 @@ void half_sat2(void) { // CHECK-LABEL: @half_sat3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]]) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void half_sat3(void) { @@ -156,11 +156,11 @@ void half_sat3(void) { // CHECK-LABEL: @half_sat4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // CHECK-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // CHECK-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]]) -// CHECK-NEXT: store i64 [[TMP3]], i64* @la_sat, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @la_sat, align 8 // CHECK-NEXT: ret void // void half_sat4(void) { @@ -169,21 +169,21 @@ void half_sat4(void) { // SIGNED-LABEL: @half_sat5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 2.560000e+02 // SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.fptoui.sat.i16.f32(float [[TMP2]]) -// SIGNED-NEXT: store i16 [[TMP3]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP3]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @half_sat5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = fmul half [[TMP0]], 0xH5800 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.fptosi.sat.i16.f16(half [[TMP1]]) // UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]] -// UNSIGNED-NEXT: store i16 [[SATMIN]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[SATMIN]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void half_sat5(void) { @@ -192,22 +192,22 @@ void half_sat5(void) { // SIGNED-LABEL: @half_sat6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41F0000000000000 // SIGNED-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptoui.sat.i64.f32(float [[TMP2]]) -// SIGNED-NEXT: store i64 [[TMP3]], i64* @ula_sat, align 8 +// SIGNED-NEXT: store i64 [[TMP3]], ptr @ula_sat, align 8 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @half_sat6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, half* @h, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load half, ptr @h, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = fpext half [[TMP0]] to float // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x41E0000000000000 // UNSIGNED-NEXT: [[TMP3:%.*]] = call i64 @llvm.fptosi.sat.i64.f32(float [[TMP2]]) // UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i64 [[TMP3]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i64 0, i64 [[TMP3]] -// UNSIGNED-NEXT: store i64 [[SATMIN]], i64* @ula_sat, align 8 +// UNSIGNED-NEXT: store i64 [[SATMIN]], ptr @ula_sat, align 8 // UNSIGNED-NEXT: ret void // void half_sat6(void) { @@ -217,10 +217,10 @@ void half_sat6(void) { // CHECK-LABEL: @fix_half1( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i8 [[TMP0]] to half // CHECK-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000 -// CHECK-NEXT: store half [[TMP2]], half* @h, align 2 +// CHECK-NEXT: store half [[TMP2]], ptr @h, align 2 // CHECK-NEXT: ret void // void fix_half1(void) { @@ -229,11 +229,11 @@ void fix_half1(void) { // CHECK-LABEL: @fix_half2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i32 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000 // CHECK-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half -// CHECK-NEXT: store half [[TMP3]], half* @h, align 2 +// CHECK-NEXT: store half [[TMP3]], ptr @h, align 2 // CHECK-NEXT: ret void // void fix_half2(void) { @@ -242,10 +242,10 @@ void fix_half2(void) { // CHECK-LABEL: @fix_half3( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i16 [[TMP0]] to half // CHECK-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000 -// CHECK-NEXT: store half [[TMP2]], half* @h, align 2 +// CHECK-NEXT: store half [[TMP2]], ptr @h, align 2 // CHECK-NEXT: ret void // void fix_half3(void) { @@ -254,11 +254,11 @@ void fix_half3(void) { // CHECK-LABEL: @fix_half4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 // CHECK-NEXT: [[TMP1:%.*]] = sitofp i64 [[TMP0]] to float // CHECK-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000 // CHECK-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half -// CHECK-NEXT: store half [[TMP3]], half* @h, align 2 +// CHECK-NEXT: store half [[TMP3]], ptr @h, align 2 // CHECK-NEXT: ret void // void fix_half4(void) { @@ -267,19 +267,19 @@ void fix_half4(void) { // SIGNED-LABEL: @fix_half5( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 3.906250e-03 // SIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half -// SIGNED-NEXT: store half [[TMP3]], half* @h, align 2 +// SIGNED-NEXT: store half [[TMP3]], ptr @h, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_half5( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i16 [[TMP0]] to half // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul half [[TMP1]], 0xH2000 -// UNSIGNED-NEXT: store half [[TMP2]], half* @h, align 2 +// UNSIGNED-NEXT: store half [[TMP2]], ptr @h, align 2 // UNSIGNED-NEXT: ret void // void fix_half5(void) { @@ -288,20 +288,20 @@ void fix_half5(void) { // SIGNED-LABEL: @fix_half6( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 +// SIGNED-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 // SIGNED-NEXT: [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float // SIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3DF0000000000000 // SIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half -// SIGNED-NEXT: store half [[TMP3]], half* @h, align 2 +// SIGNED-NEXT: store half [[TMP3]], ptr @h, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @fix_half6( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 // UNSIGNED-NEXT: [[TMP1:%.*]] = uitofp i64 [[TMP0]] to float // UNSIGNED-NEXT: [[TMP2:%.*]] = fmul float [[TMP1]], 0x3E00000000000000 // UNSIGNED-NEXT: [[TMP3:%.*]] = fptrunc float [[TMP2]] to half -// UNSIGNED-NEXT: store half [[TMP3]], half* @h, align 2 +// UNSIGNED-NEXT: store half [[TMP3]], ptr @h, align 2 // UNSIGNED-NEXT: ret void // void fix_half6(void) { diff --git a/clang/test/Frontend/fixed_point_div.c b/clang/test/Frontend/fixed_point_div.c index ef33c1a7170dde..cf11b75233c8d6 100644 --- a/clang/test/Frontend/fixed_point_div.c +++ b/clang/test/Frontend/fixed_point_div.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a, a2, a3, a4; @@ -30,10 +30,10 @@ _Bool b; // CHECK-LABEL: @sdiv_sasasa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sdiv_sasasa(void) { @@ -42,12 +42,12 @@ void sdiv_sasasa(void) { // CHECK-LABEL: @sdiv_asaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sdiv_asaa(void) { @@ -56,11 +56,11 @@ void sdiv_asaa(void) { // CHECK-LABEL: @sdiv_sasasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sdiv_sasasf(void) { @@ -69,15 +69,15 @@ void sdiv_sasasf(void) { // CHECK-LABEL: @sdiv_sasaf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = call i24 @llvm.sdiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15) // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sdiv_sasaf(void) { @@ -86,12 +86,12 @@ void sdiv_sasaf(void) { // CHECK-LABEL: @sdiv_aasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15) -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sdiv_aasf(void) { @@ -100,15 +100,15 @@ void sdiv_aasf(void) { // CHECK-LABEL: @sdiv_aalf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i48 // CHECK-NEXT: [[TMP2:%.*]] = call i48 @llvm.sdiv.fix.i48(i48 [[UPSCALE]], i48 [[RESIZE1]], i32 31) // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i48 [[TMP2]], 16 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sdiv_aalf(void) { @@ -117,23 +117,23 @@ void sdiv_aalf(void) { // SIGNED-LABEL: @sdiv_sasausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.sdiv.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sdiv_sasausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sdiv_sasausa(void) { @@ -142,25 +142,25 @@ void sdiv_sasausa(void) { // SIGNED-LABEL: @sdiv_asaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = call i33 @llvm.sdiv.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sdiv_asaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void sdiv_asaua(void) { @@ -169,24 +169,24 @@ void sdiv_asaua(void) { // SIGNED-LABEL: @sdiv_sasausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.sdiv.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sdiv_sasausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sdiv_sasausf(void) { @@ -195,28 +195,28 @@ void sdiv_sasausf(void) { // SIGNED-LABEL: @sdiv_sasaulf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41 // SIGNED-NEXT: [[TMP2:%.*]] = call i41 @llvm.sdiv.fix.i41(i41 [[UPSCALE]], i41 [[RESIZE1]], i32 32) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sdiv_sasaulf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 24 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 31) // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i40 [[TMP2]], 24 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void sdiv_sasaulf(void) { @@ -225,14 +225,14 @@ void sdiv_sasaulf(void) { // CHECK-LABEL: @sdiv_aaaaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a2, align 4 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP0]], i32 [[TMP1]], i32 15) -// CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @a3, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a3, align 4 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP2]], i32 [[TMP3]], i32 15) -// CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a4, align 4 +// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a4, align 4 // CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[TMP4]], i32 [[TMP5]], i32 15) -// CHECK-NEXT: store i32 [[TMP6]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP6]], ptr @a, align 4 // CHECK-NEXT: ret void // void sdiv_aaaaa(void) { @@ -242,18 +242,18 @@ void sdiv_aaaaa(void) { // SIGNED-LABEL: @udiv_usausausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @udiv_usausausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void udiv_usausausa(void) { @@ -262,22 +262,22 @@ void udiv_usausausa(void) { // SIGNED-LABEL: @udiv_uausaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.udiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 16) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @udiv_uausaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void udiv_uausaua(void) { @@ -286,20 +286,20 @@ void udiv_uausaua(void) { // SIGNED-LABEL: @udiv_usausausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @udiv_usausausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void udiv_usausausf(void) { @@ -308,28 +308,28 @@ void udiv_usausausf(void) { // SIGNED-LABEL: @udiv_usausauf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // SIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.udiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @udiv_usausauf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.sdiv.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15) // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void udiv_usausauf(void) { @@ -339,14 +339,14 @@ void udiv_usausauf(void) { // CHECK-LABEL: @int_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasai(void) { @@ -355,14 +355,14 @@ void int_sasai(void) { // CHECK-LABEL: @int_sasaui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasaui(void) { @@ -371,26 +371,26 @@ void int_sasaui(void) { // SIGNED-LABEL: @int_usausai( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausai( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.sdiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausai(void) { @@ -399,26 +399,26 @@ void int_usausai(void) { // SIGNED-LABEL: @int_usausaui( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.udiv.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausaui( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.udiv.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausaui(void) { @@ -427,14 +427,14 @@ void int_usausaui(void) { // CHECK-LABEL: @int_lflfui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE1]], 31 // CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.sdiv.fix.i64(i64 [[RESIZE]], i64 [[UPSCALE]], i32 31) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i64 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void int_lflfui(void) { @@ -443,8 +443,8 @@ void int_lflfui(void) { // CHECK-LABEL: @int_aab( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @b, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 // CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 @@ -452,7 +452,7 @@ void int_lflfui(void) { // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.sdiv.fix.i47(i47 [[RESIZE]], i47 [[UPSCALE]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aab(void) { @@ -461,14 +461,14 @@ void int_aab(void) { // CHECK-LABEL: @int_aia( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.sdiv.fix.i47(i47 [[UPSCALE]], i47 [[RESIZE1]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aia(void) { @@ -477,26 +477,26 @@ void int_aia(void) { // SIGNED-LABEL: @int_usauiusa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i40 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.udiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usauiusa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i39 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.udiv.fix.i39(i39 [[UPSCALE]], i39 [[RESIZE1]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usauiusa(void) { @@ -505,14 +505,14 @@ void int_usauiusa(void) { // CHECK-LABEL: @int_sauisa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 7 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i40 // CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.sdiv.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sauisa(void) { @@ -522,10 +522,10 @@ void int_sauisa(void) { // CHECK-LABEL: @sat_sassasas( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa_sat, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa_sat, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasas(void) { @@ -534,20 +534,20 @@ void sat_sassasas(void) { // SIGNED-LABEL: @sat_usasusausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusausas(void) { @@ -556,24 +556,24 @@ void sat_usasusausas(void) { // SIGNED-LABEL: @sat_uasuausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.udiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 16) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_uasuausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sdiv.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15) // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE2]], i32* @ua_sat, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE2]], ptr @ua_sat, align 4 // UNSIGNED-NEXT: ret void // void sat_uasuausas(void) { @@ -582,8 +582,8 @@ void sat_uasuausas(void) { // CHECK-LABEL: @sat_sassasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -593,7 +593,7 @@ void sat_uasuausas(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 -32768, i39 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasi(void) { @@ -602,8 +602,8 @@ void sat_sassasi(void) { // CHECK-LABEL: @sat_sassasui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 @@ -613,7 +613,7 @@ void sat_sassasi(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 -32768, i40 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasui(void) { @@ -622,20 +622,20 @@ void sat_sassasui(void) { // SIGNED-LABEL: @sat_ufsufsufs( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.udiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 16) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @uf_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_ufsufsufs( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.sdiv.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 15) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @uf_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @uf_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_ufsufsufs(void) { @@ -644,8 +644,8 @@ void sat_ufsufsufs(void) { // SIGNED-LABEL: @sat_usasusasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 @@ -655,13 +655,13 @@ void sat_ufsufsufs(void) { // SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -671,7 +671,7 @@ void sat_ufsufsufs(void) { // UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 0, i39 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusasi(void) { diff --git a/clang/test/Frontend/fixed_point_mul.c b/clang/test/Frontend/fixed_point_mul.c index 83d586af4ec5e2..fc658487104170 100644 --- a/clang/test/Frontend/fixed_point_mul.c +++ b/clang/test/Frontend/fixed_point_mul.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a, a2, a3, a4; @@ -30,10 +30,10 @@ _Bool b; // CHECK-LABEL: @smul_sasasa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void smul_sasasa(void) { @@ -42,12 +42,12 @@ void smul_sasasa(void) { // CHECK-LABEL: @smul_asaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void smul_asaa(void) { @@ -56,11 +56,11 @@ void smul_asaa(void) { // CHECK-LABEL: @smul_sasasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void smul_sasasf(void) { @@ -69,15 +69,15 @@ void smul_sasasf(void) { // CHECK-LABEL: @smul_sasaf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = call i24 @llvm.smul.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15) // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void smul_sasaf(void) { @@ -86,12 +86,12 @@ void smul_sasaf(void) { // CHECK-LABEL: @smul_aasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15) -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void smul_aasf(void) { @@ -100,15 +100,15 @@ void smul_aasf(void) { // CHECK-LABEL: @smul_aalf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i48 // CHECK-NEXT: [[TMP2:%.*]] = call i48 @llvm.smul.fix.i48(i48 [[UPSCALE]], i48 [[RESIZE1]], i32 31) // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i48 [[TMP2]], 16 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void smul_aalf(void) { @@ -117,23 +117,23 @@ void smul_aalf(void) { // SIGNED-LABEL: @smul_sasausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.smul.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @smul_sasausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void smul_sasausa(void) { @@ -142,25 +142,25 @@ void smul_sasausa(void) { // SIGNED-LABEL: @smul_asaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = call i33 @llvm.smul.fix.i33(i33 [[UPSCALE]], i33 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @smul_asaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void smul_asaua(void) { @@ -169,24 +169,24 @@ void smul_asaua(void) { // SIGNED-LABEL: @smul_sasausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = call i17 @llvm.smul.fix.i17(i17 [[UPSCALE]], i17 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @smul_sasausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void smul_sasausf(void) { @@ -195,28 +195,28 @@ void smul_sasausf(void) { // SIGNED-LABEL: @smul_sasaulf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41 // SIGNED-NEXT: [[TMP2:%.*]] = call i41 @llvm.smul.fix.i41(i41 [[UPSCALE]], i41 [[RESIZE1]], i32 32) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @smul_sasaulf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 24 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.smul.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 31) // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i40 [[TMP2]], 24 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void smul_sasaulf(void) { @@ -225,14 +225,14 @@ void smul_sasaulf(void) { // CHECK-LABEL: @smul_aaaaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a2, align 4 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[TMP0]], i32 [[TMP1]], i32 15) -// CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @a3, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a3, align 4 // CHECK-NEXT: [[TMP4:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[TMP2]], i32 [[TMP3]], i32 15) -// CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a4, align 4 +// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a4, align 4 // CHECK-NEXT: [[TMP6:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[TMP4]], i32 [[TMP5]], i32 15) -// CHECK-NEXT: store i32 [[TMP6]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP6]], ptr @a, align 4 // CHECK-NEXT: ret void // void smul_aaaaa(void) { @@ -242,18 +242,18 @@ void smul_aaaaa(void) { // SIGNED-LABEL: @umul_usausausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @umul_usausausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void umul_usausausa(void) { @@ -262,22 +262,22 @@ void umul_usausausa(void) { // SIGNED-LABEL: @umul_uausaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.umul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 16) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @umul_uausaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.i32(i32 [[UPSCALE]], i32 [[TMP1]], i32 15) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void umul_uausaua(void) { @@ -286,20 +286,20 @@ void umul_uausaua(void) { // SIGNED-LABEL: @umul_usausausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.umul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @umul_usausausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.i16(i16 [[TMP0]], i16 [[RESIZE]], i32 7) -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void umul_usausausf(void) { @@ -308,28 +308,28 @@ void umul_usausausf(void) { // SIGNED-LABEL: @umul_usausauf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // SIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.umul.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 16) // SIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @umul_usausauf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i24 @llvm.smul.fix.i24(i24 [[UPSCALE]], i24 [[RESIZE1]], i32 15) // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void umul_usausauf(void) { @@ -339,14 +339,14 @@ void umul_usausauf(void) { // CHECK-LABEL: @int_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = call i39 @llvm.smul.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasai(void) { @@ -355,14 +355,14 @@ void int_sasai(void) { // CHECK-LABEL: @int_sasaui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.smul.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasaui(void) { @@ -371,26 +371,26 @@ void int_sasaui(void) { // SIGNED-LABEL: @int_usausai( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.smul.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausai( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.smul.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausai(void) { @@ -399,26 +399,26 @@ void int_usausai(void) { // SIGNED-LABEL: @int_usausaui( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.umul.fix.i40(i40 [[RESIZE]], i40 [[UPSCALE]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausaui( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.umul.fix.i39(i39 [[RESIZE]], i39 [[UPSCALE]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausaui(void) { @@ -427,14 +427,14 @@ void int_usausaui(void) { // CHECK-LABEL: @int_lflfui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE1]], 31 // CHECK-NEXT: [[TMP2:%.*]] = call i64 @llvm.smul.fix.i64(i64 [[RESIZE]], i64 [[UPSCALE]], i32 31) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i64 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void int_lflfui(void) { @@ -443,8 +443,8 @@ void int_lflfui(void) { // CHECK-LABEL: @int_aab( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @b, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 // CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 @@ -452,7 +452,7 @@ void int_lflfui(void) { // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.smul.fix.i47(i47 [[RESIZE]], i47 [[UPSCALE]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aab(void) { @@ -461,14 +461,14 @@ void int_aab(void) { // CHECK-LABEL: @int_aia( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @i, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @i, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE]], 15 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i47 // CHECK-NEXT: [[TMP2:%.*]] = call i47 @llvm.smul.fix.i47(i47 [[UPSCALE]], i47 [[RESIZE1]], i32 15) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aia(void) { @@ -477,26 +477,26 @@ void int_aia(void) { // SIGNED-LABEL: @int_usauiusa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 8 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i40 // SIGNED-NEXT: [[TMP2:%.*]] = call i40 @llvm.umul.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 8) // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usauiusa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE]], 7 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i39 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i39 @llvm.umul.fix.i39(i39 [[UPSCALE]], i39 [[RESIZE1]], i32 7) // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usauiusa(void) { @@ -505,14 +505,14 @@ void int_usauiusa(void) { // CHECK-LABEL: @int_sauisa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ui, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ui, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i32 [[TMP0]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 7 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i40 // CHECK-NEXT: [[TMP2:%.*]] = call i40 @llvm.smul.fix.i40(i40 [[UPSCALE]], i40 [[RESIZE1]], i32 7) // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sauisa(void) { @@ -522,10 +522,10 @@ void int_sauisa(void) { // CHECK-LABEL: @sat_sassasas( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa_sat, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa_sat, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasas(void) { @@ -534,20 +534,20 @@ void sat_sassasas(void) { // SIGNED-LABEL: @sat_usasusausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.umul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 8) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 7) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusausas(void) { @@ -556,24 +556,24 @@ void sat_usasusausas(void) { // SIGNED-LABEL: @sat_uasuausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.umul.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 16) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_uasuausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.smul.fix.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]], i32 15) // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i32 [[TMP2]] to i31 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE2]], i32* @ua_sat, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE2]], ptr @ua_sat, align 4 // UNSIGNED-NEXT: ret void // void sat_uasuausas(void) { @@ -582,8 +582,8 @@ void sat_uasuausas(void) { // CHECK-LABEL: @sat_sassasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -593,7 +593,7 @@ void sat_uasuausas(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 -32768, i39 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasi(void) { @@ -602,8 +602,8 @@ void sat_sassasi(void) { // CHECK-LABEL: @sat_sassasui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 @@ -613,7 +613,7 @@ void sat_sassasi(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 -32768, i40 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasui(void) { @@ -622,20 +622,20 @@ void sat_sassasui(void) { // SIGNED-LABEL: @sat_ufsufsufs( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.umul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 16) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @uf_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_ufsufsufs( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.smul.fix.sat.i16(i16 [[TMP0]], i16 [[TMP1]], i32 15) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP2]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @uf_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @uf_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_ufsufsufs(void) { @@ -644,8 +644,8 @@ void sat_ufsufsufs(void) { // SIGNED-LABEL: @sat_usasusasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 @@ -655,13 +655,13 @@ void sat_ufsufsufs(void) { // SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -671,7 +671,7 @@ void sat_ufsufsufs(void) { // UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 0, i39 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusasi(void) { diff --git a/clang/test/Frontend/fixed_point_same_fbits.c b/clang/test/Frontend/fixed_point_same_fbits.c index 7574ee23cedc84..27762e5ca12a92 100644 --- a/clang/test/Frontend/fixed_point_same_fbits.c +++ b/clang/test/Frontend/fixed_point_same_fbits.c @@ -1,5 +1,5 @@ -// RUN: %clang -Xclang -no-opaque-pointers -ffixed-point -S -emit-llvm -o - %s | FileCheck %s -check-prefix=DEFAULT -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm -o - %s | FileCheck %s -check-prefix=SAME +// RUN: %clang -ffixed-point -S -emit-llvm -o - %s | FileCheck %s -check-prefix=DEFAULT +// RUN: %clang_cc1 -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm -o - %s | FileCheck %s -check-prefix=SAME /* The scale for unsigned fixed point types should be the same as that of signed * fixed point types when -fsame-fbits is enabled. */ @@ -12,17 +12,17 @@ void func(void) { unsigned _Fract u_fract = 0.5ur; unsigned long _Fract u_long_fract = 0.5ulr; -// DEFAULT: store i16 128, i16* {{.*}}, align 2 -// DEFAULT: store i32 32768, i32* {{.*}}, align 4 -// DEFAULT: store i64 2147483648, i64* {{.*}}, align 8 -// DEFAULT: store i8 -128, i8* {{.*}}, align 1 -// DEFAULT: store i16 -32768, i16* {{.*}}, align 2 -// DEFAULT: store i32 -2147483648, i32* {{.*}}, align 4 +// DEFAULT: store i16 128, ptr {{.*}}, align 2 +// DEFAULT: store i32 32768, ptr {{.*}}, align 4 +// DEFAULT: store i64 2147483648, ptr {{.*}}, align 8 +// DEFAULT: store i8 -128, ptr {{.*}}, align 1 +// DEFAULT: store i16 -32768, ptr {{.*}}, align 2 +// DEFAULT: store i32 -2147483648, ptr {{.*}}, align 4 -// SAME: store i16 64, i16* {{.*}}, align 2 -// SAME: store i32 16384, i32* {{.*}}, align 4 -// SAME: store i64 1073741824, i64* {{.*}}, align 8 -// SAME: store i8 64, i8* {{.*}}, align 1 -// SAME: store i16 16384, i16* {{.*}}, align 2 -// SAME: store i32 1073741824, i32* {{.*}}, align 4 +// SAME: store i16 64, ptr {{.*}}, align 2 +// SAME: store i32 16384, ptr {{.*}}, align 4 +// SAME: store i64 1073741824, ptr {{.*}}, align 8 +// SAME: store i8 64, ptr {{.*}}, align 1 +// SAME: store i16 16384, ptr {{.*}}, align 2 +// SAME: store i32 1073741824, ptr {{.*}}, align 4 } diff --git a/clang/test/Frontend/fixed_point_shift.c b/clang/test/Frontend/fixed_point_shift.c index de782d4e59ebb7..cbfc9181c76278 100644 --- a/clang/test/Frontend/fixed_point_shift.c +++ b/clang/test/Frontend/fixed_point_shift.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a; @@ -36,11 +36,11 @@ unsigned u; // CHECK-LABEL: @sleft_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sleft_sasai(void) { @@ -49,10 +49,10 @@ void sleft_sasai(void) { // CHECK-LABEL: @sleft_aai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sleft_aai(void) { @@ -61,11 +61,11 @@ void sleft_aai(void) { // CHECK-LABEL: @sleft_lalai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i64 [[TMP3]], i64* @la, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @la, align 8 // CHECK-NEXT: ret void // void sleft_lalai(void) { @@ -74,11 +74,11 @@ void sleft_lalai(void) { // CHECK-LABEL: @sleft_sfsfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i8 [[TMP3]], i8* @sf, align 1 +// CHECK-NEXT: store i8 [[TMP3]], ptr @sf, align 1 // CHECK-NEXT: ret void // void sleft_sfsfi(void) { @@ -87,11 +87,11 @@ void sleft_sfsfi(void) { // CHECK-LABEL: @sleft_ffi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2 // CHECK-NEXT: ret void // void sleft_ffi(void) { @@ -100,10 +100,10 @@ void sleft_ffi(void) { // CHECK-LABEL: @sleft_lflfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void sleft_lflfi(void) { @@ -112,10 +112,10 @@ void sleft_lflfi(void) { // CHECK-LABEL: @sleft_aau( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sleft_aau(void) { @@ -124,11 +124,11 @@ void sleft_aau(void) { // CHECK-LABEL: @sleft_ffu( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2 // CHECK-NEXT: ret void // void sleft_ffu(void) { @@ -138,11 +138,11 @@ void sleft_ffu(void) { // CHECK-LABEL: @uleft_usausai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @usa, align 2 // CHECK-NEXT: ret void // void uleft_usausai(void) { @@ -151,10 +151,10 @@ void uleft_usausai(void) { // CHECK-LABEL: @uleft_uauai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void uleft_uauai(void) { @@ -163,11 +163,11 @@ void uleft_uauai(void) { // CHECK-LABEL: @uleft_ulaulai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = shl i64 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i64 [[TMP3]], i64* @ula, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @ula, align 8 // CHECK-NEXT: ret void // void uleft_ulaulai(void) { @@ -176,11 +176,11 @@ void uleft_ulaulai(void) { // CHECK-LABEL: @uleft_usfusfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @usf, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @usf, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // CHECK-NEXT: [[TMP3:%.*]] = shl i8 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i8 [[TMP3]], i8* @usf, align 1 +// CHECK-NEXT: store i8 [[TMP3]], ptr @usf, align 1 // CHECK-NEXT: ret void // void uleft_usfusfi(void) { @@ -189,11 +189,11 @@ void uleft_usfusfi(void) { // CHECK-LABEL: @uleft_ufufi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2 // CHECK-NEXT: ret void // void uleft_ufufi(void) { @@ -202,10 +202,10 @@ void uleft_ufufi(void) { // CHECK-LABEL: @uleft_ulfulfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ulf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ulf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ulf, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ulf, align 4 // CHECK-NEXT: ret void // void uleft_ulfulfi(void) { @@ -214,10 +214,10 @@ void uleft_ulfulfi(void) { // CHECK-LABEL: @uleft_uauau( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = shl i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void uleft_uauau(void) { @@ -226,11 +226,11 @@ void uleft_uauau(void) { // CHECK-LABEL: @uleft_ufufu( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = shl i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2 // CHECK-NEXT: ret void // void uleft_ufufu(void) { @@ -240,11 +240,11 @@ void uleft_ufufu(void) { // CHECK-LABEL: @sright_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @sa, align 2 // CHECK-NEXT: ret void // void sright_sasai(void) { @@ -253,10 +253,10 @@ void sright_sasai(void) { // CHECK-LABEL: @sright_aai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sright_aai(void) { @@ -265,11 +265,11 @@ void sright_aai(void) { // CHECK-LABEL: @sright_lalai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @la, align 8 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @la, align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = ashr i64 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i64 [[TMP3]], i64* @la, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @la, align 8 // CHECK-NEXT: ret void // void sright_lalai(void) { @@ -278,11 +278,11 @@ void sright_lalai(void) { // CHECK-LABEL: @sright_sfsfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // CHECK-NEXT: [[TMP3:%.*]] = ashr i8 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i8 [[TMP3]], i8* @sf, align 1 +// CHECK-NEXT: store i8 [[TMP3]], ptr @sf, align 1 // CHECK-NEXT: ret void // void sright_sfsfi(void) { @@ -291,11 +291,11 @@ void sright_sfsfi(void) { // CHECK-LABEL: @sright_ffi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2 // CHECK-NEXT: ret void // void sright_ffi(void) { @@ -304,10 +304,10 @@ void sright_ffi(void) { // CHECK-LABEL: @sright_lflfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void sright_lflfi(void) { @@ -316,10 +316,10 @@ void sright_lflfi(void) { // CHECK-LABEL: @sright_aau( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = ashr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void sright_aau(void) { @@ -328,11 +328,11 @@ void sright_aau(void) { // CHECK-LABEL: @sright_ffu( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = ashr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @f, align 2 // CHECK-NEXT: ret void // void sright_ffu(void) { @@ -342,11 +342,11 @@ void sright_ffu(void) { // CHECK-LABEL: @uright_usausai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @usa, align 2 // CHECK-NEXT: ret void // void uright_usausai(void) { @@ -355,10 +355,10 @@ void uright_usausai(void) { // CHECK-LABEL: @uright_uauai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void uright_uauai(void) { @@ -367,11 +367,11 @@ void uright_uauai(void) { // CHECK-LABEL: @uright_ulaulai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* @ula, align 8 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr @ula, align 8 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[TMP3:%.*]] = lshr i64 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i64 [[TMP3]], i64* @ula, align 8 +// CHECK-NEXT: store i64 [[TMP3]], ptr @ula, align 8 // CHECK-NEXT: ret void // void uright_ulaulai(void) { @@ -380,11 +380,11 @@ void uright_ulaulai(void) { // CHECK-LABEL: @uright_usfusfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @usf, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @usf, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // CHECK-NEXT: [[TMP3:%.*]] = lshr i8 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i8 [[TMP3]], i8* @usf, align 1 +// CHECK-NEXT: store i8 [[TMP3]], ptr @usf, align 1 // CHECK-NEXT: ret void // void uright_usfusfi(void) { @@ -393,11 +393,11 @@ void uright_usfusfi(void) { // CHECK-LABEL: @uright_ufufi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2 // CHECK-NEXT: ret void // void uright_ufufi(void) { @@ -406,10 +406,10 @@ void uright_ufufi(void) { // CHECK-LABEL: @uright_ulfulfi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ulf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ulf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ulf, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ulf, align 4 // CHECK-NEXT: ret void // void uright_ulfulfi(void) { @@ -418,10 +418,10 @@ void uright_ulfulfi(void) { // CHECK-LABEL: @uright_uauau( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void uright_uauau(void) { @@ -430,11 +430,11 @@ void uright_uauau(void) { // CHECK-LABEL: @uright_ufufu( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @u, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @u, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = lshr i16 [[TMP0]], [[TMP2]] -// CHECK-NEXT: store i16 [[TMP3]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @uf, align 2 // CHECK-NEXT: ret void // void uright_ufufu(void) { @@ -444,11 +444,11 @@ void uright_ufufu(void) { // CHECK-LABEL: @satleft_sassasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// CHECK-NEXT: store i16 [[TMP3]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void satleft_sassasi(void) { @@ -457,10 +457,10 @@ void satleft_sassasi(void) { // CHECK-LABEL: @satleft_asasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a_sat, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a_sat, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]]) -// CHECK-NEXT: store i32 [[TMP2]], i32* @a_sat, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a_sat, align 4 // CHECK-NEXT: ret void // void satleft_asasi(void) { @@ -469,11 +469,11 @@ void satleft_asasi(void) { // CHECK-LABEL: @satleft_sfssfsi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* @sf_sat, align 1 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr @sf_sat, align 1 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // CHECK-NEXT: [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]]) -// CHECK-NEXT: store i8 [[TMP3]], i8* @sf_sat, align 1 +// CHECK-NEXT: store i8 [[TMP3]], ptr @sf_sat, align 1 // CHECK-NEXT: ret void // void satleft_sfssfsi(void) { @@ -482,11 +482,11 @@ void satleft_sfssfsi(void) { // CHECK-LABEL: @satleft_fsfsi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // CHECK-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// CHECK-NEXT: store i16 [[TMP3]], i16* @f_sat, align 2 +// CHECK-NEXT: store i16 [[TMP3]], ptr @f_sat, align 2 // CHECK-NEXT: ret void // void satleft_fsfsi(void) { @@ -495,20 +495,20 @@ void satleft_fsfsi(void) { // SIGNED-LABEL: @satleft_usasusasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// SIGNED-NEXT: store i16 [[TMP3]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP3]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @satleft_usasusasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// UNSIGNED-NEXT: store i16 [[TMP3]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[TMP3]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void satleft_usasusasi(void) { @@ -517,18 +517,18 @@ void satleft_usasusasi(void) { // SIGNED-LABEL: @satleft_uasuasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua_sat, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.ushl.sat.i32(i32 [[TMP0]], i32 [[TMP1]]) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @satleft_uasuasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua_sat, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua_sat, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.sshl.sat.i32(i32 [[TMP0]], i32 [[TMP1]]) -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // UNSIGNED-NEXT: ret void // void satleft_uasuasi(void) { @@ -537,20 +537,20 @@ void satleft_uasuasi(void) { // SIGNED-LABEL: @satleft_usfsusfsi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @usf_sat, align 1 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // SIGNED-NEXT: [[TMP3:%.*]] = call i8 @llvm.ushl.sat.i8(i8 [[TMP0]], i8 [[TMP2]]) -// SIGNED-NEXT: store i8 [[TMP3]], i8* @usf_sat, align 1 +// SIGNED-NEXT: store i8 [[TMP3]], ptr @usf_sat, align 1 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @satleft_usfsusfsi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, i8* @usf_sat, align 1 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i8, ptr @usf_sat, align 1 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i8 // UNSIGNED-NEXT: [[TMP3:%.*]] = call i8 @llvm.sshl.sat.i8(i8 [[TMP0]], i8 [[TMP2]]) -// UNSIGNED-NEXT: store i8 [[TMP3]], i8* @usf_sat, align 1 +// UNSIGNED-NEXT: store i8 [[TMP3]], ptr @usf_sat, align 1 // UNSIGNED-NEXT: ret void // void satleft_usfsusfsi(void) { @@ -559,20 +559,20 @@ void satleft_usfsusfsi(void) { // SIGNED-LABEL: @satleft_ufsufsi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // SIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.ushl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// SIGNED-NEXT: store i16 [[TMP3]], i16* @uf_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP3]], ptr @uf_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @satleft_ufsufsi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[TMP2:%.*]] = trunc i32 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP3:%.*]] = call i16 @llvm.sshl.sat.i16(i16 [[TMP0]], i16 [[TMP2]]) -// UNSIGNED-NEXT: store i16 [[TMP3]], i16* @uf_sat, align 2 +// UNSIGNED-NEXT: store i16 [[TMP3]], ptr @uf_sat, align 2 // UNSIGNED-NEXT: ret void // void satleft_ufsufsi(void) { diff --git a/clang/test/Frontend/fixed_point_sub.c b/clang/test/Frontend/fixed_point_sub.c index 7098dd18a5bb36..ecadeccd8bb5d4 100644 --- a/clang/test/Frontend/fixed_point_sub.c +++ b/clang/test/Frontend/fixed_point_sub.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -ffixed-point -triple x86_64-unknown-linux-gnu -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED short _Accum sa; _Accum a, a2, a3, a4; @@ -30,10 +30,10 @@ _Bool b; // CHECK-LABEL: @ssub_sasasa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void ssub_sasasa(void) { @@ -42,12 +42,12 @@ void ssub_sasasa(void) { // CHECK-LABEL: @ssub_asaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[UPSCALE]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void ssub_asaa(void) { @@ -56,11 +56,11 @@ void ssub_asaa(void) { // CHECK-LABEL: @ssub_sasasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[RESIZE]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void ssub_sasasf(void) { @@ -69,15 +69,15 @@ void ssub_sasasf(void) { // CHECK-LABEL: @ssub_sasaf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = sub i24 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void ssub_sasaf(void) { @@ -86,12 +86,12 @@ void ssub_sasaf(void) { // CHECK-LABEL: @ssub_aasf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @sf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @sf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = sext i8 [[TMP1]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[UPSCALE]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @a, align 4 // CHECK-NEXT: ret void // void ssub_aasf(void) { @@ -100,15 +100,15 @@ void ssub_aasf(void) { // CHECK-LABEL: @ssub_aalf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i48 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i48 [[RESIZE]], 16 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i48 // CHECK-NEXT: [[TMP2:%.*]] = sub i48 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = ashr i48 [[TMP2]], 16 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i48 [[DOWNSCALE]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void ssub_aalf(void) { @@ -117,23 +117,23 @@ void ssub_aalf(void) { // SIGNED-LABEL: @ssub_sasausa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = sub i17 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @ssub_sasausa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[TMP1]] -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void ssub_sasausa(void) { @@ -142,25 +142,25 @@ void ssub_sasausa(void) { // SIGNED-LABEL: @ssub_asaua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i33 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i33 [[RESIZE]], 9 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i33 // SIGNED-NEXT: [[TMP2:%.*]] = sub i33 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i33 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i33 [[DOWNSCALE]] to i32 -// SIGNED-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// SIGNED-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @ssub_asaua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i32 [[UPSCALE]], [[TMP1]] -// UNSIGNED-NEXT: store i32 [[TMP2]], i32* @a, align 4 +// UNSIGNED-NEXT: store i32 [[TMP2]], ptr @a, align 4 // UNSIGNED-NEXT: ret void // void ssub_asaua(void) { @@ -169,24 +169,24 @@ void ssub_asaua(void) { // SIGNED-LABEL: @ssub_sasausf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i17 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i17 [[RESIZE]], 1 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i8 [[TMP1]] to i17 // SIGNED-NEXT: [[TMP2:%.*]] = sub i17 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i17 [[TMP2]], 1 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i17 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @ssub_sasausf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[RESIZE]] -// UNSIGNED-NEXT: store i16 [[TMP2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void ssub_sasausf(void) { @@ -195,28 +195,28 @@ void ssub_sasausf(void) { // SIGNED-LABEL: @ssub_sasaulf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i41 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i41 [[RESIZE]], 25 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i41 // SIGNED-NEXT: [[TMP2:%.*]] = sub i41 [[UPSCALE]], [[RESIZE1]] // SIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i41 [[TMP2]], 25 // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i41 [[DOWNSCALE]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @ssub_sasaulf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ulf, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ulf, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE]], 24 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i40 [[UPSCALE]], [[RESIZE1]] // UNSIGNED-NEXT: [[DOWNSCALE:%.*]] = ashr i40 [[TMP2]], 24 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[DOWNSCALE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // UNSIGNED-NEXT: ret void // void ssub_sasaulf(void) { @@ -225,14 +225,14 @@ void ssub_sasaulf(void) { // CHECK-LABEL: @ssub_aaaaa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @a2, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @a2, align 4 // CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[TMP0]], [[TMP1]] -// CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* @a3, align 4 +// CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr @a3, align 4 // CHECK-NEXT: [[TMP4:%.*]] = sub i32 [[TMP2]], [[TMP3]] -// CHECK-NEXT: [[TMP5:%.*]] = load i32, i32* @a4, align 4 +// CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr @a4, align 4 // CHECK-NEXT: [[TMP6:%.*]] = sub i32 [[TMP4]], [[TMP5]] -// CHECK-NEXT: store i32 [[TMP6]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP6]], ptr @a, align 4 // CHECK-NEXT: ret void // void ssub_aaaaa(void) { @@ -242,10 +242,10 @@ void ssub_aaaaa(void) { // CHECK-LABEL: @usub_usausausa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @usa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @usa, align 2 // CHECK-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[TMP1]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void usub_usausausa(void) { @@ -254,12 +254,12 @@ void usub_usausausa(void) { // CHECK-LABEL: @usub_uausaua( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ua, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ua, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i32 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[UPSCALE]], [[TMP1]] -// CHECK-NEXT: store i32 [[TMP2]], i32* @ua, align 4 +// CHECK-NEXT: store i32 [[TMP2]], ptr @ua, align 4 // CHECK-NEXT: ret void // void usub_uausaua(void) { @@ -268,11 +268,11 @@ void usub_uausaua(void) { // CHECK-LABEL: @usub_usausausf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @usf, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @usf, align 1 // CHECK-NEXT: [[RESIZE:%.*]] = zext i8 [[TMP1]] to i16 // CHECK-NEXT: [[TMP2:%.*]] = sub i16 [[TMP0]], [[RESIZE]] -// CHECK-NEXT: store i16 [[TMP2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void usub_usausausf(void) { @@ -281,15 +281,15 @@ void usub_usausausf(void) { // CHECK-LABEL: @usub_usausauf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i24 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i24 [[RESIZE]], 8 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i16 [[TMP1]] to i24 // CHECK-NEXT: [[TMP2:%.*]] = sub i24 [[UPSCALE]], [[RESIZE1]] // CHECK-NEXT: [[DOWNSCALE:%.*]] = lshr i24 [[TMP2]], 8 // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i24 [[DOWNSCALE]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // CHECK-NEXT: ret void // void usub_usausauf(void) { @@ -299,14 +299,14 @@ void usub_usausauf(void) { // CHECK-LABEL: @int_sasai( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = sub i39 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasai(void) { @@ -315,14 +315,14 @@ void int_sasai(void) { // CHECK-LABEL: @int_sasaui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 // CHECK-NEXT: [[TMP2:%.*]] = sub i40 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa, align 2 // CHECK-NEXT: ret void // void int_sasaui(void) { @@ -331,26 +331,26 @@ void int_sasaui(void) { // SIGNED-LABEL: @int_usausai( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = sub i40 [[RESIZE]], [[UPSCALE]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausai( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i39 [[RESIZE]], [[UPSCALE]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausai(void) { @@ -359,26 +359,26 @@ void int_usausai(void) { // SIGNED-LABEL: @int_usausaui( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = sub i40 [[RESIZE]], [[UPSCALE]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[TMP2]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @int_usausaui( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 // UNSIGNED-NEXT: [[TMP2:%.*]] = sub i39 [[RESIZE]], [[UPSCALE]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[TMP2]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void int_usausaui(void) { @@ -387,14 +387,14 @@ void int_usausaui(void) { // CHECK-LABEL: @int_lflfui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i64 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i64 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i64 [[RESIZE1]], 31 // CHECK-NEXT: [[TMP2:%.*]] = sub i64 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i64 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @lf, align 4 // CHECK-NEXT: ret void // void int_lflfui(void) { @@ -403,8 +403,8 @@ void int_lflfui(void) { // CHECK-LABEL: @int_aab( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: [[TMP1:%.*]] = load i8, i8* @b, align 1 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: [[TMP1:%.*]] = load i8, ptr @b, align 1 // CHECK-NEXT: [[TOBOOL:%.*]] = trunc i8 [[TMP1]] to i1 // CHECK-NEXT: [[CONV:%.*]] = zext i1 [[TOBOOL]] to i32 // CHECK-NEXT: [[RESIZE:%.*]] = sext i32 [[TMP0]] to i47 @@ -412,7 +412,7 @@ void int_lflfui(void) { // CHECK-NEXT: [[UPSCALE:%.*]] = shl i47 [[RESIZE1]], 15 // CHECK-NEXT: [[TMP2:%.*]] = sub i47 [[RESIZE]], [[UPSCALE]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i47 [[TMP2]] to i32 -// CHECK-NEXT: store i32 [[RESIZE2]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[RESIZE2]], ptr @a, align 4 // CHECK-NEXT: ret void // void int_aab(void) { @@ -422,10 +422,10 @@ void int_aab(void) { // CHECK-LABEL: @sat_sassasas( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i16, i16* @sa_sat, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i16, ptr @sa_sat, align 2 // CHECK-NEXT: [[TMP2:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// CHECK-NEXT: store i16 [[TMP2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[TMP2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasas(void) { @@ -434,22 +434,22 @@ void sat_sassasas(void) { // SIGNED-LABEL: @sat_usasusausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) // UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusausas(void) { @@ -458,18 +458,18 @@ void sat_usasusausas(void) { // SIGNED-LABEL: @sat_uasuausas( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // SIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]]) -// SIGNED-NEXT: store i32 [[TMP2]], i32* @ua_sat, align 4 +// SIGNED-NEXT: store i32 [[TMP2]], ptr @ua_sat, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_uasuausas( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @usa_sat, align 2 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP1]] to i32 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i32 [[RESIZE]], 8 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 [[UPSCALE]]) @@ -477,7 +477,7 @@ void sat_usasusausas(void) { // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i32 0, i32 [[TMP2]] // UNSIGNED-NEXT: [[RESIZE1:%.*]] = trunc i32 [[SATMIN]] to i31 // UNSIGNED-NEXT: [[RESIZE2:%.*]] = zext i31 [[RESIZE1]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE2]], i32* @ua_sat, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE2]], ptr @ua_sat, align 4 // UNSIGNED-NEXT: ret void // void sat_uasuausas(void) { @@ -486,8 +486,8 @@ void sat_uasuausas(void) { // CHECK-LABEL: @sat_sassasi( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i39 // CHECK-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -497,7 +497,7 @@ void sat_uasuausas(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 -32768, i39 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasi(void) { @@ -506,8 +506,8 @@ void sat_sassasi(void) { // CHECK-LABEL: @sat_sassasui( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sa_sat, align 2 -// CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* @ui, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sa_sat, align 2 +// CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr @ui, align 4 // CHECK-NEXT: [[RESIZE:%.*]] = sext i16 [[TMP0]] to i40 // CHECK-NEXT: [[RESIZE1:%.*]] = zext i32 [[TMP1]] to i40 // CHECK-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 7 @@ -517,7 +517,7 @@ void sat_sassasi(void) { // CHECK-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], -32768 // CHECK-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 -32768, i40 [[SATMAX]] // CHECK-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// CHECK-NEXT: store i16 [[RESIZE2]], i16* @sa_sat, align 2 +// CHECK-NEXT: store i16 [[RESIZE2]], ptr @sa_sat, align 2 // CHECK-NEXT: ret void // void sat_sassasui(void) { @@ -526,22 +526,22 @@ void sat_sassasui(void) { // SIGNED-LABEL: @sat_ufsufsufs( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // SIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) -// SIGNED-NEXT: store i16 [[TMP2]], i16* @uf_sat, align 2 +// SIGNED-NEXT: store i16 [[TMP2]], ptr @uf_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_ufsufsufs( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, i16* @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i16, ptr @uf_sat, align 2 // UNSIGNED-NEXT: [[TMP2:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 [[TMP1]]) // UNSIGNED-NEXT: [[TMP3:%.*]] = icmp slt i16 [[TMP2]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP3]], i16 0, i16 [[TMP2]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @uf_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @uf_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_ufsufsufs(void) { @@ -550,8 +550,8 @@ void sat_ufsufsufs(void) { // SIGNED-LABEL: @sat_usasusasi( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// SIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// SIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // SIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i40 // SIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i40 // SIGNED-NEXT: [[UPSCALE:%.*]] = shl i40 [[RESIZE1]], 8 @@ -561,13 +561,13 @@ void sat_ufsufsufs(void) { // SIGNED-NEXT: [[TMP4:%.*]] = icmp slt i40 [[SATMAX]], 0 // SIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i40 0, i40 [[SATMAX]] // SIGNED-NEXT: [[RESIZE2:%.*]] = trunc i40 [[SATMIN]] to i16 -// SIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// SIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @sat_usasusasi( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa_sat, align 2 -// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, i32* @i, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa_sat, align 2 +// UNSIGNED-NEXT: [[TMP1:%.*]] = load i32, ptr @i, align 4 // UNSIGNED-NEXT: [[RESIZE:%.*]] = zext i16 [[TMP0]] to i39 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = sext i32 [[TMP1]] to i39 // UNSIGNED-NEXT: [[UPSCALE:%.*]] = shl i39 [[RESIZE1]], 7 @@ -577,7 +577,7 @@ void sat_ufsufsufs(void) { // UNSIGNED-NEXT: [[TMP4:%.*]] = icmp slt i39 [[SATMAX]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP4]], i39 0, i39 [[SATMAX]] // UNSIGNED-NEXT: [[RESIZE2:%.*]] = trunc i39 [[SATMIN]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE2]], i16* @usa_sat, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE2]], ptr @usa_sat, align 2 // UNSIGNED-NEXT: ret void // void sat_usasusasi(void) { diff --git a/clang/test/Frontend/fixed_point_to_bool.c b/clang/test/Frontend/fixed_point_to_bool.c index e519533810728d..4b9ed6cebe3233 100644 --- a/clang/test/Frontend/fixed_point_to_bool.c +++ b/clang/test/Frontend/fixed_point_to_bool.c @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -S -emit-llvm %s -o - | FileCheck %s -// RUN: %clang_cc1 -no-opaque-pointers -ffixed-point -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s +// RUN: %clang_cc1 -ffixed-point -S -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -ffixed-point -S -emit-llvm %s -o - -fpadding-on-unsigned-fixed-point | FileCheck %s _Bool global_b = 1.0k; // @global_b = {{*.}}global i8 1, align 1 _Bool global_b2 = 0.0k; // @global_b2 = {{*.}}global i8 0, align 1 @@ -9,43 +9,43 @@ void func(void) { unsigned _Accum ua = 0.5uk; _Bool b; - // CHECK: store i8 1, i8* %b, align 1 - // CHECK-NEXT: store i8 0, i8* %b, align 1 - // CHECK: store i8 1, i8* %b, align 1 - // CHECK-NEXT: store i8 0, i8* %b, align 1 + // CHECK: store i8 1, ptr %b, align 1 + // CHECK-NEXT: store i8 0, ptr %b, align 1 + // CHECK: store i8 1, ptr %b, align 1 + // CHECK-NEXT: store i8 0, ptr %b, align 1 b = 0.5k; b = 0.0k; b = 0.5uk; b = 0.0uk; - // CHECK-NEXT: store i8 1, i8* %b, align 1 - // CHECK-NEXT: store i8 0, i8* %b, align 1 - // CHECK-NEXT: store i8 1, i8* %b, align 1 - // CHECK-NEXT: store i8 0, i8* %b, align 1 + // CHECK-NEXT: store i8 1, ptr %b, align 1 + // CHECK-NEXT: store i8 0, ptr %b, align 1 + // CHECK-NEXT: store i8 1, ptr %b, align 1 + // CHECK-NEXT: store i8 0, ptr %b, align 1 b = (_Bool)0.5r; b = (_Bool)0.0r; b = (_Bool)0.5ur; b = (_Bool)0.0ur; - // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, i32* %a, align 4 + // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[NOTZERO:%[0-9a-z]+]] = icmp ne i32 [[ACCUM]], 0 // CHECK-NEXT: [[FROMBOOL:%[0-9a-z]+]] = zext i1 [[NOTZERO]] to i8 - // CHECK-NEXT: store i8 [[FROMBOOL]], i8* %b, align 1 + // CHECK-NEXT: store i8 [[FROMBOOL]], ptr %b, align 1 b = a; - // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, i32* %ua, align 4 + // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[NOTZERO:%[0-9a-z]+]] = icmp ne i32 [[ACCUM]], 0 // CHECK-NEXT: [[FROMBOOL:%[0-9a-z]+]] = zext i1 [[NOTZERO]] to i8 - // CHECK-NEXT: store i8 [[FROMBOOL]], i8* %b, align 1 + // CHECK-NEXT: store i8 [[FROMBOOL]], ptr %b, align 1 b = ua; - // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, i32* %a, align 4 + // CHECK-NEXT: [[ACCUM:%[0-9a-z]+]] = load i32, ptr %a, align 4 // CHECK-NEXT: [[NOTZERO:%[0-9a-z]+]] = icmp ne i32 [[ACCUM]], 0 // CHECK-NEXT: br i1 [[NOTZERO]], label %if.then, label %if.end if (a) { } - // CHECK: [[ACCUM:%[0-9a-z]+]] = load i32, i32* %ua, align 4 + // CHECK: [[ACCUM:%[0-9a-z]+]] = load i32, ptr %ua, align 4 // CHECK-NEXT: [[NOTZERO:%[0-9a-z]+]] = icmp ne i32 [[ACCUM]], 0 // CHECK-NEXT: br i1 [[NOTZERO]], label %if.then{{[0-9]+}}, label %if.end{{[0-9]+}} if (ua) { diff --git a/clang/test/Frontend/fixed_point_unary.c b/clang/test/Frontend/fixed_point_unary.c index f0ad440f367eaa..a398a4be203d2a 100644 --- a/clang/test/Frontend/fixed_point_unary.c +++ b/clang/test/Frontend/fixed_point_unary.c @@ -1,6 +1,6 @@ // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -ffixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,SIGNED +// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -ffixed-point -fpadding-on-unsigned-fixed-point -S -emit-llvm %s -o - | FileCheck %s --check-prefixes=CHECK,UNSIGNED _Accum a; _Fract f; @@ -20,9 +20,9 @@ int i; // CHECK-LABEL: @inc_a( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -32768 -// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4 // CHECK-NEXT: ret void // void inc_a(void) { @@ -31,9 +31,9 @@ void inc_a(void) { // CHECK-LABEL: @inc_f( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768 -// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2 // CHECK-NEXT: ret void // void inc_f(void) { @@ -42,9 +42,9 @@ void inc_f(void) { // CHECK-LABEL: @inc_lf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], -2147483648 -// CHECK-NEXT: store i32 [[TMP1]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 4 // CHECK-NEXT: ret void // void inc_lf(void) { @@ -53,16 +53,16 @@ void inc_lf(void) { // SIGNED-LABEL: @inc_ua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 65536 -// SIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_ua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], 32768 -// UNSIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void inc_ua(void) { @@ -71,16 +71,16 @@ void inc_ua(void) { // SIGNED-LABEL: @inc_usa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 256 -// SIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_usa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], 128 -// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void inc_usa(void) { @@ -89,16 +89,16 @@ void inc_usa(void) { // SIGNED-LABEL: @inc_uf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], poison -// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_uf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768 -// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2 +// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2 // UNSIGNED-NEXT: ret void // void inc_uf(void) { @@ -107,9 +107,9 @@ void inc_uf(void) { // CHECK-LABEL: @inc_sa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -32768) -// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4 // CHECK-NEXT: ret void // void inc_sa(void) { @@ -118,9 +118,9 @@ void inc_sa(void) { // CHECK-LABEL: @inc_sf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 -32768) -// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2 // CHECK-NEXT: ret void // void inc_sf(void) { @@ -129,9 +129,9 @@ void inc_sf(void) { // CHECK-LABEL: @inc_slf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @slf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 -2147483648) -// CHECK-NEXT: store i32 [[TMP1]], i32* @slf, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4 // CHECK-NEXT: ret void // void inc_slf(void) { @@ -140,18 +140,18 @@ void inc_slf(void) { // SIGNED-LABEL: @inc_sua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.uadd.sat.i32(i32 [[TMP0]], i32 65536) -// SIGNED-NEXT: store i32 [[TMP1]], i32* @sua, align 4 +// SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_sua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 32768) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[TMP1]] to i31 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE1]], i32* @sua, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4 // UNSIGNED-NEXT: ret void // void inc_sua(void) { @@ -160,18 +160,18 @@ void inc_sua(void) { // SIGNED-LABEL: @inc_susa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 256) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_susa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 128) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2 // UNSIGNED-NEXT: ret void // void inc_susa(void) { @@ -180,18 +180,18 @@ void inc_susa(void) { // SIGNED-LABEL: @inc_suf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.uadd.sat.i16(i16 [[TMP0]], i16 -1) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @inc_suf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 32767) // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[TMP1]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2 // UNSIGNED-NEXT: ret void // void inc_suf(void) { @@ -201,9 +201,9 @@ void inc_suf(void) { // CHECK-LABEL: @dec_a( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -32768 -// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4 // CHECK-NEXT: ret void // void dec_a(void) { @@ -212,9 +212,9 @@ void dec_a(void) { // CHECK-LABEL: @dec_f( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[TMP1:%.*]] = add i16 [[TMP0]], -32768 -// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2 // CHECK-NEXT: ret void // void dec_f(void) { @@ -223,9 +223,9 @@ void dec_f(void) { // CHECK-LABEL: @dec_lf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @lf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @lf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = add i32 [[TMP0]], -2147483648 -// CHECK-NEXT: store i32 [[TMP1]], i32* @lf, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @lf, align 4 // CHECK-NEXT: ret void // void dec_lf(void) { @@ -234,16 +234,16 @@ void dec_lf(void) { // SIGNED-LABEL: @dec_ua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 65536 -// SIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4 +// SIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_ua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @ua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @ua, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i32 [[TMP0]], 32768 -// UNSIGNED-NEXT: store i32 [[TMP1]], i32* @ua, align 4 +// UNSIGNED-NEXT: store i32 [[TMP1]], ptr @ua, align 4 // UNSIGNED-NEXT: ret void // void dec_ua(void) { @@ -252,16 +252,16 @@ void dec_ua(void) { // SIGNED-LABEL: @dec_usa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 256 -// SIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_usa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], 128 -// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @usa, align 2 +// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @usa, align 2 // UNSIGNED-NEXT: ret void // void dec_usa(void) { @@ -270,16 +270,16 @@ void dec_usa(void) { // SIGNED-LABEL: @dec_uf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], poison -// SIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_uf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = sub i16 [[TMP0]], -32768 -// UNSIGNED-NEXT: store i16 [[TMP1]], i16* @uf, align 2 +// UNSIGNED-NEXT: store i16 [[TMP1]], ptr @uf, align 2 // UNSIGNED-NEXT: ret void // void dec_uf(void) { @@ -288,9 +288,9 @@ void dec_uf(void) { // CHECK-LABEL: @dec_sa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -32768) -// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4 // CHECK-NEXT: ret void // void dec_sa(void) { @@ -299,9 +299,9 @@ void dec_sa(void) { // CHECK-LABEL: @dec_sf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.sadd.sat.i16(i16 [[TMP0]], i16 -32768) -// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2 // CHECK-NEXT: ret void // void dec_sf(void) { @@ -310,9 +310,9 @@ void dec_sf(void) { // CHECK-LABEL: @dec_slf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @slf, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @slf, align 4 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.sadd.sat.i32(i32 [[TMP0]], i32 -2147483648) -// CHECK-NEXT: store i32 [[TMP1]], i32* @slf, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @slf, align 4 // CHECK-NEXT: ret void // void dec_slf(void) { @@ -321,20 +321,20 @@ void dec_slf(void) { // SIGNED-LABEL: @dec_sua( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4 +// SIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4 // SIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.usub.sat.i32(i32 [[TMP0]], i32 65536) -// SIGNED-NEXT: store i32 [[TMP1]], i32* @sua, align 4 +// SIGNED-NEXT: store i32 [[TMP1]], ptr @sua, align 4 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_sua( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, i32* @sua, align 4 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i32, ptr @sua, align 4 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 [[TMP0]], i32 32768) // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i32 0, i32 [[TMP1]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i32 [[SATMIN]] to i31 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i31 [[RESIZE]] to i32 -// UNSIGNED-NEXT: store i32 [[RESIZE1]], i32* @sua, align 4 +// UNSIGNED-NEXT: store i32 [[RESIZE1]], ptr @sua, align 4 // UNSIGNED-NEXT: ret void // void dec_sua(void) { @@ -343,20 +343,20 @@ void dec_sua(void) { // SIGNED-LABEL: @dec_susa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 256) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_susa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 128) // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2 // UNSIGNED-NEXT: ret void // void dec_susa(void) { @@ -365,20 +365,20 @@ void dec_susa(void) { // SIGNED-LABEL: @dec_suf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 [[TMP0]], i16 -1) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @dec_suf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 [[TMP0]], i16 32767) // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2 // UNSIGNED-NEXT: ret void // void dec_suf(void) { @@ -388,9 +388,9 @@ void dec_suf(void) { // CHECK-LABEL: @neg_a( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TMP1:%.*]] = sub i32 0, [[TMP0]] -// CHECK-NEXT: store i32 [[TMP1]], i32* @a, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @a, align 4 // CHECK-NEXT: ret void // void neg_a(void) { @@ -399,9 +399,9 @@ void neg_a(void) { // CHECK-LABEL: @neg_f( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @f, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @f, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]] -// CHECK-NEXT: store i16 [[TMP1]], i16* @f, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @f, align 2 // CHECK-NEXT: ret void // void neg_f(void) { @@ -410,9 +410,9 @@ void neg_f(void) { // CHECK-LABEL: @neg_usa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @usa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @usa, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]] -// CHECK-NEXT: store i16 [[TMP1]], i16* @usa, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @usa, align 2 // CHECK-NEXT: ret void // void neg_usa(void) { @@ -421,9 +421,9 @@ void neg_usa(void) { // CHECK-LABEL: @neg_uf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[TMP1:%.*]] = sub i16 0, [[TMP0]] -// CHECK-NEXT: store i16 [[TMP1]], i16* @uf, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @uf, align 2 // CHECK-NEXT: ret void // void neg_uf(void) { @@ -432,9 +432,9 @@ void neg_uf(void) { // CHECK-LABEL: @neg_sa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 // CHECK-NEXT: [[TMP1:%.*]] = call i32 @llvm.ssub.sat.i32(i32 0, i32 [[TMP0]]) -// CHECK-NEXT: store i32 [[TMP1]], i32* @sa, align 4 +// CHECK-NEXT: store i32 [[TMP1]], ptr @sa, align 4 // CHECK-NEXT: ret void // void neg_sa(void) { @@ -443,9 +443,9 @@ void neg_sa(void) { // CHECK-LABEL: @neg_sf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @sf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @sf, align 2 // CHECK-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]]) -// CHECK-NEXT: store i16 [[TMP1]], i16* @sf, align 2 +// CHECK-NEXT: store i16 [[TMP1]], ptr @sf, align 2 // CHECK-NEXT: ret void // void neg_sf(void) { @@ -454,20 +454,20 @@ void neg_sf(void) { // SIGNED-LABEL: @neg_susa( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]]) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @susa, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @susa, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @neg_susa( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]]) // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @susa, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @susa, align 2 // UNSIGNED-NEXT: ret void // void neg_susa(void) { @@ -476,20 +476,20 @@ void neg_susa(void) { // SIGNED-LABEL: @neg_suf( // SIGNED-NEXT: entry: -// SIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// SIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // SIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.usub.sat.i16(i16 0, i16 [[TMP0]]) -// SIGNED-NEXT: store i16 [[TMP1]], i16* @suf, align 2 +// SIGNED-NEXT: store i16 [[TMP1]], ptr @suf, align 2 // SIGNED-NEXT: ret void // // UNSIGNED-LABEL: @neg_suf( // UNSIGNED-NEXT: entry: -// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, i16* @suf, align 2 +// UNSIGNED-NEXT: [[TMP0:%.*]] = load i16, ptr @suf, align 2 // UNSIGNED-NEXT: [[TMP1:%.*]] = call i16 @llvm.ssub.sat.i16(i16 0, i16 [[TMP0]]) // UNSIGNED-NEXT: [[TMP2:%.*]] = icmp slt i16 [[TMP1]], 0 // UNSIGNED-NEXT: [[SATMIN:%.*]] = select i1 [[TMP2]], i16 0, i16 [[TMP1]] // UNSIGNED-NEXT: [[RESIZE:%.*]] = trunc i16 [[SATMIN]] to i15 // UNSIGNED-NEXT: [[RESIZE1:%.*]] = zext i15 [[RESIZE]] to i16 -// UNSIGNED-NEXT: store i16 [[RESIZE1]], i16* @suf, align 2 +// UNSIGNED-NEXT: store i16 [[RESIZE1]], ptr @suf, align 2 // UNSIGNED-NEXT: ret void // void neg_suf(void) { @@ -499,8 +499,8 @@ void neg_suf(void) { // CHECK-LABEL: @plus_a( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @a, align 4 // CHECK-NEXT: ret void // void plus_a(void) { @@ -509,8 +509,8 @@ void plus_a(void) { // CHECK-LABEL: @plus_uf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 -// CHECK-NEXT: store i16 [[TMP0]], i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 +// CHECK-NEXT: store i16 [[TMP0]], ptr @uf, align 2 // CHECK-NEXT: ret void // void plus_uf(void) { @@ -519,8 +519,8 @@ void plus_uf(void) { // CHECK-LABEL: @plus_sa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @sa, align 4 -// CHECK-NEXT: store i32 [[TMP0]], i32* @sa, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @sa, align 4 +// CHECK-NEXT: store i32 [[TMP0]], ptr @sa, align 4 // CHECK-NEXT: ret void // void plus_sa(void) { @@ -530,11 +530,11 @@ void plus_sa(void) { // CHECK-LABEL: @not_a( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* @a, align 4 +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr @a, align 4 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i32 [[TMP0]], 0 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32 -// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4 +// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4 // CHECK-NEXT: ret void // void not_a(void) { @@ -543,11 +543,11 @@ void not_a(void) { // CHECK-LABEL: @not_uf( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @uf, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @uf, align 2 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32 -// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4 +// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4 // CHECK-NEXT: ret void // void not_uf(void) { @@ -556,11 +556,11 @@ void not_uf(void) { // CHECK-LABEL: @not_susa( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* @susa, align 2 +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr @susa, align 2 // CHECK-NEXT: [[TOBOOL:%.*]] = icmp ne i16 [[TMP0]], 0 // CHECK-NEXT: [[LNOT:%.*]] = xor i1 [[TOBOOL]], true // CHECK-NEXT: [[LNOT_EXT:%.*]] = zext i1 [[LNOT]] to i32 -// CHECK-NEXT: store i32 [[LNOT_EXT]], i32* @i, align 4 +// CHECK-NEXT: store i32 [[LNOT_EXT]], ptr @i, align 4 // CHECK-NEXT: ret void // void not_susa(void) { diff --git a/clang/test/Headers/stdarg.cpp b/clang/test/Headers/stdarg.cpp index dcbe173a4f41a7..20bf17caf15f7c 100644 --- a/clang/test/Headers/stdarg.cpp +++ b/clang/test/Headers/stdarg.cpp @@ -1,32 +1,32 @@ -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-CXX -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c99 -x c %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-C -// RUN: %clang_cc1 -no-opaque-pointers -emit-llvm -std=c++17 -x c++ %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple aarch64-linux -o - | FileCheck %s --check-prefix=AARCH64-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple x86_64-linux -o - | FileCheck %s --check-prefix=X86_64-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple ppc64-linux -o - | FileCheck %s --check-prefix=PPC64-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple armv7-apple-darwin9 -target-abi aapcs -o - | FileCheck %s --check-prefix=AAPCS-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple s390x-linux -o - | FileCheck %s --check-prefix=SYSTEMZ-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple i686-linux -o - | FileCheck %s --check-prefix=CHARPTR-CXX +// RUN: %clang_cc1 -emit-llvm -std=c99 -x c %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-C +// RUN: %clang_cc1 -emit-llvm -std=c++17 -x c++ %s -triple xcore -o - | FileCheck %s --check-prefix=VOIDPTR-CXX #include -// AARCH64-C: define {{.*}} @f(i32 noundef %n, %struct.__va_list* noundef %list) -// AARCH64-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 noundef %n, %"struct.std::__va_list"* noundef %list) -// X86_64-C: define {{.*}} @f(i32 noundef %n, %struct.__va_list_tag* noundef %list) -// X86_64-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 noundef %n, %struct.__va_list_tag* noundef %list) -// PPC64-C: define {{.*}} @f(i32 noundef signext %n, i8* noundef %list) -// PPC64-CXX: define {{.*}} @_Z1fiPc(i32 noundef signext %n, i8* noundef %list) +// AARCH64-C: define {{.*}} @f(i32 noundef %n, ptr noundef %list) +// AARCH64-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 noundef %n, ptr noundef %list) +// X86_64-C: define {{.*}} @f(i32 noundef %n, ptr noundef %list) +// X86_64-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 noundef %n, ptr noundef %list) +// PPC64-C: define {{.*}} @f(i32 noundef signext %n, ptr noundef %list) +// PPC64-CXX: define {{.*}} @_Z1fiPc(i32 noundef signext %n, ptr noundef %list) // AAPCS-C: define {{.*}} @f(i32 noundef %n, [1 x i32] %list.coerce) // AAPCS-CXX: define {{.*}} @_Z1fiSt9__va_list(i32 noundef %n, [1 x i32] %list.coerce) -// SYSTEMZ-C: define {{.*}} @f(i32 noundef signext %n, %struct.__va_list_tag* noundef %list) -// SYSTEMZ-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 noundef signext %n, %struct.__va_list_tag* noundef %list) -// CHARPTR-C: define {{.*}} @f(i32 noundef %n, i8* noundef %list) -// CHARPTR-CXX: define {{.*}} @_Z1fiPc(i32 noundef %n, i8* noundef %list) -// VOIDPTR-C: define {{.*}} @f(i32 noundef %n, i8* noundef %list) -// VOIDPTR-CXX: define {{.*}} @_Z1fiPv(i32 noundef %n, i8* noundef %list) +// SYSTEMZ-C: define {{.*}} @f(i32 noundef signext %n, ptr noundef %list) +// SYSTEMZ-CXX: define {{.*}} @_Z1fiP13__va_list_tag(i32 noundef signext %n, ptr noundef %list) +// CHARPTR-C: define {{.*}} @f(i32 noundef %n, ptr noundef %list) +// CHARPTR-CXX: define {{.*}} @_Z1fiPc(i32 noundef %n, ptr noundef %list) +// VOIDPTR-C: define {{.*}} @f(i32 noundef %n, ptr noundef %list) +// VOIDPTR-CXX: define {{.*}} @_Z1fiPv(i32 noundef %n, ptr noundef %list) void f(int n, va_list list) {} diff --git a/clang/test/Headers/wasm.c b/clang/test/Headers/wasm.c index 53acbf4de4c964..8913a273aaeb15 100644 --- a/clang/test/Headers/wasm.c +++ b/clang/test/Headers/wasm.c @@ -3,14 +3,13 @@ // FIXME: This should not be using -O2 and implicitly testing the entire IR opt pipeline. -// RUN: %clang -Xclang -no-opaque-pointers %s -O2 -emit-llvm -S -o - -target wasm32-unknown-unknown -msimd128 -Wall -Weverything -Wno-missing-prototypes -fno-lax-vector-conversions -Werror | FileCheck %s +// RUN: %clang %s -O2 -emit-llvm -S -o - -target wasm32-unknown-unknown -msimd128 -Wall -Weverything -Wno-missing-prototypes -fno-lax-vector-conversions -Werror | FileCheck %s #include // CHECK-LABEL: @test_v128_load( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V_I:%.*]] = bitcast i8* [[MEM:%.*]] to <4 x i32>* -// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, <4 x i32>* [[__V_I]], align 1, !tbaa [[TBAA2:![0-9]+]] +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2:![0-9]+]] // CHECK-NEXT: ret <4 x i32> [[TMP0]] // v128_t test_v128_load(const void *mem) { @@ -19,7 +18,7 @@ v128_t test_v128_load(const void *mem) { // CHECK-LABEL: @test_v128_load8_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[MEM:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <16 x i8> undef, i8 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT16_I:%.*]] = shufflevector <16 x i8> [[VECINIT_I]], <16 x i8> poison, <16 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <16 x i8> [[VECINIT16_I]] to <4 x i32> @@ -31,8 +30,7 @@ v128_t test_v128_load8_splat(const void *mem) { // CHECK-LABEL: @test_v128_load16_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i16* -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <8 x i16> undef, i16 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT8_I:%.*]] = shufflevector <8 x i16> [[VECINIT_I]], <8 x i16> poison, <8 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[VECINIT8_I]] to <4 x i32> @@ -44,8 +42,7 @@ v128_t test_v128_load16_splat(const void *mem) { // CHECK-LABEL: @test_v128_load32_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i32* -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <4 x i32> undef, i32 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT4_I:%.*]] = shufflevector <4 x i32> [[VECINIT_I]], <4 x i32> poison, <4 x i32> zeroinitializer // CHECK-NEXT: ret <4 x i32> [[VECINIT4_I]] @@ -56,8 +53,7 @@ v128_t test_v128_load32_splat(const void *mem) { // CHECK-LABEL: @test_v128_load64_splat( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i64* -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT_I:%.*]] = insertelement <2 x i64> undef, i64 [[TMP0]], i64 0 // CHECK-NEXT: [[VECINIT2_I:%.*]] = shufflevector <2 x i64> [[VECINIT_I]], <2 x i64> poison, <2 x i32> zeroinitializer // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32> @@ -69,8 +65,7 @@ v128_t test_v128_load64_splat(const void *mem) { // CHECK-LABEL: @test_i16x8_load8x8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <8 x i8>* -// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = sext <8 x i8> [[TMP0]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -81,8 +76,7 @@ v128_t test_i16x8_load8x8(const void *mem) { // CHECK-LABEL: @test_u16x8_load8x8( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <8 x i8>* -// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, <8 x i8>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <8 x i8>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = zext <8 x i8> [[TMP0]] to <8 x i16> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <8 x i16> [[CONV_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -93,8 +87,7 @@ v128_t test_u16x8_load8x8(const void *mem) { // CHECK-LABEL: @test_i32x4_load16x4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <4 x i16>* -// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, <4 x i16>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = sext <4 x i16> [[TMP0]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[CONV_I]] // @@ -104,8 +97,7 @@ v128_t test_i32x4_load16x4(const void *mem) { // CHECK-LABEL: @test_u32x4_load16x4( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <4 x i16>* -// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, <4 x i16>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <4 x i16>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = zext <4 x i16> [[TMP0]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[CONV_I]] // @@ -115,8 +107,7 @@ v128_t test_u32x4_load16x4(const void *mem) { // CHECK-LABEL: @test_i64x2_load32x2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <2 x i32>* -// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, <2 x i32>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = sext <2 x i32> [[TMP0]] to <2 x i64> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -127,8 +118,7 @@ v128_t test_i64x2_load32x2(const void *mem) { // CHECK-LABEL: @test_u64x2_load32x2( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to <2 x i32>* -// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, <2 x i32>* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load <2 x i32>, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[CONV_I:%.*]] = zext <2 x i32> [[TMP0]] to <2 x i64> // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[CONV_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -139,8 +129,7 @@ v128_t test_u64x2_load32x2(const void *mem) { // CHECK-LABEL: @test_v128_load32_zero( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i32* -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT4_I:%.*]] = insertelement <4 x i32> , i32 [[TMP0]], i64 0 // CHECK-NEXT: ret <4 x i32> [[VECINIT4_I]] // @@ -150,8 +139,7 @@ v128_t test_v128_load32_zero(const void *mem) { // CHECK-LABEL: @test_v128_load64_zero( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V1_I:%.*]] = bitcast i8* [[MEM:%.*]] to i64* -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[__V1_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINIT2_I:%.*]] = insertelement <2 x i64> , i64 [[TMP0]], i64 0 // CHECK-NEXT: [[TMP1:%.*]] = bitcast <2 x i64> [[VECINIT2_I]] to <4 x i32> // CHECK-NEXT: ret <4 x i32> [[TMP1]] @@ -162,7 +150,7 @@ v128_t test_v128_load64_zero(const void *mem) { // CHECK-LABEL: @test_v128_load8_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i8, i8* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i8, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8> // CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <16 x i8> [[TMP1]], i8 [[TMP0]], i64 15 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <16 x i8> [[VECINS_I]] to <4 x i32> @@ -174,7 +162,7 @@ v128_t test_v128_load8_lane(const uint8_t *ptr, v128_t vec) { // CHECK-LABEL: @test_v128_load16_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i16, i16* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i16, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16> // CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <8 x i16> [[TMP1]], i16 [[TMP0]], i64 7 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <8 x i16> [[VECINS_I]] to <4 x i32> @@ -186,7 +174,7 @@ v128_t test_v128_load16_lane(const uint16_t *ptr, v128_t vec) { // CHECK-LABEL: @test_v128_load32_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <4 x i32> [[VEC:%.*]], i32 [[TMP0]], i64 3 // CHECK-NEXT: ret <4 x i32> [[VECINS_I]] // @@ -196,7 +184,7 @@ v128_t test_v128_load32_lane(const uint32_t *ptr, v128_t vec) { // CHECK-LABEL: @test_v128_load64_lane( // CHECK-NEXT: entry: -// CHECK-NEXT: [[TMP0:%.*]] = load i64, i64* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: [[TMP0:%.*]] = load i64, ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: [[TMP1:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64> // CHECK-NEXT: [[VECINS_I:%.*]] = insertelement <2 x i64> [[TMP1]], i64 [[TMP0]], i64 1 // CHECK-NEXT: [[TMP2:%.*]] = bitcast <2 x i64> [[VECINS_I]] to <4 x i32> @@ -208,8 +196,7 @@ v128_t test_v128_load64_lane(const uint64_t *ptr, v128_t vec) { // CHECK-LABEL: @test_v128_store( // CHECK-NEXT: entry: -// CHECK-NEXT: [[__V_I:%.*]] = bitcast i8* [[MEM:%.*]] to <4 x i32>* -// CHECK-NEXT: store <4 x i32> [[A:%.*]], <4 x i32>* [[__V_I]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: store <4 x i32> [[A:%.*]], ptr [[MEM:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // void test_v128_store(void *mem, v128_t a) { @@ -220,7 +207,7 @@ void test_v128_store(void *mem, v128_t a) { // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <16 x i8> // CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <16 x i8> [[TMP0]], i64 15 -// CHECK-NEXT: store i8 [[VECEXT_I]], i8* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: store i8 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // void test_v128_store8_lane(uint8_t *ptr, v128_t vec) { @@ -231,7 +218,7 @@ void test_v128_store8_lane(uint8_t *ptr, v128_t vec) { // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <8 x i16> // CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <8 x i16> [[TMP0]], i64 7 -// CHECK-NEXT: store i16 [[VECEXT_I]], i16* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: store i16 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // void test_v128_store16_lane(uint16_t *ptr, v128_t vec) { @@ -241,7 +228,7 @@ void test_v128_store16_lane(uint16_t *ptr, v128_t vec) { // CHECK-LABEL: @test_v128_store32_lane( // CHECK-NEXT: entry: // CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <4 x i32> [[VEC:%.*]], i64 3 -// CHECK-NEXT: store i32 [[VECEXT_I]], i32* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: store i32 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // void test_v128_store32_lane(uint32_t *ptr, v128_t vec) { @@ -252,7 +239,7 @@ void test_v128_store32_lane(uint32_t *ptr, v128_t vec) { // CHECK-NEXT: entry: // CHECK-NEXT: [[TMP0:%.*]] = bitcast <4 x i32> [[VEC:%.*]] to <2 x i64> // CHECK-NEXT: [[VECEXT_I:%.*]] = extractelement <2 x i64> [[TMP0]], i64 1 -// CHECK-NEXT: store i64 [[VECEXT_I]], i64* [[PTR:%.*]], align 1, !tbaa [[TBAA2]] +// CHECK-NEXT: store i64 [[VECEXT_I]], ptr [[PTR:%.*]], align 1, !tbaa [[TBAA2]] // CHECK-NEXT: ret void // void test_v128_store64_lane(uint64_t *ptr, v128_t vec) { diff --git a/clang/test/Modules/direct-module-import.m b/clang/test/Modules/direct-module-import.m index 15dde0f4968935..3c75a8c135f0c4 100644 --- a/clang/test/Modules/direct-module-import.m +++ b/clang/test/Modules/direct-module-import.m @@ -1,8 +1,8 @@ // UNSUPPORTED: -zos, target={{.*}}-aix{{.*}} // RUN: rm -rf %t -// RUN: %clang_cc1 -no-opaque-pointers -fmodules-cache-path=%t -fmodules -fimplicit-module-maps -F %S/Inputs -include Module/Module.h %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -fmodules-cache-path=%t -fmodules -fimplicit-module-maps -F %S/Inputs -include Module/Module.h %s -emit-llvm -o - | FileCheck %s -// CHECK: call {{.*}}i8* @getModuleVersion +// CHECK: call {{.*}}ptr @getModuleVersion const char* getVer(void) { return getModuleVersion(); } diff --git a/clang/test/Modules/templates.mm b/clang/test/Modules/templates.mm index 10ffee59a3dcdc..0e66c9843cc09f 100644 --- a/clang/test/Modules/templates.mm +++ b/clang/test/Modules/templates.mm @@ -1,6 +1,6 @@ // RUN: rm -rf %t -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-linux-gnu -std=c++11 -x objective-c++ -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -I %S/Inputs -verify %s -Wno-objc-root-class -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-linux-gnu -std=c++11 -x objective-c++ -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -I %S/Inputs -emit-llvm %s -o - -Wno-objc-root-class | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++11 -x objective-c++ -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -I %S/Inputs -verify %s -Wno-objc-root-class +// RUN: %clang_cc1 -triple x86_64-linux-gnu -std=c++11 -x objective-c++ -fmodules -fimplicit-module-maps -fmodules-cache-path=%t -I %S/Inputs -emit-llvm %s -o - -Wno-objc-root-class | FileCheck %s // expected-no-diagnostics // REQUIRES: x86-registered-target @import templates_left; @@ -12,10 +12,10 @@ void testInlineRedeclEarly() { @import templates_right; -// CHECK-DAG: @list_left ={{.*}} global %[[LIST:.*]] { %[[LISTNODE:.*]]* null, i32 8 }, align 8 -// CHECK-DAG: @list_right ={{.*}} global %[[LIST]] { %[[LISTNODE]]* null, i32 12 }, align 8 -// CHECK-DAG: @__const._Z15testMixedStructv.l = {{.*}} constant %[[LIST]] { %{{.*}}* null, i32 1 }, align 8 -// CHECK-DAG: @__const._Z15testMixedStructv.r = {{.*}} constant %[[LIST]] { %{{.*}}* null, i32 2 }, align 8 +// CHECK-DAG: @list_left ={{.*}} global %[[LIST:.*]] { ptr null, i32 8 }, align 8 +// CHECK-DAG: @list_right ={{.*}} global %[[LIST]] { ptr null, i32 12 }, align 8 +// CHECK-DAG: @__const._Z15testMixedStructv.l = {{.*}} constant %[[LIST]] { ptr null, i32 1 }, align 8 +// CHECK-DAG: @__const._Z15testMixedStructv.r = {{.*}} constant %[[LIST]] { ptr null, i32 2 }, align 8 // CHECK-DAG: @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE = external global void testTemplateClasses() { @@ -77,19 +77,19 @@ unsigned testMixedStruct() { // CHECK: %[[l:.*]] = alloca %[[ListInt:[^ ]*]], align 8 // CHECK: %[[r:.*]] = alloca %[[ListInt]], align 8 - // CHECK: call {{.*}}memcpy{{.*}}(i8* align {{[0-9]+}} %{{.*}}, i8* align {{[0-9]+}} bitcast ({{.*}}* @__const._Z15testMixedStructv.l to i8*), i64 16, + // CHECK: call {{.*}}memcpy{{.*}}(ptr align {{[0-9]+}} %{{.*}}, ptr align {{[0-9]+}} @__const._Z15testMixedStructv.l, i64 16, ListInt_left l{0, 1}; - // CHECK: call {{.*}}memcpy{{.*}}(i8* align {{[0-9]+}} %{{.*}}, i8* align {{[0-9]+}} bitcast ({{.*}}* @__const._Z15testMixedStructv.r to i8*), i64 16, + // CHECK: call {{.*}}memcpy{{.*}}(ptr align {{[0-9]+}} %{{.*}}, ptr align {{[0-9]+}} @__const._Z15testMixedStructv.r, i64 16, ListInt_right r{0, 2}; - // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[l]]) + // CHECK: call void @_Z10useListIntR4ListIiE(ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[l]]) useListInt(l); - // CHECK: call void @_Z10useListIntR4ListIiE(%[[ListInt]]* noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[r]]) + // CHECK: call void @_Z10useListIntR4ListIiE(ptr noundef nonnull align {{[0-9]+}} dereferenceable({{[0-9]+}}) %[[r]]) useListInt(r); - // CHECK: load i32, i32* bitcast (i8* getelementptr inbounds (i8, i8* bitcast ({{.*}}* @list_left to i8*), i64 8) to i32*) - // CHECK: load i32, i32* bitcast (i8* getelementptr inbounds (i8, i8* bitcast ({{.*}}* @list_right to i8*), i64 8) to i32*) + // CHECK: load i32, ptr getelementptr inbounds (i8, ptr @list_left, i64 8) + // CHECK: load i32, ptr getelementptr inbounds (i8, ptr @list_right, i64 8) return list_left.*size_right + list_right.*size_left; } @@ -107,12 +107,12 @@ unsigned testMixedStruct() { void testStaticDataMember() { WithUndefinedStaticDataMember load_it; - // CHECK-LABEL: define linkonce_odr noundef i32* @_Z23getStaticDataMemberLeftv( - // CHECK: ret i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE, i64 0, i64 0) + // CHECK-LABEL: define linkonce_odr noundef ptr @_Z23getStaticDataMemberLeftv( + // CHECK: ret ptr @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE (void) getStaticDataMemberLeft(); - // CHECK-LABEL: define linkonce_odr noundef i32* @_Z24getStaticDataMemberRightv( - // CHECK: ret i32* getelementptr inbounds ([0 x i32], [0 x i32]* @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE, i64 0, i64 0) + // CHECK-LABEL: define linkonce_odr noundef ptr @_Z24getStaticDataMemberRightv( + // CHECK: ret ptr @_ZN29WithUndefinedStaticDataMemberIA_iE9undefinedE (void) getStaticDataMemberRight(); } @@ -125,7 +125,7 @@ void testWithAttributes() { // Check that returnNonTrivial doesn't return Class0 directly in registers. -// CHECK: declare void @_Z16returnNonTrivialv(%struct.Class0* sret(%struct.Class0) align 8) +// CHECK: declare void @_Z16returnNonTrivialv(ptr sret(%struct.Class0) align 8) @import template_nontrivial0; @import template_nontrivial1; diff --git a/clang/test/PCH/non-trivial-c-compound-literal.m b/clang/test/PCH/non-trivial-c-compound-literal.m index 57a108e93a033a..7e8f69f71d4cf5 100644 --- a/clang/test/PCH/non-trivial-c-compound-literal.m +++ b/clang/test/PCH/non-trivial-c-compound-literal.m @@ -1,5 +1,5 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -x objective-c -fobjc-arc -emit-pch -o %t %s -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -x objective-c -fobjc-arc -include-pch %t -emit-llvm -o - %s | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -x objective-c -fobjc-arc -emit-pch -o %t %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -x objective-c -fobjc-arc -include-pch %t -emit-llvm -o - %s | FileCheck %s #ifndef HEADER #define HEADER @@ -15,12 +15,11 @@ static inline id getObj(id a) { #else -// CHECK: %[[STRUCT_S:.*]] = type { i8* } +// CHECK: %[[STRUCT_S:.*]] = type { ptr } -// CHECK: define internal i8* @getObj( +// CHECK: define internal ptr @getObj( // CHECK: %[[_COMPOUNDLITERAL:.*]] = alloca %[[STRUCT_S]], -// CHECK: %[[V5:.*]] = bitcast %[[STRUCT_S]]* %[[_COMPOUNDLITERAL]] to i8** -// CHECK: call void @__destructor_8_s0(i8** %[[V5]]) +// CHECK: call void @__destructor_8_s0(ptr %[[_COMPOUNDLITERAL]]) id test(id a) { return getObj(a); diff --git a/clang/test/PCH/objcxx-ivar-class.mm b/clang/test/PCH/objcxx-ivar-class.mm index 3d714fce8a05a4..ef8b6a73f11f2c 100644 --- a/clang/test/PCH/objcxx-ivar-class.mm +++ b/clang/test/PCH/objcxx-ivar-class.mm @@ -1,16 +1,16 @@ // UNSUPPORTED: -zos, target={{.*}}-aix{{.*}} // Test this without pch. -// RUN: %clang_cc1 -no-opaque-pointers -include %S/objcxx-ivar-class.h -triple %itanium_abi_triple %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -include %S/objcxx-ivar-class.h -triple %itanium_abi_triple %s -emit-llvm -o - | FileCheck %s // Test with pch. -// RUN: %clang_cc1 -no-opaque-pointers -x objective-c++-header -triple %itanium_abi_triple -emit-pch -o %t %S/objcxx-ivar-class.h -// RUN: %clang_cc1 -no-opaque-pointers -include-pch %t -triple %itanium_abi_triple %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -x objective-c++-header -triple %itanium_abi_triple -emit-pch -o %t %S/objcxx-ivar-class.h +// RUN: %clang_cc1 -include-pch %t -triple %itanium_abi_triple %s -emit-llvm -o - | FileCheck %s // CHECK: [C position] // CHECK: call {{.*}} @_ZN1SC1ERKS_ // CHECK: [C setPosition:] -// CHECK: = call {{.*}}%struct.S* @_ZN1SaSERKS_ +// CHECK: = call {{.*}}ptr @_ZN1SaSERKS_ // CHECK: [C .cxx_destruct] // CHECK: [C .cxx_construct] diff --git a/clang/test/Sema/ms_class_layout.cpp b/clang/test/Sema/ms_class_layout.cpp index ce5ff7563f4dc9..cd0f04abd13984 100644 --- a/clang/test/Sema/ms_class_layout.cpp +++ b/clang/test/Sema/ms_class_layout.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -std=c++14 -no-opaque-pointers -emit-llvm-only -triple i686-pc-win32 -fdump-record-layouts %s 2>/dev/null \ +// RUN: %clang_cc1 -std=c++14 -emit-llvm-only -triple i686-pc-win32 -fdump-record-layouts %s 2>/dev/null \ // RUN: | FileCheck %s --strict-whitespace #pragma pack(push, 8) @@ -206,14 +206,14 @@ int main() { // CHECK-NEXT: sizeof=80, align=8 // CHECK-NEXT: nvsize=64, nvalign=8 -// CHECK: %class.D = type { i32 (...)**, double } +// CHECK: %class.D = type { ptr, double } -// CHECK: %class.B = type { i32 (...)**, i32 } +// CHECK: %class.B = type { ptr, i32 } // CHECK: %class.A = type { %class.B, i32, i8 } -// CHECK: %class.C = type { %class.D, %class.B, i32*, double, i32, double, i32, [4 x i8], %class.A } -// CHECK: %class.C.base = type { %class.D, %class.B, i32*, double, i32, double, i32 } +// CHECK: %class.C = type { %class.D, %class.B, ptr, double, i32, double, i32, [4 x i8], %class.A } +// CHECK: %class.C.base = type { %class.D, %class.B, ptr, double, i32, double, i32 } // CHECK-LABEL: 0 | struct BaseStruct{{$}} // CHECK-NEXT: 0 | double v0 @@ -284,7 +284,7 @@ int main() { // CHECK-NEXT: sizeof=24, align=8 // CHECK-NEXT: nvsize=8, nvalign=8 -// CHECK: %struct.H = type { %struct.G, i32*, %class.D } +// CHECK: %struct.H = type { %struct.G, ptr, %class.D } // CHECK-LABEL: 0 | struct I{{$}} // CHECK-NEXT: 0 | (I vftable pointer) @@ -296,8 +296,8 @@ int main() { // CHECK-NEXT: sizeof=40, align=8 // CHECK-NEXT: nvsize=24, nvalign=8 -// CHECK: %struct.I = type { i32 (...)**, [4 x i8], i32*, double, %class.D } -// CHECK: %struct.I.base = type { i32 (...)**, [4 x i8], i32*, double } +// CHECK: %struct.I = type { ptr, [4 x i8], ptr, double, %class.D } +// CHECK: %struct.I.base = type { ptr, [4 x i8], ptr, double } // CHECK-LABEL: 0 | struct L{{$}} // CHECK-NEXT: 0 | int l @@ -316,8 +316,8 @@ int main() { // CHECK-NEXT: 8 | int k // CHECK-NEXT: sizeof=12, align=4 -//CHECK: %struct.M = type { i32*, i32, %struct.K } -//CHECK: %struct.M.base = type { i32*, i32 } +//CHECK: %struct.M = type { ptr, i32, %struct.K } +//CHECK: %struct.M.base = type { ptr, i32 } // CHECK-LABEL: 0 | struct N{{$}} // CHECK-NEXT: 0 | (N vftable pointer) @@ -331,7 +331,7 @@ int main() { // CHECK-NEXT: sizeof=20, align=4 // CHECK-NEXT: nvsize=16, nvalign=4 -//CHECK: %struct.N = type { i32 (...)**, %struct.L, %struct.M.base, %struct.K } +//CHECK: %struct.N = type { ptr, %struct.L, %struct.M.base, %struct.K } // CHECK-LABEL: 0 | struct O{{$}} // CHECK-NEXT: 0 | (O vftable pointer) @@ -347,8 +347,8 @@ int main() { // CHECK-NEXT: | [sizeof=40, align=8 // CHECK-NEXT: | nvsize=24, nvalign=8] -// CHECK: struct.O = type { i32 (...)**, [4 x i8], %struct.H.base, %struct.G, %class.D } -// CHECK: struct.O.base = type { i32 (...)**, [4 x i8], %struct.H.base, %struct.G, [4 x i8] } +// CHECK: struct.O = type { ptr, [4 x i8], %struct.H.base, %struct.G, %class.D } +// CHECK: struct.O.base = type { ptr, [4 x i8], %struct.H.base, %struct.G, [4 x i8] } // CHECK-LABEL: 0 | struct P{{$}} // CHECK-NEXT: 0 | struct M (base) @@ -419,11 +419,11 @@ int main() { // CHECK-NEXT: sizeof=48, align=4 // CHECK-NEXT: nvsize=12, nvalign=4 -// CHECK: %struct.f = type { i32 (...)** } -// CHECK: %struct.s = type { i32 (...)**, i32*, i32, i32, %struct.f } -// CHECK: %class.IA = type { i32 (...)** } -// CHECK: %class.ICh = type { i32 (...)**, i32*, i32, %class.IA } -// CHECK: %struct.sd = type { i32*, i32, i8, i32, %struct.f, %struct.s.base, i32, %class.IA, %class.ICh.base } +// CHECK: %struct.f = type { ptr } +// CHECK: %struct.s = type { ptr, ptr, i32, i32, %struct.f } +// CHECK: %class.IA = type { ptr } +// CHECK: %class.ICh = type { ptr, ptr, i32, %class.IA } +// CHECK: %struct.sd = type { ptr, i32, i8, i32, %struct.f, %struct.s.base, i32, %class.IA, %class.ICh.base } // CHECK-LABEL: 0 | struct AV{{$}} // CHECK-NEXT: 0 | (AV vftable pointer) @@ -445,10 +445,10 @@ int main() { // CHECK-NEXT: sizeof=12, align=4 // CHECK-NEXT: nvsize=4, nvalign=4 -// CHECK: %struct.AV = type { i32 (...)** } +// CHECK: %struct.AV = type { ptr } // CHECK: %struct.BV = type { %struct.AV } -// CHECK: %struct.CV = type { i32*, i32, %struct.BV } -// CHECK: %struct.CV.base = type { i32* } +// CHECK: %struct.CV = type { ptr, i32, %struct.BV } +// CHECK: %struct.CV.base = type { ptr } // CHECK-LABEL: 0 | struct DV{{$}} // CHECK-NEXT: 0 | struct BV (primary base) diff --git a/clang/test/SemaCXX/constexpr-vectors.cpp b/clang/test/SemaCXX/constexpr-vectors.cpp index f5ded584f8c2c3..99b045f888d87c 100644 --- a/clang/test/SemaCXX/constexpr-vectors.cpp +++ b/clang/test/SemaCXX/constexpr-vectors.cpp @@ -1,4 +1,4 @@ -// RUN: %clang_cc1 -no-opaque-pointers -std=c++14 -Wno-unused-value %s -disable-llvm-passes -triple x86_64-linux-gnu -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -std=c++14 -Wno-unused-value %s -disable-llvm-passes -triple x86_64-linux-gnu -emit-llvm -o - | FileCheck %s // FIXME: Unfortunately there is no good way to validate that our values are // correct since Vector types don't have operator [] implemented for constexpr. @@ -681,33 +681,33 @@ using FourBoolsExtVec __attribute__((ext_vector_type(4))) = bool; void BoolVecUsage() { constexpr auto a = FourBoolsExtVec{true, false, true, false} < FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %a, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %a, align 1 constexpr auto b = FourBoolsExtVec{true, false, true, false} <= FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %b, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %b, align 1 constexpr auto c = FourBoolsExtVec{true, false, true, false} == FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %c, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %c, align 1 constexpr auto d = FourBoolsExtVec{true, false, true, false} != FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %d, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %d, align 1 constexpr auto e = FourBoolsExtVec{true, false, true, false} >= FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %e, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %e, align 1 constexpr auto f = FourBoolsExtVec{true, false, true, false} > FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %f, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %f, align 1 constexpr auto g = FourBoolsExtVec{true, false, true, false} & FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %g, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %g, align 1 constexpr auto h = FourBoolsExtVec{true, false, true, false} | FourBoolsExtVec{false, false, true, true}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %h, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %h, align 1 constexpr auto i = FourBoolsExtVec{true, false, true, false} ^ FourBoolsExtVec { false, false, true, true }; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %i, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %i, align 1 constexpr auto j = !FourBoolsExtVec{true, false, true, false}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %j, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %j, align 1 constexpr auto k = ~FourBoolsExtVec{true, false, true, false}; - // CHECK: store i8 bitcast (<8 x i1> to i8), i8* %k, align 1 + // CHECK: store i8 bitcast (<8 x i1> to i8), ptr %k, align 1 } diff --git a/clang/test/SemaCXX/linkage.cpp b/clang/test/SemaCXX/linkage.cpp index cb82e52b2d8e8a..871d64b4c2ebbb 100644 --- a/clang/test/SemaCXX/linkage.cpp +++ b/clang/test/SemaCXX/linkage.cpp @@ -3,7 +3,7 @@ // compared against the earlier cached value. If we had a way of // testing linkage directly in Sema, that would be better. -// RUN: %clang_cc1 -no-opaque-pointers -Werror -Wno-non-c-typedef-for-linkage -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s +// RUN: %clang_cc1 -Werror -Wno-non-c-typedef-for-linkage -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s // CHECK: @_ZZN5test61A3fooEvE3bar = linkonce_odr global i32 0, align 4 @@ -13,7 +13,7 @@ namespace test0 { void *foo() { return 0; } } A; - // CHECK: define linkonce_odr noundef i8* @_ZN5test01A3fooEv( + // CHECK: define linkonce_odr noundef ptr @_ZN5test01A3fooEv( void test(A *a) { a->foo(); @@ -83,7 +83,7 @@ extern "C" { // Test both for mangling in the code generation and warnings from use // of internal, undefined names via -Werror. // CHECK: call i32 @g( - // CHECK: load i32, i32* @a, + // CHECK: load i32, ptr @a, return g() + a; } }; @@ -94,8 +94,8 @@ extern "C" { } } -// CHECK: define linkonce_odr noundef i8* @_ZN5test11A3fooILj0EEEPvv( -// CHECK: define linkonce_odr noundef i8* @_ZN5test21A1BILj0EE3fooEv( +// CHECK: define linkonce_odr noundef ptr @_ZN5test11A3fooILj0EEEPvv( +// CHECK: define linkonce_odr noundef ptr @_ZN5test21A1BILj0EE3fooEv( namespace test5 { struct foo { diff --git a/clang/test/SemaObjC/debugger-support.m b/clang/test/SemaObjC/debugger-support.m index b16e618af207da..c005147d394b9a 100644 --- a/clang/test/SemaObjC/debugger-support.m +++ b/clang/test/SemaObjC/debugger-support.m @@ -1,14 +1,14 @@ -// RUN: %clang_cc1 -no-opaque-pointers -triple x86_64-apple-darwin10 -fdebugger-support %s -emit-llvm -o - | FileCheck %s +// RUN: %clang_cc1 -triple x86_64-apple-darwin10 -fdebugger-support %s -emit-llvm -o - | FileCheck %s // rdar://problem/9416370 void test0(id x) { struct A { int w, x, y, z; }; struct A result = (struct A) [x makeStruct]; // CHECK: define{{.*}} void @test0( - // CHECK: [[X:%.*]] = alloca i8*, align 8 + // CHECK: [[X:%.*]] = alloca ptr, align 8 // CHECK-NEXT: [[RESULT:%.*]] = alloca [[A:%.*]], align 4 - // CHECK-NEXT: store i8* {{%.*}}, i8** [[X]], - // CHECK-NEXT: [[T0:%.*]] = load i8*, i8** [[X]], - // CHECK-NEXT: [[T1:%.*]] = load i8*, i8** @OBJC_SELECTOR_REFERENCES_ - // CHECK-NEXT: [[T2:%.*]] = call { i64, i64 } bitcast (i8* (i8*, i8*, ...)* @objc_msgSend to { i64, i64 } (i8*, i8*)*)(i8* noundef [[T0]], i8* noundef [[T1]]) + // CHECK-NEXT: store ptr {{%.*}}, ptr [[X]], + // CHECK-NEXT: [[T0:%.*]] = load ptr, ptr [[X]], + // CHECK-NEXT: [[T1:%.*]] = load ptr, ptr @OBJC_SELECTOR_REFERENCES_ + // CHECK-NEXT: [[T2:%.*]] = call { i64, i64 } @objc_msgSend(ptr noundef [[T0]], ptr noundef [[T1]]) }