diff --git a/lld/test/ELF/aarch64-call26-thunk.s b/lld/test/ELF/aarch64-call26-thunk.s index 1d95abc6e5133..8c3034f568b39 100644 --- a/lld/test/ELF/aarch64-call26-thunk.s +++ b/lld/test/ELF/aarch64-call26-thunk.s @@ -16,7 +16,6 @@ _start: // CHECK: <__AArch64AbsLongThunk_big>: // CHECK-NEXT: 210124: ldr x16, 0x21012c // CHECK-NEXT: 210128: br x16 -// CHECK: <$d>: // CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000 // CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010 diff --git a/lld/test/ELF/aarch64-cortex-a53-843419-large.s b/lld/test/ELF/aarch64-cortex-a53-843419-large.s index bdf95af477650..18b538c0c85aa 100644 --- a/lld/test/ELF/aarch64-cortex-a53-843419-large.s +++ b/lld/test/ELF/aarch64-cortex-a53-843419-large.s @@ -16,7 +16,6 @@ // CHECK1: <__AArch64AbsLongThunk_need_thunk_after_patch>: // CHECK1-NEXT: 210000: 58000050 ldr x16, 0x210008 // CHECK1-NEXT: 210004: d61f0200 br x16 -// CHECK1: <$d>: // CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c .section .text.01, "ax", %progbits diff --git a/lld/test/ELF/aarch64-jump26-thunk.s b/lld/test/ELF/aarch64-jump26-thunk.s index dbb79923ccd5f..7fea5eebc3668 100644 --- a/lld/test/ELF/aarch64-jump26-thunk.s +++ b/lld/test/ELF/aarch64-jump26-thunk.s @@ -16,6 +16,5 @@ _start: // CHECK: <__AArch64AbsLongThunk_big>: // CHECK-NEXT: 210124: ldr x16, 0x21012c // CHECK-NEXT: 210128: br x16 -// CHECK: <$d>: // CHECK-NEXT: 21012c: 00 00 00 00 .word 0x00000000 // CHECK-NEXT: 210130: 10 00 00 00 .word 0x00000010 diff --git a/lld/test/ELF/aarch64-range-thunk-extension-plt32.s b/lld/test/ELF/aarch64-range-thunk-extension-plt32.s index bac52c724f11c..1d09012a2295c 100644 --- a/lld/test/ELF/aarch64-range-thunk-extension-plt32.s +++ b/lld/test/ELF/aarch64-range-thunk-extension-plt32.s @@ -15,8 +15,6 @@ // CHECK-LABEL: <__AArch64AbsLongThunk_callee>: // CHECK-NEXT: 10004: ldr x16, 0x1000c <__AArch64AbsLongThunk_callee+0x8> // CHECK-NEXT: 10008: br x16 - -// CHECK-LABEL: <$d>: // CHECK-NEXT: 1000c: 00 00 00 00 .word 0x00000000 // CHECK-NEXT: 10010: 02 00 00 00 .word 0x00000002 diff --git a/lld/test/ELF/aarch64-relocs.s b/lld/test/ELF/aarch64-relocs.s index 9d2b81f0fe252..198674c085b54 100644 --- a/lld/test/ELF/aarch64-relocs.s +++ b/lld/test/ELF/aarch64-relocs.s @@ -29,7 +29,7 @@ mystr: # # CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_HI21: # CHECK-EMPTY: -# CHECK-NEXT: <$x.2>: +# CHECK-NEXT: <.R_AARCH64_ADR_PREL_PG_HI21>: # CHECK-NEXT: 210132: 90000001 adrp x1, 0x210000 .section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits @@ -43,7 +43,7 @@ mystr: # # CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC: # CHECK-EMPTY: -# CHECK-NEXT: <$x.4>: +# CHECK-NEXT: <.R_AARCH64_ADD_ABS_LO12_NC>: # CHECK-NEXT: 21013b: 9104fc00 add x0, x0, #319 .section .R_AARCH64_LDST64_ABS_LO12_NC,"ax",@progbits @@ -57,7 +57,7 @@ foo: # 0x0000a400 | 0xf940177c = 0xf940a77c # CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC: # CHECK-EMPTY: -# CHECK-NEXT: <$x.6>: +# CHECK-NEXT: <.R_AARCH64_LDST64_ABS_LO12_NC>: # CHECK-NEXT: 210144: f940a77c ldr x28, [x27, #328] .section .SUB,"ax",@progbits @@ -67,7 +67,7 @@ sub: # CHECK: Disassembly of section .SUB: # CHECK-EMPTY: -# CHECK-NEXT: <$x.8>: +# CHECK-NEXT: <.SUB>: # CHECK-NEXT: 21014c: d503201f nop # CHECK: : # CHECK-NEXT: 210150: d503201f nop diff --git a/lld/test/ELF/aarch64-thunk-reuse2.s b/lld/test/ELF/aarch64-thunk-reuse2.s index 87ebbba0fbfac..e9dd385605ad9 100644 --- a/lld/test/ELF/aarch64-thunk-reuse2.s +++ b/lld/test/ELF/aarch64-thunk-reuse2.s @@ -11,7 +11,6 @@ # CHECK-NEXT: 10700: ret # CHECK: <__AArch64ADRPThunk_>: # CHECK-NEXT: 10704: b 0x10700 -# CHECK-EMPTY: # CHECK: <__AArch64ADRPThunk_>: # CHECK-NEXT: 8010708: adrp x16, 0x10000 # CHECK-NEXT: add x16, x16, #1792 diff --git a/lld/test/ELF/arm-bl-v4.s b/lld/test/ELF/arm-bl-v4.s index 6e50f960c7171..1089502b52315 100644 --- a/lld/test/ELF/arm-bl-v4.s +++ b/lld/test/ELF/arm-bl-v4.s @@ -43,8 +43,6 @@ _start: // FAR-EMPTY: // FAR-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-NEXT: 1000008: ldr pc, [pc, #-4] @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 100000c: 00 00 00 06 .word 0x06000000 // FAR-EB-LABEL: <_start>: @@ -53,8 +51,6 @@ _start: // FAR-EB-EMPTY: // FAR-EB-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-EB-NEXT: 1000008: ldr pc, [pc, #-4] @ 0x100000c <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 100000c: 06 00 00 00 .word 0x06000000 // FAR-PIE-LABEL: <_start>: @@ -64,8 +60,6 @@ _start: // FAR-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-PIE-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4PILongThunk_target+0x8> // FAR-PIE-NEXT: add pc, pc, r12 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 1000010: ec ff ff 04 .word 0x04ffffec // FAR-EB-PIE-LABEL: <_start>: @@ -75,8 +69,6 @@ _start: // FAR-EB-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-EB-PIE-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4PILongThunk_target+0x8> // FAR-EB-PIE-NEXT: add pc, pc, r12 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 1000010: 04 ff ff ec .word 0x04ffffec // NEAR-LABEL: <_start>: diff --git a/lld/test/ELF/arm-bl-v4t.s b/lld/test/ELF/arm-bl-v4t.s index aa9f1632ec509..7e4a4f0857311 100644 --- a/lld/test/ELF/arm-bl-v4t.s +++ b/lld/test/ELF/arm-bl-v4t.s @@ -56,19 +56,13 @@ thumb_start: // FAR-EMPTY: // FAR-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-NEXT: 1000010: ldr pc, [pc, #-4] @ 0x1000014 <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 1000014: 00 00 00 06 .word 0x06000000 // FAR-EMPTY: // FAR-NEXT: <__Thumbv4ABSLongThunk_thumb_target>: // FAR-NEXT: 1000018: bx pc // FAR-NEXT: b 0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #-6 -// FAR-EMPTY: -// FAR-NEXT: <$a>: // FAR-NEXT: 100001c: ldr r12, [pc] @ 0x1000024 <__Thumbv4ABSLongThunk_thumb_target+0xc> // FAR-NEXT: bx r12 -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 1000024: 05 00 00 06 .word 0x06000005 // FAR-EB-LABEL: <_start>: @@ -82,19 +76,13 @@ thumb_start: // FAR-EB-EMPTY: // FAR-EB-NEXT: <__ARMv5LongLdrPcThunk_target>: // FAR-EB-NEXT: 1000010: ldr pc, [pc, #-4] @ 0x1000014 <__ARMv5LongLdrPcThunk_target+0x4> -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 1000014: 06 00 00 00 .word 0x06000000 // FAR-EB-EMPTY: // FAR-EB-NEXT: <__Thumbv4ABSLongThunk_thumb_target>: // FAR-EB-NEXT: 1000018: bx pc // FAR-EB-NEXT: b 0x1000018 <__Thumbv4ABSLongThunk_thumb_target> @ imm = #-6 -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$a>: // FAR-EB-NEXT: 100001c: ldr r12, [pc] @ 0x1000024 <__Thumbv4ABSLongThunk_thumb_target+0xc> // FAR-EB-NEXT: bx r12 -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 1000024: 06 00 00 05 .word 0x06000005 // FAR-PIE-LABEL: <_start>: @@ -109,20 +97,14 @@ thumb_start: // FAR-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-PIE-NEXT: 1000010: ldr r12, [pc] @ 0x1000018 <__ARMv4PILongThunk_target+0x8> // FAR-PIE-NEXT: add pc, pc, r12 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 1000018: e4 ff ff 04 .word 0x04ffffe4 // FAR-PIE-EMPTY: // FAR-PIE-NEXT: <__Thumbv4PILongThunk_thumb_target>: // FAR-PIE-NEXT: 100001c: bx pc // FAR-PIE-NEXT: b 0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #-6 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$a>: // FAR-PIE-NEXT: 1000020: ldr r12, [pc, #4] @ 0x100002c <__Thumbv4PILongThunk_thumb_target+0x10> // FAR-PIE-NEXT: add r12, pc, r12 // FAR-PIE-NEXT: bx r12 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 100002c: d9 ff ff 04 .word 0x04ffffd9 // FAR-EB-PIE-LABEL: <_start>: @@ -137,20 +119,14 @@ thumb_start: // FAR-EB-PIE-NEXT: <__ARMv4PILongThunk_target>: // FAR-EB-PIE-NEXT: 1000010: ldr r12, [pc] @ 0x1000018 <__ARMv4PILongThunk_target+0x8> // FAR-EB-PIE-NEXT: add pc, pc, r12 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 1000018: 04 ff ff e4 .word 0x04ffffe4 // FAR-EB-PIE-EMPTY: // FAR-EB-PIE-NEXT: <__Thumbv4PILongThunk_thumb_target>: // FAR-EB-PIE-NEXT: 100001c: bx pc // FAR-EB-PIE-NEXT: b 0x100001c <__Thumbv4PILongThunk_thumb_target> @ imm = #-6 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$a>: // FAR-EB-PIE-NEXT: 1000020: ldr r12, [pc, #4] @ 0x100002c <__Thumbv4PILongThunk_thumb_target+0x10> // FAR-EB-PIE-NEXT: add r12, pc, r12 // FAR-EB-PIE-NEXT: bx r12 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 100002c: 04 ff ff d9 .word 0x04ffffd9 // NEAR-LABEL: <_start>: diff --git a/lld/test/ELF/arm-bl-v6.s b/lld/test/ELF/arm-bl-v6.s index 65f06207303c7..9b78a2d937563 100644 --- a/lld/test/ELF/arm-bl-v6.s +++ b/lld/test/ELF/arm-bl-v6.s @@ -59,11 +59,9 @@ thumbfunc: .space 0x200000 // CHECK-ARM2: <__ARMv5LongLdrPcThunk_farthumbfunc>: // CHECK-ARM2-NEXT: 22100c: e51ff004 ldr pc, [pc, #-4] -// CHECK-ARM2: <$d>: // CHECK-ARM2-NEXT: 221010: 01 20 62 00 .word 0x00622001 // CHECK-ARM2-EB: <__ARMv5LongLdrPcThunk_farthumbfunc>: // CHECK-ARM2-EB-NEXT: 22100c: e51ff004 ldr pc, [pc, #-4] -// CHECK-ARM2-EB: <$d>: // CHECK-ARM2-EB-NEXT: 221010: 00 62 20 01 .word 0x00622001 .section .text.4, "ax", %progbits .space 0x200000 diff --git a/lld/test/ELF/arm-bx-v4t.s b/lld/test/ELF/arm-bx-v4t.s index 30cc913aca7ba..6e772be1bedb7 100644 --- a/lld/test/ELF/arm-bx-v4t.s +++ b/lld/test/ELF/arm-bx-v4t.s @@ -44,8 +44,6 @@ _start: // FAR-NEXT: <__ARMv4ABSLongBXThunk_target>: // FAR-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8> // FAR-NEXT: bx r12 -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 1000010: 01 00 00 06 .word 0x06000001 // FAR-EB-LABEL: <_start>: @@ -55,8 +53,6 @@ _start: // FAR-EB-NEXT: <__ARMv4ABSLongBXThunk_target>: // FAR-EB-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8> // FAR-EB-NEXT: bx r12 -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 1000010: 06 00 00 01 .word 0x06000001 // NEAR-LABEL: <_start>: @@ -66,8 +62,6 @@ _start: // NEAR-NEXT: <__ARMv4ABSLongBXThunk_target>: // NEAR-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8> // NEAR-NEXT: bx r12 -// NEAR-EMPTY: -// NEAR-NEXT: <$d>: // NEAR-NEXT: 1000010: 15 00 00 01 .word 0x01000015 // NEAR-EB-LABEL: <_start>: @@ -77,8 +71,6 @@ _start: // NEAR-EB-NEXT: <__ARMv4ABSLongBXThunk_target>: // NEAR-EB-NEXT: 1000008: ldr r12, [pc] @ 0x1000010 <__ARMv4ABSLongBXThunk_target+0x8> // NEAR-EB-NEXT: bx r12 -// NEAR-EB-EMPTY: -// NEAR-EB-NEXT: <$d>: // NEAR-EB-NEXT: 1000010: 01 00 00 15 .word 0x01000015 // FAR-PIE-LABEL: <_start>: @@ -89,8 +81,6 @@ _start: // FAR-PIE-NEXT: 1000008: ldr r12, [pc, #4] @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc> // FAR-PIE-NEXT: add r12, pc, r12 // FAR-PIE-NEXT: bx r12 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 1000014: ed ff ff 04 .word 0x04ffffed // FAR-EB-PIE-LABEL: <_start>: @@ -101,8 +91,6 @@ _start: // FAR-EB-PIE-NEXT: 1000008: ldr r12, [pc, #4] @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc> // FAR-EB-PIE-NEXT: add r12, pc, r12 // FAR-EB-PIE-NEXT: bx r12 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 1000014: 04 ff ff ed .word 0x04ffffed // NEAR-PIE-LABEL: <_start>: @@ -113,8 +101,6 @@ _start: // NEAR-PIE-NEXT: 1000008: ldr r12, [pc, #4] @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc> // NEAR-PIE-NEXT: add r12, pc, r12 // NEAR-PIE-NEXT: bx r12 -// NEAR-PIE-EMPTY: -// NEAR-PIE-NEXT: <$d>: // NEAR-PIE-NEXT: 1000014: 05 00 00 00 .word 0x00000005 // NEAR-EB-PIE-LABEL: <_start>: @@ -125,8 +111,6 @@ _start: // NEAR-EB-PIE-NEXT: 1000008: ldr r12, [pc, #4] @ 0x1000014 <__ARMv4PILongBXThunk_target+0xc> // NEAR-EB-PIE-NEXT: add r12, pc, r12 // NEAR-EB-PIE-NEXT: bx r12 -// NEAR-EB-PIE-EMPTY: -// NEAR-EB-PIE-NEXT: <$d>: // NEAR-EB-PIE-NEXT: 1000014: 00 00 00 05 .word 0x00000005 .section .high, "ax", %progbits @@ -145,11 +129,7 @@ target: // FAR-NEXT: <__Thumbv4ABSLongBXThunk__start>: // FAR-NEXT: 6000008: bx pc // FAR-NEXT: b 0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #-6 -// FAR-EMPTY: -// FAR-NEXT: <$a>: // FAR-NEXT: 600000c: ldr pc, [pc, #-4] @ 0x6000010 <__Thumbv4ABSLongBXThunk__start+0x8> -// FAR-EMPTY: -// FAR-NEXT: <$d>: // FAR-NEXT: 6000010: 00 00 00 01 .word 0x01000000 // FAR-EB-LABEL: : @@ -160,11 +140,7 @@ target: // FAR-EB-NEXT: <__Thumbv4ABSLongBXThunk__start>: // FAR-EB-NEXT: 6000008: bx pc // FAR-EB-NEXT: b 0x6000008 <__Thumbv4ABSLongBXThunk__start> @ imm = #-6 -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$a>: // FAR-EB-NEXT: 600000c: ldr pc, [pc, #-4] @ 0x6000010 <__Thumbv4ABSLongBXThunk__start+0x8> -// FAR-EB-EMPTY: -// FAR-EB-NEXT: <$d>: // FAR-EB-NEXT: 6000010: 01 00 00 00 .word 0x01000000 // NEAR-LABEL: : @@ -175,11 +151,7 @@ target: // NEAR-NEXT: <__Thumbv4ABSLongBXThunk__start>: // NEAR-NEXT: 100001c: bx pc // NEAR-NEXT: b 0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #-6 -// NEAR-EMPTY: -// NEAR-NEXT: <$a>: // NEAR-NEXT: 1000020: ldr pc, [pc, #-4] @ 0x1000024 <__Thumbv4ABSLongBXThunk__start+0x8> -// NEAR-EMPTY: -// NEAR-NEXT: <$d>: // NEAR-NEXT: 1000024: 00 00 00 01 .word 0x01000000 // NEAR-EB-LABEL: : @@ -190,11 +162,7 @@ target: // NEAR-EB-NEXT: <__Thumbv4ABSLongBXThunk__start>: // NEAR-EB-NEXT: 100001c: bx pc // NEAR-EB-NEXT: b 0x100001c <__Thumbv4ABSLongBXThunk__start> @ imm = #-6 -// NEAR-EB-EMPTY: -// NEAR-EB-NEXT: <$a>: // NEAR-EB-NEXT: 1000020: ldr pc, [pc, #-4] @ 0x1000024 <__Thumbv4ABSLongBXThunk__start+0x8> -// NEAR-EB-EMPTY: -// NEAR-EB-NEXT: <$d>: // NEAR-EB-NEXT: 1000024: 01 00 00 00 .word 0x01000000 // FAR-PIE-LABEL: : @@ -205,12 +173,8 @@ target: // FAR-PIE-NEXT: <__Thumbv4PILongBXThunk__start>: // FAR-PIE-NEXT: 6000008: bx pc // FAR-PIE-NEXT: b 0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #-6 -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$a>: // FAR-PIE-NEXT: 600000c: ldr r12, [pc] @ 0x6000014 <__Thumbv4PILongBXThunk__start+0xc> // FAR-PIE-NEXT: add pc, r12, pc -// FAR-PIE-EMPTY: -// FAR-PIE-NEXT: <$d>: // FAR-PIE-NEXT: 6000014: e8 ff ff fa .word 0xfaffffe8 // FAR-EB-PIE-LABEL: : @@ -221,12 +185,8 @@ target: // FAR-EB-PIE-NEXT: <__Thumbv4PILongBXThunk__start>: // FAR-EB-PIE-NEXT: 6000008: bx pc // FAR-EB-PIE-NEXT: b 0x6000008 <__Thumbv4PILongBXThunk__start> @ imm = #-6 -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$a>: // FAR-EB-PIE-NEXT: 600000c: ldr r12, [pc] @ 0x6000014 <__Thumbv4PILongBXThunk__start+0xc> // FAR-EB-PIE-NEXT: add pc, r12, pc -// FAR-EB-PIE-EMPTY: -// FAR-EB-PIE-NEXT: <$d>: // FAR-EB-PIE-NEXT: 6000014: fa ff ff e8 .word 0xfaffffe8 // NEAR-PIE-LABEL: : @@ -237,12 +197,8 @@ target: // NEAR-PIE-NEXT: <__Thumbv4PILongBXThunk__start>: // NEAR-PIE-NEXT: 1000020: bx pc // NEAR-PIE-NEXT: b 0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #-6 -// NEAR-PIE-EMPTY: -// NEAR-PIE-NEXT: <$a>: // NEAR-PIE-NEXT: 1000024: ldr r12, [pc] @ 0x100002c <__Thumbv4PILongBXThunk__start+0xc> // NEAR-PIE-NEXT: add pc, r12, pc -// NEAR-PIE-EMPTY: -// NEAR-PIE-NEXT: <$d>: // NEAR-PIE-NEXT: 100002c: d0 ff ff ff .word 0xffffffd0 // NEAR-EB-PIE-LABEL: : @@ -253,12 +209,8 @@ target: // NEAR-EB-PIE-NEXT: <__Thumbv4PILongBXThunk__start>: // NEAR-EB-PIE-NEXT: 1000020: bx pc // NEAR-EB-PIE-NEXT: b 0x1000020 <__Thumbv4PILongBXThunk__start> @ imm = #-6 -// NEAR-EB-PIE-EMPTY: -// NEAR-EB-PIE-NEXT: <$a>: // NEAR-EB-PIE-NEXT: 1000024: ldr r12, [pc] @ 0x100002c <__Thumbv4PILongBXThunk__start+0xc> // NEAR-EB-PIE-NEXT: add pc, r12, pc -// NEAR-EB-PIE-EMPTY: -// NEAR-EB-PIE-NEXT: <$d>: // NEAR-EB-PIE-NEXT: 100002c: ff ff ff d0 .word 0xffffffd0 #--- far.lds diff --git a/lld/test/ELF/arm-fpic-got.s b/lld/test/ELF/arm-fpic-got.s index 28c57a59de359..9881806a3b9fb 100644 --- a/lld/test/ELF/arm-fpic-got.s +++ b/lld/test/ELF/arm-fpic-got.s @@ -59,6 +59,5 @@ val: // CODE-NEXT: 20118: ldr r0, [pc, r0] // CODE-NEXT: 2011c: ldr r0, [r0] // CODE-NEXT: 20120: bx lr -// CODE: <$d.1>: // 0x11124 + 0x1008 + 8 = 0x12128 = .got // CODE-NEXT: 20124: 08 00 01 00 diff --git a/lld/test/ELF/arm-gnu-ifunc-plt.s b/lld/test/ELF/arm-gnu-ifunc-plt.s index 28deb3acc86b3..55592c0843d6a 100644 --- a/lld/test/ELF/arm-gnu-ifunc-plt.s +++ b/lld/test/ELF/arm-gnu-ifunc-plt.s @@ -37,7 +37,6 @@ // DISASM: <_start>: // DISASM-NEXT: 201e4: bl 0x20240 // DISASM-NEXT: 201e8: bl 0x20250 -// DISASM: <$d.1>: // DISASM-NEXT: 201ec: 00 00 00 00 .word 0x00000000 // DISASM-NEXT: 201f0: 04 00 00 00 .word 0x00000004 // DISASM: 201f4: bl 0x20220 @@ -45,39 +44,31 @@ // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .plt: // DISASM-EMPTY: -// DISASM-NEXT: <$a>: +// DISASM-NEXT: <.plt>: // DISASM-NEXT: 20200: str lr, [sp, #-4]! // DISASM-NEXT: 20204: add lr, pc, #0, #12 // DISASM-NEXT: 20208: add lr, lr, #32 // DISASM-NEXT: 2020c: ldr pc, [lr, #236]! -// DISASM: <$d>: // DISASM-NEXT: 20210: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM-NEXT: 20214: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM-NEXT: 20218: d4 d4 d4 d4 .word 0xd4d4d4d4 // DISASM-NEXT: 2021c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: // DISASM-NEXT: 20220: add r12, pc, #0, #12 // DISASM-NEXT: 20224: add r12, r12, #32 // DISASM-NEXT: 20228: ldr pc, [r12, #212]! -// DISASM: <$d>: // DISASM-NEXT: 2022c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: // DISASM-NEXT: 20230: add r12, pc, #0, #12 // DISASM-NEXT: 20234: add r12, r12, #32 // DISASM-NEXT: 20238: ldr pc, [r12, #200]! -// DISASM: <$d>: // DISASM-NEXT: 2023c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: +// DISASM: <.iplt>: // DISASM-NEXT: 20240: add r12, pc, #0, #12 // DISASM-NEXT: 20244: add r12, r12, #16 // DISASM-NEXT: 20248: ldr pc, [r12, #160]! -// DISASM: <$d>: // DISASM-NEXT: 2024c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: // DISASM-NEXT: 20250: add r12, pc, #0, #12 // DISASM-NEXT: 20254: add r12, r12, #16 // DISASM-NEXT: 20258: ldr pc, [r12, #148]! -// DISASM: <$d>: // DISASM-NEXT: 2025c: d4 d4 d4 d4 .word 0xd4d4d4d4 .syntax unified diff --git a/lld/test/ELF/arm-gnu-ifunc.s b/lld/test/ELF/arm-gnu-ifunc.s index 46988796e74b5..562478256fd8e 100644 --- a/lld/test/ELF/arm-gnu-ifunc.s +++ b/lld/test/ELF/arm-gnu-ifunc.s @@ -129,15 +129,12 @@ _start: // DISASM-EMPTY: // DISASM-NEXT: Disassembly of section .iplt: // DISASM-EMPTY: -// DISASM-NEXT: <$a>: +// DISASM-NEXT: <.iplt>: // DISASM-NEXT: 20130: add r12, pc, #0, #12 // DISASM-NEXT: 20134: add r12, r12, #16 // DISASM-NEXT: 20138: ldr pc, [r12, #24]! -// DISASM: <$d>: // DISASM-NEXT: 2013c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DISASM: <$a>: // DISASM-NEXT: 20140: add r12, pc, #0, #12 // DISASM-NEXT: 20144: add r12, r12, #16 // DISASM-NEXT: 20148: ldr pc, [r12, #12]! -// DISASM: <$d>: // DISASM-NEXT: 2014c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-got-relative.s b/lld/test/ELF/arm-got-relative.s index a22b5f9c11c1b..4add78feec90f 100644 --- a/lld/test/ELF/arm-got-relative.s +++ b/lld/test/ELF/arm-got-relative.s @@ -47,7 +47,6 @@ function: // CODE-NEXT: 101a4: e59f2008 ldr r2, [pc, #8] // CODE-NEXT: 101a8: e08f0003 add r0, pc, r3 // CODE-NEXT: 101ac: e12fff1e bx lr -// CODE: <$d.1>: // (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c // CODE-NEXT: 101b0: 5c 00 01 00 // (Got(function) - GotBase = 0x0 diff --git a/lld/test/ELF/arm-plt-reloc.s b/lld/test/ELF/arm-plt-reloc.s index 177eaf4b1f12b..bfd51467e7425 100644 --- a/lld/test/ELF/arm-plt-reloc.s +++ b/lld/test/ELF/arm-plt-reloc.s @@ -63,37 +63,30 @@ _start: // DSO-EMPTY: // DSO-NEXT: Disassembly of section .plt: // DSO-EMPTY: -// DSO-NEXT: <$a>: +// DSO-NEXT: <.plt>: // DSO-NEXT: 10230: str lr, [sp, #-4]! // (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2] // DSO-NEXT: 10234: add lr, pc, #0, #12 // DSO-NEXT: 10238: add lr, lr, #32, #20 // DSO-NEXT: 1023c: ldr pc, [lr, #164]! -// DSO: <$d>: // DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4 // DSO-NEXT: 10250: add r12, pc, #0, #12 // DSO-NEXT: 10254: add r12, r12, #32, #20 // DSO-NEXT: 10258: ldr pc, [r12, #140]! -// DSO: <$d>: // DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8 // DSO-NEXT: 10260: add r12, pc, #0, #12 // DSO-NEXT: 10264: add r12, r12, #32, #20 // DSO-NEXT: 10268: ldr pc, [r12, #128]! -// DSO: <$d>: // DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec // DSO-NEXT: 10270: add r12, pc, #0, #12 // DSO-NEXT: 10274: add r12, r12, #32, #20 // DSO-NEXT: 10278: ldr pc, [r12, #116]! -// DSO: <$d>: // DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 @@ -150,33 +143,26 @@ _start: // CHECKHIGH-EMPTY: // CHECKHIGH-NEXT: Disassembly of section .plt: // CHECKHIGH-EMPTY: -// CHECKHIGH-NEXT: <$a>: +// CHECKHIGH-NEXT: <.plt>: // CHECKHIGH-NEXT: 2000: str lr, [sp, #-4]! // CHECKHIGH-NEXT: 2004: add lr, pc, #16, #12 // CHECKHIGH-NEXT: 2008: add lr, lr, #1036288 // CHECKHIGH-NEXT: 200c: ldr pc, [lr, #4092]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 2010: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKHIGH-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2020: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2024: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2028: ldr pc, [r12, #4068]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 202c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2030: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2034: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2038: ldr pc, [r12, #4056]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKHIGH: <$a>: // CHECKHIGH-NEXT: 2040: add r12, pc, #16, #12 // CHECKHIGH-NEXT: 2044: add r12, r12, #1036288 // CHECKHIGH-NEXT: 2048: ldr pc, [r12, #4044]! -// CHECKHIGH: <$d>: // CHECKHIGH-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSORELHIGH: Name: .got.plt @@ -225,33 +211,26 @@ _start: // CHECKLONG-EMPTY: // CHECKLONG-NEXT: Disassembly of section .plt: // CHECKLONG-EMPTY: -// CHECKLONG-NEXT: <$a>: +// CHECKLONG-NEXT: <.plt>: // CHECKLONG-NEXT: 2000: str lr, [sp, #-4]! // CHECKLONG-NEXT: 2004: ldr lr, [pc, #4] // CHECKLONG-NEXT: 2008: add lr, pc, lr // CHECKLONG-NEXT: 200c: ldr pc, [lr, #8]! -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 2010: f0 f0 10 11 .word 0x1110f0f0 // CHECKLONG-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2020: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2024: add r12, r12, pc // CHECKLONG-NEXT: 2028: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 202c: e0 f0 10 11 .word 0x1110f0e0 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2030: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2034: add r12, r12, pc // CHECKLONG-NEXT: 2038: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 203c: d4 f0 10 11 .word 0x1110f0d4 -// CHECKLONG: <$a>: // CHECKLONG-NEXT: 2040: ldr r12, [pc, #4] // CHECKLONG-NEXT: 2044: add r12, r12, pc // CHECKLONG-NEXT: 2048: ldr pc, [r12] -// CHECKLONG: <$d>: // CHECKLONG-NEXT: 204c: c8 f0 10 11 .word 0x1110f0c8 // CHECKLONG-EB: Disassembly of section .text: @@ -269,33 +248,26 @@ _start: // CHECKLONG-EB-EMPTY: // CHECKLONG-EB-NEXT: Disassembly of section .plt: // CHECKLONG-EB-EMPTY: -// CHECKLONG-EB-NEXT: <$a>: +// CHECKLONG-EB-NEXT: <.plt>: // CHECKLONG-EB-NEXT: 2000: str lr, [sp, #-4]! // CHECKLONG-EB-NEXT: ldr lr, [pc, #4] // CHECKLONG-EB-NEXT: add lr, pc, lr // CHECKLONG-EB-NEXT: ldr pc, [lr, #8]! -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 f0 .word 0x1110f0f0 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKLONG-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2020: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 e0 .word 0x1110f0e0 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2030: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 d4 .word 0x1110f0d4 -// CHECKLONG-EB: <$a>: // CHECKLONG-EB-NEXT: 2040: ldr r12, [pc, #4] // CHECKLONG-EB-NEXT: add r12, r12, pc // CHECKLONG-EB-NEXT: ldr pc, [r12] -// CHECKLONG-EB: <$d>: // CHECKLONG-EB-NEXT: 11 10 f0 c8 .word 0x1110f0c8 // DSORELLONG: Name: .got.plt @@ -345,33 +317,26 @@ _start: // CHECKMIX-EMPTY: // CHECKMIX-NEXT: Disassembly of section .plt: // CHECKMIX-EMPTY: -// CHECKMIX-NEXT: <$a>: +// CHECKMIX-NEXT: <.plt>: // CHECKMIX-NEXT: 2000: str lr, [sp, #-4]! // CHECKMIX-NEXT: 2004: ldr lr, [pc, #4] // CHECKMIX-NEXT: 2008: add lr, pc, lr // CHECKMIX-NEXT: 200c: ldr pc, [lr, #8]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 2010: 10 00 00 08 .word 0x08000010 // CHECKMIX-NEXT: 2014: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-NEXT: 2018: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-NEXT: 201c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2020: ldr r12, [pc, #4] // CHECKMIX-NEXT: 2024: add r12, r12, pc // CHECKMIX-NEXT: 2028: ldr pc, [r12] -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 202c: 00 00 00 08 .word 0x08000000 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2030: add r12, pc, #133169152 // CHECKMIX-NEXT: 2034: add r12, r12, #1044480 // CHECKMIX-NEXT: 2038: ldr pc, [r12, #4088]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 203c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX: <$a>: // CHECKMIX-NEXT: 2040: add r12, pc, #133169152 // CHECKMIX-NEXT: 2044: add r12, r12, #1044480 // CHECKMIX-NEXT: 2048: ldr pc, [r12, #4076]! -// CHECKMIX: <$d>: // CHECKMIX-NEXT: 204c: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB: Disassembly of section .text: @@ -389,33 +354,26 @@ _start: // CHECKMIX-EB-EMPTY: // CHECKMIX-EB-NEXT: Disassembly of section .plt: // CHECKMIX-EB-EMPTY: -// CHECKMIX-EB-NEXT: <$a>: +// CHECKMIX-EB-NEXT: <.plt>: // CHECKMIX-EB-NEXT: 2000: str lr, [sp, #-4]! // CHECKMIX-EB-NEXT: ldr lr, [pc, #4] // CHECKMIX-EB-NEXT: add lr, pc, lr // CHECKMIX-EB-NEXT: ldr pc, [lr, #8]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: 08 00 00 10 .word 0x08000010 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2020: ldr r12, [pc, #4] // CHECKMIX-EB-NEXT: add r12, r12, pc // CHECKMIX-EB-NEXT: ldr pc, [r12] -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: 08 00 00 00 .word 0x08000000 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2030: add r12, pc, #133169152 // CHECKMIX-EB-NEXT: add r12, r12, #1044480 // CHECKMIX-EB-NEXT: ldr pc, [r12, #4088]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECKMIX-EB: <$a>: // CHECKMIX-EB-NEXT: 2040: add r12, pc, #133169152 // CHECKMIX-EB-NEXT: add r12, r12, #1044480 // CHECKMIX-EB-NEXT: ldr pc, [r12, #4076]! -// CHECKMIX-EB: <$d>: // CHECKMIX-EB-NEXT: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSORELMIX: Name: .got.plt diff --git a/lld/test/ELF/arm-target1.s b/lld/test/ELF/arm-target1.s index a8eed080155e6..1d8ea5fd83e4c 100644 --- a/lld/test/ELF/arm-target1.s +++ b/lld/test/ELF/arm-target1.s @@ -29,7 +29,7 @@ // RELATIVE: 00010154 l .text 00000000 patatino // RELATIVE: Disassembly of section .text: // RELATIVE-EMPTY: -// RELATIVE: <$d.0>: +// RELATIVE: <.text>: // RELATIVE: 10150: 04 00 00 00 .word 0x00000004 // ABS: relocation R_ARM_TARGET1 cannot be used against symbol 'patatino'; recompile with -fPIC diff --git a/lld/test/ELF/arm-thumb-interwork-ifunc.s b/lld/test/ELF/arm-thumb-interwork-ifunc.s index 71ac52ddc6bc0..2c8908518ce5e 100644 --- a/lld/test/ELF/arm-thumb-interwork-ifunc.s +++ b/lld/test/ELF/arm-thumb-interwork-ifunc.s @@ -57,7 +57,7 @@ thumb_caller: // CHECK: Disassembly of section .iplt: -// CHECK: 00021030 <$a>: +// CHECK: 00021030 <.iplt>: // CHECK-NEXT: add r12, pc, #0, #12 // CHECK-NEXT: add r12, r12, #16, #20 // CHECK-NEXT: ldr pc, [r12, #8]! diff --git a/lld/test/ELF/arm-thumb-interwork-shared.s b/lld/test/ELF/arm-thumb-interwork-shared.s index 0257df27999a9..03bed000a02e6 100644 --- a/lld/test/ELF/arm-thumb-interwork-shared.s +++ b/lld/test/ELF/arm-thumb-interwork-shared.s @@ -36,25 +36,20 @@ sym1: // CHECK: Disassembly of section .plt: // CHECK-EMPTY: -// CHECK-NEXT: <$a>: +// CHECK-NEXT: <.plt>: // CHECK-NEXT: 10210: str lr, [sp, #-4]! // CHECK-NEXT: add lr, pc, #0, #12 // CHECK-NEXT: add lr, lr, #32 // CHECK-NEXT: ldr pc, [lr, #148]! -// CHECK: <$d>: // CHECK-NEXT: 10220: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 // CHECK-NEXT: .word 0xd4d4d4d4 -// CHECK: <$a>: // CHECK-NEXT: 10230: add r12, pc, #0, #12 // CHECK-NEXT: add r12, r12, #32 // CHECK-NEXT: ldr pc, [r12, #124]! -// CHECK: <$d>: // CHECK-NEXT: 1023c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK: <$a>: // CHECK-NEXT: 10240: add r12, pc, #0, #12 // CHECK-NEXT: add r12, r12, #32 // CHECK-NEXT: ldr pc, [r12, #112]! -// CHECK: <$d>: // CHECK-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s index 6adefb5018d36..4722cd4e0204d 100644 --- a/lld/test/ELF/arm-thumb-interwork-thunk-v5.s +++ b/lld/test/ELF/arm-thumb-interwork-thunk-v5.s @@ -43,7 +43,6 @@ _start: // CHECK: <__ARMv5LongLdrPcThunk_thumb_func>: // CHECK-NEXT: 21014: e51ff004 ldr pc, [pc, #-4] -// CHECK: <$d>: // CHECK-NEXT: 21018: 11 10 02 00 .word 0x00021011 // CHECK-EB: <_start>: @@ -57,7 +56,6 @@ _start: // CHECK-EB: <__ARMv5LongLdrPcThunk_thumb_func>: // CHECK-EB-NEXT: 21014: e51ff004 ldr pc, [pc, #-4] -// CHECK-EB: <$d>: // CHECK-EB-NEXT: 21018: 00 02 10 11 .word 0x00021011 // CHECK-PI: <_start>: @@ -73,7 +71,6 @@ _start: // CHECK-PI-NEXT: 11014: e59fc004 ldr r12, [pc, #4] // CHECK-PI-NEXT: 11018: e08fc00c add r12, pc, r12 // CHECK-PI-NEXT: 1101c: e12fff1c bx r12 -// CHECK-PI: <$d>: // CHECK-PI-NEXT: 11020: f1 ff ff ff .word 0xfffffff1 // CHECK-EB-PI: <_start>: @@ -89,7 +86,6 @@ _start: // CHECK-EB-PI-NEXT: 11014: e59fc004 ldr r12, [pc, #4] // CHECK-EB-PI-NEXT: 11018: e08fc00c add r12, pc, r12 // CHECK-EB-PI-NEXT: 1101c: e12fff1c bx r12 -// CHECK-EB-PI: <$d>: // CHECK-EB-PI-NEXT: 11020: ff ff ff f1 .word 0xfffffff1 .section .text.1, "ax", %progbits .thumb diff --git a/lld/test/ELF/arm-thumb-interwork-thunk.s b/lld/test/ELF/arm-thumb-interwork-thunk.s index 4c22823a9e124..39a2e737cc9d2 100644 --- a/lld/test/ELF/arm-thumb-interwork-thunk.s +++ b/lld/test/ELF/arm-thumb-interwork-thunk.s @@ -289,80 +289,46 @@ _start: // CHECK-ARM-PLT: Disassembly of section .plt: // CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001610 <$a>: +// CHECK-ARM-PLT-NEXT: 00001610 <.plt>: // CHECK-ARM-PLT-NEXT: 1610: str lr, [sp, #-4]! // CHECK-ARM-PLT-NEXT: 1614: add lr, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1618: add lr, lr, #0, #20 // CHECK-ARM-PLT-NEXT: 161c: ldr pc, [lr, #672]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001620 <$d>: // CHECK-ARM-PLT-NEXT: 1620: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-ARM-PLT-NEXT: 1624: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-ARM-PLT-NEXT: 1628: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-ARM-PLT-NEXT: 162c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001630 <$a>: // CHECK-ARM-PLT-NEXT: 1630: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1634: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1638: ldr pc, [r12, #648]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000163c <$d>: // CHECK-ARM-PLT-NEXT: 163c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001640 <$a>: // CHECK-ARM-PLT-NEXT: 1640: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1644: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1648: ldr pc, [r12, #636]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000164c <$d>: // CHECK-ARM-PLT-NEXT: 164c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001650 <$a>: // CHECK-ARM-PLT-NEXT: 1650: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1654: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1658: ldr pc, [r12, #624]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000165c <$d>: // CHECK-ARM-PLT-NEXT: 165c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001660 <$a>: // CHECK-ARM-PLT-NEXT: 1660: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1664: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1668: ldr pc, [r12, #612]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000166c <$d>: // CHECK-ARM-PLT-NEXT: 166c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001670 <$a>: // CHECK-ARM-PLT-NEXT: 1670: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1674: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1678: ldr pc, [r12, #600]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000167c <$d>: // CHECK-ARM-PLT-NEXT: 167c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001680 <$a>: // CHECK-ARM-PLT-NEXT: 1680: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1684: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1688: ldr pc, [r12, #588]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000168c <$d>: // CHECK-ARM-PLT-NEXT: 168c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 00001690 <$a>: // CHECK-ARM-PLT-NEXT: 1690: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 1694: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 1698: ldr pc, [r12, #576]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 0000169c <$d>: // CHECK-ARM-PLT-NEXT: 169c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 000016a0 <$a>: // CHECK-ARM-PLT-NEXT: 16a0: add r12, pc, #0, #12 // CHECK-ARM-PLT-NEXT: 16a4: add r12, r12, #0, #20 // CHECK-ARM-PLT-NEXT: 16a8: ldr pc, [r12, #564]! -// CHECK-ARM-PLT-EMPTY: -// CHECK-ARM-PLT-NEXT: 000016ac <$d>: // CHECK-ARM-PLT-NEXT: 16ac: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-DSO-REL: 0x18C0 R_ARM_JUMP_SLOT thumb_callee1 diff --git a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s index f045c749e9cac..65e7e4b525926 100644 --- a/lld/test/ELF/arm-thumb-plt-range-thunk-os.s +++ b/lld/test/ELF/arm-thumb-plt-range-thunk-os.s @@ -87,31 +87,24 @@ far_nonpreemptible_alias: // CHECK4: Disassembly of section .plt: // CHECK4-EMPTY: -// CHECK4-NEXT: <$a>: +// CHECK4-NEXT: <.plt>: // CHECK4-NEXT: 4000010: e52de004 str lr, [sp, #-4]! // CHECK4-NEXT: 4000014: e28fe600 add lr, pc, #0, #12 // CHECK4-NEXT: 4000018: e28eea20 add lr, lr, #32 // CHECK4-NEXT: 400001c: e5bef0a4 ldr pc, [lr, #164]! -// CHECK4: <$d>: // CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 4000028: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000030: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000034: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000038: e5bcf08c ldr pc, [r12, #140]! -// CHECK4: <$d>: // CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000040: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000044: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000048: e5bcf080 ldr pc, [r12, #128]! -// CHECK4: <$d>: // CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK4: <$a>: // CHECK4-NEXT: 4000050: e28fc600 add r12, pc, #0, #12 // CHECK4-NEXT: 4000054: e28cca20 add r12, r12, #32 // CHECK4-NEXT: 4000058: e5bcf074 ldr pc, [r12, #116]! -// CHECK4: <$d>: // CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thumb-plt-reloc.s b/lld/test/ELF/arm-thumb-plt-reloc.s index a0a90893318ff..4a1fd020452c9 100644 --- a/lld/test/ELF/arm-thumb-plt-reloc.s +++ b/lld/test/ELF/arm-thumb-plt-reloc.s @@ -71,38 +71,31 @@ _start: // DSO-NEXT: 10224: f000 e824 blx 0x10270 // DSO: Disassembly of section .plt: // DSO-EMPTY: -// DSO-NEXT: <$a>: +// DSO-NEXT: <.plt>: // DSO-NEXT: 10230: e52de004 str lr, [sp, #-4]! // (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2] // DSO-NEXT: 10234: e28fe600 add lr, pc, #0, #12 // DSO-NEXT: 10238: e28eea20 add lr, lr, #32, #20 // DSO-NEXT: 1023c: e5bef0a4 ldr pc, [lr, #164]! -// DSO: <$d>: // DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10244: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 10248: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4 // DSO-NEXT: 10250: e28fc600 add r12, pc, #0, #12 // DSO-NEXT: 10254: e28cca20 add r12, r12, #32, #20 // DSO-NEXT: 10258: e5bcf08c ldr pc, [r12, #140]! -// DSO: <$d>: // DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8 // DSO-NEXT: 10260: e28fc600 add r12, pc, #0, #12 // DSO-NEXT: 10264: e28cca20 add r12, r12, #32, #20 // DSO-NEXT: 10268: e5bcf080 ldr pc, [r12, #128]! -// DSO: <$d>: // DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// DSO: <$a>: // (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec // DSO-NEXT: 10270: e28fc600 add r12, pc, #0, #12 // DSO-NEXT: 10274: e28cca20 add r12, r12, #32, #20 // DSO-NEXT: 10278: e5bcf074 ldr pc, [r12, #116]! -// DSO: <$d>: // DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4 // DSOREL: Name: .got.plt diff --git a/lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s b/lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s index 1f511e17d1506..3daf1e52df9b5 100644 --- a/lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s +++ b/lld/test/ELF/arm-thumb-range-thunk-os-no-ext.s @@ -66,23 +66,15 @@ FUNCTION 02 // CHECK4-NEXT: <__Thumbv4ABSLongThunk_tfunc04>: // CHECK4-NEXT: 400008: bx pc // CHECK4-NEXT: b 0x400008 <__Thumbv4ABSLongThunk_tfunc04> @ imm = #-0x6 -// CHECK4-EMPTY: -// CHECK4-NEXT: <$a>: // CHECK4-NEXT: 40000c: ldr r12, [pc] @ 0x400014 <__Thumbv4ABSLongThunk_tfunc04+0xc> // CHECK4-NEXT: bx r12 -// CHECK4-EMPTY: -// CHECK4-NEXT: <$d>: // CHECK4-NEXT: 400014: 01 00 60 00 .word 0x00600001 // CHECK4-EMPTY: // CHECK4-NEXT: <__Thumbv4ABSLongThunk_tfunc07>: // CHECK4-NEXT: 400018: bx pc // CHECK4-NEXT: b 0x400018 <__Thumbv4ABSLongThunk_tfunc07> @ imm = #-0x6 -// CHECK4-EMPTY: -// CHECK4-NEXT: <$a>: // CHECK4-NEXT: 40001c: ldr r12, [pc] @ 0x400024 <__Thumbv4ABSLongThunk_tfunc07+0xc> // CHECK4-NEXT: bx r12 -// CHECK4-EMPTY: -// CHECK4-NEXT: <$d>: // CHECK4-NEXT: 400024: 01 00 90 00 .word 0x00900001 FUNCTION 03 @@ -95,12 +87,8 @@ FUNCTION 05 // CHECK5-NEXT: <__Thumbv4ABSLongThunk_tfunc03>: // CHECK5-NEXT: 700004: bx pc // CHECK5-NEXT: b 0x700004 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0x6 -// CHECK5-EMPTY: -// CHECK5-NEXT: <$a>: // CHECK5-NEXT: 700008: ldr r12, [pc] @ 0x700010 <__Thumbv4ABSLongThunk_tfunc03+0xc> // CHECK5-NEXT: bx r12 -// CHECK5-EMPTY: -// CHECK5-NEXT: <$d>: // CHECK5-NEXT: 700010: 01 00 50 00 .word 0x00500001 FUNCTION 06 @@ -129,12 +117,8 @@ FUNCTION 08 // CHECK8-NEXT: <__Thumbv4ABSLongThunk_tfunc03>: // CHECK8-NEXT: a00008: bx pc // CHECK8-NEXT: a0000a: b 0xa00008 <__Thumbv4ABSLongThunk_tfunc03> @ imm = #-0x6 -// CHECK8-EMPTY: -// CHECK8-NEXT: <$a>: // CHECK8-NEXT: a0000c: ldr r12, [pc] @ 0xa00014 <__Thumbv4ABSLongThunk_tfunc03+0xc> // CHECK8-NEXT: a00010: bx r12 -// CHECK8-EMPTY: -// CHECK8-NEXT: <$d>: // CHECK8-NEXT: a00014: 01 00 50 00 .word 0x00500001 FUNCTION 09 diff --git a/lld/test/ELF/arm-thunk-arm-thumb-reuse.s b/lld/test/ELF/arm-thunk-arm-thumb-reuse.s index 12538312f0e09..724be08b8d11b 100644 --- a/lld/test/ELF/arm-thunk-arm-thumb-reuse.s +++ b/lld/test/ELF/arm-thunk-arm-thumb-reuse.s @@ -36,10 +36,8 @@ _start: // CHECK: 00010000 <_start>: // CHECK-NEXT: 10000: bl 0x10010 <__ARMv7ABSLongThunk_far> -// CHECK: 00010004 <$t.1>: // CHECK-NEXT: 10004: blx 0x10010 <__ARMv7ABSLongThunk_far> // CHECK-NEXT: 10008: bl 0x1001c <__Thumbv7ABSLongThunk_far2> -// CHECK: 0001000c <$a.2>: // CHECK-NEXT: 1000c: blx 0x1001c <__Thumbv7ABSLongThunk_far2> // CHECK: 00010010 <__ARMv7ABSLongThunk_far>: // CHECK-NEXT: 10010: movw r12, #0 diff --git a/lld/test/ELF/arm-thunk-largesection.s b/lld/test/ELF/arm-thunk-largesection.s index be16393664b6f..6d06a4862a07c 100644 --- a/lld/test/ELF/arm-thunk-largesection.s +++ b/lld/test/ELF/arm-thunk-largesection.s @@ -33,7 +33,6 @@ _start: .space 0x1000 // CHECK1: <_start>: // CHECK1-NEXT: 21000: bx lr -// CHECK1: <$d.1>: // CHECK1-NEXT: 21002: 00 00 00 00 .word 0x00000000 diff --git a/lld/test/ELF/arm-thunk-multipass-plt.s b/lld/test/ELF/arm-thunk-multipass-plt.s index 6a8f098301ccb..2e8f054ce3f73 100644 --- a/lld/test/ELF/arm-thunk-multipass-plt.s +++ b/lld/test/ELF/arm-thunk-multipass-plt.s @@ -77,25 +77,20 @@ preemptible2: // CHECK-PLT: Disassembly of section .plt: // CHECK-PLT-EMPTY: -// CHECK-PLT-NEXT: 00d00020 <$a>: +// CHECK-PLT-NEXT: 00d00020 <.plt>: // CHECK-PLT-NEXT: d00020: str lr, [sp, #-4]! // CHECK-PLT-NEXT: add lr, pc, #0, #12 // CHECK-PLT-NEXT: add lr, lr, #32, #20 // CHECK-PLT-NEXT: ldr pc, [lr, #148]! -// CHECK-PLT: 00d00030 <$d>: // CHECK-PLT-NEXT: d00030: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-PLT-NEXT: d00034: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-PLT-NEXT: d00038: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK-PLT-NEXT: d0003c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-PLT: 00d00040 <$a>: // CHECK-PLT-NEXT: d00040: add r12, pc, #0, #12 // CHECK-PLT-NEXT: d00044: add r12, r12, #32, #20 // CHECK-PLT-NEXT: d00048: ldr pc, [r12, #124]! -// CHECK-PLT: 00d0004c <$d>: // CHECK-PLT-NEXT: d0004c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK-PLT: 00d00050 <$a>: // CHECK-PLT-NEXT: d00050: add r12, pc, #0, #12 // CHECK-PLT-NEXT: d00054: add r12, r12, #32, #20 // CHECK-PLT-NEXT: d00058: ldr pc, [r12, #112]! -// CHECK-PLT: 00d0005c <$d>: // CHECK-PLT-NEXT: d0005c: d4 d4 d4 d4 .word 0xd4d4d4d4 diff --git a/lld/test/ELF/arm-thunk-re-add.s b/lld/test/ELF/arm-thunk-re-add.s index 3fa876082c398..7505ec045fff0 100644 --- a/lld/test/ELF/arm-thunk-re-add.s +++ b/lld/test/ELF/arm-thunk-re-add.s @@ -100,27 +100,22 @@ callers: // CHECK3: Disassembly of section .plt: // CHECK3-EMPTY: -// CHECK3-NEXT: <$a>: +// CHECK3-NEXT: <.plt>: // CHECK3-NEXT: 1100020: e52de004 str lr, [sp, #-4]! // CHECK3-NEXT: 1100024: e28fe600 add lr, pc, #0, #12 // CHECK3-NEXT: 1100028: e28eea20 add lr, lr, #32 // CHECK3-NEXT: 110002c: e5bef094 ldr pc, [lr, #148]! -// CHECK3: <$d>: // CHECK3-NEXT: 1100030: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK3-NEXT: 1100034: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK3-NEXT: 1100038: d4 d4 d4 d4 .word 0xd4d4d4d4 // CHECK3-NEXT: 110003c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK3: <$a>: // CHECK3-NEXT: 1100040: e28fc600 add r12, pc, #0, #12 // CHECK3-NEXT: 1100044: e28cca20 add r12, r12, #32 // CHECK3-NEXT: 1100048: e5bcf07c ldr pc, [r12, #124]! -// CHECK3: <$d>: // CHECK3-NEXT: 110004c: d4 d4 d4 d4 .word 0xd4d4d4d4 -// CHECK3: <$a>: // CHECK3-NEXT: 1100050: e28fc600 add r12, pc, #0, #12 // CHECK3-NEXT: 1100054: e28cca20 add r12, r12, #32 // CHECK3-NEXT: 1100058: e5bcf070 ldr pc, [r12, #112]! -// CHECK3: <$d>: // CHECK3-NEXT: 110005c: d4 d4 d4 d4 .word 0xd4d4d4d4 // RUN: llvm-mc -arm-add-build-attributes -filetype=obj -triple=thumbv7aeb-none-linux-gnueabi -mcpu=cortex-a8 %s -o %t diff --git a/lld/test/ELF/pr34660.s b/lld/test/ELF/pr34660.s index 7470d2c2d9d3a..d68824d67f64a 100644 --- a/lld/test/ELF/pr34660.s +++ b/lld/test/ELF/pr34660.s @@ -14,7 +14,7 @@ # DISASM: Disassembly of section .text: # DISASM-EMPTY: -# DISASM-NEXT: <$x.0>: +# DISASM-NEXT: <.text>: # DISASM-NEXT: 1022c: ldr x8, 0x30294 # SYM: Symbol table '.symtab' diff --git a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h index d3e9bfecd29fb..2553a086cd53b 100644 --- a/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h +++ b/llvm/include/llvm/MC/MCDisassembler/MCDisassembler.h @@ -31,6 +31,8 @@ struct SymbolInfoTy { // XCOFF uses XCOFFSymInfo. Other targets use Type. XCOFFSymbolInfoTy XCOFFSymInfo; uint8_t Type; + // Used by ELF to describe a mapping symbol that is usually not displayed. + bool IsMappingSymbol; private: bool IsXCOFF; @@ -40,10 +42,11 @@ struct SymbolInfoTy { SymbolInfoTy(std::optional Smc, uint64_t Addr, StringRef Name, std::optional Idx, bool Label) : Addr(Addr), Name(Name), XCOFFSymInfo{Smc, Idx, Label}, Type(0), - IsXCOFF(true), HasType(false) {} + IsMappingSymbol(false), IsXCOFF(true), HasType(false) {} SymbolInfoTy(uint64_t Addr, StringRef Name, uint8_t Type, - bool IsXCOFF = false) - : Addr(Addr), Name(Name), Type(Type), IsXCOFF(IsXCOFF), HasType(true) {} + bool IsMappingSymbol = false, bool IsXCOFF = false) + : Addr(Addr), Name(Name), Type(Type), IsMappingSymbol(IsMappingSymbol), + IsXCOFF(IsXCOFF), HasType(true) {} bool isXCOFF() const { return IsXCOFF; } private: @@ -60,8 +63,10 @@ struct SymbolInfoTy { return std::tie(P1.Addr, P1.XCOFFSymInfo, P1.Name) < std::tie(P2.Addr, P2.XCOFFSymInfo, P2.Name); - return std::tie(P1.Addr, P1.Name, P1.Type) < - std::tie(P2.Addr, P2.Name, P2.Type); + // With the same address, place mapping symbols first. + bool MS1 = !P1.IsMappingSymbol, MS2 = !P2.IsMappingSymbol; + return std::tie(P1.Addr, MS1, P1.Name, P1.Type) < + std::tie(P2.Addr, MS2, P2.Name, P2.Type); } }; diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s index 8917ff40d5412..1d02538e4d5b3 100644 --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/disassemble-align.s @@ -2,11 +2,9 @@ # RUN: llvm-objdump --no-print-imm-hex -d %t | tr '\t' '|' | FileCheck --match-full-lines --strict-whitespace %s ## Use '|' to show where the tabs line up. -# CHECK:0000000000000000 <$x.0>: +# CHECK:0000000000000000 <.text>: # CHECK-NEXT: 0: 91001062 |add|x2, x3, #4{{$}} # CHECK-NEXT: 4: d503201f |nop -# CHECK-EMPTY: -# CHECK-NEXT:0000000000000008 <$d.1>: # CHECK-NEXT: 8: ff ff 00 00 |.word|0x0000ffff add x2, x3, #4 diff --git a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test index 3a6d02df0e249..cf24952a2d8d4 100644 --- a/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test +++ b/llvm/test/tools/llvm-objdump/ELF/AArch64/elf-aarch64-mapping-symbols.test @@ -1,5 +1,5 @@ # RUN: llvm-mc -filetype=obj -triple=aarch64-unknown-freebsd %s -o %t -# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s +# RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck %s --check-prefixes=CHECK,NOALL # RUN: llvm-objdump --no-print-imm-hex -d --show-all-symbols %t | FileCheck %s --check-prefixes=CHECK,ALL # CHECK: Disassembly of section .mysection: @@ -17,7 +17,8 @@ # CHECK-EMPTY: # CHECK-NEXT: Disassembly of section .myothersection: # CHECK-EMPTY: -# CHECK-NEXT: <$x.2>: +# NOALL-NEXT: <.myothersection>: +# ALL-NEXT: <$x.2>: # CHECK-NEXT: 0: 90000001 adrp x1, 0x0 # CHECK-EMPTY: # ALL-NEXT: <$d.3>: diff --git a/llvm/test/tools/llvm-objdump/ELF/ARM/disassemble-all-mapping-symbols.s b/llvm/test/tools/llvm-objdump/ELF/ARM/disassemble-all-mapping-symbols.s index 977bda5a13f15..440eaa5fc72a1 100644 --- a/llvm/test/tools/llvm-objdump/ELF/ARM/disassemble-all-mapping-symbols.s +++ b/llvm/test/tools/llvm-objdump/ELF/ARM/disassemble-all-mapping-symbols.s @@ -6,13 +6,15 @@ @ RUN: llvm-objdump --no-print-imm-hex -d %t.o | FileCheck %s @ RUN: llvm-objdump --no-print-imm-hex -d --disassemble-all %t.o | FileCheck %s -@ CHECK: 00000000 : -@ CHECK: 0: e2800001 add r0, r0, #1 -@ CHECK: 4: e12fff1e bx lr -@ -@ CHECK: 00000008 : -@ CHECK: 8: f100 0001 add.w r0, r0, #1 -@ CHECK: c: 4770 bx lr +@ CHECK: 00000000 : +@ CHECK-NEXT: 0: e2800001 add r0, r0, #1 +@ CHECK-NEXT: 4: e12fff1e bx lr +@ CHECK-NEXT: 8: 00 00 .short 0x0000 +@ CHECK-EMPTY: +@ CHECK: 0000000a : +@ CHECK-NEXT: a: f100 0001 add.w r0, r0, #1 +@ CHECK-NEXT: e: 4770 bx lr +@ CHECK-NEXT: 10: 00 00 .short 0x0000 .arch armv8a .text @@ -23,6 +25,8 @@ armfunc: add r0, r0, #1 bx lr + @@ Test that this is not displayed as a .word + .space 2 .thumb .global thmfunc @@ -30,3 +34,4 @@ armfunc: thmfunc: add r0, r0, #1 bx lr + .space 2 diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp index edf36eb6a1c09..61dd75d2d1562 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -516,11 +516,6 @@ static bool hasMappingSymbols(const ObjectFile &Obj) { return isArmElf(Obj) || isAArch64Elf(Obj) || isCSKYElf(Obj) ; } -static bool isMappingSymbol(const SymbolInfoTy &Sym) { - return Sym.Name.startswith("$d") || Sym.Name.startswith("$x") || - Sym.Name.startswith("$a") || Sym.Name.startswith("$t"); -} - static void printRelocation(formatted_raw_ostream &OS, StringRef FileName, const RelocationRef &Rel, uint64_t Address, bool Is64Bits) { @@ -1198,7 +1193,8 @@ static void dumpELFData(uint64_t SectionAddr, uint64_t Index, uint64_t End, } SymbolInfoTy objdump::createSymbolInfo(const ObjectFile &Obj, - const SymbolRef &Symbol) { + const SymbolRef &Symbol, + bool IsMappingSymbol) { const StringRef FileName = Obj.getFileName(); const uint64_t Addr = unwrapOrError(Symbol.getAddress(), FileName); const StringRef Name = unwrapOrError(Symbol.getName(), FileName); @@ -1214,11 +1210,13 @@ SymbolInfoTy objdump::createSymbolInfo(const ObjectFile &Obj, isLabel(XCOFFObj, Symbol)); } else if (Obj.isXCOFF()) { const SymbolRef::Type SymType = unwrapOrError(Symbol.getType(), FileName); - return SymbolInfoTy(Addr, Name, SymType, true); - } else - return SymbolInfoTy(Addr, Name, - Obj.isELF() ? getElfSymbolType(Obj, Symbol) - : (uint8_t)ELF::STT_NOTYPE); + return SymbolInfoTy(Addr, Name, SymType, /*IsMappingSymbol=*/false, + /*IsXCOFF=*/true); + } else { + uint8_t Type = + Obj.isELF() ? getElfSymbolType(Obj, Symbol) : (uint8_t)ELF::STT_NOTYPE; + return SymbolInfoTy(Addr, Name, Type, IsMappingSymbol); + } } static SymbolInfoTy createDummySymbolInfo(const ObjectFile &Obj, @@ -1434,6 +1432,7 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, // Create a mapping from virtual address to symbol name. This is used to // pretty print the symbols while disassembling. std::map AllSymbols; + std::map> AllMappingSymbols; SectionSymbolsTy AbsoluteSymbols; const StringRef FileName = Obj.getFileName(); const MachOObjectFile *MachO = dyn_cast(&Obj); @@ -1446,8 +1445,33 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, if (NameOrErr->empty() && !(Obj.isXCOFF() && SymbolDescription)) continue; - if (Obj.isELF() && getElfSymbolType(Obj, Symbol) == ELF::STT_SECTION) + if (Obj.isELF() && + (cantFail(Symbol.getFlags()) & SymbolRef::SF_FormatSpecific)) { + // Symbol is intended not to be displayed by default (STT_FILE, + // STT_SECTION, or a mapping symbol). Ignore STT_SECTION symbols. We will + // synthesize a section symbol if no symbol is defined at offset 0. + // + // For a mapping symbol, store it within both AllSymbols and + // AllMappingSymbols. If --show-all-symbols is unspecified, its label will + // not be printed in disassembly listing. + if (getElfSymbolType(Obj, Symbol) != ELF::STT_SECTION && + hasMappingSymbols(Obj)) { + section_iterator SecI = unwrapOrError(Symbol.getSection(), FileName); + if (SecI != Obj.section_end()) { + uint64_t SectionAddr = SecI->getAddress(); + uint64_t Address = cantFail(Symbol.getAddress()); + StringRef Name = *NameOrErr; + if (Name.consume_front("$") && Name.size() && + strchr("adtx", Name[0])) { + AllMappingSymbols[*SecI].emplace_back(Address - SectionAddr, + Name[0]); + AllSymbols[*SecI].push_back( + createSymbolInfo(Obj, Symbol, /*MappingSymbol=*/true)); + } + } + } continue; + } if (MachO) { // __mh_(execute|dylib|dylinker|bundle|preload|object)_header are special @@ -1583,22 +1607,7 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, // Get the list of all the symbols in this section. SectionSymbolsTy &Symbols = AllSymbols[Section]; - std::vector MappingSymbols; - if (hasMappingSymbols(Obj)) { - for (const auto &Symb : Symbols) { - uint64_t Address = Symb.Addr; - StringRef Name = Symb.Name; - if (Name.startswith("$d")) - MappingSymbols.emplace_back(Address - SectionAddr, 'd'); - if (Name.startswith("$x")) - MappingSymbols.emplace_back(Address - SectionAddr, 'x'); - if (Name.startswith("$a")) - MappingSymbols.emplace_back(Address - SectionAddr, 'a'); - if (Name.startswith("$t")) - MappingSymbols.emplace_back(Address - SectionAddr, 't'); - } - } - + auto &MappingSymbols = AllMappingSymbols[Section]; llvm::sort(MappingSymbols); ArrayRef Bytes = arrayRefFromStringRef( @@ -1614,11 +1623,26 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, StringRef SegmentName = getSegmentName(MachO, Section); StringRef SectionName = unwrapOrError(Section.getName(), Obj.getFileName()); // If the section has no symbol at the start, just insert a dummy one. - if (Symbols.empty() || Symbols[0].Addr != 0) { - Symbols.insert(Symbols.begin(), - createDummySymbolInfo(Obj, SectionAddr, SectionName, - Section.isText() ? ELF::STT_FUNC - : ELF::STT_OBJECT)); + // Without --show-all-symbols, also insert one if all symbols at the start + // are mapping symbols. + bool CreateDummy = Symbols.empty(); + if (!CreateDummy) { + CreateDummy = true; + for (auto &Sym : Symbols) { + if (Sym.Addr != SectionAddr) + break; + if (!Sym.IsMappingSymbol || ShowAllSymbols) + CreateDummy = false; + } + } + if (CreateDummy) { + SymbolInfoTy Sym = createDummySymbolInfo( + Obj, SectionAddr, SectionName, + Section.isText() ? ELF::STT_FUNC : ELF::STT_OBJECT); + if (Obj.isXCOFF()) + Symbols.insert(Symbols.begin(), Sym); + else + Symbols.insert(llvm::lower_bound(Symbols, Sym), Sym); } SmallString<40> Comments; @@ -1719,7 +1743,7 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, // disassembling this entire chunk of code. if (!FoundAny) continue; - } else { + } else if (!SymbolsHere[DisplaySymIndex].IsMappingSymbol) { // Otherwise, print whichever symbol at this location is last in the // Symbols array, because that array is pre-sorted in a way intended to // correlate with priority of which symbol to display. @@ -1763,8 +1787,7 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, outs() << SectionName << ":\n"; } - outs() << '\n'; - + bool PrintedLabel = false; for (size_t i = 0; i < SymbolsHere.size(); ++i) { if (!SymsToPrint[i]) continue; @@ -1772,6 +1795,10 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, const SymbolInfoTy &Symbol = SymbolsHere[i]; const StringRef SymbolName = SymNamesHere[i]; + if (!PrintedLabel) { + outs() << '\n'; + PrintedLabel = true; + } if (LeadingAddr) outs() << format(Is64Bits ? "%016" PRIx64 " " : "%08" PRIx64 " ", SectionAddr + Start + VMAAdjustment); @@ -2026,7 +2053,7 @@ disassembleObject(const Target *TheTarget, ObjectFile &Obj, --It; // Skip mapping symbols to avoid possible ambiguity as they // do not allow uniquely identifying the target address. - if (!hasMappingSymbols(Obj) || !isMappingSymbol(*It)) { + if (!It->IsMappingSymbol) { TargetSym = &*It; break; } diff --git a/llvm/tools/llvm-objdump/llvm-objdump.h b/llvm/tools/llvm-objdump/llvm-objdump.h index e55f4f669b930..9f6a03133d7ff 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.h +++ b/llvm/tools/llvm-objdump/llvm-objdump.h @@ -133,7 +133,8 @@ void invalidArgValue(const opt::Arg *A); std::string getFileNameForError(const object::Archive::Child &C, unsigned Index); SymbolInfoTy createSymbolInfo(const object::ObjectFile &Obj, - const object::SymbolRef &Symbol); + const object::SymbolRef &Symbol, + bool IsMappingSymbol = false); unsigned getInstStartColumn(const MCSubtargetInfo &STI); void printRawData(llvm::ArrayRef Bytes, uint64_t Address, llvm::formatted_raw_ostream &OS,