diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index f5f1d7ed539635..29322891eed28b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -8941,12 +8941,12 @@ SDValue SelectionDAG::simplifySelect(SDValue Cond, SDValue T, SDValue F) { if (auto *CondC = dyn_cast(Cond)) return CondC->isZero() ? F : T; - // TODO: This should simplify VSELECT with constant condition using something - // like this (but check boolean contents to be complete?): - // if (ISD::isBuildVectorAllOnes(Cond.getNode())) - // return T; - // if (ISD::isBuildVectorAllZeros(Cond.getNode())) - // return F; + // TODO: This should simplify VSELECT with non-zero constant condition using + // something like this (but check boolean contents to be complete?): + if (ConstantSDNode *CondC = isConstOrConstSplat(Cond, /*AllowUndefs*/ false, + /*AllowTruncation*/ true)) + if (CondC->isZero()) + return F; // select ?, T, T --> T if (T == F) diff --git a/llvm/test/CodeGen/X86/vselect-avx.ll b/llvm/test/CodeGen/X86/vselect-avx.ll index 8b08679d74fe21..0d80da8642a169 100644 --- a/llvm/test/CodeGen/X86/vselect-avx.ll +++ b/llvm/test/CodeGen/X86/vselect-avx.ll @@ -266,25 +266,10 @@ define void @blendv_split(ptr %p, <8 x i32> %cond, <8 x i32> %a, <8 x i32> %x, < } ; Regression test for rGea8fb3b60196 -; FIXME: Missing fold vselect(zero, T, F) -> F define void @vselect_concat() { -; AVX1-LABEL: vselect_concat: -; AVX1: ## %bb.0: ## %entry -; AVX1-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] -; AVX1-NEXT: vmovaps %ymm0, (%rax) -; AVX1-NEXT: vzeroupper -; AVX1-NEXT: retq -; -; AVX2-LABEL: vselect_concat: -; AVX2: ## %bb.0: ## %entry -; AVX2-NEXT: vbroadcastf128 {{.*#+}} ymm0 = mem[0,1,0,1] -; AVX2-NEXT: vmovaps %ymm0, (%rax) -; AVX2-NEXT: vzeroupper -; AVX2-NEXT: retq -; -; AVX512-LABEL: vselect_concat: -; AVX512: ## %bb.0: ## %entry -; AVX512-NEXT: retq +; AVX-LABEL: vselect_concat: +; AVX: ## %bb.0: ## %entry +; AVX-NEXT: retq entry: %0 = load <8 x i32>, ptr undef %1 = shufflevector <8 x i32> zeroinitializer, <8 x i32> undef, <4 x i32>