From aafac4e265e22fa5907f124b248ed0fca4fec9ba Mon Sep 17 00:00:00 2001
From: Phoebe Wang <phoebe.wang@intel.com>
Date: Sat, 30 Jul 2022 13:13:21 +0800
Subject: [PATCH] [X86][FP16] Regenerate test cases. NFC.

---
 llvm/test/CodeGen/X86/avx512fp16-mov.ll          | 16 ++++++++--------
 .../CodeGen/X86/avx512fp16-unsafe-fp-math.ll     |  4 ++--
 2 files changed, 10 insertions(+), 10 deletions(-)

diff --git a/llvm/test/CodeGen/X86/avx512fp16-mov.ll b/llvm/test/CodeGen/X86/avx512fp16-mov.ll
index efd5a472b2394..407b84c7619de 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-mov.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-mov.ll
@@ -963,13 +963,13 @@ define <16 x half> @movrrkz16f16(<16 x half> %a, i16 %msk) {
 define <8 x half> @load8f16(ptr %a) {
 ; X64-LABEL: load8f16:
 ; X64:       # %bb.0:
-; X64-NEXT:    movaps (%rdi), %xmm0
+; X64-NEXT:    vmovaps (%rdi), %xmm0
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: load8f16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movaps (%eax), %xmm0
+; X86-NEXT:    vmovaps (%eax), %xmm0
 ; X86-NEXT:    retl
   %res = load <8 x half>, ptr %a
   ret <8 x half> %res
@@ -1016,13 +1016,13 @@ define <8 x half> @load8f16maskz(ptr %a, i8 %c) {
 define <8 x half> @loadu8f16(ptr %a) {
 ; X64-LABEL: loadu8f16:
 ; X64:       # %bb.0:
-; X64-NEXT:    movups (%rdi), %xmm0
+; X64-NEXT:    vmovups (%rdi), %xmm0
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: loadu8f16:
 ; X86:       # %bb.0:
 ; X86-NEXT:    movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT:    movups (%eax), %xmm0
+; X86-NEXT:    vmovups (%eax), %xmm0
 ; X86-NEXT:    retl
   %res = load <8 x half>, ptr %a, align 8
   ret <8 x half> %res
@@ -1070,12 +1070,12 @@ define void @store8f16(<8 x half> %a) {
 ; X64-LABEL: store8f16:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq g8f16@GOTPCREL(%rip), %rax
-; X64-NEXT:    movaps %xmm0, (%rax)
+; X64-NEXT:    vmovaps %xmm0, (%rax)
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: store8f16:
 ; X86:       # %bb.0:
-; X86-NEXT:    movaps %xmm0, g8f16
+; X86-NEXT:    vmovaps %xmm0, g8f16
 ; X86-NEXT:    retl
   store <8 x half> %a, ptr @g8f16
   ret void
@@ -1085,12 +1085,12 @@ define void @storeu8f16(<8 x half> %a) {
 ; X64-LABEL: storeu8f16:
 ; X64:       # %bb.0:
 ; X64-NEXT:    movq g8f16u@GOTPCREL(%rip), %rax
-; X64-NEXT:    movups %xmm0, (%rax)
+; X64-NEXT:    vmovups %xmm0, (%rax)
 ; X64-NEXT:    retq
 ;
 ; X86-LABEL: storeu8f16:
 ; X86:       # %bb.0:
-; X86-NEXT:    movups %xmm0, g8f16u
+; X86-NEXT:    vmovups %xmm0, g8f16u
 ; X86-NEXT:    retl
   store <8 x half> %a, ptr @g8f16u, align 8
   ret void
diff --git a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
index 913dfd9d05415..c9b45983e09a8 100644
--- a/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
+++ b/llvm/test/CodeGen/X86/avx512fp16-unsafe-fp-math.ll
@@ -78,7 +78,7 @@ define <8 x half> @test_max_v8f16(ptr %a_ptr, <8 x half> %b)  {
 ;
 ; CHECK-LABEL: test_max_v8f16:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movaps (%rdi), %xmm1
+; CHECK-NEXT:    vmovaps (%rdi), %xmm1
 ; CHECK-NEXT:    vmaxph %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %a = load <8 x half>, ptr %a_ptr
@@ -95,7 +95,7 @@ define <8 x half> @test_min_v8f16(ptr %a_ptr, <8 x half> %b)  {
 ;
 ; CHECK-LABEL: test_min_v8f16:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    movaps (%rdi), %xmm1
+; CHECK-NEXT:    vmovaps (%rdi), %xmm1
 ; CHECK-NEXT:    vminph %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    retq
   %a = load <8 x half>, ptr %a_ptr