diff --git a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp index d8403abc3027a..25443a6679081 100644 --- a/llvm/lib/Analysis/IRSimilarityIdentifier.cpp +++ b/llvm/lib/Analysis/IRSimilarityIdentifier.cpp @@ -124,15 +124,13 @@ bool IRSimilarity::isClose(const IRInstructionData &A, auto ZippedOperands = zip(GEP->indices(), OtherGEP->indices()); - auto ZIt = ZippedOperands.begin(); - // We increment here since we do not care about the first instruction, // we only care about the following operands since they must be the // exact same to be considered similar. - return std::all_of(++ZIt, ZippedOperands.end(), - [](std::tuple R) { - return std::get<0>(R) == std::get<1>(R); - }); + return all_of(drop_begin(ZippedOperands), + [](std::tuple R) { + return std::get<0>(R) == std::get<1>(R); + }); } // If the instructions are functions, we make sure that the function name is diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index 1cfadef251c52..9045019dc1ee3 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1005,16 +1005,15 @@ void MachineVerifier::verifyPreISelGenericInstruction(const MachineInstr *MI) { } case TargetOpcode::G_PHI: { LLT DstTy = MRI->getType(MI->getOperand(0).getReg()); - if (!DstTy.isValid() || - !std::all_of(MI->operands_begin() + 1, MI->operands_end(), - [this, &DstTy](const MachineOperand &MO) { - if (!MO.isReg()) - return true; - LLT Ty = MRI->getType(MO.getReg()); - if (!Ty.isValid() || (Ty != DstTy)) - return false; - return true; - })) + if (!DstTy.isValid() || !all_of(drop_begin(MI->operands()), + [this, &DstTy](const MachineOperand &MO) { + if (!MO.isReg()) + return true; + LLT Ty = MRI->getType(MO.getReg()); + if (!Ty.isValid() || (Ty != DstTy)) + return false; + return true; + })) report("Generic Instruction G_PHI has operands with incompatible/missing " "types", MI); diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp index 1bee1421cac03..f7c6a77b9a03b 100644 --- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp @@ -19452,9 +19452,8 @@ SDValue DAGCombiner::visitCONCAT_VECTORS(SDNode *N) { return DAG.getUNDEF(VT); // Optimize concat_vectors where all but the first of the vectors are undef. - if (std::all_of(std::next(N->op_begin()), N->op_end(), [](const SDValue &Op) { - return Op.isUndef(); - })) { + if (all_of(drop_begin(N->ops()), + [](const SDValue &Op) { return Op.isUndef(); })) { SDValue In = N->getOperand(0); assert(In.getValueType().isVector() && "Must concat vectors"); @@ -21441,11 +21440,10 @@ SDValue DAGCombiner::SimplifyVBinOp(SDNode *N) { // Make sure all but the first op are undef or constant. auto ConcatWithConstantOrUndef = [](SDValue Concat) { return Concat.getOpcode() == ISD::CONCAT_VECTORS && - std::all_of(std::next(Concat->op_begin()), Concat->op_end(), - [](const SDValue &Op) { - return Op.isUndef() || - ISD::isBuildVectorOfConstantSDNodes(Op.getNode()); - }); + all_of(drop_begin(Concat->ops()), [](const SDValue &Op) { + return Op.isUndef() || + ISD::isBuildVectorOfConstantSDNodes(Op.getNode()); + }); }; // The following pattern is likely to emerge with vector reduction ops. Moving diff --git a/llvm/lib/DebugInfo/Symbolize/Symbolize.cpp b/llvm/lib/DebugInfo/Symbolize/Symbolize.cpp index 5a98ce0753b6c..4c3f3a3767e1d 100644 --- a/llvm/lib/DebugInfo/Symbolize/Symbolize.cpp +++ b/llvm/lib/DebugInfo/Symbolize/Symbolize.cpp @@ -589,8 +589,8 @@ StringRef demanglePE32ExternCFunc(StringRef SymbolName) { if (Front != '?') { size_t AtPos = SymbolName.rfind('@'); if (AtPos != StringRef::npos && - std::all_of(SymbolName.begin() + AtPos + 1, SymbolName.end(), - [](char C) { return C >= '0' && C <= '9'; })) { + all_of(drop_begin(SymbolName, AtPos + 1), + [](char C) { return C >= '0' && C <= '9'; })) { SymbolName = SymbolName.substr(0, AtPos); } } diff --git a/llvm/lib/Transforms/Scalar/GuardWidening.cpp b/llvm/lib/Transforms/Scalar/GuardWidening.cpp index 6ce79bdb7076e..61eb4ce0ed46b 100644 --- a/llvm/lib/Transforms/Scalar/GuardWidening.cpp +++ b/llvm/lib/Transforms/Scalar/GuardWidening.cpp @@ -698,9 +698,7 @@ bool GuardWideningImpl::combineRangeChecks( return (HighOffset - RC.getOffsetValue()).ult(MaxDiff); }; - if (MaxDiff.isMinValue() || - !std::all_of(std::next(CurrentChecks.begin()), CurrentChecks.end(), - OffsetOK)) + if (MaxDiff.isMinValue() || !all_of(drop_begin(CurrentChecks), OffsetOK)) return false; // We have a series of f+1 checks as: diff --git a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp index 3125f62748482..9d3c8d0f3739a 100644 --- a/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp +++ b/llvm/lib/Transforms/Scalar/SimpleLoopUnswitch.cpp @@ -692,11 +692,9 @@ static bool unswitchTrivialSwitch(Loop &L, SwitchInst &SI, DominatorTree &DT, // successor. BasicBlock *CommonSuccBB = nullptr; if (SI.getNumCases() > 0 && - std::all_of(std::next(SI.case_begin()), SI.case_end(), - [&SI](const SwitchInst::CaseHandle &Case) { - return Case.getCaseSuccessor() == - SI.case_begin()->getCaseSuccessor(); - })) + all_of(drop_begin(SI.cases()), [&SI](const SwitchInst::CaseHandle &Case) { + return Case.getCaseSuccessor() == SI.case_begin()->getCaseSuccessor(); + })) CommonSuccBB = SI.case_begin()->getCaseSuccessor(); if (!DefaultExitBB) { // If we're not unswitching the default, we need it to match any cases to