diff --git a/lld/test/ELF/riscv-branch.s b/lld/test/ELF/riscv-branch.s index dbf39dc0bb8f2..1a2b446b5a43b 100644 --- a/lld/test/ELF/riscv-branch.s +++ b/lld/test/ELF/riscv-branch.s @@ -7,19 +7,19 @@ # RUN: ld.lld %t.rv64.o --defsym foo=_start+4 --defsym bar=_start -o %t.rv64 # RUN: llvm-objdump -d %t.rv32 | FileCheck %s --check-prefix=CHECK-32 # RUN: llvm-objdump -d %t.rv64 | FileCheck %s --check-prefix=CHECK-64 -# CHECK-32: 63 02 00 00 beqz zero, 0x110b8 -# CHECK-32: e3 1e 00 fe bnez zero, 0x110b4 -# CHECK-64: 63 02 00 00 beqz zero, 0x11124 -# CHECK-64: e3 1e 00 fe bnez zero, 0x11120 +# CHECK-32: 00000263 beqz zero, 0x110b8 +# CHECK-32: fe001ee3 bnez zero, 0x110b4 +# CHECK-64: 00000263 beqz zero, 0x11124 +# CHECK-64: fe001ee3 bnez zero, 0x11120 # # RUN: ld.lld %t.rv32.o --defsym foo=_start+0xffe --defsym bar=_start+4-0x1000 -o %t.rv32.limits # RUN: ld.lld %t.rv64.o --defsym foo=_start+0xffe --defsym bar=_start+4-0x1000 -o %t.rv64.limits # RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS-32 %s # RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS-64 %s -# LIMITS-32: e3 0f 00 7e beqz zero, 0x120b2 -# LIMITS-32-NEXT: 63 10 00 80 bnez zero, 0x100b8 -# LIMITS-64: e3 0f 00 7e beqz zero, 0x1211e -# LIMITS-64-NEXT: 63 10 00 80 bnez zero, 0x10124 +# LIMITS-32: 7e000fe3 beqz zero, 0x120b2 +# LIMITS-32-NEXT: 80001063 bnez zero, 0x100b8 +# LIMITS-64: 7e000fe3 beqz zero, 0x1211e +# LIMITS-64-NEXT: 80001063 bnez zero, 0x10124 # RUN: not ld.lld %t.rv32.o --defsym foo=_start+0x1000 --defsym bar=_start+4-0x1002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s # RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x1000 --defsym bar=_start+4-0x1002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s diff --git a/lld/test/ELF/riscv-call.s b/lld/test/ELF/riscv-call.s index 5fef156df0bb7..0e81e9b4710ee 100644 --- a/lld/test/ELF/riscv-call.s +++ b/lld/test/ELF/riscv-call.s @@ -7,19 +7,19 @@ # RUN: ld.lld %t.rv64.o --defsym foo=_start+8 --defsym bar=_start -o %t.rv64 # RUN: llvm-objdump -d %t.rv32 | FileCheck %s # RUN: llvm-objdump -d %t.rv64 | FileCheck %s -# CHECK: 97 00 00 00 auipc ra, 0x0 -# CHECK-NEXT: e7 80 80 00 jalr 0x8(ra) -# CHECK: 97 00 00 00 auipc ra, 0x0 -# CHECK-NEXT: e7 80 80 ff jalr -0x8(ra) +# CHECK: 00000097 auipc ra, 0x0 +# CHECK-NEXT: 008080e7 jalr 0x8(ra) +# CHECK: 00000097 auipc ra, 0x0 +# CHECK-NEXT: ff8080e7 jalr -0x8(ra) # RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv32.limits # RUN: ld.lld %t.rv64.o --defsym foo=_start+0x7ffff7ff --defsym bar=_start+8-0x80000800 -o %t.rv64.limits # RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS %s # RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS %s -# LIMITS: 97 f0 ff 7f auipc ra, 0x7ffff -# LIMITS-NEXT: e7 80 f0 7f jalr 0x7ff(ra) -# LIMITS-NEXT: 97 00 00 80 auipc ra, 0x80000 -# LIMITS-NEXT: e7 80 00 80 jalr -0x800(ra) +# LIMITS: 7ffff097 auipc ra, 0x7ffff +# LIMITS-NEXT: 7ff080e7 jalr 0x7ff(ra) +# LIMITS-NEXT: 80000097 auipc ra, 0x80000 +# LIMITS-NEXT: 800080e7 jalr -0x800(ra) # RUN: ld.lld %t.rv32.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o %t # RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x7ffff800 --defsym bar=_start+8-0x80000801 -o /dev/null 2>&1 | \ diff --git a/lld/test/ELF/riscv-hi20-lo12.s b/lld/test/ELF/riscv-hi20-lo12.s index 85861432db0bd..b9786f563f287 100644 --- a/lld/test/ELF/riscv-hi20-lo12.s +++ b/lld/test/ELF/riscv-hi20-lo12.s @@ -7,23 +7,23 @@ # RUN: ld.lld %t.rv64.o --defsym foo=0 --defsym bar=42 -o %t.rv64 # RUN: llvm-objdump -d %t.rv32 | FileCheck %s # RUN: llvm-objdump -d %t.rv64 | FileCheck %s -# CHECK: 37 05 00 00 lui a0, 0x0 -# CHECK-NEXT: 13 05 05 00 mv a0, a0 -# CHECK-NEXT: 23 20 a5 00 sw a0, 0x0(a0) -# CHECK-NEXT: b7 05 00 00 lui a1, 0x0 -# CHECK-NEXT: 93 85 a5 02 addi a1, a1, 0x2a -# CHECK-NEXT: 23 a5 b5 02 sw a1, 0x2a(a1) +# CHECK: 00000537 lui a0, 0x0 +# CHECK-NEXT: 00050513 mv a0, a0 +# CHECK-NEXT: 00a52023 sw a0, 0x0(a0) +# CHECK-NEXT: 000005b7 lui a1, 0x0 +# CHECK-NEXT: 02a58593 addi a1, a1, 0x2a +# CHECK-NEXT: 02b5a523 sw a1, 0x2a(a1) # RUN: ld.lld %t.rv32.o --defsym foo=0x7ffff7ff --defsym bar=0x7ffff800 -o %t.rv32.limits # RUN: ld.lld %t.rv64.o --defsym foo=0x7ffff7ff --defsym bar=0xffffffff7ffff800 -o %t.rv64.limits # RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS %s # RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS %s -# LIMITS: 37 f5 ff 7f lui a0, 0x7ffff -# LIMITS-NEXT: 13 05 f5 7f addi a0, a0, 0x7ff -# LIMITS-NEXT: a3 2f a5 7e sw a0, 0x7ff(a0) -# LIMITS-NEXT: b7 05 00 80 lui a1, 0x80000 -# LIMITS-NEXT: 93 85 05 80 addi a1, a1, -0x800 -# LIMITS-NEXT: 23 a0 b5 80 sw a1, -0x800(a1) +# LIMITS: 7ffff537 lui a0, 0x7ffff +# LIMITS-NEXT: 7ff50513 addi a0, a0, 0x7ff +# LIMITS-NEXT: 7ea52fa3 sw a0, 0x7ff(a0) +# LIMITS-NEXT: 800005b7 lui a1, 0x80000 +# LIMITS-NEXT: 80058593 addi a1, a1, -0x800 +# LIMITS-NEXT: 80b5a023 sw a1, -0x800(a1) # RUN: not ld.lld %t.rv64.o --defsym foo=0x7ffff800 --defsym bar=0xffffffff7ffff7ff -o /dev/null 2>&1 | FileCheck --check-prefix ERROR %s # ERROR: relocation R_RISCV_HI20 out of range: 524288 is not in [-524288, 524287]; references 'foo' diff --git a/lld/test/ELF/riscv-jal.s b/lld/test/ELF/riscv-jal.s index cd3b842aad608..2129e44547066 100644 --- a/lld/test/ELF/riscv-jal.s +++ b/lld/test/ELF/riscv-jal.s @@ -7,19 +7,19 @@ # RUN: ld.lld %t.rv64.o --defsym foo=_start+4 --defsym bar=_start -o %t.rv64 # RUN: llvm-objdump -d %t.rv32 | FileCheck %s --check-prefix=CHECK-32 # RUN: llvm-objdump -d %t.rv64 | FileCheck %s --check-prefix=CHECK-64 -# CHECK-32: 6f 00 40 00 j 0x110b8 -# CHECK-32: ef f0 df ff jal 0x110b4 -# CHECK-64: 6f 00 40 00 j 0x11124 -# CHECK-64: ef f0 df ff jal 0x11120 +# CHECK-32: 0040006f j 0x110b8 +# CHECK-32: ffdff0ef jal 0x110b4 +# CHECK-64: 0040006f j 0x11124 +# CHECK-64: ffdff0ef jal 0x11120 # RUN: ld.lld %t.rv32.o --defsym foo=_start+0xffffe --defsym bar=_start+4-0x100000 -o %t.rv32.limits # RUN: ld.lld %t.rv64.o --defsym foo=_start+0xffffe --defsym bar=_start+4-0x100000 -o %t.rv64.limits # RUN: llvm-objdump -d %t.rv32.limits | FileCheck --check-prefix=LIMITS-32 %s # RUN: llvm-objdump -d %t.rv64.limits | FileCheck --check-prefix=LIMITS-64 %s -# LIMITS-32: 6f f0 ff 7f j 0x1110b2 -# LIMITS-32-NEXT: ef 00 00 80 jal 0xfff110b8 -# LIMITS-64: 6f f0 ff 7f j 0x11111e -# LIMITS-64-NEXT: ef 00 00 80 jal 0xfffffffffff11124 +# LIMITS-32: 7ffff06f j 0x1110b2 +# LIMITS-32-NEXT: 800000ef jal 0xfff110b8 +# LIMITS-64: 7ffff06f j 0x11111e +# LIMITS-64-NEXT: 800000ef jal 0xfffffffffff11124 # RUN: not ld.lld %t.rv32.o --defsym foo=_start+0x100000 --defsym bar=_start+4-0x100002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s # RUN: not ld.lld %t.rv64.o --defsym foo=_start+0x100000 --defsym bar=_start+4-0x100002 -o /dev/null 2>&1 | FileCheck --check-prefix=ERROR-RANGE %s diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index a83b8bb79a1c9..64a6983252129 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -113,6 +113,8 @@ Changes to the RISC-V Backend * The experimental Ssqosid extension is supported. * Zacas is no longer experimental. * Added the CSR names from the Resumable Non-Maskable Interrupts (Smrnmi) extension. +* llvm-objdump now prints disassembled opcode bytes in groups of 2 or 4 bytes to + match GNU objdump. The bytes within the groups are in big endian order. Changes to the WebAssembly Backend ---------------------------------- diff --git a/llvm/test/MC/RISCV/XTHeadVdot-valid.s b/llvm/test/MC/RISCV/XTHeadVdot-valid.s index 2e00bd1cac3ee..ab411dfac7308 100644 --- a/llvm/test/MC/RISCV/XTHeadVdot-valid.s +++ b/llvm/test/MC/RISCV/XTHeadVdot-valid.s @@ -12,82 +12,82 @@ th.vmaqau.vv v8, v20, v4, v0.t # CHECK-INST: th.vmaqau.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x4a,0x88] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 88 +# CHECK-UNKNOWN: 884a640b th.vmaqau.vv v8, v20, v4 # CHECK-INST: th.vmaqau.vv v8, v20, v4 # CHECK-ENCODING: [0x0b,0x64,0x4a,0x8a] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 8a +# CHECK-UNKNOWN: 8a4a640b th.vmaqau.vx v8, a0, v4, v0.t # CHECK-INST: th.vmaqau.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 8c +# CHECK-UNKNOWN: 8c45640b th.vmaqau.vx v8, a0, v4 # CHECK-INST: th.vmaqau.vx v8, a0, v4 # CHECK-ENCODING: [0x0b,0x64,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 8e +# CHECK-UNKNOWN: 8e45640b th.vmaqa.vv v8, v20, v4, v0.t # CHECK-INST: th.vmaqa.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x4a,0x80] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 80 +# CHECK-UNKNOWN: 804a640b th.vmaqa.vv v8, v20, v4 # CHECK-INST: th.vmaqa.vv v8, v20, v4 # CHECK-ENCODING: [0x0b,0x64,0x4a,0x82] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 82 +# CHECK-UNKNOWN: 824a640b th.vmaqa.vx v8, a0, v4, v0.t # CHECK-INST: th.vmaqa.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 84 +# CHECK-UNKNOWN: 8445640b th.vmaqa.vx v8, a0, v4 # CHECK-INST: th.vmaqa.vx v8, a0, v4 # CHECK-ENCODING: [0x0b,0x64,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 86 +# CHECK-UNKNOWN: 8645640b th.vmaqasu.vv v8, v20, v4, v0.t # CHECK-INST: th.vmaqasu.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x4a,0x90] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 90 +# CHECK-UNKNOWN: 904a640b th.vmaqasu.vv v8, v20, v4 # CHECK-INST: th.vmaqasu.vv v8, v20, v4 # CHECK-ENCODING: [0x0b,0x64,0x4a,0x92] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 4a 92 +# CHECK-UNKNOWN: 924a640b th.vmaqasu.vx v8, a0, v4, v0.t # CHECK-INST: th.vmaqasu.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x45,0x94] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 94 +# CHECK-UNKNOWN: 9445640b th.vmaqasu.vx v8, a0, v4 # CHECK-INST: th.vmaqasu.vx v8, a0, v4 # CHECK-ENCODING: [0x0b,0x64,0x45,0x96] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 96 +# CHECK-UNKNOWN: 9645640b th.vmaqaus.vx v8, a0, v4, v0.t # CHECK-INST: th.vmaqaus.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x0b,0x64,0x45,0x9c] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 9c +# CHECK-UNKNOWN: 9c45640b th.vmaqaus.vx v8, a0, v4 # CHECK-INST: th.vmaqaus.vx v8, a0, v4 # CHECK-ENCODING: [0x0b,0x64,0x45,0x9e] # CHECK-ERROR: instruction requires the following: 'xtheadvdot' (T-Head Vector Extensions for Dot){{$}} -# CHECK-UNKNOWN: 0b 64 45 9e +# CHECK-UNKNOWN: 9e45640b diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s index 2eb7186d0de95..32cc071b613cb 100644 --- a/llvm/test/MC/RISCV/align.s +++ b/llvm/test/MC/RISCV/align.s @@ -98,11 +98,11 @@ test: # The behavior is the same as GNU assembler. .p2align 4, 1 # RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xC -# RELAX-INST: 01 01 -# RELAX-INST: 01 01 +# RELAX-INST: 0101 +# RELAX-INST: 0101 # C-OR-ZCA-EXT-RELAX-RELOC-NOT: R_RISCV_ALIGN - 0xE -# C-OR-ZCA-EXT-RELAX-INST: 01 01 -# C-EXT-INST: 01 01 +# C-OR-ZCA-EXT-RELAX-INST: 0101 +# C-EXT-INST: 0101 ret # NORELAX-RELOC-NOT: R_RISCV # C-OR-ZCA-EXT-NORELAX-RELOC-NOT: R_RISCV diff --git a/llvm/test/MC/RISCV/compress-cjal.s b/llvm/test/MC/RISCV/compress-cjal.s index 31b9c30c2b016..d55586b005c7b 100644 --- a/llvm/test/MC/RISCV/compress-cjal.s +++ b/llvm/test/MC/RISCV/compress-cjal.s @@ -11,7 +11,7 @@ # c.jal is an rv32 only instruction. jal ra, 2046 -# CHECK-BYTES: fd 2f +# CHECK-BYTES: 2ffd # CHECK-ALIASOBJ: jal 0x7fe # CHECK-ALIAS: jal 2046 # CHECK-INST: c.jal 2046 diff --git a/llvm/test/MC/RISCV/compress-rv32d.s b/llvm/test/MC/RISCV/compress-rv32d.s index bebc78ef86907..c41a088928624 100644 --- a/llvm/test/MC/RISCV/compress-rv32d.s +++ b/llvm/test/MC/RISCV/compress-rv32d.s @@ -43,22 +43,22 @@ # Tests double precision floating point instructions available in rv32 and in rv64. fld ft0, 64(sp) -# CHECK-BYTES: 06 20 +# CHECK-BYTES: 2006 # CHECK-ALIAS: fld ft0, 64(sp) # CHECK-INST: c.fldsp ft0, 64(sp) # CHECK: # encoding: [0x06,0x20] fsd ft0, 64(sp) -# CHECK-BYTES: 82 a0 +# CHECK-BYTES: a082 # CHECK-ALIAS: fsd ft0, 64(sp) # CHECK-INST: c.fsdsp ft0, 64(sp) # CHECK: # encoding: [0x82,0xa0] fld fs0, 248(s0) -# CHECK-BYTES: 60 3c +# CHECK-BYTES: 3c60 # CHECK-ALIAS: fld fs0, 248(s0) # CHECK-INST: c.fld fs0, 248(s0) # CHECK: # encoding: [0x60,0x3c] fsd fs0, 248(s0) -# CHECK-BYTES: 60 bc +# CHECK-BYTES: bc60 # CHECK-ALIAS: fsd fs0, 248(s0) # CHECK-INST: c.fsd fs0, 248(s0) # CHECK: # encoding: [0x60,0xbc] diff --git a/llvm/test/MC/RISCV/compress-rv32f.s b/llvm/test/MC/RISCV/compress-rv32f.s index 3f0c69fb98932..afe15c598bb65 100644 --- a/llvm/test/MC/RISCV/compress-rv32f.s +++ b/llvm/test/MC/RISCV/compress-rv32f.s @@ -21,22 +21,22 @@ # Instructions that are 32 bit only. flw ft0, 124(sp) -# CHECK-BYTES: 76 70 +# CHECK-BYTES: 7076 # CHECK-ALIAS: flw ft0, 124(sp) # CHECK-INST: c.flwsp ft0, 124(sp) # CHECK: # encoding: [0x76,0x70] fsw ft0, 124(sp) -# CHECK-BYTES: 82 fe +# CHECK-BYTES: fe82 # CHECK-ALIAS: fsw ft0, 124(sp) # CHECK-INST: c.fswsp ft0, 124(sp) # CHECK: # encoding: [0x82,0xfe] flw fs0, 124(s0) -# CHECK-BYTES: 60 7c +# CHECK-BYTES: 7c60 # CHECK-ALIAS: flw fs0, 124(s0) # CHECK-INST: c.flw fs0, 124(s0) # CHECK: # encoding: [0x60,0x7c] fsw fs0, 124(s0) -# CHECK-BYTES: 60 fc +# CHECK-BYTES: fc60 # CHECK-ALIAS: fsw fs0, 124(s0) # CHECK-INST: c.fsw fs0, 124(s0) # CHECK: # encoding: [0x60,0xfc] diff --git a/llvm/test/MC/RISCV/compress-rv32i.s b/llvm/test/MC/RISCV/compress-rv32i.s index b4fd72a0f81c4..a75bea32ac0cf 100644 --- a/llvm/test/MC/RISCV/compress-rv32i.s +++ b/llvm/test/MC/RISCV/compress-rv32i.s @@ -20,121 +20,121 @@ # RUN: | llvm-objdump --triple=riscv64 --mattr=+c --no-print-imm-hex -d -M no-aliases - \ # RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST,CHECK-INSTOBJ64 %s -# CHECK-BYTES: 2e 85 +# CHECK-BYTES: 852e # CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 -# CHECK-BYTES: e0 1f +# CHECK-BYTES: 1fe0 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: c.addi4spn s0, sp, 1020 # CHECK: # encoding: [0xe0,0x1f] addi s0, sp, 1020 -# CHECK-BYTES: e0 5f +# CHECK-BYTES: 5fe0 # CHECK-ALIAS: lw s0, 124(a5) # CHECK-INST: c.lw s0, 124(a5) # CHECK: # encoding: [0xe0,0x5f] lw s0, 124(a5) -# CHECK-BYTES: e0 df +# CHECK-BYTES: dfe0 # CHECK-ALIAS: sw s0, 124(a5) # CHECK-INST: c.sw s0, 124(a5) # CHECK: # encoding: [0xe0,0xdf] sw s0, 124(a5) -# CHECK-BYTES: 01 00 +# CHECK-BYTES: 0001 # CHECK-ALIAS: nop # CHECK-INST: c.nop # CHECK: # encoding: [0x01,0x00] nop -# CHECK-BYTES: 81 10 +# CHECK-BYTES: 1081 # CHECK-ALIAS: addi ra, ra, -32 # CHECK-INST: c.addi ra, -32 # CHECK: # encoding: [0x81,0x10] addi ra, ra, -32 -# CHECK-BYTES: 85 50 +# CHECK-BYTES: 5085 # CHECK-ALIAS: li ra, -31 # CHECK-INST: c.li ra, -31 # CHECK: # encoding: [0x85,0x50] li ra, -31 -# CHECK-BYTES: 39 71 +# CHECK-BYTES: 7139 # CHECK-ALIAS: addi sp, sp, -64 # CHECK-INST: c.addi16sp sp, -64 # CHECK: # encoding: [0x39,0x71] addi sp, sp, -64 -# CHECK-BYTES: fd 61 +# CHECK-BYTES: 61fd # CHECK-ALIAS: lui gp, 31 # CHECK-INST: c.lui gp, 31 # CHECK: # encoding: [0xfd,0x61] lui gp, 31 -# CHECK-BYTES: 7d 80 +# CHECK-BYTES: 807d # CHECK-ALIAS: srli s0, s0, 31 # CHECK-INST: c.srli s0, 31 # CHECK: # encoding: [0x7d,0x80] srli s0, s0, 31 -# CHECK-BYTES: 7d 84 +# CHECK-BYTES: 847d # CHECK-ALIAS: srai s0, s0, 31 # CHECK-INST: c.srai s0, 31 # CHECK: # encoding: [0x7d,0x84] srai s0, s0, 31 -# CHECK-BYTES: 7d 88 +# CHECK-BYTES: 887d # CHECK-ALIAS: andi s0, s0, 31 # CHECK-INST: c.andi s0, 31 # CHECK: # encoding: [0x7d,0x88] andi s0, s0, 31 -# CHECK-BYTES: 1d 8c +# CHECK-BYTES: 8c1d # CHECK-ALIAS: sub s0, s0, a5 # CHECK-INST: c.sub s0, a5 # CHECK: # encoding: [0x1d,0x8c] sub s0, s0, a5 -# CHECK-BYTES: 3d 8c +# CHECK-BYTES: 8c3d # CHECK-ALIAS: xor s0, s0, a5 # CHECK-INST: c.xor s0, a5 # CHECK: # encoding: [0x3d,0x8c] xor s0, s0, a5 -# CHECK-BYTES: 3d 8c +# CHECK-BYTES: 8c3d # CHECK-ALIAS: xor s0, s0, a5 # CHECK-INST: c.xor s0, a5 # CHECK: # encoding: [0x3d,0x8c] xor s0, a5, s0 -# CHECK-BYTES: 5d 8c +# CHECK-BYTES: 8c5d # CHECK-ALIAS: or s0, s0, a5 # CHECK-INST: c.or s0, a5 # CHECK: # encoding: [0x5d,0x8c] or s0, s0, a5 -# CHECK-BYTES: 45 8c +# CHECK-BYTES: 8c45 # CHECK-ALIAS: or s0, s0, s1 # CHECK-INST: c.or s0, s1 # CHECK: # encoding: [0x45,0x8c] or s0, s1, s0 -# CHECK-BYTES: 7d 8c +# CHECK-BYTES: 8c7d # CHECK-ALIAS: and s0, s0, a5 # CHECK-INST: c.and s0, a5 # CHECK: # encoding: [0x7d,0x8c] and s0, s0, a5 -# CHECK-BYTES: 7d 8c +# CHECK-BYTES: 8c7d # CHECK-ALIAS: and s0, s0, a5 # CHECK-INST: c.and s0, a5 # CHECK: # encoding: [0x7d,0x8c] and s0, a5, s0 -# CHECK-BYTES: 01 b0 +# CHECK-BYTES: b001 # CHECK-ALIASASM: j -2048 # CHECK-ALIASOBJ32: j 0xfffff826 # CHECK-ALIASOBJ64: j 0xfffffffffffff826 @@ -144,7 +144,7 @@ and s0, a5, s0 # CHECK: # encoding: [0x01,0xb0] jal zero, -2048 -# CHECK-BYTES: 01 d0 +# CHECK-BYTES: d001 # CHECK-ALIASASM: beqz s0, -256 # CHECK-ALIASOBJ32: beqz s0, 0xffffff28 # CHECK-ALIASOBJ64: beqz s0, 0xffffffffffffff28 @@ -154,7 +154,7 @@ jal zero, -2048 # CHECK: # encoding: [0x01,0xd0] beq s0, zero, -256 -# CHECK-BYTES: 01 d0 +# CHECK-BYTES: d001 # CHECK-ALIASASM: beqz s0, -256 # CHECK-ALIASOBJ32: beqz s0, 0xffffff2a # CHECK-ALIASOBJ64: beqz s0, 0xffffffffffffff2a @@ -164,7 +164,7 @@ beq s0, zero, -256 # CHECK: # encoding: [0x01,0xd0] beq zero, s0, -256 -# CHECK-BYTES: 7d ec +# CHECK-BYTES: ec7d # CHECK-ALIASASM: bnez s0, 254 # CHECK-ALIASOBJ32: bnez s0, 0x12a # CHECK-ALIASOBJ64: bnez s0, 0x12a @@ -174,7 +174,7 @@ beq zero, s0, -256 # CHECK: # encoding: [0x7d,0xec] bne s0, zero, 254 -# CHECK-BYTES: 7d ec +# CHECK-BYTES: ec7d # CHECK-ALIASASM: bnez s0, 254 # CHECK-ALIASOBJ32: bnez s0, 0x12c # CHECK-ALIASOBJ64: bnez s0, 0x12c @@ -184,67 +184,67 @@ bne s0, zero, 254 # CHECK: # encoding: [0x7d,0xec] bne zero, s0, 254 -# CHECK-BYTES: 7e 04 +# CHECK-BYTES: 047e # CHECK-ALIAS: slli s0, s0, 31 # CHECK-INST: c.slli s0, 31 # CHECK: # encoding: [0x7e,0x04] slli s0, s0, 31 -# CHECK-BYTES: fe 50 +# CHECK-BYTES: 50fe # CHECK-ALIAS: lw ra, 252(sp) # CHECK-INST: c.lwsp ra, 252(sp) # CHECK: # encoding: [0xfe,0x50] lw ra, 252(sp) -# CHECK-BYTES: 82 80 +# CHECK-BYTES: 8082 # CHECK-ALIAS: ret # CHECK-INST: c.jr ra # CHECK: # encoding: [0x82,0x80] jalr zero, 0(ra) -# CHECK-BYTES: 92 80 +# CHECK-BYTES: 8092 # CHECK-ALIAS: mv ra, tp # CHECK-INST: c.mv ra, tp # CHECK: # encoding: [0x92,0x80] add ra, zero, tp -# CHECK-BYTES: 92 80 +# CHECK-BYTES: 8092 # CHECK-ALIAS: mv ra, tp # CHECK-INST: c.mv ra, tp # CHECK: # encoding: [0x92,0x80] add ra, tp, zero -# CHECK-BYTES: 02 90 +# CHECK-BYTES: 9002 # CHECK-ALIAS: ebreak # CHECK-INST: c.ebreak # CHECK: # encoding: [0x02,0x90] ebreak -# CHECK-BYTES: 02 94 +# CHECK-BYTES: 9402 # CHECK-ALIAS: jalr s0 # CHECK-INST: c.jalr s0 # CHECK: # encoding: [0x02,0x94] jalr ra, 0(s0) -# CHECK-BYTES: 3e 94 +# CHECK-BYTES: 943e # CHECK-ALIAS: add s0, s0, a5 # CHECK-INST: c.add s0, a5 # CHECK: # encoding: [0x3e,0x94] add s0, a5, s0 -# CHECK-BYTES: 3e 94 +# CHECK-BYTES: 943e # CHECK-ALIAS: add s0, s0, a5 # CHECK-INST: c.add s0, a5 # CHECK: # encoding: [0x3e,0x94] add s0, s0, a5 -# CHECK-BYTES: 82 df +# CHECK-BYTES: df82 # CHECK-ALIAS: sw zero, 252(sp) # CHECK-INST: c.swsp zero, 252(sp) # CHECK: # encoding: [0x82,0xdf] sw zero, 252(sp) -# CHECK-BYTES: 00 00 +# CHECK-BYTES: 0000 # CHECK-ALIAS: unimp # CHECK-INST: c.unimp # CHECK: # encoding: [0x00,0x00] diff --git a/llvm/test/MC/RISCV/compress-rv64i.s b/llvm/test/MC/RISCV/compress-rv64i.s index 55d24f0d41c05..ab5b24307cd1a 100644 --- a/llvm/test/MC/RISCV/compress-rv64i.s +++ b/llvm/test/MC/RISCV/compress-rv64i.s @@ -11,49 +11,49 @@ # Tests compressed instructions available in rv64 and not in rv32. -# CHECK-BYTES: e0 7f +# CHECK-BYTES: 7fe0 # CHECK-ALIAS: ld s0, 248(a5) # CHECK-INST: c.ld s0, 248(a5) # CHECK: # encoding: [0xe0,0x7f] ld s0, 248(a5) -# CHECK-BYTES: a0 e3 +# CHECK-BYTES: e3a0 # CHECK-ALIAS: sd s0, 64(a5) # CHECK-INST: c.sd s0, 64(a5) # CHECK: # encoding: [0xa0,0xe3] sd s0, 64(a5) -# CHECK-BYTES: 7d 22 +# CHECK-BYTES: 227d # CHEACK-ALIAS: addiw tp, tp, 31 # CHECK-INST: c.addiw tp, 31 # CHECK: # encoding: [0x7d,0x22] addiw tp, tp, 31 -# CHECK-BYTES: 1d 9c +# CHECK-BYTES: 9c1d # CHEACK-ALIAS: subw s0, s0, a5 # CHECK-INST: c.subw s0, a5 # CHECK: # encoding: [0x1d,0x9c] subw s0, s0, a5 -# CHECK-BYTES: 3d 9c +# CHECK-BYTES: 9c3d # CHECK-ALIAS: addw s0, s0, a5 # CHECK-INST: c.addw s0, a5 # CHECK: # encoding: [0x3d,0x9c] addw s0, s0, a5 -# CHECK-BYTES: 3d 9c +# CHECK-BYTES: 9c3d # CHECK-ALIAS: addw s0, s0, a5 # CHECK-INST: c.addw s0, a5 # CHECK: # encoding: [0x3d,0x9c] addw s0, a5, s0 -# CHECK-BYTES: ee 70 +# CHECK-BYTES: 70ee # CHECK-ALIAS: ld ra, 248(sp) # CHECK-INST: c.ldsp ra, 248(sp) # CHECK: # encoding: [0xee,0x70] ld ra, 248(sp) -# CHECK-BYTES: a2 e0 +# CHECK-BYTES: e0a2 # CHECK-ALIAS: sd s0, 64(sp) # CHECK-INST: c.sdsp s0, 64(sp) # CHECK: # encoding: [0xa2,0xe0] diff --git a/llvm/test/MC/RISCV/nop-slide.s b/llvm/test/MC/RISCV/nop-slide.s index f280d6e521e3c..4dc888b3ba777 100644 --- a/llvm/test/MC/RISCV/nop-slide.s +++ b/llvm/test/MC/RISCV/nop-slide.s @@ -10,18 +10,18 @@ auipc a0, 0 # CHECK-RVC-NORELAX: 0000000000000000 <.text>: -# CHECK-RVC-NORELAX-NEXT: 0: 00 00 unimp -# CHECK-RVC-NORELAX-NEXT: 2: 01 00 nop -# CHECK-RVC-NORELAX-NEXT: 4: 17 05 00 00 auipc a0, 0x0 +# CHECK-RVC-NORELAX-NEXT: 0: 0000 unimp +# CHECK-RVC-NORELAX-NEXT: 2: 0001 nop +# CHECK-RVC-NORELAX-NEXT: 4: 00000517 auipc a0, 0x0 # CHECK-RVC-RELAX: 0000000000000000 <.text>: -# CHECK-RVC-RELAX-NEXT: 0: 01 00 nop -# CHECK-RVC-RELAX-NEXT: 2: 00 01 addi s0, sp, 0x80 -# CHECK-RVC-RELAX-NEXT: 4: 00 17 addi s0, sp, 0x3a0 -# CHECK-RVC-RELAX-NEXT: 6: 05 00 c.nop 0x1 -# CHECK-RVC-RELAX-NEXT: 8: 00 +# CHECK-RVC-RELAX-NEXT: 0: 0001 nop +# CHECK-RVC-RELAX-NEXT: 2: 0100 addi s0, sp, 0x80 +# CHECK-RVC-RELAX-NEXT: 4: 1700 addi s0, sp, 0x3a0 +# CHECK-RVC-RELAX-NEXT: 6: 0005 c.nop 0x1 +# CHECK-RVC-RELAX-NEXT: 8: 00 # CHECK: 0000000000000000 <.text>: -# CHECK-NEXT: 0: 00 00 -# CHECK-NEXT: 2: 00 00 -# CHECK-NEXT: 4: 17 05 00 00 auipc a0, 0x0 +# CHECK-NEXT: 0: 0000 +# CHECK-NEXT: 2: 0000 +# CHECK-NEXT: 4: 00000517 auipc a0, 0x0 diff --git a/llvm/test/MC/RISCV/option-pushpop.s b/llvm/test/MC/RISCV/option-pushpop.s index c830d16e590ba..9c61b5dab5f3b 100644 --- a/llvm/test/MC/RISCV/option-pushpop.s +++ b/llvm/test/MC/RISCV/option-pushpop.s @@ -25,7 +25,7 @@ call foo # CHECK-INST: addi s0, sp, 1020 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 addi s0, sp, 1020 @@ -45,14 +45,14 @@ call bar .option rvc # CHECK-INST: .option rvc # CHECK-INST: c.addi4spn s0, sp, 1020 -# CHECK-BYTES: e0 1f +# CHECK-BYTES: 1fe0 # CHECK-ALIAS: addi s0, sp, 1020 addi s0, sp, 1020 .option pop # Pop relax=true, rvc=false # CHECK-INST: .option pop # CHECK-INST: addi s0, sp, 1020 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 addi s0, sp, 1020 @@ -69,7 +69,7 @@ call bar call baz # CHECK-INST: addi s0, sp, 1020 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 addi s0, sp, 1020 diff --git a/llvm/test/MC/RISCV/option-rvc.s b/llvm/test/MC/RISCV/option-rvc.s index 00c8ea167bcdf..894fbab562d70 100644 --- a/llvm/test/MC/RISCV/option-rvc.s +++ b/llvm/test/MC/RISCV/option-rvc.s @@ -20,13 +20,13 @@ # RUN: | llvm-objdump --triple=riscv64 --mattr=+c --no-print-imm-hex -d -M no-aliases - \ # RUN: | FileCheck -check-prefixes=CHECK-BYTES,CHECK-INST %s -# CHECK-BYTES: 13 85 05 00 +# CHECK-BYTES: 00058513 # CHECK-ALIAS: mv a0, a1 # CHECK-INST: addi a0, a1, 0 # CHECK: # encoding: [0x13,0x85,0x05,0x00] addi a0, a1, 0 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: addi s0, sp, 1020 # CHECK: # encoding: [0x13,0x04,0xc1,0x3f] @@ -35,13 +35,13 @@ addi s0, sp, 1020 # CHECK: .option rvc .option rvc -# CHECK-BYTES: 2e 85 +# CHECK-BYTES: 852e # CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 -# CHECK-BYTES: e0 1f +# CHECK-BYTES: 1fe0 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: c.addi4spn s0, sp, 1020 # CHECK: # encoding: [0xe0,0x1f] @@ -49,13 +49,13 @@ addi s0, sp, 1020 # CHECK: .option norvc .option norvc -# CHECK-BYTES: 13 85 05 00 +# CHECK-BYTES: 00058513 # CHECK-ALIAS: mv a0, a1 # CHECK-INST: addi a0, a1, 0 # CHECK: # encoding: [0x13,0x85,0x05,0x00] addi a0, a1, 0 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: addi s0, sp, 1020 # CHECK: # encoding: [0x13,0x04,0xc1,0x3f] @@ -63,13 +63,13 @@ addi s0, sp, 1020 # CHECK: .option rvc .option rvc -# CHECK-BYTES: 2e 85 +# CHECK-BYTES: 852e # CHECK-ALIAS: mv a0, a1 # CHECK-INST: c.mv a0, a1 # CHECK: # encoding: [0x2e,0x85] addi a0, a1, 0 -# CHECK-BYTES: e0 1f +# CHECK-BYTES: 1fe0 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: c.addi4spn s0, sp, 1020 # CHECK: # encoding: [0xe0,0x1f] @@ -77,13 +77,13 @@ addi s0, sp, 1020 # CHECK: .option norvc .option norvc -# CHECK-BYTES: 13 85 05 00 +# CHECK-BYTES: 00058513 # CHECK-ALIAS: mv a0, a1 # CHECK-INST: addi a0, a1, 0 # CHECK: # encoding: [0x13,0x85,0x05,0x00] addi a0, a1, 0 -# CHECK-BYTES: 13 04 c1 3f +# CHECK-BYTES: 3fc10413 # CHECK-ALIAS: addi s0, sp, 1020 # CHECK-INST: addi s0, sp, 1020 # CHECK: # encoding: [0x13,0x04,0xc1,0x3f] diff --git a/llvm/test/MC/RISCV/rv32e-invalid.s b/llvm/test/MC/RISCV/rv32e-invalid.s index 9c19d3f40bcff..95dc156f250a3 100644 --- a/llvm/test/MC/RISCV/rv32e-invalid.s +++ b/llvm/test/MC/RISCV/rv32e-invalid.s @@ -11,100 +11,100 @@ # are rejected for RV32E/RV64E, when both assembling and disassembling. -# CHECK-DIS: 37 18 00 00 +# CHECK-DIS: 00001837 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x16, 1 -# CHECK-DIS: b7 28 00 00 +# CHECK-DIS: 000028b7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x17, 2 -# CHECK-DIS: 37 39 00 00 +# CHECK-DIS: 00003937 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x18, 3 -# CHECK-DIS: b7 49 00 00 +# CHECK-DIS: 000049b7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x19, 4 -# CHECK-DIS: 37 5a 00 00 +# CHECK-DIS: 00005a37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x20, 5 -# CHECK-DIS: b7 6a 00 00 +# CHECK-DIS: 00006ab7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x21, 6 -# CHECK-DIS: 37 7b 00 00 +# CHECK-DIS: 00007b37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x22, 7 -# CHECK-DIS: b7 8b 00 00 +# CHECK-DIS: 00008bb7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x23, 8 -# CHECK-DIS: 37 9c 00 00 +# CHECK-DIS: 00009c37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x24, 9 -# CHECK-DIS: b7 ac 00 00 +# CHECK-DIS: 0000acb7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x25, 10 -# CHECK-DIS: 37 bd 00 00 +# CHECK-DIS: 0000bd37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x26, 11 -# CHECK-DIS: b7 cd 00 00 +# CHECK-DIS: 0000cdb7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x27, 12 -# CHECK-DIS: 37 de 00 00 +# CHECK-DIS: 0000de37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x28, 13 -# CHECK-DIS: b7 ee 00 00 +# CHECK-DIS: 0000eeb7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x29, 14 -# CHECK-DIS: 37 ff 00 00 +# CHECK-DIS: 0000ff37 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x30, 15 -# CHECK-DIS: b7 0f 01 00 +# CHECK-DIS: 00010fb7 # CHECK: :[[@LINE+1]]:5: error: invalid operand for instruction lui x31, 16 -# CHECK-DIS: 17 18 01 00 +# CHECK-DIS: 00011817 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc a6, 17 -# CHECK-DIS: 97 28 01 00 +# CHECK-DIS: 00012897 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc a7, 18 -# CHECK-DIS: 17 39 01 00 +# CHECK-DIS: 00013917 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s2, 19 -# CHECK-DIS: 97 49 01 00 +# CHECK-DIS: 00014997 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s3, 20 -# CHECK-DIS: 17 5a 01 00 +# CHECK-DIS: 00015a17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s4, 21 -# CHECK-DIS: 97 6a 01 00 +# CHECK-DIS: 00016a97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s5, 22 -# CHECK-DIS: 17 7b 01 00 +# CHECK-DIS: 00017b17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s6, 23 -# CHECK-DIS: 97 8b 01 00 +# CHECK-DIS: 00018b97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s7, 24 -# CHECK-DIS: 17 9c 01 00 +# CHECK-DIS: 00019c17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s8, 25 -# CHECK-DIS: 97 ac 01 00 +# CHECK-DIS: 0001ac97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s9, 26 -# CHECK-DIS: 17 bd 01 00 +# CHECK-DIS: 0001bd17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s10, 27 -# CHECK-DIS: 97 cd 01 00 +# CHECK-DIS: 0001cd97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc s11, 28 -# CHECK-DIS: 17 de 01 00 +# CHECK-DIS: 0001de17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc t3, 29 -# CHECK-DIS: 97 ee 01 00 +# CHECK-DIS: 0001ee97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc t4, 30 -# CHECK-DIS: 17 ff 01 00 +# CHECK-DIS: 0001ff17 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc t5, 31 -# CHECK-DIS: 97 0f 02 00 +# CHECK-DIS: 00020f97 # CHECK: :[[@LINE+1]]:7: error: invalid operand for instruction auipc t6, 32 diff --git a/llvm/test/MC/RISCV/rvv/add.s b/llvm/test/MC/RISCV/rvv/add.s index 89cef5dc0a4cb..ebfe50f2d9582 100644 --- a/llvm/test/MC/RISCV/rvv/add.s +++ b/llvm/test/MC/RISCV/rvv/add.s @@ -12,352 +12,352 @@ vadd.vv v8, v4, v20, v0.t # CHECK-INST: vadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 00 +# CHECK-UNKNOWN: 004a0457 vadd.vv v8, v4, v20 # CHECK-INST: vadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 02 +# CHECK-UNKNOWN: 024a0457 vadd.vx v8, v4, a0, v0.t # CHECK-INST: vadd.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 00 +# CHECK-UNKNOWN: 00454457 vadd.vx v8, v4, a0 # CHECK-INST: vadd.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 02 +# CHECK-UNKNOWN: 02454457 vadd.vi v8, v4, 15, v0.t # CHECK-INST: vadd.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 00 +# CHECK-UNKNOWN: 0047b457 vadd.vi v8, v4, 15 # CHECK-INST: vadd.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 02 +# CHECK-UNKNOWN: 0247b457 vwaddu.vv v8, v4, v20, v0.t # CHECK-INST: vwaddu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a c0 +# CHECK-UNKNOWN: c04a2457 vwaddu.vv v8, v4, v20 # CHECK-INST: vwaddu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a c2 +# CHECK-UNKNOWN: c24a2457 vwaddu.vx v8, v4, a0, v0.t # CHECK-INST: vwaddu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 c0 +# CHECK-UNKNOWN: c0456457 vwaddu.vx v8, v4, a0 # CHECK-INST: vwaddu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 c2 +# CHECK-UNKNOWN: c2456457 vwadd.vv v8, v4, v20, v0.t # CHECK-INST: vwadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a c4 +# CHECK-UNKNOWN: c44a2457 vwadd.vv v8, v4, v20 # CHECK-INST: vwadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a c6 +# CHECK-UNKNOWN: c64a2457 vwadd.vx v8, v4, a0, v0.t # CHECK-INST: vwadd.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 c4 +# CHECK-UNKNOWN: c4456457 vwadd.vx v8, v4, a0 # CHECK-INST: vwadd.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 c6 +# CHECK-UNKNOWN: c6456457 vwaddu.wv v8, v4, v20, v0.t # CHECK-INST: vwaddu.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xd0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a d0 +# CHECK-UNKNOWN: d04a2457 vwaddu.wv v8, v4, v20 # CHECK-INST: vwaddu.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xd2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a d2 +# CHECK-UNKNOWN: d24a2457 vwaddu.wx v8, v4, a0, v0.t # CHECK-INST: vwaddu.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xd0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 d0 +# CHECK-UNKNOWN: d0456457 vwaddu.wx v8, v4, a0 # CHECK-INST: vwaddu.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xd2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 d2 +# CHECK-UNKNOWN: d2456457 vwadd.wv v8, v4, v20, v0.t # CHECK-INST: vwadd.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xd4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a d4 +# CHECK-UNKNOWN: d44a2457 vwadd.wv v8, v4, v20 # CHECK-INST: vwadd.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xd6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a d6 +# CHECK-UNKNOWN: d64a2457 vwadd.wx v8, v4, a0, v0.t # CHECK-INST: vwadd.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xd4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 d4 +# CHECK-UNKNOWN: d4456457 vwadd.wx v8, v4, a0 # CHECK-INST: vwadd.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xd6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 d6 +# CHECK-UNKNOWN: d6456457 vadc.vvm v8, v4, v20, v0 # CHECK-INST: vadc.vvm v8, v4, v20, v0 # CHECK-ENCODING: [0x57,0x04,0x4a,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 40 +# CHECK-UNKNOWN: 404a0457 vadc.vvm v4, v4, v20, v0 # CHECK-INST: vadc.vvm v4, v4, v20, v0 # CHECK-ENCODING: [0x57,0x02,0x4a,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 02 4a 40 +# CHECK-UNKNOWN: 404a0257 vadc.vvm v8, v4, v8, v0 # CHECK-INST: vadc.vvm v8, v4, v8, v0 # CHECK-ENCODING: [0x57,0x04,0x44,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 44 40 +# CHECK-UNKNOWN: 40440457 vadc.vxm v8, v4, a0, v0 # CHECK-INST: vadc.vxm v8, v4, a0, v0 # CHECK-ENCODING: [0x57,0x44,0x45,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 40 +# CHECK-UNKNOWN: 40454457 vadc.vim v8, v4, 15, v0 # CHECK-INST: vadc.vim v8, v4, 15, v0 # CHECK-ENCODING: [0x57,0xb4,0x47,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 40 +# CHECK-UNKNOWN: 4047b457 vmadc.vvm v8, v4, v20, v0 # CHECK-INST: vmadc.vvm v8, v4, v20, v0 # CHECK-ENCODING: [0x57,0x04,0x4a,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 44 +# CHECK-UNKNOWN: 444a0457 vmadc.vvm v4, v4, v20, v0 # CHECK-INST: vmadc.vvm v4, v4, v20, v0 # CHECK-ENCODING: [0x57,0x02,0x4a,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 02 4a 44 +# CHECK-UNKNOWN: 444a0257 vmadc.vvm v8, v4, v8, v0 # CHECK-INST: vmadc.vvm v8, v4, v8, v0 # CHECK-ENCODING: [0x57,0x04,0x44,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 44 44 +# CHECK-UNKNOWN: 44440457 vmadc.vxm v8, v4, a0, v0 # CHECK-INST: vmadc.vxm v8, v4, a0, v0 # CHECK-ENCODING: [0x57,0x44,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 44 +# CHECK-UNKNOWN: 44454457 vmadc.vim v8, v4, 15, v0 # CHECK-INST: vmadc.vim v8, v4, 15, v0 # CHECK-ENCODING: [0x57,0xb4,0x47,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 44 +# CHECK-UNKNOWN: 4447b457 vmadc.vv v8, v4, v20 # CHECK-INST: vmadc.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 46 +# CHECK-UNKNOWN: 464a0457 vmadc.vx v8, v4, a0 # CHECK-INST: vmadc.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 46 +# CHECK-UNKNOWN: 46454457 vmadc.vi v8, v4, 15 # CHECK-INST: vmadc.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 46 +# CHECK-UNKNOWN: 4647b457 vsaddu.vv v8, v4, v20, v0.t # CHECK-INST: vsaddu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 80 +# CHECK-UNKNOWN: 804a0457 vsaddu.vv v8, v4, v20 # CHECK-INST: vsaddu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 82 +# CHECK-UNKNOWN: 824a0457 vsaddu.vx v8, v4, a0, v0.t # CHECK-INST: vsaddu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 80 +# CHECK-UNKNOWN: 80454457 vsaddu.vx v8, v4, a0 # CHECK-INST: vsaddu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 82 +# CHECK-UNKNOWN: 82454457 vsaddu.vi v8, v4, 15, v0.t # CHECK-INST: vsaddu.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 80 +# CHECK-UNKNOWN: 8047b457 vsaddu.vi v8, v4, 15 # CHECK-INST: vsaddu.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 82 +# CHECK-UNKNOWN: 8247b457 vsadd.vv v8, v4, v20, v0.t # CHECK-INST: vsadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 84 +# CHECK-UNKNOWN: 844a0457 vsadd.vv v8, v4, v20 # CHECK-INST: vsadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 86 +# CHECK-UNKNOWN: 864a0457 vsadd.vx v8, v4, a0, v0.t # CHECK-INST: vsadd.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 84 +# CHECK-UNKNOWN: 84454457 vsadd.vx v8, v4, a0 # CHECK-INST: vsadd.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 86 +# CHECK-UNKNOWN: 86454457 vsadd.vi v8, v4, 15, v0.t # CHECK-INST: vsadd.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 84 +# CHECK-UNKNOWN: 8447b457 vsadd.vi v8, v4, 15 # CHECK-INST: vsadd.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 86 +# CHECK-UNKNOWN: 8647b457 vaadd.vv v8, v4, v20, v0.t # CHECK-INST: vaadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 24 +# CHECK-UNKNOWN: 244a2457 vaadd.vv v8, v4, v20 # CHECK-INST: vaadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 26 +# CHECK-UNKNOWN: 264a2457 vaadd.vx v8, v4, a0, v0.t # CHECK-INST: vaadd.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 24 +# CHECK-UNKNOWN: 24456457 vaadd.vx v8, v4, a0 # CHECK-INST: vaadd.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 26 +# CHECK-UNKNOWN: 26456457 vaaddu.vv v8, v4, v20, v0.t # CHECK-INST: vaaddu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 20 +# CHECK-UNKNOWN: 204a2457 vaaddu.vv v8, v4, v20 # CHECK-INST: vaaddu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 22 +# CHECK-UNKNOWN: 224a2457 vaaddu.vx v8, v4, a0, v0.t # CHECK-INST: vaaddu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 20 +# CHECK-UNKNOWN: 20456457 vaaddu.vx v8, v4, a0 # CHECK-INST: vaaddu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 22 +# CHECK-UNKNOWN: 22456457 vwcvt.x.x.v v8, v4, v0.t # CHECK-INST: vwcvt.x.x.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x40,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 40 c4 +# CHECK-UNKNOWN: c4406457 vwcvt.x.x.v v8, v4 # CHECK-INST: vwcvt.x.x.v v8, v4 # CHECK-ENCODING: [0x57,0x64,0x40,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 40 c6 +# CHECK-UNKNOWN: c6406457 vwcvtu.x.x.v v8, v4, v0.t # CHECK-INST: vwcvtu.x.x.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x40,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 40 c0 +# CHECK-UNKNOWN: c0406457 vwcvtu.x.x.v v8, v4 # CHECK-INST: vwcvtu.x.x.v v8, v4 # CHECK-ENCODING: [0x57,0x64,0x40,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 40 c2 +# CHECK-UNKNOWN: c2406457 diff --git a/llvm/test/MC/RISCV/rvv/and.s b/llvm/test/MC/RISCV/rvv/and.s index 894263fe01524..b1182c175a5d4 100644 --- a/llvm/test/MC/RISCV/rvv/and.s +++ b/llvm/test/MC/RISCV/rvv/and.s @@ -12,34 +12,34 @@ vand.vv v8, v4, v20, v0.t # CHECK-INST: vand.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 24 +# CHECK-UNKNOWN: 244a0457 vand.vv v8, v4, v20 # CHECK-INST: vand.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 26 +# CHECK-UNKNOWN: 264a0457 vand.vx v8, v4, a0, v0.t # CHECK-INST: vand.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 24 +# CHECK-UNKNOWN: 24454457 vand.vx v8, v4, a0 # CHECK-INST: vand.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 26 +# CHECK-UNKNOWN: 26454457 vand.vi v8, v4, 15, v0.t # CHECK-INST: vand.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 24 +# CHECK-UNKNOWN: 2447b457 vand.vi v8, v4, 15 # CHECK-INST: vand.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 26 +# CHECK-UNKNOWN: 2647b457 diff --git a/llvm/test/MC/RISCV/rvv/clip.s b/llvm/test/MC/RISCV/rvv/clip.s index f4fb2c576b30a..70c23d8ec0b1d 100644 --- a/llvm/test/MC/RISCV/rvv/clip.s +++ b/llvm/test/MC/RISCV/rvv/clip.s @@ -12,70 +12,70 @@ vnclipu.wv v8, v4, v20, v0.t # CHECK-INST: vnclipu.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xb8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a b8 +# CHECK-UNKNOWN: b84a0457 vnclipu.wv v8, v4, v20 # CHECK-INST: vnclipu.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xba] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a ba +# CHECK-UNKNOWN: ba4a0457 vnclipu.wx v8, v4, a0, v0.t # CHECK-INST: vnclipu.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xb8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 b8 +# CHECK-UNKNOWN: b8454457 vnclipu.wx v8, v4, a0 # CHECK-INST: vnclipu.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xba] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 ba +# CHECK-UNKNOWN: ba454457 vnclipu.wi v8, v4, 31, v0.t # CHECK-INST: vnclipu.wi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xb8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f b8 +# CHECK-UNKNOWN: b84fb457 vnclipu.wi v8, v4, 31 # CHECK-INST: vnclipu.wi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xba] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f ba +# CHECK-UNKNOWN: ba4fb457 vnclip.wv v8, v4, v20, v0.t # CHECK-INST: vnclip.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xbc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a bc +# CHECK-UNKNOWN: bc4a0457 vnclip.wv v8, v4, v20 # CHECK-INST: vnclip.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xbe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a be +# CHECK-UNKNOWN: be4a0457 vnclip.wx v8, v4, a0, v0.t # CHECK-INST: vnclip.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xbc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 bc +# CHECK-UNKNOWN: bc454457 vnclip.wx v8, v4, a0 # CHECK-INST: vnclip.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xbe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 be +# CHECK-UNKNOWN: be454457 vnclip.wi v8, v4, 31, v0.t # CHECK-INST: vnclip.wi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xbc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f bc +# CHECK-UNKNOWN: bc4fb457 vnclip.wi v8, v4, 31 # CHECK-INST: vnclip.wi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xbe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f be +# CHECK-UNKNOWN: be4fb457 diff --git a/llvm/test/MC/RISCV/rvv/compare.s b/llvm/test/MC/RISCV/rvv/compare.s index fe7c1144a3c02..b1b9518a1d5ac 100644 --- a/llvm/test/MC/RISCV/rvv/compare.s +++ b/llvm/test/MC/RISCV/rvv/compare.s @@ -12,367 +12,367 @@ vmslt.vv v0, v4, v20, v0.t # CHECK-INST: vmslt.vv v0, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x00,0x4a,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 00 4a 6c +# CHECK-UNKNOWN: 6c4a0057 vmseq.vv v8, v4, v20, v0.t # CHECK-INST: vmseq.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 60 +# CHECK-UNKNOWN: 604a0457 vmseq.vv v8, v4, v20 # CHECK-INST: vmseq.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 62 +# CHECK-UNKNOWN: 624a0457 vmseq.vx v8, v4, a0, v0.t # CHECK-INST: vmseq.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 60 +# CHECK-UNKNOWN: 60454457 vmseq.vx v8, v4, a0 # CHECK-INST: vmseq.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 62 +# CHECK-UNKNOWN: 62454457 vmseq.vi v8, v4, 15, v0.t # CHECK-INST: vmseq.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 60 +# CHECK-UNKNOWN: 6047b457 vmseq.vi v8, v4, 15 # CHECK-INST: vmseq.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 62 +# CHECK-UNKNOWN: 6247b457 vmsne.vv v8, v4, v20, v0.t # CHECK-INST: vmsne.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 64 +# CHECK-UNKNOWN: 644a0457 vmsne.vv v8, v4, v20 # CHECK-INST: vmsne.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 66 +# CHECK-UNKNOWN: 664a0457 vmsne.vx v8, v4, a0, v0.t # CHECK-INST: vmsne.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 64 +# CHECK-UNKNOWN: 64454457 vmsne.vx v8, v4, a0 # CHECK-INST: vmsne.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 66 +# CHECK-UNKNOWN: 66454457 vmsne.vi v8, v4, 15, v0.t # CHECK-INST: vmsne.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 64 +# CHECK-UNKNOWN: 6447b457 vmsne.vi v8, v4, 15 # CHECK-INST: vmsne.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 66 +# CHECK-UNKNOWN: 6647b457 vmsltu.vv v8, v4, v20, v0.t # CHECK-INST: vmsltu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 68 +# CHECK-UNKNOWN: 684a0457 vmsltu.vv v8, v4, v20 # CHECK-INST: vmsltu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6a +# CHECK-UNKNOWN: 6a4a0457 vmsltu.vx v8, v4, a0, v0.t # CHECK-INST: vmsltu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 68 +# CHECK-UNKNOWN: 68454457 vmsltu.vx v8, v4, a0 # CHECK-INST: vmsltu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6a +# CHECK-UNKNOWN: 6a454457 vmslt.vv v8, v4, v20, v0.t # CHECK-INST: vmslt.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6c +# CHECK-UNKNOWN: 6c4a0457 vmslt.vv v8, v4, v20 # CHECK-INST: vmslt.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6e +# CHECK-UNKNOWN: 6e4a0457 vmslt.vx v8, v4, a0, v0.t # CHECK-INST: vmslt.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6c +# CHECK-UNKNOWN: 6c454457 vmslt.vx v8, v4, a0 # CHECK-INST: vmslt.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6e +# CHECK-UNKNOWN: 6e454457 vmsleu.vv v8, v4, v20, v0.t # CHECK-INST: vmsleu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x70] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 70 +# CHECK-UNKNOWN: 704a0457 vmsleu.vv v8, v4, v20 # CHECK-INST: vmsleu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 72 +# CHECK-UNKNOWN: 724a0457 vmsleu.vx v8, v4, a0, v0.t # CHECK-INST: vmsleu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x70] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 70 +# CHECK-UNKNOWN: 70454457 vmsleu.vx v8, v4, a0 # CHECK-INST: vmsleu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 72 +# CHECK-UNKNOWN: 72454457 vmsleu.vi v8, v4, 15, v0.t # CHECK-INST: vmsleu.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x70] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 70 +# CHECK-UNKNOWN: 7047b457 vmsleu.vi v8, v4, 15 # CHECK-INST: vmsleu.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 72 +# CHECK-UNKNOWN: 7247b457 vmsle.vv v8, v4, v20, v0.t # CHECK-INST: vmsle.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x74] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 74 +# CHECK-UNKNOWN: 744a0457 vmsle.vv v8, v4, v20 # CHECK-INST: vmsle.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 76 +# CHECK-UNKNOWN: 764a0457 vmsle.vx v8, v4, a0, v0.t # CHECK-INST: vmsle.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x74] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 74 +# CHECK-UNKNOWN: 74454457 vmsle.vx v8, v4, a0 # CHECK-INST: vmsle.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 76 +# CHECK-UNKNOWN: 76454457 vmsle.vi v8, v4, 15, v0.t # CHECK-INST: vmsle.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x74] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 74 +# CHECK-UNKNOWN: 7447b457 vmsle.vi v8, v4, 15 # CHECK-INST: vmsle.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 76 +# CHECK-UNKNOWN: 7647b457 vmsgtu.vx v8, v4, a0, v0.t # CHECK-INST: vmsgtu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x78] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 78 +# CHECK-UNKNOWN: 78454457 vmsgtu.vx v8, v4, a0 # CHECK-INST: vmsgtu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x7a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 7a +# CHECK-UNKNOWN: 7a454457 vmsgtu.vi v8, v4, 15, v0.t # CHECK-INST: vmsgtu.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x78] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 78 +# CHECK-UNKNOWN: 7847b457 vmsgtu.vi v8, v4, 15 # CHECK-INST: vmsgtu.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x7a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7a +# CHECK-UNKNOWN: 7a47b457 vmsgt.vx v8, v4, a0, v0.t # CHECK-INST: vmsgt.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x7c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 7c +# CHECK-UNKNOWN: 7c454457 vmsgt.vx v8, v4, a0 # CHECK-INST: vmsgt.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x7e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 7e +# CHECK-UNKNOWN: 7e454457 vmsgt.vi v8, v4, 15, v0.t # CHECK-INST: vmsgt.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x7c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7c +# CHECK-UNKNOWN: 7c47b457 vmsgt.vi v8, v4, 15 # CHECK-INST: vmsgt.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x7e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7e +# CHECK-UNKNOWN: 7e47b457 vmsgtu.vv v8, v20, v4, v0.t # CHECK-INST: vmsltu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 68 +# CHECK-UNKNOWN: 684a0457 vmsgtu.vv v8, v20, v4 # CHECK-INST: vmsltu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6a +# CHECK-UNKNOWN: 6a4a0457 vmsgt.vv v8, v20, v4, v0.t # CHECK-INST: vmslt.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6c +# CHECK-UNKNOWN: 6c4a0457 vmsgt.vv v8, v20, v4 # CHECK-INST: vmslt.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 6e +# CHECK-UNKNOWN: 6e4a0457 vmsgeu.vv v8, v20, v4, v0.t # CHECK-INST: vmsleu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x70] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 70 +# CHECK-UNKNOWN: 704a0457 vmsgeu.vv v8, v20, v4 # CHECK-INST: vmsleu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 72 +# CHECK-UNKNOWN: 724a0457 vmsge.vv v8, v20, v4, v0.t # CHECK-INST: vmsle.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x74] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 74 +# CHECK-UNKNOWN: 744a0457 vmsge.vv v8, v20, v4 # CHECK-INST: vmsle.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 76 +# CHECK-UNKNOWN: 764a0457 vmsltu.vi v8, v4, 16, v0.t # CHECK-INST: vmsleu.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x70] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 70 +# CHECK-UNKNOWN: 7047b457 vmsltu.vi v8, v4, 16 # CHECK-INST: vmsleu.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 72 +# CHECK-UNKNOWN: 7247b457 vmsltu.vi v8, v4, 0, v0.t # CHECK-INST: vmsne.vv v8, v4, v4, v0.t # CHECK-ENCODING: [0x57,0x04,0x42,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 42 64 +# CHECK-UNKNOWN: 64420457 vmsltu.vi v8, v4, 0 # CHECK-INST: vmsne.vv v8, v4, v4 # CHECK-ENCODING: [0x57,0x04,0x42,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 42 66 +# CHECK-UNKNOWN: 66420457 vmslt.vi v8, v4, 16, v0.t # CHECK-INST: vmsle.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x74] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 74 +# CHECK-UNKNOWN: 7447b457 vmslt.vi v8, v4, 16 # CHECK-INST: vmsle.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 76 +# CHECK-UNKNOWN: 7647b457 vmsgeu.vi v8, v4, 16, v0.t # CHECK-INST: vmsgtu.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x78] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 78 +# CHECK-UNKNOWN: 7847b457 vmsgeu.vi v8, v4, 16 # CHECK-INST: vmsgtu.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x7a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7a +# CHECK-UNKNOWN: 7a47b457 vmsgeu.vi v8, v4, 0, v0.t # CHECK-INST: vmseq.vv v8, v4, v4, v0.t # CHECK-ENCODING: [0x57,0x04,0x42,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 42 60 +# CHECK-UNKNOWN: 60420457 vmsgeu.vi v8, v4, 0 # CHECK-INST: vmseq.vv v8, v4, v4 # CHECK-ENCODING: [0x57,0x04,0x42,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 42 62 +# CHECK-UNKNOWN: 62420457 vmsge.vi v8, v4, 16, v0.t # CHECK-INST: vmsgt.vi v8, v4, 0xf, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x7c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7c +# CHECK-UNKNOWN: 7c47b457 vmsge.vi v8, v4, 16 # CHECK-INST: vmsgt.vi v8, v4, 0xf # CHECK-ENCODING: [0x57,0xb4,0x47,0x7e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 7e +# CHECK-UNKNOWN: 7e47b457 vmsgeu.vx v8, v4, a0 # CHECK-INST: vmsltu.vx v8, v4, a0 @@ -380,8 +380,8 @@ vmsgeu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x6a] # CHECK-ENCODING: [0x57,0x24,0x84,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6a -# CHECK-UNKNOWN: 57 24 84 76 +# CHECK-UNKNOWN: 6a454457 +# CHECK-UNKNOWN: 76842457 vmsge.vx v0, v4, a0 # CHECK-INST: vmslt.vx v0, v4, a0 @@ -389,8 +389,8 @@ vmsge.vx v0, v4, a0 # CHECK-ENCODING: [0x57,0x40,0x45,0x6e] # CHECK-ENCODING: [0x57,0x20,0x00,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 40 45 6e -# CHECK-UNKNOWN: 57 20 00 76 +# CHECK-UNKNOWN: 6e454057 +# CHECK-UNKNOWN: 76002057 vmsge.vx v8, v4, a0 # CHECK-INST: vmslt.vx v8, v4, a0 @@ -398,8 +398,8 @@ vmsge.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x6e] # CHECK-ENCODING: [0x57,0x24,0x84,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6e -# CHECK-UNKNOWN: 57 24 84 76 +# CHECK-UNKNOWN: 6e454457 +# CHECK-UNKNOWN: 76842457 vmsgeu.vx v8, v4, a0, v0.t # CHECK-INST: vmsltu.vx v8, v4, a0, v0.t @@ -407,8 +407,8 @@ vmsgeu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x68] # CHECK-ENCODING: [0x57,0x24,0x80,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 68 -# CHECK-UNKNOWN: 57 24 80 6e +# CHECK-UNKNOWN: 68454457 +# CHECK-UNKNOWN: 6e802457 vmsge.vx v8, v4, a0, v0.t # CHECK-INST: vmslt.vx v8, v4, a0, v0.t @@ -416,8 +416,8 @@ vmsge.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x6c] # CHECK-ENCODING: [0x57,0x24,0x80,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 6c -# CHECK-UNKNOWN: 57 24 80 6e +# CHECK-UNKNOWN: 6c454457 +# CHECK-UNKNOWN: 6e802457 vmsgeu.vx v0, v4, a0, v0.t, v2 # CHECK-INST: vmsltu.vx v2, v4, a0 @@ -425,8 +425,8 @@ vmsgeu.vx v0, v4, a0, v0.t, v2 # CHECK-ENCODING: [0x57,0x41,0x45,0x6a] # CHECK-ENCODING: [0x57,0x20,0x01,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 41 45 6a -# CHECK-UNKNOWN: 57 20 01 62 +# CHECK-UNKNOWN: 6a454157 +# CHECK-UNKNOWN: 62012057 vmsge.vx v0, v4, a0, v0.t, v2 # CHECK-INST: vmslt.vx v2, v4, a0 @@ -434,8 +434,8 @@ vmsge.vx v0, v4, a0, v0.t, v2 # CHECK-ENCODING: [0x57,0x41,0x45,0x6e] # CHECK-ENCODING: [0x57,0x20,0x01,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 41 45 6e -# CHECK-UNKNOWN: 57 20 01 62 +# CHECK-UNKNOWN: 6e454157 +# CHECK-UNKNOWN: 62012057 vmsgeu.vx v9, v4, a0, v0.t, v2 # CHECK-INST: vmsltu.vx v2, v4, a0 @@ -447,10 +447,10 @@ vmsgeu.vx v9, v4, a0, v0.t, v2 # CHECK-ENCODING: [0xd7,0x24,0x90,0x62] # CHECK-ENCODING: [0xd7,0xa4,0x24,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 41 45 6a -# CHECK-UNKNOWN: 57 21 01 62 -# CHECK-UNKNOWN: d7 24 90 62 -# CHECK-UNKNOWN: d7 a4 24 6a +# CHECK-UNKNOWN: 6a454157 +# CHECK-UNKNOWN: 62012157 +# CHECK-UNKNOWN: 629024d7 +# CHECK-UNKNOWN: 6a24a4d7 vmsge.vx v8, v4, a0, v0.t, v2 # CHECK-INST: vmslt.vx v2, v4, a0 @@ -462,7 +462,7 @@ vmsge.vx v8, v4, a0, v0.t, v2 # CHECK-ENCODING: [0x57,0x24,0x80,0x62] # CHECK-ENCODING: [0x57,0x24,0x24,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 41 45 6e -# CHECK-UNKNOWN: 57 21 01 62 -# CHECK-UNKNOWN: 57 24 80 62 -# CHECK-UNKNOWN: 57 24 24 6a +# CHECK-UNKNOWN: 6e454157 +# CHECK-UNKNOWN: 62012157 +# CHECK-UNKNOWN: 62802457 +# CHECK-UNKNOWN: 6a242457 diff --git a/llvm/test/MC/RISCV/rvv/convert.s b/llvm/test/MC/RISCV/rvv/convert.s index 28c0a0fa837e2..269c86cef4738 100644 --- a/llvm/test/MC/RISCV/rvv/convert.s +++ b/llvm/test/MC/RISCV/rvv/convert.s @@ -15,256 +15,256 @@ vfcvt.xu.f.v v8, v4, v0.t # CHECK-INST: vfcvt.xu.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x40,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 40 48 +# CHECK-UNKNOWN: 48401457 vfcvt.xu.f.v v8, v4 # CHECK-INST: vfcvt.xu.f.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x40,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 40 4a +# CHECK-UNKNOWN: 4a401457 vfcvt.x.f.v v8, v4, v0.t # CHECK-INST: vfcvt.x.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x40,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 40 48 +# CHECK-UNKNOWN: 48409457 vfcvt.x.f.v v8, v4 # CHECK-INST: vfcvt.x.f.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x40,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 40 4a +# CHECK-UNKNOWN: 4a409457 vfcvt.f.xu.v v8, v4, v0.t # CHECK-INST: vfcvt.f.xu.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x41,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 41 48 +# CHECK-UNKNOWN: 48411457 vfcvt.f.xu.v v8, v4 # CHECK-INST: vfcvt.f.xu.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x41,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 41 4a +# CHECK-UNKNOWN: 4a411457 vfcvt.f.x.v v8, v4, v0.t # CHECK-INST: vfcvt.f.x.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x41,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 41 48 +# CHECK-UNKNOWN: 48419457 vfcvt.f.x.v v8, v4 # CHECK-INST: vfcvt.f.x.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x41,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 41 4a +# CHECK-UNKNOWN: 4a419457 vfcvt.rtz.xu.f.v v8, v4, v0.t # CHECK-INST: vfcvt.rtz.xu.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x43,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 43 48 +# CHECK-UNKNOWN: 48431457 vfcvt.rtz.xu.f.v v8, v4 # CHECK-INST: vfcvt.rtz.xu.f.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x43,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 43 4a +# CHECK-UNKNOWN: 4a431457 vfcvt.rtz.x.f.v v8, v4, v0.t # CHECK-INST: vfcvt.rtz.x.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x43,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 43 48 +# CHECK-UNKNOWN: 48439457 vfcvt.rtz.x.f.v v8, v4 # CHECK-INST: vfcvt.rtz.x.f.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x43,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 43 4a +# CHECK-UNKNOWN: 4a439457 vfwcvt.xu.f.v v8, v4, v0.t # CHECK-INST: vfwcvt.xu.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x44,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 44 48 +# CHECK-UNKNOWN: 48441457 vfwcvt.xu.f.v v8, v4 # CHECK-INST: vfwcvt.xu.f.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x44,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 44 4a +# CHECK-UNKNOWN: 4a441457 vfwcvt.x.f.v v8, v4, v0.t # CHECK-INST: vfwcvt.x.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x44,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 44 48 +# CHECK-UNKNOWN: 48449457 vfwcvt.x.f.v v8, v4 # CHECK-INST: vfwcvt.x.f.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x44,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 44 4a +# CHECK-UNKNOWN: 4a449457 vfwcvt.f.xu.v v8, v4, v0.t # CHECK-INST: vfwcvt.f.xu.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x45,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 45 48 +# CHECK-UNKNOWN: 48451457 vfwcvt.f.xu.v v8, v4 # CHECK-INST: vfwcvt.f.xu.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x45,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 45 4a +# CHECK-UNKNOWN: 4a451457 vfwcvt.f.x.v v8, v4, v0.t # CHECK-INST: vfwcvt.f.x.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x45,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 45 48 +# CHECK-UNKNOWN: 48459457 vfwcvt.f.x.v v8, v4 # CHECK-INST: vfwcvt.f.x.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x45,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 45 4a +# CHECK-UNKNOWN: 4a459457 vfwcvt.f.f.v v8, v4, v0.t # CHECK-INST: vfwcvt.f.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x46,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 46 48 +# CHECK-UNKNOWN: 48461457 vfwcvt.f.f.v v8, v4 # CHECK-INST: vfwcvt.f.f.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x46,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 46 4a +# CHECK-UNKNOWN: 4a461457 vfwcvt.rtz.xu.f.v v8, v4, v0.t # CHECK-INST: vfwcvt.rtz.xu.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x47,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 47 48 +# CHECK-UNKNOWN: 48471457 vfwcvt.rtz.xu.f.v v8, v4 # CHECK-INST: vfwcvt.rtz.xu.f.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x47,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 47 4a +# CHECK-UNKNOWN: 4a471457 vfwcvt.rtz.x.f.v v8, v4, v0.t # CHECK-INST: vfwcvt.rtz.x.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x47,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 47 48 +# CHECK-UNKNOWN: 48479457 vfwcvt.rtz.x.f.v v8, v4 # CHECK-INST: vfwcvt.rtz.x.f.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x47,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 47 4a +# CHECK-UNKNOWN: 4a479457 vfncvt.xu.f.w v8, v4, v0.t # CHECK-INST: vfncvt.xu.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x48,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 48 48 +# CHECK-UNKNOWN: 48481457 vfncvt.xu.f.w v4, v4, v0.t # CHECK-INST: vfncvt.xu.f.w v4, v4, v0.t # CHECK-ENCODING: [0x57,0x12,0x48,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 12 48 48 +# CHECK-UNKNOWN: 48481257 vfncvt.xu.f.w v8, v4 # CHECK-INST: vfncvt.xu.f.w v8, v4 # CHECK-ENCODING: [0x57,0x14,0x48,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 48 4a +# CHECK-UNKNOWN: 4a481457 vfncvt.x.f.w v8, v4, v0.t # CHECK-INST: vfncvt.x.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x48,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 48 48 +# CHECK-UNKNOWN: 48489457 vfncvt.x.f.w v8, v4 # CHECK-INST: vfncvt.x.f.w v8, v4 # CHECK-ENCODING: [0x57,0x94,0x48,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 48 4a +# CHECK-UNKNOWN: 4a489457 vfncvt.f.xu.w v8, v4, v0.t # CHECK-INST: vfncvt.f.xu.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x49,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 49 48 +# CHECK-UNKNOWN: 48491457 vfncvt.f.xu.w v8, v4 # CHECK-INST: vfncvt.f.xu.w v8, v4 # CHECK-ENCODING: [0x57,0x14,0x49,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 49 4a +# CHECK-UNKNOWN: 4a491457 vfncvt.f.x.w v8, v4, v0.t # CHECK-INST: vfncvt.f.x.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x49,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 49 48 +# CHECK-UNKNOWN: 48499457 vfncvt.f.x.w v8, v4 # CHECK-INST: vfncvt.f.x.w v8, v4 # CHECK-ENCODING: [0x57,0x94,0x49,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 49 4a +# CHECK-UNKNOWN: 4a499457 vfncvt.f.f.w v8, v4, v0.t # CHECK-INST: vfncvt.f.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 48 +# CHECK-UNKNOWN: 484a1457 vfncvt.f.f.w v8, v4 # CHECK-INST: vfncvt.f.f.w v8, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 4a +# CHECK-UNKNOWN: 4a4a1457 vfncvt.rod.f.f.w v8, v4, v0.t # CHECK-INST: vfncvt.rod.f.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x4a,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 4a 48 +# CHECK-UNKNOWN: 484a9457 vfncvt.rod.f.f.w v8, v4 # CHECK-INST: vfncvt.rod.f.f.w v8, v4 # CHECK-ENCODING: [0x57,0x94,0x4a,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 4a 4a +# CHECK-UNKNOWN: 4a4a9457 vfncvt.rtz.xu.f.w v8, v4, v0.t # CHECK-INST: vfncvt.rtz.xu.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4b,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4b 48 +# CHECK-UNKNOWN: 484b1457 vfncvt.rtz.xu.f.w v8, v4 # CHECK-INST: vfncvt.rtz.xu.f.w v8, v4 # CHECK-ENCODING: [0x57,0x14,0x4b,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4b 4a +# CHECK-UNKNOWN: 4a4b1457 vfncvt.rtz.x.f.w v8, v4, v0.t # CHECK-INST: vfncvt.rtz.x.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x4b,0x48] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 4b 48 +# CHECK-UNKNOWN: 484b9457 vfncvt.rtz.x.f.w v8, v4 # CHECK-INST: vfncvt.rtz.x.f.w v8, v4 # CHECK-ENCODING: [0x57,0x94,0x4b,0x4a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 4b 4a +# CHECK-UNKNOWN: 4a4b9457 diff --git a/llvm/test/MC/RISCV/rvv/div.s b/llvm/test/MC/RISCV/rvv/div.s index 229124c671c60..aca04375f61ee 100644 --- a/llvm/test/MC/RISCV/rvv/div.s +++ b/llvm/test/MC/RISCV/rvv/div.s @@ -12,94 +12,94 @@ vdivu.vv v8, v4, v20, v0.t # CHECK-INST: vdivu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 80 +# CHECK-UNKNOWN: 804a2457 vdivu.vv v8, v4, v20 # CHECK-INST: vdivu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 82 +# CHECK-UNKNOWN: 824a2457 vdivu.vx v8, v4, a0, v0.t # CHECK-INST: vdivu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 80 +# CHECK-UNKNOWN: 80456457 vdivu.vx v8, v4, a0 # CHECK-INST: vdivu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 82 +# CHECK-UNKNOWN: 82456457 vdiv.vv v8, v4, v20, v0.t # CHECK-INST: vdiv.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 84 +# CHECK-UNKNOWN: 844a2457 vdiv.vv v8, v4, v20 # CHECK-INST: vdiv.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 86 +# CHECK-UNKNOWN: 864a2457 vdiv.vx v8, v4, a0, v0.t # CHECK-INST: vdiv.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 84 +# CHECK-UNKNOWN: 84456457 vdiv.vx v8, v4, a0 # CHECK-INST: vdiv.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 86 +# CHECK-UNKNOWN: 86456457 vremu.vv v8, v4, v20, v0.t # CHECK-INST: vremu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 88 +# CHECK-UNKNOWN: 884a2457 vremu.vv v8, v4, v20 # CHECK-INST: vremu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 8a +# CHECK-UNKNOWN: 8a4a2457 vremu.vx v8, v4, a0, v0.t # CHECK-INST: vremu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 88 +# CHECK-UNKNOWN: 88456457 vremu.vx v8, v4, a0 # CHECK-INST: vremu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 8a +# CHECK-UNKNOWN: 8a456457 vrem.vv v8, v4, v20, v0.t # CHECK-INST: vrem.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 8c +# CHECK-UNKNOWN: 8c4a2457 vrem.vv v8, v4, v20 # CHECK-INST: vrem.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 8e +# CHECK-UNKNOWN: 8e4a2457 vrem.vx v8, v4, a0, v0.t # CHECK-INST: vrem.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 8c +# CHECK-UNKNOWN: 8c456457 vrem.vx v8, v4, a0 # CHECK-INST: vrem.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 8e +# CHECK-UNKNOWN: 8e456457 diff --git a/llvm/test/MC/RISCV/rvv/ext.s b/llvm/test/MC/RISCV/rvv/ext.s index 80cadc0961040..3bf1351d77a78 100644 --- a/llvm/test/MC/RISCV/rvv/ext.s +++ b/llvm/test/MC/RISCV/rvv/ext.s @@ -12,70 +12,70 @@ vzext.vf2 v8, v4, v0.t # CHECK-INST: vzext.vf2 v8, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x43,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 43 48 +# CHECK-UNKNOWN: 48432457 vzext.vf2 v8, v4 # CHECK-INST: vzext.vf2 v8, v4 # CHECK-ENCODING: [0x57,0x24,0x43,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 43 4a +# CHECK-UNKNOWN: 4a432457 vsext.vf2 v8, v4, v0.t # CHECK-INST: vsext.vf2 v8, v4, v0.t # CHECK-ENCODING: [0x57,0xa4,0x43,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 43 48 +# CHECK-UNKNOWN: 4843a457 vsext.vf2 v8, v4 # CHECK-INST: vsext.vf2 v8, v4 # CHECK-ENCODING: [0x57,0xa4,0x43,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 43 4a +# CHECK-UNKNOWN: 4a43a457 vzext.vf4 v8, v4, v0.t # CHECK-INST: vzext.vf4 v8, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x42,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 42 48 +# CHECK-UNKNOWN: 48422457 vzext.vf4 v8, v4 # CHECK-INST: vzext.vf4 v8, v4 # CHECK-ENCODING: [0x57,0x24,0x42,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 42 4a +# CHECK-UNKNOWN: 4a422457 vsext.vf4 v8, v4, v0.t # CHECK-INST: vsext.vf4 v8, v4, v0.t # CHECK-ENCODING: [0x57,0xa4,0x42,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 42 48 +# CHECK-UNKNOWN: 4842a457 vsext.vf4 v8, v4 # CHECK-INST: vsext.vf4 v8, v4 # CHECK-ENCODING: [0x57,0xa4,0x42,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 42 4a +# CHECK-UNKNOWN: 4a42a457 vzext.vf8 v8, v4, v0.t # CHECK-INST: vzext.vf8 v8, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x41,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 41 48 +# CHECK-UNKNOWN: 48412457 vzext.vf8 v8, v4 # CHECK-INST: vzext.vf8 v8, v4 # CHECK-ENCODING: [0x57,0x24,0x41,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 41 4a +# CHECK-UNKNOWN: 4a412457 vsext.vf8 v8, v4, v0.t # CHECK-INST: vsext.vf8 v8, v4, v0.t # CHECK-ENCODING: [0x57,0xa4,0x41,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 41 48 +# CHECK-UNKNOWN: 4841a457 vsext.vf8 v8, v4 # CHECK-INST: vsext.vf8 v8, v4 # CHECK-ENCODING: [0x57,0xa4,0x41,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 41 4a +# CHECK-UNKNOWN: 4a41a457 diff --git a/llvm/test/MC/RISCV/rvv/fadd.s b/llvm/test/MC/RISCV/rvv/fadd.s index 60ffaf62ca6ba..890b2c0ad68bc 100644 --- a/llvm/test/MC/RISCV/rvv/fadd.s +++ b/llvm/test/MC/RISCV/rvv/fadd.s @@ -15,70 +15,70 @@ vfadd.vv v8, v4, v20, v0.t # CHECK-INST: vfadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x00] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 00 +# CHECK-UNKNOWN: 004a1457 vfadd.vv v8, v4, v20 # CHECK-INST: vfadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x02] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 02 +# CHECK-UNKNOWN: 024a1457 vfadd.vf v8, v4, fa0, v0.t # CHECK-INST: vfadd.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x00] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 00 +# CHECK-UNKNOWN: 00455457 vfadd.vf v8, v4, fa0 # CHECK-INST: vfadd.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x02] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 02 +# CHECK-UNKNOWN: 02455457 vfwadd.vv v8, v4, v20, v0.t # CHECK-INST: vfwadd.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xc0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a c0 +# CHECK-UNKNOWN: c04a1457 vfwadd.vv v8, v4, v20 # CHECK-INST: vfwadd.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xc2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a c2 +# CHECK-UNKNOWN: c24a1457 vfwadd.vf v8, v4, fa0, v0.t # CHECK-INST: vfwadd.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xc0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 c0 +# CHECK-UNKNOWN: c0455457 vfwadd.vf v8, v4, fa0 # CHECK-INST: vfwadd.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0xc2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 c2 +# CHECK-UNKNOWN: c2455457 vfwadd.wv v8, v4, v20, v0.t # CHECK-INST: vfwadd.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xd0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a d0 +# CHECK-UNKNOWN: d04a1457 vfwadd.wv v8, v4, v20 # CHECK-INST: vfwadd.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xd2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a d2 +# CHECK-UNKNOWN: d24a1457 vfwadd.wf v8, v4, fa0, v0.t # CHECK-INST: vfwadd.wf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xd0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 d0 +# CHECK-UNKNOWN: d0455457 vfwadd.wf v8, v4, fa0 # CHECK-INST: vfwadd.wf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0xd2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 d2 +# CHECK-UNKNOWN: d2455457 diff --git a/llvm/test/MC/RISCV/rvv/fcompare.s b/llvm/test/MC/RISCV/rvv/fcompare.s index 11dd7e05467b4..3903bbdab6500 100644 --- a/llvm/test/MC/RISCV/rvv/fcompare.s +++ b/llvm/test/MC/RISCV/rvv/fcompare.s @@ -15,148 +15,148 @@ vmfeq.vv v8, v4, v20, v0.t # CHECK-INST: vmfeq.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x60] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 60 +# CHECK-UNKNOWN: 604a1457 vmfeq.vv v8, v4, v20 # CHECK-INST: vmfeq.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x62] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 62 +# CHECK-UNKNOWN: 624a1457 vmfeq.vf v8, v4, fa0, v0.t # CHECK-INST: vmfeq.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x60] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 60 +# CHECK-UNKNOWN: 60455457 vmfeq.vf v8, v4, fa0 # CHECK-INST: vmfeq.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x62] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 62 +# CHECK-UNKNOWN: 62455457 vmfne.vv v8, v4, v20, v0.t # CHECK-INST: vmfne.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x70] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 70 +# CHECK-UNKNOWN: 704a1457 vmfne.vv v8, v4, v20 # CHECK-INST: vmfne.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x72] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 72 +# CHECK-UNKNOWN: 724a1457 vmfne.vf v8, v4, fa0, v0.t # CHECK-INST: vmfne.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x70] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 70 +# CHECK-UNKNOWN: 70455457 vmfne.vf v8, v4, fa0 # CHECK-INST: vmfne.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x72] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 72 +# CHECK-UNKNOWN: 72455457 vmflt.vv v8, v4, v20, v0.t # CHECK-INST: vmflt.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x6c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 6c +# CHECK-UNKNOWN: 6c4a1457 vmflt.vv v8, v4, v20 # CHECK-INST: vmflt.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x6e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 6e +# CHECK-UNKNOWN: 6e4a1457 vmflt.vf v8, v4, fa0, v0.t # CHECK-INST: vmflt.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 6c +# CHECK-UNKNOWN: 6c455457 vmflt.vf v8, v4, fa0 # CHECK-INST: vmflt.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 6e +# CHECK-UNKNOWN: 6e455457 vmfle.vv v8, v4, v20, v0.t # CHECK-INST: vmfle.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x64] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 64 +# CHECK-UNKNOWN: 644a1457 vmfle.vv v8, v4, v20 # CHECK-INST: vmfle.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x66] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 66 +# CHECK-UNKNOWN: 664a1457 vmfle.vf v8, v4, fa0, v0.t # CHECK-INST: vmfle.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 64 +# CHECK-UNKNOWN: 64455457 vmfle.vf v8, v4, fa0 # CHECK-INST: vmfle.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 66 +# CHECK-UNKNOWN: 66455457 vmfgt.vf v8, v4, fa0, v0.t # CHECK-INST: vmfgt.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x74] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 74 +# CHECK-UNKNOWN: 74455457 vmfgt.vf v8, v4, fa0 # CHECK-INST: vmfgt.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x76] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 76 +# CHECK-UNKNOWN: 76455457 vmfge.vf v8, v4, fa0, v0.t # CHECK-INST: vmfge.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x7c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 7c +# CHECK-UNKNOWN: 7c455457 vmfge.vf v8, v4, fa0 # CHECK-INST: vmfge.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x7e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 7e +# CHECK-UNKNOWN: 7e455457 vmfgt.vv v8, v20, v4, v0.t # CHECK-INST: vmflt.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x6c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 6c +# CHECK-UNKNOWN: 6c4a1457 vmfgt.vv v8, v20, v4 # CHECK-INST: vmflt.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x6e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 6e +# CHECK-UNKNOWN: 6e4a1457 vmfge.vv v8, v20, v4, v0.t # CHECK-INST: vmfle.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x64] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 64 +# CHECK-UNKNOWN: 644a1457 vmfge.vv v8, v20, v4 # CHECK-INST: vmfle.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x66] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 66 +# CHECK-UNKNOWN: 664a1457 vmfeq.vv v0, v4, v20, v0.t # CHECK-INST: vmfeq.vv v0, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x10,0x4a,0x60] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 10 4a 60 +# CHECK-UNKNOWN: 604a1057 diff --git a/llvm/test/MC/RISCV/rvv/fdiv.s b/llvm/test/MC/RISCV/rvv/fdiv.s index 7eb048f3cd584..aa3aae5841a22 100644 --- a/llvm/test/MC/RISCV/rvv/fdiv.s +++ b/llvm/test/MC/RISCV/rvv/fdiv.s @@ -15,34 +15,34 @@ vfdiv.vv v8, v4, v20, v0.t # CHECK-INST: vfdiv.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x80] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 80 +# CHECK-UNKNOWN: 804a1457 vfdiv.vv v8, v4, v20 # CHECK-INST: vfdiv.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x82] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 82 +# CHECK-UNKNOWN: 824a1457 vfdiv.vf v8, v4, fa0, v0.t # CHECK-INST: vfdiv.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x80] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 80 +# CHECK-UNKNOWN: 80455457 vfdiv.vf v8, v4, fa0 # CHECK-INST: vfdiv.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x82] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 82 +# CHECK-UNKNOWN: 82455457 vfrdiv.vf v8, v4, fa0, v0.t # CHECK-INST: vfrdiv.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 84 +# CHECK-UNKNOWN: 84455457 vfrdiv.vf v8, v4, fa0 # CHECK-INST: vfrdiv.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 86 +# CHECK-UNKNOWN: 86455457 diff --git a/llvm/test/MC/RISCV/rvv/fmacc.s b/llvm/test/MC/RISCV/rvv/fmacc.s index 129455901b934..8ca43da809617 100644 --- a/llvm/test/MC/RISCV/rvv/fmacc.s +++ b/llvm/test/MC/RISCV/rvv/fmacc.s @@ -15,286 +15,286 @@ vfmacc.vv v8, v20, v4, v0.t # CHECK-INST: vfmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xb0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a b0 +# CHECK-UNKNOWN: b04a1457 vfmacc.vv v8, v20, v4 # CHECK-INST: vfmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xb2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a b2 +# CHECK-UNKNOWN: b24a1457 vfmacc.vf v8, fa0, v4, v0.t # CHECK-INST: vfmacc.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xb0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 b0 +# CHECK-UNKNOWN: b0455457 vfmacc.vf v8, fa0, v4 # CHECK-INST: vfmacc.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xb2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 b2 +# CHECK-UNKNOWN: b2455457 vfnmacc.vv v8, v20, v4, v0.t # CHECK-INST: vfnmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xb4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a b4 +# CHECK-UNKNOWN: b44a1457 vfnmacc.vv v8, v20, v4 # CHECK-INST: vfnmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xb6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a b6 +# CHECK-UNKNOWN: b64a1457 vfnmacc.vf v8, fa0, v4, v0.t # CHECK-INST: vfnmacc.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xb4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 b4 +# CHECK-UNKNOWN: b4455457 vfnmacc.vf v8, fa0, v4 # CHECK-INST: vfnmacc.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xb6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 b6 +# CHECK-UNKNOWN: b6455457 vfmsac.vv v8, v20, v4, v0.t # CHECK-INST: vfmsac.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xb8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a b8 +# CHECK-UNKNOWN: b84a1457 vfmsac.vv v8, v20, v4 # CHECK-INST: vfmsac.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xba] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a ba +# CHECK-UNKNOWN: ba4a1457 vfmsac.vf v8, fa0, v4, v0.t # CHECK-INST: vfmsac.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xb8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 b8 +# CHECK-UNKNOWN: b8455457 vfmsac.vf v8, fa0, v4 # CHECK-INST: vfmsac.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xba] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 ba +# CHECK-UNKNOWN: ba455457 vfnmsac.vv v8, v20, v4, v0.t # CHECK-INST: vfnmsac.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xbc] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a bc +# CHECK-UNKNOWN: bc4a1457 vfnmsac.vv v8, v20, v4 # CHECK-INST: vfnmsac.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xbe] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a be +# CHECK-UNKNOWN: be4a1457 vfnmsac.vf v8, fa0, v4, v0.t # CHECK-INST: vfnmsac.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xbc] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 bc +# CHECK-UNKNOWN: bc455457 vfnmsac.vf v8, fa0, v4 # CHECK-INST: vfnmsac.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xbe] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 be +# CHECK-UNKNOWN: be455457 vfmadd.vv v8, v20, v4, v0.t # CHECK-INST: vfmadd.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xa0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a a0 +# CHECK-UNKNOWN: a04a1457 vfmadd.vv v8, v20, v4 # CHECK-INST: vfmadd.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xa2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a a2 +# CHECK-UNKNOWN: a24a1457 vfmadd.vf v8, fa0, v4, v0.t # CHECK-INST: vfmadd.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xa0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 a0 +# CHECK-UNKNOWN: a0455457 vfmadd.vf v8, fa0, v4 # CHECK-INST: vfmadd.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xa2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 a2 +# CHECK-UNKNOWN: a2455457 vfnmadd.vv v8, v20, v4, v0.t # CHECK-INST: vfnmadd.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xa4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a a4 +# CHECK-UNKNOWN: a44a1457 vfnmadd.vv v8, v20, v4 # CHECK-INST: vfnmadd.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xa6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a a6 +# CHECK-UNKNOWN: a64a1457 vfnmadd.vf v8, fa0, v4, v0.t # CHECK-INST: vfnmadd.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 a4 +# CHECK-UNKNOWN: a4455457 vfnmadd.vf v8, fa0, v4 # CHECK-INST: vfnmadd.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 a6 +# CHECK-UNKNOWN: a6455457 vfmsub.vv v8, v20, v4, v0.t # CHECK-INST: vfmsub.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xa8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a a8 +# CHECK-UNKNOWN: a84a1457 vfmsub.vv v8, v20, v4 # CHECK-INST: vfmsub.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xaa] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a aa +# CHECK-UNKNOWN: aa4a1457 vfmsub.vf v8, fa0, v4, v0.t # CHECK-INST: vfmsub.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xa8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 a8 +# CHECK-UNKNOWN: a8455457 vfmsub.vf v8, fa0, v4 # CHECK-INST: vfmsub.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xaa] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 aa +# CHECK-UNKNOWN: aa455457 vfnmsub.vv v8, v20, v4, v0.t # CHECK-INST: vfnmsub.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xac] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a ac +# CHECK-UNKNOWN: ac4a1457 vfnmsub.vv v8, v20, v4 # CHECK-INST: vfnmsub.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xae] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a ae +# CHECK-UNKNOWN: ae4a1457 vfnmsub.vf v8, fa0, v4, v0.t # CHECK-INST: vfnmsub.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 ac +# CHECK-UNKNOWN: ac455457 vfnmsub.vf v8, fa0, v4 # CHECK-INST: vfnmsub.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 ae +# CHECK-UNKNOWN: ae455457 vfwmacc.vv v8, v20, v4, v0.t # CHECK-INST: vfwmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xf0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a f0 +# CHECK-UNKNOWN: f04a1457 vfwmacc.vv v8, v20, v4 # CHECK-INST: vfwmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xf2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a f2 +# CHECK-UNKNOWN: f24a1457 vfwmacc.vf v8, fa0, v4, v0.t # CHECK-INST: vfwmacc.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xf0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 f0 +# CHECK-UNKNOWN: f0455457 vfwmacc.vf v8, fa0, v4 # CHECK-INST: vfwmacc.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xf2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 f2 +# CHECK-UNKNOWN: f2455457 vfwnmacc.vv v8, v20, v4, v0.t # CHECK-INST: vfwnmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xf4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a f4 +# CHECK-UNKNOWN: f44a1457 vfwnmacc.vv v8, v20, v4 # CHECK-INST: vfwnmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xf6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a f6 +# CHECK-UNKNOWN: f64a1457 vfwnmacc.vf v8, fa0, v4, v0.t # CHECK-INST: vfwnmacc.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xf4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 f4 +# CHECK-UNKNOWN: f4455457 vfwnmacc.vf v8, fa0, v4 # CHECK-INST: vfwnmacc.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xf6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 f6 +# CHECK-UNKNOWN: f6455457 vfwmsac.vv v8, v20, v4, v0.t # CHECK-INST: vfwmsac.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xf8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a f8 +# CHECK-UNKNOWN: f84a1457 vfwmsac.vv v8, v20, v4 # CHECK-INST: vfwmsac.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xfa] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a fa +# CHECK-UNKNOWN: fa4a1457 vfwmsac.vf v8, fa0, v4, v0.t # CHECK-INST: vfwmsac.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xf8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 f8 +# CHECK-UNKNOWN: f8455457 vfwmsac.vf v8, fa0, v4 # CHECK-INST: vfwmsac.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xfa] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 fa +# CHECK-UNKNOWN: fa455457 vfwnmsac.vv v8, v20, v4, v0.t # CHECK-INST: vfwnmsac.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xfc] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a fc +# CHECK-UNKNOWN: fc4a1457 vfwnmsac.vv v8, v20, v4 # CHECK-INST: vfwnmsac.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xfe] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a fe +# CHECK-UNKNOWN: fe4a1457 vfwnmsac.vf v8, fa0, v4, v0.t # CHECK-INST: vfwnmsac.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xfc] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 fc +# CHECK-UNKNOWN: fc455457 vfwnmsac.vf v8, fa0, v4 # CHECK-INST: vfwnmsac.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xfe] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 fe +# CHECK-UNKNOWN: fe455457 diff --git a/llvm/test/MC/RISCV/rvv/fminmax.s b/llvm/test/MC/RISCV/rvv/fminmax.s index c8aab38e1fc8b..f7e85ed31c33d 100644 --- a/llvm/test/MC/RISCV/rvv/fminmax.s +++ b/llvm/test/MC/RISCV/rvv/fminmax.s @@ -15,46 +15,46 @@ vfmin.vv v8, v4, v20, v0.t # CHECK-INST: vfmin.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x10] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 10 +# CHECK-UNKNOWN: 104a1457 vfmin.vv v8, v4, v20 # CHECK-INST: vfmin.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x12] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 12 +# CHECK-UNKNOWN: 124a1457 vfmin.vf v8, v4, fa0, v0.t # CHECK-INST: vfmin.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x10] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 10 +# CHECK-UNKNOWN: 10455457 vfmin.vf v8, v4, fa0 # CHECK-INST: vfmin.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x12] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 12 +# CHECK-UNKNOWN: 12455457 vfmax.vv v8, v4, v20, v0.t # CHECK-INST: vfmax.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x18] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 18 +# CHECK-UNKNOWN: 184a1457 vfmax.vv v8, v4, v20 # CHECK-INST: vfmax.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x1a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 1a +# CHECK-UNKNOWN: 1a4a1457 vfmax.vf v8, v4, fa0, v0.t # CHECK-INST: vfmax.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x18] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 18 +# CHECK-UNKNOWN: 18455457 vfmax.vf v8, v4, fa0 # CHECK-INST: vfmax.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x1a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 1a +# CHECK-UNKNOWN: 1a455457 diff --git a/llvm/test/MC/RISCV/rvv/fmul.s b/llvm/test/MC/RISCV/rvv/fmul.s index 42c37932043cb..9cd6e52877504 100644 --- a/llvm/test/MC/RISCV/rvv/fmul.s +++ b/llvm/test/MC/RISCV/rvv/fmul.s @@ -15,46 +15,46 @@ vfmul.vv v8, v4, v20, v0.t # CHECK-INST: vfmul.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x90] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 90 +# CHECK-UNKNOWN: 904a1457 vfmul.vv v8, v4, v20 # CHECK-INST: vfmul.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x92] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 92 +# CHECK-UNKNOWN: 924a1457 vfmul.vf v8, v4, fa0, v0.t # CHECK-INST: vfmul.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x90] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 90 +# CHECK-UNKNOWN: 90455457 vfmul.vf v8, v4, fa0 # CHECK-INST: vfmul.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x92] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 92 +# CHECK-UNKNOWN: 92455457 vfwmul.vv v8, v4, v20, v0.t # CHECK-INST: vfwmul.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xe0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a e0 +# CHECK-UNKNOWN: e04a1457 vfwmul.vv v8, v4, v20 # CHECK-INST: vfwmul.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xe2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a e2 +# CHECK-UNKNOWN: e24a1457 vfwmul.vf v8, v4, fa0, v0.t # CHECK-INST: vfwmul.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xe0] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 e0 +# CHECK-UNKNOWN: e0455457 vfwmul.vf v8, v4, fa0 # CHECK-INST: vfwmul.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0xe2] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 e2 +# CHECK-UNKNOWN: e2455457 diff --git a/llvm/test/MC/RISCV/rvv/fmv.s b/llvm/test/MC/RISCV/rvv/fmv.s index a5b814f130fbf..2534b5171b3e7 100644 --- a/llvm/test/MC/RISCV/rvv/fmv.s +++ b/llvm/test/MC/RISCV/rvv/fmv.s @@ -15,16 +15,16 @@ vfmv.v.f v8, fa0 # CHECK-INST: vfmv.v.f v8, fa0 # CHECK-ENCODING: [0x57,0x54,0x05,0x5e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 05 5e +# CHECK-UNKNOWN: 5e055457 vfmv.f.s fa0, v4 # CHECK-INST: vfmv.f.s fa0, v4 # CHECK-ENCODING: [0x57,0x15,0x40,0x42] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 15 40 42 +# CHECK-UNKNOWN: 42401557 vfmv.s.f v8, fa0 # CHECK-INST: vfmv.s.f v8, fa0 # CHECK-ENCODING: [0x57,0x54,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 05 42 +# CHECK-UNKNOWN: 42055457 diff --git a/llvm/test/MC/RISCV/rvv/fothers.s b/llvm/test/MC/RISCV/rvv/fothers.s index 451f6ca39ccc0..997115f96bd9d 100644 --- a/llvm/test/MC/RISCV/rvv/fothers.s +++ b/llvm/test/MC/RISCV/rvv/fothers.s @@ -13,76 +13,76 @@ vfsqrt.v v8, v4, v0.t # CHECK-INST: vfsqrt.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x40,0x4c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 40 4c +# CHECK-UNKNOWN: 4c401457 vfsqrt.v v8, v4 # CHECK-INST: vfsqrt.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x40,0x4e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 40 4e +# CHECK-UNKNOWN: 4e401457 vfrsqrt7.v v8, v4, v0.t # CHECK-INST: vfrsqrt7.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x42,0x4c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 42 4c +# CHECK-UNKNOWN: 4c421457 vfrsqrt7.v v8, v4 # CHECK-INST: vfrsqrt7.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x42,0x4e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 42 4e +# CHECK-UNKNOWN: 4e421457 vfrec7.v v8, v4, v0.t # CHECK-INST: vfrec7.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x42,0x4c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 42 4c +# CHECK-UNKNOWN: 4c429457 vfrec7.v v8, v4 # CHECK-INST: vfrec7.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x42,0x4e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 94 42 4e +# CHECK-UNKNOWN: 4e429457 vfclass.v v8, v4, v0.t # CHECK-INST: vfclass.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x48,0x4c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 48 4c +# CHECK-UNKNOWN: 4c481457 vfclass.v v8, v4 # CHECK-INST: vfclass.v v8, v4 # CHECK-ENCODING: [0x57,0x14,0x48,0x4e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 48 4e +# CHECK-UNKNOWN: 4e481457 vfmerge.vfm v8, v4, fa0, v0 # CHECK-INST: vfmerge.vfm v8, v4, fa0, v0 # CHECK-ENCODING: [0x57,0x54,0x45,0x5c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 5c +# CHECK-UNKNOWN: 5c455457 vfslide1up.vf v8, v4, fa0, v0.t # CHECK-INST: vfslide1up.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x38] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 38 +# CHECK-UNKNOWN: 38455457 vfslide1up.vf v8, v4, fa0 # CHECK-INST: vfslide1up.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x3a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 3a +# CHECK-UNKNOWN: 3a455457 vfslide1down.vf v8, v4, fa0, v0.t # CHECK-INST: vfslide1down.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x3c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 3c +# CHECK-UNKNOWN: 3c455457 vfslide1down.vf v8, v4, fa0 # CHECK-INST: vfslide1down.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x3e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 3e +# CHECK-UNKNOWN: 3e455457 diff --git a/llvm/test/MC/RISCV/rvv/freduction.s b/llvm/test/MC/RISCV/rvv/freduction.s index fca64372b15f2..12326942e6e88 100644 --- a/llvm/test/MC/RISCV/rvv/freduction.s +++ b/llvm/test/MC/RISCV/rvv/freduction.s @@ -15,76 +15,76 @@ vfredosum.vs v8, v4, v20, v0.t # CHECK-INST: vfredosum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x0c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 0c +# CHECK-UNKNOWN: 0c4a1457 vfredosum.vs v8, v4, v20 # CHECK-INST: vfredosum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x0e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 0e +# CHECK-UNKNOWN: 0e4a1457 vfredusum.vs v8, v4, v20, v0.t # CHECK-INST: vfredusum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x04] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 04 +# CHECK-UNKNOWN: 044a1457 vfredusum.vs v8, v4, v20 # CHECK-INST: vfredusum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x06] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 06 +# CHECK-UNKNOWN: 064a1457 vfredmax.vs v8, v4, v20, v0.t # CHECK-INST: vfredmax.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x1c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 1c +# CHECK-UNKNOWN: 1c4a1457 vfredmax.vs v8, v4, v20 # CHECK-INST: vfredmax.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x1e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 1e +# CHECK-UNKNOWN: 1e4a1457 vfredmin.vs v8, v4, v20, v0.t # CHECK-INST: vfredmin.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x14] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 14 +# CHECK-UNKNOWN: 144a1457 vfredmin.vs v8, v4, v20 # CHECK-INST: vfredmin.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x16] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 16 +# CHECK-UNKNOWN: 164a1457 vfwredosum.vs v8, v4, v20, v0.t # CHECK-INST: vfwredosum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xcc] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a cc +# CHECK-UNKNOWN: cc4a1457 vfwredosum.vs v8, v4, v20 # CHECK-INST: vfwredosum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xce] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a ce +# CHECK-UNKNOWN: ce4a1457 vfwredusum.vs v8, v4, v20, v0.t # CHECK-INST: vfwredusum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xc4] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a c4 +# CHECK-UNKNOWN: c44a1457 vfwredusum.vs v8, v4, v20 # CHECK-INST: vfwredusum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xc6] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a c6 +# CHECK-UNKNOWN: c64a1457 vfredosum.vs v0, v4, v20, v0.t # CHECK-INST: vfredosum.vs v0, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x10,0x4a,0x0c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 10 4a 0c +# CHECK-UNKNOWN: 0c4a1057 diff --git a/llvm/test/MC/RISCV/rvv/fsub.s b/llvm/test/MC/RISCV/rvv/fsub.s index a8f2bc6260b9e..62ff2e744c783 100644 --- a/llvm/test/MC/RISCV/rvv/fsub.s +++ b/llvm/test/MC/RISCV/rvv/fsub.s @@ -15,82 +15,82 @@ vfsub.vv v8, v4, v20, v0.t # CHECK-INST: vfsub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x08] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 08 +# CHECK-UNKNOWN: 084a1457 vfsub.vv v8, v4, v20 # CHECK-INST: vfsub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x0a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 0a +# CHECK-UNKNOWN: 0a4a1457 vfsub.vf v8, v4, fa0, v0.t # CHECK-INST: vfsub.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x08] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 08 +# CHECK-UNKNOWN: 08455457 vfsub.vf v8, v4, fa0 # CHECK-INST: vfsub.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x0a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 0a +# CHECK-UNKNOWN: 0a455457 vfrsub.vf v8, v4, fa0, v0.t # CHECK-INST: vfrsub.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x9c] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 9c +# CHECK-UNKNOWN: 9c455457 vfrsub.vf v8, v4, fa0 # CHECK-INST: vfrsub.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x9e] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 9e +# CHECK-UNKNOWN: 9e455457 vfwsub.vv v8, v4, v20, v0.t # CHECK-INST: vfwsub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xc8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a c8 +# CHECK-UNKNOWN: c84a1457 vfwsub.vv v8, v4, v20 # CHECK-INST: vfwsub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xca] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a ca +# CHECK-UNKNOWN: ca4a1457 vfwsub.vf v8, v4, fa0, v0.t # CHECK-INST: vfwsub.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xc8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 c8 +# CHECK-UNKNOWN: c8455457 vfwsub.vf v8, v4, fa0 # CHECK-INST: vfwsub.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0xca] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 ca +# CHECK-UNKNOWN: ca455457 vfwsub.wv v8, v4, v20, v0.t # CHECK-INST: vfwsub.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xd8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a d8 +# CHECK-UNKNOWN: d84a1457 vfwsub.wv v8, v4, v20 # CHECK-INST: vfwsub.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0xda] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a da +# CHECK-UNKNOWN: da4a1457 vfwsub.wf v8, v4, fa0, v0.t # CHECK-INST: vfwsub.wf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xd8] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 d8 +# CHECK-UNKNOWN: d8455457 vfwsub.wf v8, v4, fa0 # CHECK-INST: vfwsub.wf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0xda] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 da +# CHECK-UNKNOWN: da455457 diff --git a/llvm/test/MC/RISCV/rvv/load.s b/llvm/test/MC/RISCV/rvv/load.s index 23357df88d3fe..3c251a3a8d75b 100644 --- a/llvm/test/MC/RISCV/rvv/load.s +++ b/llvm/test/MC/RISCV/rvv/load.s @@ -12,382 +12,382 @@ vlm.v v0, (a0) # CHECK-INST: vlm.v v0, (a0) # CHECK-ENCODING: [0x07,0x00,0xb5,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 00 b5 02 +# CHECK-UNKNOWN: 02b50007 vlm.v v8, (a0) # CHECK-INST: vlm.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0xb5,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 02 +# CHECK-UNKNOWN: 02b50407 vle8.v v8, (a0), v0.t # CHECK-INST: vle8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 00 +# CHECK-UNKNOWN: 00050407 vle8.v v8, (a0) # CHECK-INST: vle8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 02 +# CHECK-UNKNOWN: 02050407 vle16.v v8, (a0), v0.t # CHECK-INST: vle16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 00 +# CHECK-UNKNOWN: 00055407 vle16.v v8, (a0) # CHECK-INST: vle16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 02 +# CHECK-UNKNOWN: 02055407 vle32.v v8, (a0), v0.t # CHECK-INST: vle32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 00 +# CHECK-UNKNOWN: 00056407 vle32.v v8, (a0) # CHECK-INST: vle32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 02 +# CHECK-UNKNOWN: 02056407 vle64.v v8, (a0), v0.t # CHECK-INST: vle64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 00 +# CHECK-UNKNOWN: 00057407 vle64.v v8, (a0) # CHECK-INST: vle64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 02 +# CHECK-UNKNOWN: 02057407 vle8ff.v v8, (a0), v0.t # CHECK-INST: vle8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 01 +# CHECK-UNKNOWN: 01050407 vle8ff.v v8, (a0) # CHECK-INST: vle8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x03] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 03 +# CHECK-UNKNOWN: 03050407 vle16ff.v v8, (a0), v0.t # CHECK-INST: vle16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 01 +# CHECK-UNKNOWN: 01055407 vle16ff.v v8, (a0) # CHECK-INST: vle16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x03] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 03 +# CHECK-UNKNOWN: 03055407 vle32ff.v v8, (a0), v0.t # CHECK-INST: vle32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 01 +# CHECK-UNKNOWN: 01056407 vle32ff.v v8, (a0) # CHECK-INST: vle32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x03] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 03 +# CHECK-UNKNOWN: 03056407 vle64ff.v v8, (a0), v0.t # CHECK-INST: vle64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 01 +# CHECK-UNKNOWN: 01057407 vle64ff.v v8, (a0) # CHECK-INST: vle64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x03] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 03 +# CHECK-UNKNOWN: 03057407 vlse8.v v8, (a0), a1, v0.t # CHECK-INST: vlse8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 08 +# CHECK-UNKNOWN: 08b50407 vlse8.v v8, (a0), a1 # CHECK-INST: vlse8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 0a +# CHECK-UNKNOWN: 0ab50407 vlse16.v v8, (a0), a1, v0.t # CHECK-INST: vlse16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 08 +# CHECK-UNKNOWN: 08b55407 vlse16.v v8, (a0), a1 # CHECK-INST: vlse16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 0a +# CHECK-UNKNOWN: 0ab55407 vlse32.v v8, (a0), a1, v0.t # CHECK-INST: vlse32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 08 +# CHECK-UNKNOWN: 08b56407 vlse32.v v8, (a0), a1 # CHECK-INST: vlse32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 0a +# CHECK-UNKNOWN: 0ab56407 vlse64.v v8, (a0), a1, v0.t # CHECK-INST: vlse64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 08 +# CHECK-UNKNOWN: 08b57407 vlse64.v v8, (a0), a1 # CHECK-INST: vlse64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 0a +# CHECK-UNKNOWN: 0ab57407 vluxei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 04 +# CHECK-UNKNOWN: 04450407 vluxei8.v v8, (a0), v4 # CHECK-INST: vluxei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 06 +# CHECK-UNKNOWN: 06450407 vluxei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 04 +# CHECK-UNKNOWN: 04455407 vluxei16.v v8, (a0), v4 # CHECK-INST: vluxei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 06 +# CHECK-UNKNOWN: 06455407 vluxei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 04 +# CHECK-UNKNOWN: 04456407 vluxei32.v v8, (a0), v4 # CHECK-INST: vluxei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 06 +# CHECK-UNKNOWN: 06456407 vluxei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 04 +# CHECK-UNKNOWN: 04457407 vluxei64.v v8, (a0), v4 # CHECK-INST: vluxei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 06 +# CHECK-UNKNOWN: 06457407 vloxei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 0c +# CHECK-UNKNOWN: 0c450407 vloxei8.v v8, (a0), v4 # CHECK-INST: vloxei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 0e +# CHECK-UNKNOWN: 0e450407 vloxei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 0c +# CHECK-UNKNOWN: 0c455407 vloxei16.v v8, (a0), v4 # CHECK-INST: vloxei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 0e +# CHECK-UNKNOWN: 0e455407 vloxei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 0c +# CHECK-UNKNOWN: 0c456407 vloxei32.v v8, (a0), v4 # CHECK-INST: vloxei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 0e +# CHECK-UNKNOWN: 0e456407 vloxei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 0c +# CHECK-UNKNOWN: 0c457407 vloxei64.v v8, (a0), v4 # CHECK-INST: vloxei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 0e +# CHECK-UNKNOWN: 0e457407 vl1re8.v v8, (a0) # CHECK-INST: vl1re8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x85,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 85 02 +# CHECK-UNKNOWN: 02850407 vl1re16.v v8, (a0) # CHECK-INST: vl1re16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x85,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 85 02 +# CHECK-UNKNOWN: 02855407 vl1re32.v v8, (a0) # CHECK-INST: vl1re32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x85,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 85 02 +# CHECK-UNKNOWN: 02856407 vl1re64.v v8, (a0) # CHECK-INST: vl1re64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x85,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 85 02 +# CHECK-UNKNOWN: 02857407 vl2re8.v v8, (a0) # CHECK-INST: vl2re8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x85,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 85 22 +# CHECK-UNKNOWN: 22850407 vl2re16.v v8, (a0) # CHECK-INST: vl2re16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x85,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 85 22 +# CHECK-UNKNOWN: 22855407 vl2re32.v v8, (a0) # CHECK-INST: vl2re32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x85,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 85 22 +# CHECK-UNKNOWN: 22856407 vl2re64.v v8, (a0) # CHECK-INST: vl2re64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x85,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 85 22 +# CHECK-UNKNOWN: 22857407 vl4re8.v v8, (a0) # CHECK-INST: vl4re8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x85,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 85 62 +# CHECK-UNKNOWN: 62850407 vl4re16.v v8, (a0) # CHECK-INST: vl4re16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x85,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 85 62 +# CHECK-UNKNOWN: 62855407 vl4re32.v v8, (a0) # CHECK-INST: vl4re32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x85,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 85 62 +# CHECK-UNKNOWN: 62856407 vl4re64.v v8, (a0) # CHECK-INST: vl4re64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x85,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 85 62 +# CHECK-UNKNOWN: 62857407 vl8re8.v v8, (a0) # CHECK-INST: vl8re8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x85,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 85 e2 +# CHECK-UNKNOWN: e2850407 vl8re16.v v8, (a0) # CHECK-INST: vl8re16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x85,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 85 e2 +# CHECK-UNKNOWN: e2855407 vl8re32.v v8, (a0) # CHECK-INST: vl8re32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x85,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 85 e2 +# CHECK-UNKNOWN: e2856407 vl8re64.v v8, (a0) # CHECK-INST: vl8re64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x85,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 85 e2 +# CHECK-UNKNOWN: e2857407 vlm.v v0, 0(a0) # CHECK-INST: vlm.v v0, (a0) # CHECK-ENCODING: [0x07,0x00,0xb5,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 00 b5 02 +# CHECK-UNKNOWN: 02b50007 vle8.v v8, 0(a0) # CHECK-INST: vle8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 02 +# CHECK-UNKNOWN: 02050407 vle8ff.v v8, 0(a0), v0.t # CHECK-INST: vle8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 01 +# CHECK-UNKNOWN: 01050407 vlse16.v v8, 0(a0), a1, v0.t # CHECK-INST: vlse16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 08 +# CHECK-UNKNOWN: 08b55407 vluxei32.v v8, 0(a0), v4 # CHECK-INST: vluxei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 06 +# CHECK-UNKNOWN: 06456407 vloxei64.v v8, 0(a0), v4 # CHECK-INST: vloxei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 0e +# CHECK-UNKNOWN: 0e457407 diff --git a/llvm/test/MC/RISCV/rvv/macc.s b/llvm/test/MC/RISCV/rvv/macc.s index 0662620b455a6..ffdc2d6469296 100644 --- a/llvm/test/MC/RISCV/rvv/macc.s +++ b/llvm/test/MC/RISCV/rvv/macc.s @@ -12,178 +12,178 @@ vmacc.vv v8, v20, v4, v0.t # CHECK-INST: vmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xb4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a b4 +# CHECK-UNKNOWN: b44a2457 vmacc.vv v8, v20, v4 # CHECK-INST: vmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xb6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a b6 +# CHECK-UNKNOWN: b64a2457 vmacc.vx v8, a0, v4, v0.t # CHECK-INST: vmacc.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xb4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 b4 +# CHECK-UNKNOWN: b4456457 vmacc.vx v8, a0, v4 # CHECK-INST: vmacc.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xb6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 b6 +# CHECK-UNKNOWN: b6456457 vnmsac.vv v8, v20, v4, v0.t # CHECK-INST: vnmsac.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xbc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a bc +# CHECK-UNKNOWN: bc4a2457 vnmsac.vv v8, v20, v4 # CHECK-INST: vnmsac.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xbe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a be +# CHECK-UNKNOWN: be4a2457 vnmsac.vx v8, a0, v4, v0.t # CHECK-INST: vnmsac.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xbc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 bc +# CHECK-UNKNOWN: bc456457 vnmsac.vx v8, a0, v4 # CHECK-INST: vnmsac.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xbe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 be +# CHECK-UNKNOWN: be456457 vmadd.vv v8, v20, v4, v0.t # CHECK-INST: vmadd.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a a4 +# CHECK-UNKNOWN: a44a2457 vmadd.vv v8, v20, v4 # CHECK-INST: vmadd.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a a6 +# CHECK-UNKNOWN: a64a2457 vmadd.vx v8, a0, v4, v0.t # CHECK-INST: vmadd.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 a4 +# CHECK-UNKNOWN: a4456457 vmadd.vx v8, a0, v4 # CHECK-INST: vmadd.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 a6 +# CHECK-UNKNOWN: a6456457 vnmsub.vv v8, v20, v4, v0.t # CHECK-INST: vnmsub.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ac +# CHECK-UNKNOWN: ac4a2457 vnmsub.vv v8, v20, v4 # CHECK-INST: vnmsub.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ae +# CHECK-UNKNOWN: ae4a2457 vnmsub.vx v8, a0, v4, v0.t # CHECK-INST: vnmsub.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ac +# CHECK-UNKNOWN: ac456457 vnmsub.vx v8, a0, v4 # CHECK-INST: vnmsub.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ae +# CHECK-UNKNOWN: ae456457 vwmaccu.vv v8, v20, v4, v0.t # CHECK-INST: vwmaccu.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xf0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a f0 +# CHECK-UNKNOWN: f04a2457 vwmaccu.vv v8, v20, v4 # CHECK-INST: vwmaccu.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xf2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a f2 +# CHECK-UNKNOWN: f24a2457 vwmaccu.vx v8, a0, v4, v0.t # CHECK-INST: vwmaccu.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xf0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 f0 +# CHECK-UNKNOWN: f0456457 vwmaccu.vx v8, a0, v4 # CHECK-INST: vwmaccu.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xf2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 f2 +# CHECK-UNKNOWN: f2456457 vwmacc.vv v8, v20, v4, v0.t # CHECK-INST: vwmacc.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xf4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a f4 +# CHECK-UNKNOWN: f44a2457 vwmacc.vv v8, v20, v4 # CHECK-INST: vwmacc.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xf6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a f6 +# CHECK-UNKNOWN: f64a2457 vwmacc.vx v8, a0, v4, v0.t # CHECK-INST: vwmacc.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xf4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 f4 +# CHECK-UNKNOWN: f4456457 vwmacc.vx v8, a0, v4 # CHECK-INST: vwmacc.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xf6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 f6 +# CHECK-UNKNOWN: f6456457 vwmaccsu.vv v8, v20, v4, v0.t # CHECK-INST: vwmaccsu.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xfc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a fc +# CHECK-UNKNOWN: fc4a2457 vwmaccsu.vv v8, v20, v4 # CHECK-INST: vwmaccsu.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x24,0x4a,0xfe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a fe +# CHECK-UNKNOWN: fe4a2457 vwmaccsu.vx v8, a0, v4, v0.t # CHECK-INST: vwmaccsu.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xfc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 fc +# CHECK-UNKNOWN: fc456457 vwmaccsu.vx v8, a0, v4 # CHECK-INST: vwmaccsu.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xfe] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 fe +# CHECK-UNKNOWN: fe456457 vwmaccus.vx v8, a0, v4, v0.t # CHECK-INST: vwmaccus.vx v8, a0, v4, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xf8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 f8 +# CHECK-UNKNOWN: f8456457 vwmaccus.vx v8, a0, v4 # CHECK-INST: vwmaccus.vx v8, a0, v4 # CHECK-ENCODING: [0x57,0x64,0x45,0xfa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 fa +# CHECK-UNKNOWN: fa456457 diff --git a/llvm/test/MC/RISCV/rvv/mask.s b/llvm/test/MC/RISCV/rvv/mask.s index c0691b97f1d92..c0dd44b6fc678 100644 --- a/llvm/test/MC/RISCV/rvv/mask.s +++ b/llvm/test/MC/RISCV/rvv/mask.s @@ -12,154 +12,154 @@ vmand.mm v8, v4, v20 # CHECK-INST: vmand.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 66 +# CHECK-UNKNOWN: 664a2457 vmnand.mm v8, v4, v20 # CHECK-INST: vmnand.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 76 +# CHECK-UNKNOWN: 764a2457 vmandn.mm v8, v4, v20 # CHECK-INST: vmandn.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 62 +# CHECK-UNKNOWN: 624a2457 vmxor.mm v8, v4, v20 # CHECK-INST: vmxor.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 6e +# CHECK-UNKNOWN: 6e4a2457 vmor.mm v8, v4, v20 # CHECK-INST: vmor.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 6a +# CHECK-UNKNOWN: 6a4a2457 vmnor.mm v8, v4, v20 # CHECK-INST: vmnor.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x7a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 7a +# CHECK-UNKNOWN: 7a4a2457 vmorn.mm v8, v4, v20 # CHECK-INST: vmorn.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x72] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 72 +# CHECK-UNKNOWN: 724a2457 vmxnor.mm v8, v4, v20 # CHECK-INST: vmxnor.mm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x7e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 7e +# CHECK-UNKNOWN: 7e4a2457 vcpop.m a2, v4, v0.t # CHECK-INST: vcpop.m a2, v4, v0.t # CHECK-ENCODING: [0x57,0x26,0x48,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 26 48 40 +# CHECK-UNKNOWN: 40482657 vcpop.m a2, v4 # CHECK-INST: vcpop.m a2, v4 # CHECK-ENCODING: [0x57,0x26,0x48,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 26 48 42 +# CHECK-UNKNOWN: 42482657 vfirst.m a2, v4, v0.t # CHECK-INST: vfirst.m a2, v4, v0.t # CHECK-ENCODING: [0x57,0xa6,0x48,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a6 48 40 +# CHECK-UNKNOWN: 4048a657 vfirst.m a2, v4 # CHECK-INST: vfirst.m a2, v4 # CHECK-ENCODING: [0x57,0xa6,0x48,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a6 48 42 +# CHECK-UNKNOWN: 4248a657 vmsbf.m v8, v4, v0.t # CHECK-INST: vmsbf.m v8, v4, v0.t # CHECK-ENCODING: [0x57,0xa4,0x40,0x50] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 40 50 +# CHECK-UNKNOWN: 5040a457 vmsbf.m v8, v4 # CHECK-INST: vmsbf.m v8, v4 # CHECK-ENCODING: [0x57,0xa4,0x40,0x52] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 40 52 +# CHECK-UNKNOWN: 5240a457 vmsif.m v8, v4, v0.t # CHECK-INST: vmsif.m v8, v4, v0.t # CHECK-ENCODING: [0x57,0xa4,0x41,0x50] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 41 50 +# CHECK-UNKNOWN: 5041a457 vmsif.m v8, v4 # CHECK-INST: vmsif.m v8, v4 # CHECK-ENCODING: [0x57,0xa4,0x41,0x52] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 41 52 +# CHECK-UNKNOWN: 5241a457 vmsof.m v8, v4, v0.t # CHECK-INST: vmsof.m v8, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x41,0x50] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 41 50 +# CHECK-UNKNOWN: 50412457 vmsof.m v8, v4 # CHECK-INST: vmsof.m v8, v4 # CHECK-ENCODING: [0x57,0x24,0x41,0x52] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 41 52 +# CHECK-UNKNOWN: 52412457 viota.m v8, v4, v0.t # CHECK-INST: viota.m v8, v4, v0.t # CHECK-ENCODING: [0x57,0x24,0x48,0x50] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 48 50 +# CHECK-UNKNOWN: 50482457 viota.m v8, v4 # CHECK-INST: viota.m v8, v4 # CHECK-ENCODING: [0x57,0x24,0x48,0x52] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 48 52 +# CHECK-UNKNOWN: 52482457 vid.v v8, v0.t # CHECK-INST: vid.v v8, v0.t # CHECK-ENCODING: [0x57,0xa4,0x08,0x50] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 08 50 +# CHECK-UNKNOWN: 5008a457 vid.v v8 # CHECK-INST: vid.v v8 # CHECK-ENCODING: [0x57,0xa4,0x08,0x52] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 a4 08 52 +# CHECK-UNKNOWN: 5208a457 vmmv.m v8, v4 # CHECK-INST: vmmv.m v8, v4 # CHECK-ENCODING: [0x57,0x24,0x42,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 42 66 +# CHECK-UNKNOWN: 66422457 vmclr.m v8 # CHECK-INST: vmclr.m v8 # CHECK-ENCODING: [0x57,0x24,0x84,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 84 6e +# CHECK-UNKNOWN: 6e842457 vmset.m v8 # CHECK-INST: vmset.m v8 # CHECK-ENCODING: [0x57,0x24,0x84,0x7e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 84 7e +# CHECK-UNKNOWN: 7e842457 vmnot.m v8, v4 # CHECK-INST: vmnot.m v8, v4 # CHECK-ENCODING: [0x57,0x24,0x42,0x76] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 42 76 +# CHECK-UNKNOWN: 76422457 diff --git a/llvm/test/MC/RISCV/rvv/minmax.s b/llvm/test/MC/RISCV/rvv/minmax.s index 4eaf897b84c4e..70fe040f07f9b 100644 --- a/llvm/test/MC/RISCV/rvv/minmax.s +++ b/llvm/test/MC/RISCV/rvv/minmax.s @@ -12,94 +12,94 @@ vminu.vv v8, v4, v20, v0.t # CHECK-INST: vminu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x10] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 10 +# CHECK-UNKNOWN: 104a0457 vminu.vv v8, v4, v20 # CHECK-INST: vminu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x12] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 12 +# CHECK-UNKNOWN: 124a0457 vminu.vx v8, v4, a0, v0.t # CHECK-INST: vminu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x10] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 10 +# CHECK-UNKNOWN: 10454457 vminu.vx v8, v4, a0 # CHECK-INST: vminu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x12] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 12 +# CHECK-UNKNOWN: 12454457 vmin.vv v8, v4, v20, v0.t # CHECK-INST: vmin.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x14] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 14 +# CHECK-UNKNOWN: 144a0457 vmin.vv v8, v4, v20 # CHECK-INST: vmin.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x16] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 16 +# CHECK-UNKNOWN: 164a0457 vmin.vx v8, v4, a0, v0.t # CHECK-INST: vmin.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x14] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 14 +# CHECK-UNKNOWN: 14454457 vmin.vx v8, v4, a0 # CHECK-INST: vmin.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x16] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 16 +# CHECK-UNKNOWN: 16454457 vmaxu.vv v8, v4, v20, v0.t # CHECK-INST: vmaxu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x18] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 18 +# CHECK-UNKNOWN: 184a0457 vmaxu.vv v8, v4, v20 # CHECK-INST: vmaxu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x1a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 1a +# CHECK-UNKNOWN: 1a4a0457 vmaxu.vx v8, v4, a0, v0.t # CHECK-INST: vmaxu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x18] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 18 +# CHECK-UNKNOWN: 18454457 vmaxu.vx v8, v4, a0 # CHECK-INST: vmaxu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x1a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 1a +# CHECK-UNKNOWN: 1a454457 vmax.vv v8, v4, v20, v0.t # CHECK-INST: vmax.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x1c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 1c +# CHECK-UNKNOWN: 1c4a0457 vmax.vv v8, v4, v20 # CHECK-INST: vmax.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x1e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 1e +# CHECK-UNKNOWN: 1e4a0457 vmax.vx v8, v4, a0, v0.t # CHECK-INST: vmax.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x1c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 1c +# CHECK-UNKNOWN: 1c454457 vmax.vx v8, v4, a0 # CHECK-INST: vmax.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x1e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 1e +# CHECK-UNKNOWN: 1e454457 diff --git a/llvm/test/MC/RISCV/rvv/mul.s b/llvm/test/MC/RISCV/rvv/mul.s index 9f7d6182d80f4..2782ea683f9cd 100644 --- a/llvm/test/MC/RISCV/rvv/mul.s +++ b/llvm/test/MC/RISCV/rvv/mul.s @@ -12,190 +12,190 @@ vmul.vv v8, v4, v20, v0.t # CHECK-INST: vmul.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x94] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 94 +# CHECK-UNKNOWN: 944a2457 vmul.vv v8, v4, v20 # CHECK-INST: vmul.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x96] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 96 +# CHECK-UNKNOWN: 964a2457 vmul.vx v8, v4, a0, v0.t # CHECK-INST: vmul.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x94] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 94 +# CHECK-UNKNOWN: 94456457 vmul.vx v8, v4, a0 # CHECK-INST: vmul.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x96] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 96 +# CHECK-UNKNOWN: 96456457 vmulh.vv v8, v4, v20, v0.t # CHECK-INST: vmulh.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x9c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 9c +# CHECK-UNKNOWN: 9c4a2457 vmulh.vv v8, v4, v20 # CHECK-INST: vmulh.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 9e +# CHECK-UNKNOWN: 9e4a2457 vmulh.vx v8, v4, a0, v0.t # CHECK-INST: vmulh.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x9c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 9c +# CHECK-UNKNOWN: 9c456457 vmulh.vx v8, v4, a0 # CHECK-INST: vmulh.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 9e +# CHECK-UNKNOWN: 9e456457 vmulhu.vv v8, v4, v20, v0.t # CHECK-INST: vmulhu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x90] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 90 +# CHECK-UNKNOWN: 904a2457 vmulhu.vv v8, v4, v20 # CHECK-INST: vmulhu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x92] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 92 +# CHECK-UNKNOWN: 924a2457 vmulhu.vx v8, v4, a0, v0.t # CHECK-INST: vmulhu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x90] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 90 +# CHECK-UNKNOWN: 90456457 vmulhu.vx v8, v4, a0 # CHECK-INST: vmulhu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x92] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 92 +# CHECK-UNKNOWN: 92456457 vmulhsu.vv v8, v4, v20, v0.t # CHECK-INST: vmulhsu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x98] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 98 +# CHECK-UNKNOWN: 984a2457 vmulhsu.vv v8, v4, v20 # CHECK-INST: vmulhsu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x9a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 9a +# CHECK-UNKNOWN: 9a4a2457 vmulhsu.vx v8, v4, a0, v0.t # CHECK-INST: vmulhsu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x98] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 98 +# CHECK-UNKNOWN: 98456457 vmulhsu.vx v8, v4, a0 # CHECK-INST: vmulhsu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x9a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 9a +# CHECK-UNKNOWN: 9a456457 vwmul.vv v8, v4, v20, v0.t # CHECK-INST: vwmul.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ec +# CHECK-UNKNOWN: ec4a2457 vwmul.vv v8, v4, v20 # CHECK-INST: vwmul.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ee +# CHECK-UNKNOWN: ee4a2457 vwmul.vx v8, v4, a0, v0.t # CHECK-INST: vwmul.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ec +# CHECK-UNKNOWN: ec456457 vwmul.vx v8, v4, a0 # CHECK-INST: vwmul.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ee +# CHECK-UNKNOWN: ee456457 vwmulu.vv v8, v4, v20, v0.t # CHECK-INST: vwmulu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a e0 +# CHECK-UNKNOWN: e04a2457 vwmulu.vv v8, v4, v20 # CHECK-INST: vwmulu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a e2 +# CHECK-UNKNOWN: e24a2457 vwmulu.vx v8, v4, a0, v0.t # CHECK-INST: vwmulu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 e0 +# CHECK-UNKNOWN: e0456457 vwmulu.vx v8, v4, a0 # CHECK-INST: vwmulu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 e2 +# CHECK-UNKNOWN: e2456457 vwmulsu.vv v8, v4, v20, v0.t # CHECK-INST: vwmulsu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a e8 +# CHECK-UNKNOWN: e84a2457 vwmulsu.vv v8, v4, v20 # CHECK-INST: vwmulsu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ea +# CHECK-UNKNOWN: ea4a2457 vwmulsu.vx v8, v4, a0, v0.t # CHECK-INST: vwmulsu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 e8 +# CHECK-UNKNOWN: e8456457 vwmulsu.vx v8, v4, a0 # CHECK-INST: vwmulsu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ea +# CHECK-UNKNOWN: ea456457 vsmul.vv v8, v4, v20, v0.t # CHECK-INST: vsmul.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x9c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 9c +# CHECK-UNKNOWN: 9c4a0457 vsmul.vv v8, v4, v20 # CHECK-INST: vsmul.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 9e +# CHECK-UNKNOWN: 9e4a0457 vsmul.vx v8, v4, a0, v0.t # CHECK-INST: vsmul.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x9c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 9c +# CHECK-UNKNOWN: 9c454457 vsmul.vx v8, v4, a0 # CHECK-INST: vsmul.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 9e +# CHECK-UNKNOWN: 9e454457 diff --git a/llvm/test/MC/RISCV/rvv/mv.s b/llvm/test/MC/RISCV/rvv/mv.s index cd02aa94d18eb..f96e14932ead6 100644 --- a/llvm/test/MC/RISCV/rvv/mv.s +++ b/llvm/test/MC/RISCV/rvv/mv.s @@ -12,52 +12,52 @@ vmv.v.v v8, v20 # CHECK-INST: vmv.v.v v8, v20 # CHECK-ENCODING: [0x57,0x04,0x0a,0x5e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 0a 5e +# CHECK-UNKNOWN: 5e0a0457 vmv.v.x v8, a0 # CHECK-INST: vmv.v.x v8, a0 # CHECK-ENCODING: [0x57,0x44,0x05,0x5e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 05 5e +# CHECK-UNKNOWN: 5e054457 vmv.v.i v8, 15 # CHECK-INST: vmv.v.i v8, 15 # CHECK-ENCODING: [0x57,0xb4,0x07,0x5e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 07 5e +# CHECK-UNKNOWN: 5e07b457 vmv.x.s a2, v4 # CHECK-INST: vmv.x.s a2, v4 # CHECK-ENCODING: [0x57,0x26,0x40,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 26 40 42 +# CHECK-UNKNOWN: 42402657 vmv.s.x v8, a0 # CHECK-INST: vmv.s.x v8, a0 # CHECK-ENCODING: [0x57,0x64,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 05 42 +# CHECK-UNKNOWN: 42056457 vmv1r.v v8, v4 # CHECK-INST: vmv1r.v v8, v4 # CHECK-ENCODING: [0x57,0x34,0x40,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 34 40 9e +# CHECK-UNKNOWN: 9e403457 vmv2r.v v8, v4 # CHECK-INST: vmv2r.v v8, v4 # CHECK-ENCODING: [0x57,0xb4,0x40,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 40 9e +# CHECK-UNKNOWN: 9e40b457 vmv4r.v v8, v4 # CHECK-INST: vmv4r.v v8, v4 # CHECK-ENCODING: [0x57,0xb4,0x41,0x9e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 41 9e +# CHECK-UNKNOWN: 9e41b457 vmv8r.v v8, v24 # CHECK-INST: vmv8r.v v8, v24 # CHECK-ENCODING: [0x57,0xb4,0x83,0x9f] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 83 9f +# CHECK-UNKNOWN: 9f83b457 diff --git a/llvm/test/MC/RISCV/rvv/or.s b/llvm/test/MC/RISCV/rvv/or.s index ef281fe80bd49..306d7ae814423 100644 --- a/llvm/test/MC/RISCV/rvv/or.s +++ b/llvm/test/MC/RISCV/rvv/or.s @@ -12,34 +12,34 @@ vor.vv v8, v4, v20, v0.t # CHECK-INST: vor.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 28 +# CHECK-UNKNOWN: 284a0457 vor.vv v8, v4, v20 # CHECK-INST: vor.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 2a +# CHECK-UNKNOWN: 2a4a0457 vor.vx v8, v4, a0, v0.t # CHECK-INST: vor.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 28 +# CHECK-UNKNOWN: 28454457 vor.vx v8, v4, a0 # CHECK-INST: vor.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 2a +# CHECK-UNKNOWN: 2a454457 vor.vi v8, v4, 15, v0.t # CHECK-INST: vor.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 28 +# CHECK-UNKNOWN: 2847b457 vor.vi v8, v4, 15 # CHECK-INST: vor.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 2a +# CHECK-UNKNOWN: 2a47b457 diff --git a/llvm/test/MC/RISCV/rvv/others.s b/llvm/test/MC/RISCV/rvv/others.s index d1845e0bb2384..cc16a8774b82d 100644 --- a/llvm/test/MC/RISCV/rvv/others.s +++ b/llvm/test/MC/RISCV/rvv/others.s @@ -12,142 +12,142 @@ vmerge.vvm v8, v4, v20, v0 # CHECK-INST: vmerge.vvm v8, v4, v20, v0 # CHECK-ENCODING: [0x57,0x04,0x4a,0x5c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 5c +# CHECK-UNKNOWN: 5c4a0457 vmerge.vxm v8, v4, a0, v0 # CHECK-INST: vmerge.vxm v8, v4, a0, v0 # CHECK-ENCODING: [0x57,0x44,0x45,0x5c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 5c +# CHECK-UNKNOWN: 5c454457 vmerge.vim v8, v4, 15, v0 # CHECK-INST: vmerge.vim v8, v4, 15, v0 # CHECK-ENCODING: [0x57,0xb4,0x47,0x5c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 5c +# CHECK-UNKNOWN: 5c47b457 vslideup.vx v8, v4, a0, v0.t # CHECK-INST: vslideup.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x38] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 38 +# CHECK-UNKNOWN: 38454457 vslideup.vx v8, v4, a0 # CHECK-INST: vslideup.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x3a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 3a +# CHECK-UNKNOWN: 3a454457 vslideup.vi v8, v4, 31, v0.t # CHECK-INST: vslideup.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0x38] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 38 +# CHECK-UNKNOWN: 384fb457 vslideup.vi v8, v4, 31 # CHECK-INST: vslideup.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0x3a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 3a +# CHECK-UNKNOWN: 3a4fb457 vslidedown.vx v8, v4, a0, v0.t # CHECK-INST: vslidedown.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x3c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 3c +# CHECK-UNKNOWN: 3c454457 vslidedown.vx v8, v4, a0 # CHECK-INST: vslidedown.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x3e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 3e +# CHECK-UNKNOWN: 3e454457 vslidedown.vi v8, v4, 31, v0.t # CHECK-INST: vslidedown.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0x3c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 3c +# CHECK-UNKNOWN: 3c4fb457 vslidedown.vi v8, v4, 31 # CHECK-INST: vslidedown.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0x3e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 3e +# CHECK-UNKNOWN: 3e4fb457 vslide1up.vx v8, v4, a0, v0.t # CHECK-INST: vslide1up.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x38] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 38 +# CHECK-UNKNOWN: 38456457 vslide1up.vx v8, v4, a0 # CHECK-INST: vslide1up.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x3a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 3a +# CHECK-UNKNOWN: 3a456457 vslide1down.vx v8, v4, a0, v0.t # CHECK-INST: vslide1down.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x3c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 3c +# CHECK-UNKNOWN: 3c456457 vslide1down.vx v8, v4, a0 # CHECK-INST: vslide1down.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x3e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 3e +# CHECK-UNKNOWN: 3e456457 vrgather.vv v8, v4, v20, v0.t # CHECK-INST: vrgather.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x30] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 30 +# CHECK-UNKNOWN: 304a0457 vrgather.vv v8, v4, v20 # CHECK-INST: vrgather.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x32] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 32 +# CHECK-UNKNOWN: 324a0457 vrgather.vx v8, v4, a0, v0.t # CHECK-INST: vrgather.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x30] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 30 +# CHECK-UNKNOWN: 30454457 vrgather.vx v8, v4, a0 # CHECK-INST: vrgather.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x32] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 32 +# CHECK-UNKNOWN: 32454457 vrgather.vi v8, v4, 31, v0.t # CHECK-INST: vrgather.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0x30] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 30 +# CHECK-UNKNOWN: 304fb457 vrgather.vi v8, v4, 31 # CHECK-INST: vrgather.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0x32] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 32 +# CHECK-UNKNOWN: 324fb457 vrgatherei16.vv v8, v4, v20, v0.t # CHECK-INST: vrgatherei16.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x38] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 38 +# CHECK-UNKNOWN: 384a0457 vrgatherei16.vv v8, v4, v20 # CHECK-INST: vrgatherei16.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x3a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 3a +# CHECK-UNKNOWN: 3a4a0457 vcompress.vm v8, v4, v20 # CHECK-INST: vcompress.vm v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x5e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 5e +# CHECK-UNKNOWN: 5e4a2457 diff --git a/llvm/test/MC/RISCV/rvv/reduction.s b/llvm/test/MC/RISCV/rvv/reduction.s index 2172589b7c38e..006f54d9b545d 100644 --- a/llvm/test/MC/RISCV/rvv/reduction.s +++ b/llvm/test/MC/RISCV/rvv/reduction.s @@ -12,124 +12,124 @@ vredsum.vs v8, v4, v20, v0.t # CHECK-INST: vredsum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 00 +# CHECK-UNKNOWN: 004a2457 vredsum.vs v8, v4, v20 # CHECK-INST: vredsum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 02 +# CHECK-UNKNOWN: 024a2457 vredmaxu.vs v8, v4, v20, v0.t # CHECK-INST: vredmaxu.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x18] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 18 +# CHECK-UNKNOWN: 184a2457 vredmaxu.vs v8, v4, v20 # CHECK-INST: vredmaxu.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x1a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 1a +# CHECK-UNKNOWN: 1a4a2457 vredmax.vs v8, v4, v20, v0.t # CHECK-INST: vredmax.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x1c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 1c +# CHECK-UNKNOWN: 1c4a2457 vredmax.vs v8, v4, v20 # CHECK-INST: vredmax.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x1e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 1e +# CHECK-UNKNOWN: 1e4a2457 vredminu.vs v8, v4, v20, v0.t # CHECK-INST: vredminu.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x10] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 10 +# CHECK-UNKNOWN: 104a2457 vredminu.vs v8, v4, v20 # CHECK-INST: vredminu.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x12] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 12 +# CHECK-UNKNOWN: 124a2457 vredmin.vs v8, v4, v20, v0.t # CHECK-INST: vredmin.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x14] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 14 +# CHECK-UNKNOWN: 144a2457 vredmin.vs v8, v4, v20 # CHECK-INST: vredmin.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x16] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 16 +# CHECK-UNKNOWN: 164a2457 vredand.vs v8, v4, v20, v0.t # CHECK-INST: vredand.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 04 +# CHECK-UNKNOWN: 044a2457 vredand.vs v8, v4, v20 # CHECK-INST: vredand.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 06 +# CHECK-UNKNOWN: 064a2457 vredor.vs v8, v4, v20, v0.t # CHECK-INST: vredor.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 08 +# CHECK-UNKNOWN: 084a2457 vredor.vs v8, v4, v20 # CHECK-INST: vredor.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 0a +# CHECK-UNKNOWN: 0a4a2457 vredxor.vs v8, v4, v20, v0.t # CHECK-INST: vredxor.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 0c +# CHECK-UNKNOWN: 0c4a2457 vredxor.vs v8, v4, v20 # CHECK-INST: vredxor.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 0e +# CHECK-UNKNOWN: 0e4a2457 vwredsumu.vs v8, v4, v20, v0.t # CHECK-INST: vwredsumu.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a c0 +# CHECK-UNKNOWN: c04a0457 vwredsumu.vs v8, v4, v20 # CHECK-INST: vwredsumu.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a c2 +# CHECK-UNKNOWN: c24a0457 vwredsum.vs v8, v4, v20, v0.t # CHECK-INST: vwredsum.vs v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a c4 +# CHECK-UNKNOWN: c44a0457 vwredsum.vs v8, v4, v20 # CHECK-INST: vwredsum.vs v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a c6 +# CHECK-UNKNOWN: c64a0457 vredsum.vs v0, v4, v20, v0.t # CHECK-INST: vredsum.vs v0, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x20,0x4a,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 20 4a 00 +# CHECK-UNKNOWN: 004a2057 diff --git a/llvm/test/MC/RISCV/rvv/shift.s b/llvm/test/MC/RISCV/rvv/shift.s index 8a2e82f3c8fe9..017e12499dc2b 100644 --- a/llvm/test/MC/RISCV/rvv/shift.s +++ b/llvm/test/MC/RISCV/rvv/shift.s @@ -12,256 +12,256 @@ vsll.vv v8, v4, v20, v0.t # CHECK-INST: vsll.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x94] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 94 +# CHECK-UNKNOWN: 944a0457 vsll.vv v8, v4, v20 # CHECK-INST: vsll.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x96] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 96 +# CHECK-UNKNOWN: 964a0457 vsll.vx v8, v4, a0, v0.t # CHECK-INST: vsll.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x94] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 94 +# CHECK-UNKNOWN: 94454457 vsll.vx v8, v4, a0 # CHECK-INST: vsll.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x96] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 96 +# CHECK-UNKNOWN: 96454457 vsll.vi v8, v4, 31, v0.t # CHECK-INST: vsll.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0x94] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 94 +# CHECK-UNKNOWN: 944fb457 vsll.vi v8, v4, 31 # CHECK-INST: vsll.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0x96] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 96 +# CHECK-UNKNOWN: 964fb457 vsrl.vv v8, v4, v20, v0.t # CHECK-INST: vsrl.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a a0 +# CHECK-UNKNOWN: a04a0457 vsrl.vv v8, v4, v20 # CHECK-INST: vsrl.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a a2 +# CHECK-UNKNOWN: a24a0457 vsrl.vx v8, v4, a0, v0.t # CHECK-INST: vsrl.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 a0 +# CHECK-UNKNOWN: a0454457 vsrl.vx v8, v4, a0 # CHECK-INST: vsrl.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 a2 +# CHECK-UNKNOWN: a2454457 vsrl.vi v8, v4, 31, v0.t # CHECK-INST: vsrl.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f a0 +# CHECK-UNKNOWN: a04fb457 vsrl.vi v8, v4, 31 # CHECK-INST: vsrl.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f a2 +# CHECK-UNKNOWN: a24fb457 vsra.vv v8, v4, v20, v0.t # CHECK-INST: vsra.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a a4 +# CHECK-UNKNOWN: a44a0457 vsra.vv v8, v4, v20 # CHECK-INST: vsra.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a a6 +# CHECK-UNKNOWN: a64a0457 vsra.vx v8, v4, a0, v0.t # CHECK-INST: vsra.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 a4 +# CHECK-UNKNOWN: a4454457 vsra.vx v8, v4, a0 # CHECK-INST: vsra.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 a6 +# CHECK-UNKNOWN: a6454457 vsra.vi v8, v4, 31, v0.t # CHECK-INST: vsra.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f a4 +# CHECK-UNKNOWN: a44fb457 vsra.vi v8, v4, 31 # CHECK-INST: vsra.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f a6 +# CHECK-UNKNOWN: a64fb457 vnsrl.wv v8, v4, v20, v0.t # CHECK-INST: vnsrl.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xb0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a b0 +# CHECK-UNKNOWN: b04a0457 vnsrl.wv v4, v4, v20, v0.t # CHECK-INST: vnsrl.wv v4, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x02,0x4a,0xb0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 02 4a b0 +# CHECK-UNKNOWN: b04a0257 vnsrl.wv v8, v4, v20 # CHECK-INST: vnsrl.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xb2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a b2 +# CHECK-UNKNOWN: b24a0457 vnsrl.wx v8, v4, a0, v0.t # CHECK-INST: vnsrl.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xb0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 b0 +# CHECK-UNKNOWN: b0454457 vnsrl.wx v8, v4, a0 # CHECK-INST: vnsrl.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xb2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 b2 +# CHECK-UNKNOWN: b2454457 vnsrl.wi v8, v4, 31, v0.t # CHECK-INST: vnsrl.wi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xb0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f b0 +# CHECK-UNKNOWN: b04fb457 vnsrl.wi v8, v4, 31 # CHECK-INST: vnsrl.wi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xb2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f b2 +# CHECK-UNKNOWN: b24fb457 vnsra.wv v8, v4, v20, v0.t # CHECK-INST: vnsra.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xb4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a b4 +# CHECK-UNKNOWN: b44a0457 vnsra.wv v8, v4, v20 # CHECK-INST: vnsra.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xb6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a b6 +# CHECK-UNKNOWN: b64a0457 vnsra.wx v8, v4, a0, v0.t # CHECK-INST: vnsra.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xb4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 b4 +# CHECK-UNKNOWN: b4454457 vnsra.wx v8, v4, a0 # CHECK-INST: vnsra.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xb6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 b6 +# CHECK-UNKNOWN: b6454457 vnsra.wi v8, v4, 31, v0.t # CHECK-INST: vnsra.wi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xb4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f b4 +# CHECK-UNKNOWN: b44fb457 vnsra.wi v8, v4, 31 # CHECK-INST: vnsra.wi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xb6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f b6 +# CHECK-UNKNOWN: b64fb457 vssrl.vv v8, v4, v20, v0.t # CHECK-INST: vssrl.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a a8 +# CHECK-UNKNOWN: a84a0457 vssrl.vv v8, v4, v20 # CHECK-INST: vssrl.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a aa +# CHECK-UNKNOWN: aa4a0457 vssrl.vx v8, v4, a0, v0.t # CHECK-INST: vssrl.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 a8 +# CHECK-UNKNOWN: a8454457 vssrl.vx v8, v4, a0 # CHECK-INST: vssrl.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 aa +# CHECK-UNKNOWN: aa454457 vssrl.vi v8, v4, 31, v0.t # CHECK-INST: vssrl.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f a8 +# CHECK-UNKNOWN: a84fb457 vssrl.vi v8, v4, 31 # CHECK-INST: vssrl.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f aa +# CHECK-UNKNOWN: aa4fb457 vssra.vv v8, v4, v20, v0.t # CHECK-INST: vssra.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a ac +# CHECK-UNKNOWN: ac4a0457 vssra.vv v8, v4, v20 # CHECK-INST: vssra.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a ae +# CHECK-UNKNOWN: ae4a0457 vssra.vx v8, v4, a0, v0.t # CHECK-INST: vssra.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 ac +# CHECK-UNKNOWN: ac454457 vssra.vx v8, v4, a0 # CHECK-INST: vssra.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 ae +# CHECK-UNKNOWN: ae454457 vssra.vi v8, v4, 31, v0.t # CHECK-INST: vssra.vi v8, v4, 31, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f ac +# CHECK-UNKNOWN: ac4fb457 vssra.vi v8, v4, 31 # CHECK-INST: vssra.vi v8, v4, 31 # CHECK-ENCODING: [0x57,0xb4,0x4f,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f ae +# CHECK-UNKNOWN: ae4fb457 diff --git a/llvm/test/MC/RISCV/rvv/sign-injection.s b/llvm/test/MC/RISCV/rvv/sign-injection.s index 96d37c42d208c..23e9be868a428 100644 --- a/llvm/test/MC/RISCV/rvv/sign-injection.s +++ b/llvm/test/MC/RISCV/rvv/sign-injection.s @@ -15,70 +15,70 @@ vfsgnj.vv v8, v4, v20, v0.t # CHECK-INST: vfsgnj.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x20] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 20 +# CHECK-UNKNOWN: 204a1457 vfsgnj.vv v8, v4, v20 # CHECK-INST: vfsgnj.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x22] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 22 +# CHECK-UNKNOWN: 224a1457 vfsgnj.vf v8, v4, fa0, v0.t # CHECK-INST: vfsgnj.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x20] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 20 +# CHECK-UNKNOWN: 20455457 vfsgnj.vf v8, v4, fa0 # CHECK-INST: vfsgnj.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x22] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 22 +# CHECK-UNKNOWN: 22455457 vfsgnjn.vv v8, v4, v20, v0.t # CHECK-INST: vfsgnjn.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x24] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 24 +# CHECK-UNKNOWN: 244a1457 vfsgnjn.vv v8, v4, v20 # CHECK-INST: vfsgnjn.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x26] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 26 +# CHECK-UNKNOWN: 264a1457 vfsgnjn.vf v8, v4, fa0, v0.t # CHECK-INST: vfsgnjn.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 24 +# CHECK-UNKNOWN: 24455457 vfsgnjn.vf v8, v4, fa0 # CHECK-INST: vfsgnjn.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 26 +# CHECK-UNKNOWN: 26455457 vfsgnjx.vv v8, v4, v20, v0.t # CHECK-INST: vfsgnjx.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0x28] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 28 +# CHECK-UNKNOWN: 284a1457 vfsgnjx.vv v8, v4, v20 # CHECK-INST: vfsgnjx.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x14,0x4a,0x2a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 14 4a 2a +# CHECK-UNKNOWN: 2a4a1457 vfsgnjx.vf v8, v4, fa0, v0.t # CHECK-INST: vfsgnjx.vf v8, v4, fa0, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0x28] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 28 +# CHECK-UNKNOWN: 28455457 vfsgnjx.vf v8, v4, fa0 # CHECK-INST: vfsgnjx.vf v8, v4, fa0 # CHECK-ENCODING: [0x57,0x54,0x45,0x2a] # CHECK-ERROR: instruction requires the following: 'V'{{.*}}'Zve32f' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 54 45 2a +# CHECK-UNKNOWN: 2a455457 diff --git a/llvm/test/MC/RISCV/rvv/snippet.s b/llvm/test/MC/RISCV/rvv/snippet.s index c032e468deded..c3e57e193f845 100644 --- a/llvm/test/MC/RISCV/rvv/snippet.s +++ b/llvm/test/MC/RISCV/rvv/snippet.s @@ -6,27 +6,27 @@ loop: vsetvli a3, a0, e16,m4,ta,ma # vtype = 16-bit integer vectors -# CHECK-INST: d7 76 a5 0c vsetvli a3, a0, e16, m4, ta, ma +# CHECK-INST: 0ca576d7 vsetvli a3, a0, e16, m4, ta, ma vle16.v v4, (a1) # Get 16b vector -# CHECK-INST: 07 d2 05 02 vle16.v v4, (a1) +# CHECK-INST: 0205d207 vle16.v v4, (a1) slli t1, a3, 1 # Multiply length by two bytes/element -# CHECK-INST: 13 93 16 00 slli t1, a3, 0x1 +# CHECK-INST: 00169313 slli t1, a3, 0x1 add a1, a1, t1 # Bump pointer -# CHECK-INST: b3 85 65 00 add a1, a1, t1 +# CHECK-INST: 006585b3 add a1, a1, t1 vwmul.vx v8, v4, x10 # 32b in -# CHECK-INST: 57 64 45 ee vwmul.vx v8, v4, a0 +# CHECK-INST: ee456457 vwmul.vx v8, v4, a0 vsetvli x0, a0, e32,m8,ta,ma # Operate on 32b values -# CHECK-INST: 57 70 35 0d vsetvli zero, a0, e32, m8, ta, ma +# CHECK-INST: 0d357057 vsetvli zero, a0, e32, m8, ta, ma vsrl.vi v8, v8, 3 -# CHECK-INST: 57 b4 81 a2 vsrl.vi v8, v8, 0x3 +# CHECK-INST: a281b457 vsrl.vi v8, v8, 0x3 vse32.v v8, (a2) # Store vector of 32b -# CHECK-INST: 27 64 06 02 vse32.v v8, (a2) +# CHECK-INST: 02066427 vse32.v v8, (a2) slli t1, a3, 2 # Multiply length by four bytes/element -# CHECK-INST: 13 93 26 00 slli t1, a3, 0x2 +# CHECK-INST: 00269313 slli t1, a3, 0x2 add a2, a2, t1 # Bump pointer -# CHECK-INST: 33 06 66 00 add a2, a2, t1 +# CHECK-INST: 00660633 add a2, a2, t1 sub a0, a0, a3 # Decrement count -# CHECK-INST: 33 05 d5 40 sub a0, a0, a3 +# CHECK-INST: 40d50533 sub a0, a0, a3 bnez a0, loop # Any more? -# CHECK-INST: e3 1a 05 fc bnez a0, 0x0 +# CHECK-INST: fc051ae3 bnez a0, 0x0 diff --git a/llvm/test/MC/RISCV/rvv/store.s b/llvm/test/MC/RISCV/rvv/store.s index a38f19f266fa9..c6a34705fa4a6 100644 --- a/llvm/test/MC/RISCV/rvv/store.s +++ b/llvm/test/MC/RISCV/rvv/store.s @@ -12,250 +12,250 @@ vsm.v v24, (a0) # CHECK-INST: vsm.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0xb5,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 02 +# CHECK-UNKNOWN: 02b50c27 vse8.v v24, (a0), v0.t # CHECK-INST: vse8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 00 +# CHECK-UNKNOWN: 00050c27 vse8.v v24, (a0) # CHECK-INST: vse8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 02 +# CHECK-UNKNOWN: 02050c27 vse16.v v24, (a0), v0.t # CHECK-INST: vse16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 00 +# CHECK-UNKNOWN: 00055c27 vse16.v v24, (a0) # CHECK-INST: vse16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 02 +# CHECK-UNKNOWN: 02055c27 vse32.v v24, (a0), v0.t # CHECK-INST: vse32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 00 +# CHECK-UNKNOWN: 00056c27 vse32.v v24, (a0) # CHECK-INST: vse32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 02 +# CHECK-UNKNOWN: 02056c27 vse64.v v24, (a0), v0.t # CHECK-INST: vse64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 00 +# CHECK-UNKNOWN: 00057c27 vse64.v v24, (a0) # CHECK-INST: vse64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 02 +# CHECK-UNKNOWN: 02057c27 vsse8.v v24, (a0), a1, v0.t # CHECK-INST: vsse8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 08 +# CHECK-UNKNOWN: 08b50c27 vsse8.v v24, (a0), a1 # CHECK-INST: vsse8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 0a +# CHECK-UNKNOWN: 0ab50c27 vsse16.v v24, (a0), a1, v0.t # CHECK-INST: vsse16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 08 +# CHECK-UNKNOWN: 08b55c27 vsse16.v v24, (a0), a1 # CHECK-INST: vsse16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 0a +# CHECK-UNKNOWN: 0ab55c27 vsse32.v v24, (a0), a1, v0.t # CHECK-INST: vsse32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 08 +# CHECK-UNKNOWN: 08b56c27 vsse32.v v24, (a0), a1 # CHECK-INST: vsse32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 0a +# CHECK-UNKNOWN: 0ab56c27 vsse64.v v24, (a0), a1, v0.t # CHECK-INST: vsse64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 08 +# CHECK-UNKNOWN: 08b57c27 vsse64.v v24, (a0), a1 # CHECK-INST: vsse64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 0a +# CHECK-UNKNOWN: 0ab57c27 vsuxei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 04 +# CHECK-UNKNOWN: 04450c27 vsuxei8.v v24, (a0), v4 # CHECK-INST: vsuxei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 06 +# CHECK-UNKNOWN: 06450c27 vsuxei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 04 +# CHECK-UNKNOWN: 04455c27 vsuxei16.v v24, (a0), v4 # CHECK-INST: vsuxei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 06 +# CHECK-UNKNOWN: 06455c27 vsuxei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 04 +# CHECK-UNKNOWN: 04456c27 vsuxei32.v v24, (a0), v4 # CHECK-INST: vsuxei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 06 +# CHECK-UNKNOWN: 06456c27 vsuxei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 04 +# CHECK-UNKNOWN: 04457c27 vsuxei64.v v24, (a0), v4 # CHECK-INST: vsuxei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x06] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 06 +# CHECK-UNKNOWN: 06457c27 vsoxei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 0c +# CHECK-UNKNOWN: 0c450c27 vsoxei8.v v24, (a0), v4 # CHECK-INST: vsoxei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 0e +# CHECK-UNKNOWN: 0e450c27 vsoxei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 0c +# CHECK-UNKNOWN: 0c455c27 vsoxei16.v v24, (a0), v4 # CHECK-INST: vsoxei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 0e +# CHECK-UNKNOWN: 0e455c27 vsoxei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 0c +# CHECK-UNKNOWN: 0c456c27 vsoxei32.v v24, (a0), v4 # CHECK-INST: vsoxei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 0e +# CHECK-UNKNOWN: 0e456c27 vsoxei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 0c +# CHECK-UNKNOWN: 0c457c27 vsoxei64.v v24, (a0), v4 # CHECK-INST: vsoxei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 0e +# CHECK-UNKNOWN: 0e457c27 vs1r.v v24, (a0) # CHECK-INST: vs1r.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x85,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 85 02 +# CHECK-UNKNOWN: 02850c27 vs2r.v v24, (a0) # CHECK-INST: vs2r.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x85,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 85 22 +# CHECK-UNKNOWN: 22850c27 vs4r.v v24, (a0) # CHECK-INST: vs4r.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x85,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 85 62 +# CHECK-UNKNOWN: 62850c27 vs8r.v v24, (a0) # CHECK-INST: vs8r.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x85,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 85 e2 +# CHECK-UNKNOWN: e2850c27 vsm.v v24, 0(a0) # CHECK-INST: vsm.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0xb5,0x02] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 02 +# CHECK-UNKNOWN: 02b50c27 vse8.v v24, 0(a0), v0.t # CHECK-INST: vse8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x00] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 00 +# CHECK-UNKNOWN: 00050c27 vsse16.v v24, 0(a0), a1, v0.t # CHECK-INST: vsse16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 08 +# CHECK-UNKNOWN: 08b55c27 vsuxei8.v v24, 0(a0), v4, v0.t # CHECK-INST: vsuxei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x04] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 04 +# CHECK-UNKNOWN: 04450c27 vsoxei32.v v24, 0(a0), v4, v0.t # CHECK-INST: vsoxei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 0c +# CHECK-UNKNOWN: 0c456c27 diff --git a/llvm/test/MC/RISCV/rvv/sub.s b/llvm/test/MC/RISCV/rvv/sub.s index 3cc75ae730e7e..6a637d9207eeb 100644 --- a/llvm/test/MC/RISCV/rvv/sub.s +++ b/llvm/test/MC/RISCV/rvv/sub.s @@ -12,298 +12,298 @@ vsub.vv v8, v4, v20, v0.t # CHECK-INST: vsub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 08 +# CHECK-UNKNOWN: 084a0457 vsub.vv v8, v4, v20 # CHECK-INST: vsub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 0a +# CHECK-UNKNOWN: 0a4a0457 vsub.vx v8, v4, a0, v0.t # CHECK-INST: vsub.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x08] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 08 +# CHECK-UNKNOWN: 08454457 vsub.vx v8, v4, a0 # CHECK-INST: vsub.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x0a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 0a +# CHECK-UNKNOWN: 0a454457 vrsub.vx v8, v4, a0, v0.t # CHECK-INST: vrsub.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 0c +# CHECK-UNKNOWN: 0c454457 vrsub.vx v8, v4, a0 # CHECK-INST: vrsub.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 0e +# CHECK-UNKNOWN: 0e454457 vrsub.vi v8, v4, 15, v0.t # CHECK-INST: vrsub.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x0c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 0c +# CHECK-UNKNOWN: 0c47b457 vrsub.vi v8, v4, 15 # CHECK-INST: vrsub.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x0e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 0e +# CHECK-UNKNOWN: 0e47b457 vwsubu.vv v8, v4, v20, v0.t # CHECK-INST: vwsubu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a c8 +# CHECK-UNKNOWN: c84a2457 vwsubu.vv v8, v4, v20 # CHECK-INST: vwsubu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ca +# CHECK-UNKNOWN: ca4a2457 vwsubu.vx v8, v4, a0, v0.t # CHECK-INST: vwsubu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 c8 +# CHECK-UNKNOWN: c8456457 vwsubu.vx v8, v4, a0 # CHECK-INST: vwsubu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ca +# CHECK-UNKNOWN: ca456457 vwsub.vv v8, v4, v20, v0.t # CHECK-INST: vwsub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a cc +# CHECK-UNKNOWN: cc4a2457 vwsub.vv v8, v4, v20 # CHECK-INST: vwsub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a ce +# CHECK-UNKNOWN: ce4a2457 vwsub.vx v8, v4, a0, v0.t # CHECK-INST: vwsub.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 cc +# CHECK-UNKNOWN: cc456457 vwsub.vx v8, v4, a0 # CHECK-INST: vwsub.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 ce +# CHECK-UNKNOWN: ce456457 vwsubu.wv v8, v4, v20, v0.t # CHECK-INST: vwsubu.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xd8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a d8 +# CHECK-UNKNOWN: d84a2457 vwsubu.wv v8, v4, v20 # CHECK-INST: vwsubu.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xda] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a da +# CHECK-UNKNOWN: da4a2457 vwsubu.wx v8, v4, a0, v0.t # CHECK-INST: vwsubu.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xd8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 d8 +# CHECK-UNKNOWN: d8456457 vwsubu.wx v8, v4, a0 # CHECK-INST: vwsubu.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xda] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 da +# CHECK-UNKNOWN: da456457 vwsub.wv v8, v4, v20, v0.t # CHECK-INST: vwsub.wv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0xdc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a dc +# CHECK-UNKNOWN: dc4a2457 vwsub.wv v8, v4, v20 # CHECK-INST: vwsub.wv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0xde] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a de +# CHECK-UNKNOWN: de4a2457 vwsub.wx v8, v4, a0, v0.t # CHECK-INST: vwsub.wx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0xdc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 dc +# CHECK-UNKNOWN: dc456457 vwsub.wx v8, v4, a0 # CHECK-INST: vwsub.wx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0xde] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 de +# CHECK-UNKNOWN: de456457 vsbc.vvm v8, v4, v20, v0 # CHECK-INST: vsbc.vvm v8, v4, v20, v0 # CHECK-ENCODING: [0x57,0x04,0x4a,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 48 +# CHECK-UNKNOWN: 484a0457 vsbc.vvm v4, v4, v20, v0 # CHECK-INST: vsbc.vvm v4, v4, v20, v0 # CHECK-ENCODING: [0x57,0x02,0x4a,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 02 4a 48 +# CHECK-UNKNOWN: 484a0257 vsbc.vvm v8, v4, v8, v0 # CHECK-INST: vsbc.vvm v8, v4, v8, v0 # CHECK-ENCODING: [0x57,0x04,0x44,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 44 48 +# CHECK-UNKNOWN: 48440457 vsbc.vxm v8, v4, a0, v0 # CHECK-INST: vsbc.vxm v8, v4, a0, v0 # CHECK-ENCODING: [0x57,0x44,0x45,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 48 +# CHECK-UNKNOWN: 48454457 vmsbc.vvm v8, v4, v20, v0 # CHECK-INST: vmsbc.vvm v8, v4, v20, v0 # CHECK-ENCODING: [0x57,0x04,0x4a,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 4c +# CHECK-UNKNOWN: 4c4a0457 vmsbc.vvm v4, v4, v20, v0 # CHECK-INST: vmsbc.vvm v4, v4, v20, v0 # CHECK-ENCODING: [0x57,0x02,0x4a,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 02 4a 4c +# CHECK-UNKNOWN: 4c4a0257 vmsbc.vvm v8, v4, v8, v0 # CHECK-INST: vmsbc.vvm v8, v4, v8, v0 # CHECK-ENCODING: [0x57,0x04,0x44,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 44 4c +# CHECK-UNKNOWN: 4c440457 vmsbc.vxm v8, v4, a0, v0 # CHECK-INST: vmsbc.vxm v8, v4, a0, v0 # CHECK-ENCODING: [0x57,0x44,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 4c +# CHECK-UNKNOWN: 4c454457 vmsbc.vv v8, v4, v20 # CHECK-INST: vmsbc.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 4e +# CHECK-UNKNOWN: 4e4a0457 vmsbc.vx v8, v4, a0 # CHECK-INST: vmsbc.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 4e +# CHECK-UNKNOWN: 4e454457 vssubu.vv v8, v4, v20, v0.t # CHECK-INST: vssubu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 88 +# CHECK-UNKNOWN: 884a0457 vssubu.vv v8, v4, v20 # CHECK-INST: vssubu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 8a +# CHECK-UNKNOWN: 8a4a0457 vssubu.vx v8, v4, a0, v0.t # CHECK-INST: vssubu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 88 +# CHECK-UNKNOWN: 88454457 vssubu.vx v8, v4, a0 # CHECK-INST: vssubu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 8a +# CHECK-UNKNOWN: 8a454457 vssub.vv v8, v4, v20, v0.t # CHECK-INST: vssub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 8c +# CHECK-UNKNOWN: 8c4a0457 vssub.vv v8, v4, v20 # CHECK-INST: vssub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 8e +# CHECK-UNKNOWN: 8e4a0457 vssub.vx v8, v4, a0, v0.t # CHECK-INST: vssub.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 8c +# CHECK-UNKNOWN: 8c454457 vssub.vx v8, v4, a0 # CHECK-INST: vssub.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 8e +# CHECK-UNKNOWN: 8e454457 vasub.vv v8, v4, v20, v0.t # CHECK-INST: vasub.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 2c +# CHECK-UNKNOWN: 2c4a2457 vasub.vv v8, v4, v20 # CHECK-INST: vasub.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 2e +# CHECK-UNKNOWN: 2e4a2457 vasub.vx v8, v4, a0, v0.t # CHECK-INST: vasub.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 2c +# CHECK-UNKNOWN: 2c456457 vasub.vx v8, v4, a0 # CHECK-INST: vasub.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 2e +# CHECK-UNKNOWN: 2e456457 vasubu.vv v8, v4, v20, v0.t # CHECK-INST: vasubu.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x24,0x4a,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 28 +# CHECK-UNKNOWN: 284a2457 vasubu.vv v8, v4, v20 # CHECK-INST: vasubu.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x24,0x4a,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 24 4a 2a +# CHECK-UNKNOWN: 2a4a2457 vasubu.vx v8, v4, a0, v0.t # CHECK-INST: vasubu.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x64,0x45,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 28 +# CHECK-UNKNOWN: 28456457 vasubu.vx v8, v4, a0 # CHECK-INST: vasubu.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x64,0x45,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 64 45 2a +# CHECK-UNKNOWN: 2a456457 diff --git a/llvm/test/MC/RISCV/rvv/vsetvl.s b/llvm/test/MC/RISCV/rvv/vsetvl.s index 69a48d24f1907..c9197d8917a47 100644 --- a/llvm/test/MC/RISCV/rvv/vsetvl.s +++ b/llvm/test/MC/RISCV/rvv/vsetvl.s @@ -13,149 +13,149 @@ vsetvli a2, a0, 0x224 # CHECK-INST: vsetvli a2, a0, 548 # CHECK-ENCODING: [0x57,0x76,0x45,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 45 22 +# CHECK-UNKNOWN: 22457657 vsetvli a2, a0, 0xd0 # CHECK-INST: vsetvli a2, a0, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 0d +# CHECK-UNKNOWN: 0d057657 vsetvli a2, a0, 0xd1 # CHECK-INST: vsetvli a2, a0, e32, m2, ta, ma # CHECK-ENCODING: [0x57,0x76,0x15,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 15 0d +# CHECK-UNKNOWN: 0d157657 vsetvli a2, a0, 0x50 # CHECK-INST: vsetvli a2, a0, e32, m1, ta, mu # CHECK-ENCODING: [0x57,0x76,0x05,0x05] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 05 +# CHECK-UNKNOWN: 05057657 vsetvli a2, a0, 0x90 # CHECK-INST: vsetvli a2, a0, e32, m1, tu, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x09] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 09 +# CHECK-UNKNOWN: 09057657 vsetvli a2, a0, 144 # CHECK-INST: vsetvli a2, a0, e32, m1, tu, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x09] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 09 +# CHECK-UNKNOWN: 09057657 vsetvli a2, a0, e32, m1, ta, ma # CHECK-INST: vsetvli a2, a0, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 0d +# CHECK-UNKNOWN: 0d057657 vsetvli a2, a0, e32, m2, ta, ma # CHECK-INST: vsetvli a2, a0, e32, m2, ta, ma # CHECK-ENCODING: [0x57,0x76,0x15,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 15 0d +# CHECK-UNKNOWN: 0d157657 vsetvli a2, a0, e32, m4, ta, ma # CHECK-INST: vsetvli a2, a0, e32, m4, ta, ma # CHECK-ENCODING: [0x57,0x76,0x25,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 25 0d +# CHECK-UNKNOWN: 0d257657 vsetvli a2, a0, e32, m8, ta, ma # CHECK-INST: vsetvli a2, a0, e32, m8, ta, ma # CHECK-ENCODING: [0x57,0x76,0x35,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 35 0d +# CHECK-UNKNOWN: 0d357657 vsetvli a2, a0, e32, mf2, ta, ma # CHECK-INST: vsetvli a2, a0, e32, mf2, ta, ma # CHECK-ENCODING: [0x57,0x76,0x75,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 75 0d +# CHECK-UNKNOWN: 0d757657 vsetvli a2, a0, e32, mf4, ta, ma # CHECK-INST: vsetvli a2, a0, e32, mf4, ta, ma # CHECK-ENCODING: [0x57,0x76,0x65,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 65 0d +# CHECK-UNKNOWN: 0d657657 vsetvli a2, a0, e32, mf8, ta, ma # CHECK-INST: vsetvli a2, a0, e32, mf8, ta, ma # CHECK-ENCODING: [0x57,0x76,0x55,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 55 0d +# CHECK-UNKNOWN: 0d557657 vsetvli a2, a0, e32, m1, ta, ma # CHECK-INST: vsetvli a2, a0, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x0d] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 0d +# CHECK-UNKNOWN: 0d057657 vsetvli a2, a0, e32, m1, tu, ma # CHECK-INST: vsetvli a2, a0, e32, m1, tu, ma # CHECK-ENCODING: [0x57,0x76,0x05,0x09] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 09 +# CHECK-UNKNOWN: 09057657 vsetvli a2, a0, e32, m1, ta, mu # CHECK-INST: vsetvli a2, a0, e32, m1, ta, mu # CHECK-ENCODING: [0x57,0x76,0x05,0x05] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 05 +# CHECK-UNKNOWN: 05057657 vsetvli a2, a0, e32, m1, tu, mu # CHECK-INST: vsetvli a2, a0, e32, m1 # CHECK-ENCODING: [0x57,0x76,0x05,0x01] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 05 01 +# CHECK-UNKNOWN: 01057657 vsetvl a2, a0, a1 # CHECK-INST: vsetvl a2, a0, a1 # CHECK-ENCODING: [0x57,0x76,0xb5,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 b5 80 +# CHECK-UNKNOWN: 80b57657 # reserved filed: vlmul[2:0]=4, vsew[2:0]=0b1xx, non-zero bits 8/9/10. vsetivli a2, 0, 0x224 # CHECK-INST: vsetivli a2, 0, 548 # CHECK-ENCODING: [0x57,0x76,0x40,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 40 e2 +# CHECK-UNKNOWN: e2407657 vsetivli a2, 0, 0xd0 # CHECK-INST: vsetivli a2, 0, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0x76,0x00,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 00 cd +# CHECK-UNKNOWN: cd007657 vsetivli a2, 15, 0xd0 # CHECK-INST: vsetivli a2, 15, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0xf6,0x07,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 f6 07 cd +# CHECK-UNKNOWN: cd07f657 vsetivli a2, 15, 208 # CHECK-INST: vsetivli a2, 15, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0xf6,0x07,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 f6 07 cd +# CHECK-UNKNOWN: cd07f657 vsetivli a2, 0, e32, m1, ta, ma # CHECK-INST: vsetivli a2, 0, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0x76,0x00,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 76 00 cd +# CHECK-UNKNOWN: cd007657 vsetivli a2, 15, e32, m1, ta, ma # CHECK-INST: vsetivli a2, 15, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0xf6,0x07,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 f6 07 cd +# CHECK-UNKNOWN: cd07f657 vsetivli a2, 31, e32, m1, ta, ma # CHECK-INST: vsetivli a2, 31, e32, m1, ta, ma # CHECK-ENCODING: [0x57,0xf6,0x0f,0xcd] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 f6 0f cd +# CHECK-UNKNOWN: cd0ff657 diff --git a/llvm/test/MC/RISCV/rvv/xor.s b/llvm/test/MC/RISCV/rvv/xor.s index 5ea0f694e0d64..572388ed2267a 100644 --- a/llvm/test/MC/RISCV/rvv/xor.s +++ b/llvm/test/MC/RISCV/rvv/xor.s @@ -12,46 +12,46 @@ vxor.vv v8, v4, v20, v0.t # CHECK-INST: vxor.vv v8, v4, v20, v0.t # CHECK-ENCODING: [0x57,0x04,0x4a,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 2c +# CHECK-UNKNOWN: 2c4a0457 vxor.vv v8, v4, v20 # CHECK-INST: vxor.vv v8, v4, v20 # CHECK-ENCODING: [0x57,0x04,0x4a,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 04 4a 2e +# CHECK-UNKNOWN: 2e4a0457 vxor.vx v8, v4, a0, v0.t # CHECK-INST: vxor.vx v8, v4, a0, v0.t # CHECK-ENCODING: [0x57,0x44,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 2c +# CHECK-UNKNOWN: 2c454457 vxor.vx v8, v4, a0 # CHECK-INST: vxor.vx v8, v4, a0 # CHECK-ENCODING: [0x57,0x44,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 44 45 2e +# CHECK-UNKNOWN: 2e454457 vxor.vi v8, v4, 15, v0.t # CHECK-INST: vxor.vi v8, v4, 15, v0.t # CHECK-ENCODING: [0x57,0xb4,0x47,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 2c +# CHECK-UNKNOWN: 2c47b457 vxor.vi v8, v4, 15 # CHECK-INST: vxor.vi v8, v4, 15 # CHECK-ENCODING: [0x57,0xb4,0x47,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 47 2e +# CHECK-UNKNOWN: 2e47b457 vnot.v v8, v4, v0.t # CHECK-INST: vnot.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0xb4,0x4f,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 2c +# CHECK-UNKNOWN: 2c4fb457 vnot.v v8, v4 # CHECK-INST: vnot.v v8, v4 # CHECK-ENCODING: [0x57,0xb4,0x4f,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 57 b4 4f 2e +# CHECK-UNKNOWN: 2e4fb457 diff --git a/llvm/test/MC/RISCV/rvv/xsfvcp.s b/llvm/test/MC/RISCV/rvv/xsfvcp.s index a137311f575a5..4298bf7a7b7ae 100644 --- a/llvm/test/MC/RISCV/rvv/xsfvcp.s +++ b/llvm/test/MC/RISCV/rvv/xsfvcp.s @@ -21,166 +21,166 @@ sf.vc.x 0x3, 0xf, 0x1f, a1 # CHECK-INST: sf.vc.x 3, 15, 31, a1 # CHECK-ENCODING: [0xdb,0xcf,0xf5,0x0e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db cf f5 0e +# CHECK-UNKNOWN: 0ef5cfdb sf.vc.i 0x3, 0xf, 0x1f, 15 # CHECK-INST: sf.vc.i 3, 15, 31, 15 # CHECK-ENCODING: [0xdb,0xbf,0xf7,0x0e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db bf f7 0e +# CHECK-UNKNOWN: 0ef7bfdb sf.vc.vv 0x3, 0x1f, v2, v1 # CHECK-INST: sf.vc.vv 3, 31, v2, v1 # CHECK-ENCODING: [0xdb,0x8f,0x20,0x2e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db 8f 20 2e +# CHECK-UNKNOWN: 2e208fdb sf.vc.xv 0x3, 0x1f, v2, a1 # CHECK-INST: sf.vc.xv 3, 31, v2, a1 # CHECK-ENCODING: [0xdb,0xcf,0x25,0x2e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db cf 25 2e +# CHECK-UNKNOWN: 2e25cfdb sf.vc.iv 0x3, 0x1f, v2, 15 # CHECK-INST: sf.vc.iv 3, 31, v2, 15 # CHECK-ENCODING: [0xdb,0xbf,0x27,0x2e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db bf 27 2e +# CHECK-UNKNOWN: 2e27bfdb sf.vc.fv 0x1, 0x1f, v2, fa1 # CHECK-INST: sf.vc.fv 1, 31, v2, fa1 # CHECK-ENCODING: [0xdb,0xdf,0x25,0x2e] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: db df 25 2e +# CHECK-UNKNOWN: 2e25dfdb sf.vc.vvv 0x3, v0, v2, v1 # CHECK-INST: sf.vc.vvv 3, v0, v2, v1 # CHECK-ENCODING: [0x5b,0x80,0x20,0xae] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b 80 20 ae +# CHECK-UNKNOWN: ae20805b sf.vc.xvv 0x3, v0, v2, a1 # CHECK-INST: sf.vc.xvv 3, v0, v2, a1 # CHECK-ENCODING: [0x5b,0xc0,0x25,0xae] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 25 ae +# CHECK-UNKNOWN: ae25c05b sf.vc.ivv 0x3, v0, v2, 15 # CHECK-INST: sf.vc.ivv 3, v0, v2, 15 # CHECK-ENCODING: [0x5b,0xb0,0x27,0xae] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 27 ae +# CHECK-UNKNOWN: ae27b05b sf.vc.fvv 0x1, v0, v2, fa1 # CHECK-INST: sf.vc.fvv 1, v0, v2, fa1 # CHECK-ENCODING: [0x5b,0xd0,0x25,0xae] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b d0 25 ae +# CHECK-UNKNOWN: ae25d05b sf.vc.vvw 0x3, v0, v2, v1 # CHECK-INST: sf.vc.vvw 3, v0, v2, v1 # CHECK-ENCODING: [0x5b,0x80,0x20,0xfe] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b 80 20 fe +# CHECK-UNKNOWN: fe20805b sf.vc.xvw 0x3, v0, v2, a1 # CHECK-INST: sf.vc.xvw 3, v0, v2, a1 # CHECK-ENCODING: [0x5b,0xc0,0x25,0xfe] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 25 fe +# CHECK-UNKNOWN: fe25c05b sf.vc.ivw 0x3, v0, v2, 15 # CHECK-INST: sf.vc.ivw 3, v0, v2, 15 # CHECK-ENCODING: [0x5b,0xb0,0x27,0xfe] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 27 fe +# CHECK-UNKNOWN: fe27b05b sf.vc.fvw 0x1, v0, v2, fa1 # CHECK-INST: sf.vc.fvw 1, v0, v2, fa1 # CHECK-ENCODING: [0x5b,0xd0,0x25,0xfe] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b d0 25 fe +# CHECK-UNKNOWN: fe25d05b sf.vc.v.x 0x3, 0xf, v0, a1 # CHECK-INST: sf.vc.v.x 3, 15, v0, a1 # CHECK-ENCODING: [0x5b,0xc0,0xf5,0x0c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 f5 0c +# CHECK-UNKNOWN: 0cf5c05b sf.vc.v.i 0x3, 0xf, v0, 15 # CHECK-INST: sf.vc.v.i 3, 15, v0, 15 # CHECK-ENCODING: [0x5b,0xb0,0xf7,0x0c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 f7 0c +# CHECK-UNKNOWN: 0cf7b05b sf.vc.v.vv 0x3, v0, v2, v1 # CHECK-INST: sf.vc.v.vv 3, v0, v2, v1 # CHECK-ENCODING: [0x5b,0x80,0x20,0x2c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b 80 20 2c +# CHECK-UNKNOWN: 2c20805b sf.vc.v.xv 0x3, v0, v2, a1 # CHECK-INST: sf.vc.v.xv 3, v0, v2, a1 # CHECK-ENCODING: [0x5b,0xc0,0x25,0x2c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 25 2c +# CHECK-UNKNOWN: 2c25c05b sf.vc.v.iv 0x3, v0, v2, 15 # CHECK-INST: sf.vc.v.iv 3, v0, v2, 15 # CHECK-ENCODING: [0x5b,0xb0,0x27,0x2c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 27 2c +# CHECK-UNKNOWN: 2c27b05b sf.vc.v.fv 0x1, v0, v2, fa1 # CHECK-INST: sf.vc.v.fv 1, v0, v2, fa1 # CHECK-ENCODING: [0x5b,0xd0,0x25,0x2c] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b d0 25 2c +# CHECK-UNKNOWN: 2c25d05b sf.vc.v.vvv 0x3, v0, v2, v1 # CHECK-INST: sf.vc.v.vvv 3, v0, v2, v1 # CHECK-ENCODING: [0x5b,0x80,0x20,0xac] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b 80 20 ac +# CHECK-UNKNOWN: ac20805b sf.vc.v.xvv 0x3, v0, v2, a1 # CHECK-INST: sf.vc.v.xvv 3, v0, v2, a1 # CHECK-ENCODING: [0x5b,0xc0,0x25,0xac] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 25 ac +# CHECK-UNKNOWN: ac25c05b sf.vc.v.ivv 0x3, v0, v2, 15 # CHECK-INST: sf.vc.v.ivv 3, v0, v2, 15 # CHECK-ENCODING: [0x5b,0xb0,0x27,0xac] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 27 ac +# CHECK-UNKNOWN: ac27b05b sf.vc.v.fvv 0x1, v0, v2, fa1 # CHECK-INST: sf.vc.v.fvv 1, v0, v2, fa1 # CHECK-ENCODING: [0x5b,0xd0,0x25,0xac] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b d0 25 ac +# CHECK-UNKNOWN: ac25d05b sf.vc.v.vvw 0x3, v0, v2, v1 # CHECK-INST: sf.vc.v.vvw 3, v0, v2, v1 # CHECK-ENCODING: [0x5b,0x80,0x20,0xfc] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b 80 20 fc +# CHECK-UNKNOWN: fc20805b sf.vc.v.xvw 0x3, v0, v2, a1 # CHECK-INST: sf.vc.v.xvw 3, v0, v2, a1 # CHECK-ENCODING: [0x5b,0xc0,0x25,0xfc] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b c0 25 fc +# CHECK-UNKNOWN: fc25c05b sf.vc.v.ivw 0x3, v0, v2, 15 # CHECK-INST: sf.vc.v.ivw 3, v0, v2, 15 # CHECK-ENCODING: [0x5b,0xb0,0x27,0xfc] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b b0 27 fc +# CHECK-UNKNOWN: fc27b05b sf.vc.v.fvw 0x1, v0, v2, fa1 # CHECK-INST: sf.vc.v.fvw 1, v0, v2, fa1 # CHECK-ENCODING: [0x5b,0xd0,0x25,0xfc] # CHECK-ERROR: instruction requires the following: 'XSfvcp' (SiFive Custom Vector Coprocessor Interface Instructions){{$}} -# CHECK-UNKNOWN: 5b d0 25 fc +# CHECK-UNKNOWN: fc25d05b diff --git a/llvm/test/MC/RISCV/rvv/xsfvfnrclip.s b/llvm/test/MC/RISCV/rvv/xsfvfnrclip.s index d8b184659ac4a..7508d44bc916b 100644 --- a/llvm/test/MC/RISCV/rvv/xsfvfnrclip.s +++ b/llvm/test/MC/RISCV/rvv/xsfvfnrclip.s @@ -12,22 +12,22 @@ sf.vfnrclip.xu.f.qf v4, v8, fa2 # CHECK-INST: sf.vfnrclip.xu.f.qf v4, v8, fa2 # CHECK-ENCODING: [0x5b,0x52,0x86,0x8a] # CHECK-ERROR: instruction requires the following: 'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions) -# CHECK-UNKNOWN: 5b 52 86 8a +# CHECK-UNKNOWN: 8a86525b sf.vfnrclip.xu.f.qf v4, v8, fa2, v0.t # CHECK-INST: sf.vfnrclip.xu.f.qf v4, v8, fa2 # CHECK-ENCODING: [0x5b,0x52,0x86,0x88] # CHECK-ERROR: instruction requires the following: 'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions) -# CHECK-UNKNOWN: 5b 52 86 88 +# CHECK-UNKNOWN: 8886525b sf.vfnrclip.x.f.qf v4, v8, fa2 # CHECK-INST: sf.vfnrclip.x.f.qf v4, v8, fa2 # CHECK-ENCODING: [0x5b,0x52,0x86,0x8e] # CHECK-ERROR: instruction requires the following: 'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions) -# CHECK-UNKNOWN: 5b 52 86 8e +# CHECK-UNKNOWN: 8e86525b sf.vfnrclip.x.f.qf v4, v8, fa2, v0.t # CHECK-INST: sf.vfnrclip.x.f.qf v4, v8, fa2 # CHECK-ENCODING: [0x5b,0x52,0x86,0x8c] # CHECK-ERROR: instruction requires the following: 'XSfvfnrclipxfqf' (SiFive FP32-to-int8 Ranged Clip Instructions) -# CHECK-UNKNOWN: 5b 52 86 8c +# CHECK-UNKNOWN: 8c86525b diff --git a/llvm/test/MC/RISCV/rvv/xsfvfwmacc.s b/llvm/test/MC/RISCV/rvv/xsfvfwmacc.s index ba054fff2bd87..a9843c350fc80 100644 --- a/llvm/test/MC/RISCV/rvv/xsfvfwmacc.s +++ b/llvm/test/MC/RISCV/rvv/xsfvfwmacc.s @@ -12,4 +12,4 @@ sf.vfwmacc.4x4x4 v8, v4, v20 # CHECK-INST: sf.vfwmacc.4x4x4 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x14,0x42,0xf3] # CHECK-ERROR: instruction requires the following: 'XSfvfwmaccqqq' (SiFive Matrix Multiply Accumulate Instruction and 4-by-4)) -# CHECK-UNKNOWN: 5b 14 42 f3 +# CHECK-UNKNOWN: f342145b diff --git a/llvm/test/MC/RISCV/rvv/xsfvqmacc.s b/llvm/test/MC/RISCV/rvv/xsfvqmacc.s index ba19f21844869..81703c847d74e 100644 --- a/llvm/test/MC/RISCV/rvv/xsfvqmacc.s +++ b/llvm/test/MC/RISCV/rvv/xsfvqmacc.s @@ -12,46 +12,46 @@ sf.vqmaccu.2x8x2 v8, v4, v20 # CHECK-INST: sf.vqmaccu.2x8x2 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xb3] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2)) -# CHECK-UNKNOWN: 5b 24 42 b3 +# CHECK-UNKNOWN: b342245b sf.vqmacc.2x8x2 v8, v4, v20 # CHECK-INST: sf.vqmacc.2x8x2 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xb7] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2)) -# CHECK-UNKNOWN: 5b 24 42 b7 +# CHECK-UNKNOWN: b742245b sf.vqmaccus.2x8x2 v8, v4, v20 # CHECK-INST: sf.vqmaccus.2x8x2 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xbb] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2)) -# CHECK-UNKNOWN: 5b 24 42 bb +# CHECK-UNKNOWN: bb42245b sf.vqmaccsu.2x8x2 v8, v4, v20 # CHECK-INST: sf.vqmaccsu.2x8x2 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xbf] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccdod' (SiFive Int8 Matrix Multiplication Instructions (2-by-8 and 8-by-2)) -# CHECK-UNKNOWN: 5b 24 42 bf +# CHECK-UNKNOWN: bf42245b sf.vqmaccu.4x8x4 v8, v4, v20 # CHECK-INST: sf.vqmaccu.4x8x4 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xf3] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4)) -# CHECK-UNKNOWN: 5b 24 42 f3 +# CHECK-UNKNOWN: f342245b sf.vqmacc.4x8x4 v8, v4, v20 # CHECK-INST: sf.vqmacc.4x8x4 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xf7] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4)) -# CHECK-UNKNOWN: 5b 24 42 f7 +# CHECK-UNKNOWN: f742245b sf.vqmaccus.4x8x4 v8, v4, v20 # CHECK-INST: sf.vqmaccus.4x8x4 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xfb] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4)) -# CHECK-UNKNOWN: 5b 24 42 fb +# CHECK-UNKNOWN: fb42245b sf.vqmaccsu.4x8x4 v8, v4, v20 # CHECK-INST: sf.vqmaccsu.4x8x4 v8, v4, v20 # CHECK-ENCODING: [0x5b,0x24,0x42,0xff] # CHECK-ERROR: instruction requires the following: 'XSfvqmaccqoq' (SiFive Int8 Matrix Multiplication Instructions (4-by-8 and 8-by-4)) -# CHECK-UNKNOWN: 5b 24 42 ff +# CHECK-UNKNOWN: ff42245b diff --git a/llvm/test/MC/RISCV/rvv/zvbb.s b/llvm/test/MC/RISCV/rvv/zvbb.s index 04e5ad6e03f71..d9d1f6f42d325 100644 --- a/llvm/test/MC/RISCV/rvv/zvbb.s +++ b/llvm/test/MC/RISCV/rvv/zvbb.s @@ -12,40 +12,40 @@ vbrev.v v10, v9, v0.t # CHECK-INST: vbrev.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0x25,0x95,0x48] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 25 95 48 +# CHECK-UNKNOWN: 48952557 vclz.v v10, v9, v0.t # CHECK-INST: vclz.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0x25,0x96,0x48] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 25 96 48 +# CHECK-UNKNOWN: 48962557 vcpop.v v10, v9, v0.t # CHECK-INST: vcpop.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0x25,0x97,0x48] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 25 97 48 +# CHECK-UNKNOWN: 48972557 vctz.v v10, v9, v0.t # CHECK-INST: vctz.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0xa5,0x96,0x48] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 a5 96 48 +# CHECK-UNKNOWN: 4896a557 vwsll.vv v10, v9, v8, v0.t # CHECK-INST: vwsll.vv v10, v9, v8, v0.t # CHECK-ENCODING: [0x57,0x05,0x94,0xd4] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 05 94 d4 +# CHECK-UNKNOWN: d4940557 vwsll.vx v10, v9, a0, v0.t # CHECK-INST: vwsll.vx v10, v9, a0, v0.t # CHECK-ENCODING: [0x57,0x45,0x95,0xd4] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 45 95 d4 +# CHECK-UNKNOWN: d4954557 vwsll.vi v10, v9, 29, v0.t # CHECK-INST: vwsll.vi v10, v9, 29, v0.t # CHECK-ENCODING: [0x57,0xb5,0x9e,0xd4] # CHECK-ERROR: instruction requires the following: 'Zvbb' (Vector basic bit-manipulation instructions){{$}} -# CHECK-UNKNOWN: 57 b5 9e d4 +# CHECK-UNKNOWN: d49eb557 diff --git a/llvm/test/MC/RISCV/rvv/zvbc.s b/llvm/test/MC/RISCV/rvv/zvbc.s index b32349a2db133..0eb02d153b79b 100644 --- a/llvm/test/MC/RISCV/rvv/zvbc.s +++ b/llvm/test/MC/RISCV/rvv/zvbc.s @@ -12,22 +12,22 @@ vclmul.vv v10, v9, v8 # CHECK-INST: vclmul.vv v10, v9, v8 # CHECK-ENCODING: [0x57,0x25,0x94,0x32] # CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}} -# CHECK-UNKNOWN: 57 25 94 32 +# CHECK-UNKNOWN: 32942557 vclmul.vx v10, v9, a0 # CHECK-INST: vclmul.vx v10, v9, a0 # CHECK-ENCODING: [0x57,0x65,0x95,0x32] # CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}} -# CHECK-UNKNOWN: 57 65 95 32 +# CHECK-UNKNOWN: 32956557 vclmulh.vv v10, v9, v8 # CHECK-INST: vclmulh.vv v10, v9, v8 # CHECK-ENCODING: [0x57,0x25,0x94,0x36] # CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}} -# CHECK-UNKNOWN: 57 25 94 36 +# CHECK-UNKNOWN: 36942557 vclmulh.vx v10, v9, a0 # CHECK-INST: vclmulh.vx v10, v9, a0 # CHECK-ENCODING: [0x57,0x65,0x95,0x36] # CHECK-ERROR: instruction requires the following: 'Zvbc' (Vector Carryless Multiplication){{$}} -# CHECK-UNKNOWN: 57 65 95 36 +# CHECK-UNKNOWN: 36956557 diff --git a/llvm/test/MC/RISCV/rvv/zvfbfmin.s b/llvm/test/MC/RISCV/rvv/zvfbfmin.s index 1cbe027ef26cc..7965c2482b002 100644 --- a/llvm/test/MC/RISCV/rvv/zvfbfmin.s +++ b/llvm/test/MC/RISCV/rvv/zvfbfmin.s @@ -20,23 +20,23 @@ # CHECK-INST: vfncvtbf16.f.f.w v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x4e,0x48] # CHECK-ERROR: instruction requires the following: 'Zvfbfmin' (Vector BF16 Converts){{$}} -# CHECK-UNKNOWN: 57 94 4e 48 +# CHECK-UNKNOWN: 484e9457 vfncvtbf16.f.f.w v8, v4, v0.t # CHECK-INST: vfncvtbf16.f.f.w v8, v4 # CHECK-ENCODING: [0x57,0x94,0x4e,0x4a] # CHECK-ERROR: instruction requires the following: 'Zvfbfmin' (Vector BF16 Converts){{$}} -# CHECK-UNKNOWN: 57 94 4e 4a +# CHECK-UNKNOWN: 4a4e9457 vfncvtbf16.f.f.w v8, v4 # CHECK-INST: vfwcvtbf16.f.f.v v8, v4, v0.t # CHECK-ENCODING: [0x57,0x94,0x46,0x48] # CHECK-ERROR: instruction requires the following: 'Zvfbfmin' (Vector BF16 Converts){{$}} -# CHECK-UNKNOWN: 57 94 46 48 +# CHECK-UNKNOWN: 48469457 vfwcvtbf16.f.f.v v8, v4, v0.t # CHECK-INST: vfwcvtbf16.f.f.v v8, v4 # CHECK-ENCODING: [0x57,0x94,0x46,0x4a] # CHECK-ERROR: instruction requires the following: 'Zvfbfmin' (Vector BF16 Converts){{$}} -# CHECK-UNKNOWN: 57 94 46 4a +# CHECK-UNKNOWN: 4a469457 vfwcvtbf16.f.f.v v8, v4 diff --git a/llvm/test/MC/RISCV/rvv/zvfbfwma.s b/llvm/test/MC/RISCV/rvv/zvfbfwma.s index 5a30d9f19ab62..330dee58d8360 100644 --- a/llvm/test/MC/RISCV/rvv/zvfbfwma.s +++ b/llvm/test/MC/RISCV/rvv/zvfbfwma.s @@ -20,25 +20,25 @@ # CHECK-INST: vfwmaccbf16.vv v8, v20, v4, v0.t # CHECK-ENCODING: [0x57,0x14,0x4a,0xec] # CHECK-ERROR: instruction requires the following: 'Zvfbfwma' (Vector BF16 widening mul-add){{$}} -# CHECK-UNKNOWN: 57 14 4a ec +# CHECK-UNKNOWN: ec4a1457 vfwmaccbf16.vv v8, v20, v4, v0.t # CHECK-INST: vfwmaccbf16.vv v8, v20, v4 # CHECK-ENCODING: [0x57,0x14,0x4a,0xee] # CHECK-ERROR: instruction requires the following: 'Zvfbfwma' (Vector BF16 widening mul-add){{$}} -# CHECK-UNKNOWN: 57 14 4a ee +# CHECK-UNKNOWN: ee4a1457 vfwmaccbf16.vv v8, v20, v4 # CHECK-INST: vfwmaccbf16.vf v8, fa0, v4, v0.t # CHECK-ENCODING: [0x57,0x54,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'Zvfbfwma' (Vector BF16 widening mul-add){{$}} -# CHECK-UNKNOWN: 57 54 45 ec +# CHECK-UNKNOWN: ec455457 vfwmaccbf16.vf v8, fa0, v4, v0.t # CHECK-INST: vfwmaccbf16.vf v8, fa0, v4 # CHECK-ENCODING: [0x57,0x54,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'Zvfbfwma' (Vector BF16 widening mul-add){{$}} -# CHECK-UNKNOWN: 57 54 45 ee +# CHECK-UNKNOWN: ee455457 vfwmaccbf16.vf v8, fa0, v4 # Check scalar half FP load/store/move included in this extension. @@ -46,23 +46,23 @@ vfwmaccbf16.vf v8, fa0, v4 # CHECK-INST: flh ft0, 12(a0) # CHECK-ENCODING: [0x07,0x10,0xc5,0x00] # CHECK-ERROR: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts){{$}} -# CHECK-UNKNOWN: 07 10 c5 00 +# CHECK-UNKNOWN: 00c51007 flh f0, 12(a0) # CHECK-INST: fsh ft6, 2047(s4) # CHECK-ENCODING: [0xa7,0x1f,0x6a,0x7e] # CHECK-ERROR: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts){{$}} -# CHECK-UNKNOWN: a7 1f 6a 7e +# CHECK-UNKNOWN: 7e6a1fa7 fsh f6, 2047(s4) # CHECK-INST: fmv.x.h a2, fs7 # CHECK-ENCODING: [0x53,0x86,0x0b,0xe4] # CHECK-ERROR: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts){{$}} -# CHECK-UNKNOWN: 53 86 0b e4 +# CHECK-UNKNOWN: e40b8653 fmv.x.h a2, fs7 # CHECK-INST: fmv.h.x ft1, a6 # CHECK-ENCODING: [0xd3,0x00,0x08,0xf4] # CHECK-ERROR: instruction requires the following: 'Zfh' (Half-Precision Floating-Point) or 'Zfhmin' (Half-Precision Floating-Point Minimal) or 'Zfbfmin' (Scalar BF16 Converts){{$}} -# CHECK-UNKNOWN: d3 00 08 f4 +# CHECK-UNKNOWN: f40800d3 fmv.h.x ft1, a6 diff --git a/llvm/test/MC/RISCV/rvv/zvkb.s b/llvm/test/MC/RISCV/rvv/zvkb.s index ae2dec18d33ca..1833ba860c900 100644 --- a/llvm/test/MC/RISCV/rvv/zvkb.s +++ b/llvm/test/MC/RISCV/rvv/zvkb.s @@ -12,52 +12,52 @@ vandn.vv v10, v9, v8, v0.t # CHECK-INST: vandn.vv v10, v9, v8, v0.t # CHECK-ENCODING: [0x57,0x05,0x94,0x04] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 05 94 04 +# CHECK-UNKNOWN: 04940557 vandn.vx v10, v9, a0, v0.t # CHECK-INST: vandn.vx v10, v9, a0, v0.t # CHECK-ENCODING: [0x57,0x45,0x95,0x04] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 45 95 04 +# CHECK-UNKNOWN: 04954557 vbrev8.v v10, v9, v0.t # CHECK-INST: vbrev8.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0x25,0x94,0x48] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 25 94 48 +# CHECK-UNKNOWN: 48942557 vrev8.v v10, v9, v0.t # CHECK-INST: vrev8.v v10, v9, v0.t # CHECK-ENCODING: [0x57,0xa5,0x94,0x48] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 a5 94 48 +# CHECK-UNKNOWN: 4894a557 vrol.vv v10, v9, v8, v0.t # CHECK-INST: vrol.vv v10, v9, v8, v0.t # CHECK-ENCODING: [0x57,0x05,0x94,0x54] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 05 94 54 +# CHECK-UNKNOWN: 54940557 vrol.vx v10, v9, a0, v0.t # CHECK-INST: vrol.vx v10, v9, a0, v0.t # CHECK-ENCODING: [0x57,0x45,0x95,0x54] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 45 95 54 +# CHECK-UNKNOWN: 54954557 vror.vv v10, v9, v8, v0.t # CHECK-INST: vror.vv v10, v9, v8, v0.t # CHECK-ENCODING: [0x57,0x05,0x94,0x50] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 05 94 50 +# CHECK-UNKNOWN: 50940557 vror.vx v10, v9, a0, v0.t # CHECK-INST: vror.vx v10, v9, a0, v0.t # CHECK-ENCODING: [0x57,0x45,0x95,0x50] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 45 95 50 +# CHECK-UNKNOWN: 50954557 vror.vi v10, v9, 33, v0.t # CHECK-INST: vror.vi v10, v9, 33, v0.t # CHECK-ENCODING: [0x57,0xb5,0x90,0x54] # CHECK-ERROR: instruction requires the following: 'Zvkb' (Vector Bit-manipulation used in Cryptography){{$}} -# CHECK-UNKNOWN: 57 b5 90 54 +# CHECK-UNKNOWN: 5490b557 diff --git a/llvm/test/MC/RISCV/rvv/zvkg.s b/llvm/test/MC/RISCV/rvv/zvkg.s index f2016bc116b65..48b84659e0aed 100644 --- a/llvm/test/MC/RISCV/rvv/zvkg.s +++ b/llvm/test/MC/RISCV/rvv/zvkg.s @@ -12,10 +12,10 @@ vghsh.vv v10, v9, v8 # CHECK-INST: vghsh.vv v10, v9, v8 # CHECK-ENCODING: [0x77,0x25,0x94,0xb2] # CHECK-ERROR: instruction requires the following: 'Zvkg' (Vector GCM instructions for Cryptography){{$}} -# CHECK-UNKNOWN: 77 25 94 b2 +# CHECK-UNKNOWN: b2942577 vgmul.vv v10, v9 # CHECK-INST: vgmul.vv v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x98,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvkg' (Vector GCM instructions for Cryptography){{$}} -# CHECK-UNKNOWN: 77 a5 98 a2 +# CHECK-UNKNOWN: a298a577 diff --git a/llvm/test/MC/RISCV/rvv/zvkned.s b/llvm/test/MC/RISCV/rvv/zvkned.s index e51a9cc562f12..bee3d74ee88dc 100644 --- a/llvm/test/MC/RISCV/rvv/zvkned.s +++ b/llvm/test/MC/RISCV/rvv/zvkned.s @@ -12,76 +12,76 @@ vaesdf.vv v10, v9 # CHECK-INST: vaesdf.vv v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x90,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 90 a2 +# CHECK-UNKNOWN: a290a577 vaesdf.vs v10, v9 # CHECK-INST: vaesdf.vs v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x90,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 90 a6 +# CHECK-UNKNOWN: a690a577 vaesef.vv v10, v9 # CHECK-INST: vaesef.vv v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x91,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 91 a2 +# CHECK-UNKNOWN: a291a577 vaesef.vs v10, v9 # CHECK-INST: vaesef.vs v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x91,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 91 a6 +# CHECK-UNKNOWN: a691a577 vaesdm.vv v10, v9 # CHECK-INST: vaesdm.vv v10, v9 # CHECK-ENCODING: [0x77,0x25,0x90,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 25 90 a2 +# CHECK-UNKNOWN: a2902577 vaesdm.vs v10, v9 # CHECK-INST: vaesdm.vs v10, v9 # CHECK-ENCODING: [0x77,0x25,0x90,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 25 90 a6 +# CHECK-UNKNOWN: a6902577 vaesem.vv v10, v9 # CHECK-INST: vaesem.vv v10, v9 # CHECK-ENCODING: [0x77,0x25,0x91,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 25 91 a2 +# CHECK-UNKNOWN: a2912577 vaesem.vs v10, v9 # CHECK-INST: vaesem.vs v10, v9 # CHECK-ENCODING: [0x77,0x25,0x91,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 25 91 a6 +# CHECK-UNKNOWN: a6912577 vaeskf1.vi v10, v9, 1 # CHECK-INST: vaeskf1.vi v10, v9, 1 # CHECK-ENCODING: [0x77,0xa5,0x90,0x8a] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 90 8a +# CHECK-UNKNOWN: 8a90a577 vaeskf1.vi v10, v9, 31 # CHECK-INST: vaeskf1.vi v10, v9, 31 # CHECK-ENCODING: [0x77,0xa5,0x9f,0x8a] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 9f 8a +# CHECK-UNKNOWN: 8a9fa577 vaeskf2.vi v10, v9, 2 # CHECK-INST: vaeskf2.vi v10, v9, 2 # CHECK-ENCODING: [0x77,0x25,0x91,0xaa] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 25 91 aa +# CHECK-UNKNOWN: aa912577 vaeskf2.vi v10, v9, 31 # CHECK-INST: vaeskf2.vi v10, v9, 31 # CHECK-ENCODING: [0x77,0xa5,0x9f,0xaa] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 9f aa +# CHECK-UNKNOWN: aa9fa577 vaesz.vs v10, v9 # CHECK-INST: vaesz.vs v10, v9 # CHECK-ENCODING: [0x77,0xa5,0x93,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvkned' (Vector AES Encryption & Decryption (Single Round)){{$}} -# CHECK-UNKNOWN: 77 a5 93 a6 +# CHECK-UNKNOWN: a693a577 diff --git a/llvm/test/MC/RISCV/rvv/zvknh.s b/llvm/test/MC/RISCV/rvv/zvknh.s index aa8033a5f2170..b16b9081f7e63 100644 --- a/llvm/test/MC/RISCV/rvv/zvknh.s +++ b/llvm/test/MC/RISCV/rvv/zvknh.s @@ -18,17 +18,17 @@ vsha2ms.vv v10, v9, v8 # CHECK-INST: vsha2ms.vv v10, v9, v8 # CHECK-ENCODING: [0x77,0x25,0x94,0xb6] -# CHECK-UNKNOWN: 77 25 94 b6 +# CHECK-UNKNOWN: b6942577 # CHECK-ERROR: instruction requires the following: 'Zvknha' or 'Zvknhb' (Vector SHA-2){{$}} vsha2ch.vv v10, v9, v8 # CHECK-INST: vsha2ch.vv v10, v9, v8 # CHECK-ENCODING: [0x77,0x25,0x94,0xba] -# CHECK-UNKNOWN: 77 25 94 ba +# CHECK-UNKNOWN: ba942577 # CHECK-ERROR: instruction requires the following: 'Zvknha' or 'Zvknhb' (Vector SHA-2){{$}} vsha2cl.vv v10, v9, v8 # CHECK-INST: vsha2cl.vv v10, v9, v8 # CHECK-ENCODING: [0x77,0x25,0x94,0xbe] -# CHECK-UNKNOWN: 77 25 94 be +# CHECK-UNKNOWN: be942577 # CHECK-ERROR: instruction requires the following: 'Zvknha' or 'Zvknhb' (Vector SHA-2){{$}} diff --git a/llvm/test/MC/RISCV/rvv/zvksed.s b/llvm/test/MC/RISCV/rvv/zvksed.s index 87c9713f8c653..f7a0949272ffa 100644 --- a/llvm/test/MC/RISCV/rvv/zvksed.s +++ b/llvm/test/MC/RISCV/rvv/zvksed.s @@ -12,22 +12,22 @@ vsm4k.vi v10, v9, 7 # CHECK-INST: vsm4k.vi v10, v9, 7 # CHECK-ENCODING: [0x77,0xa5,0x93,0x86] # CHECK-ERROR: instruction requires the following: 'Zvksed' (SM4 Block Cipher Instructions){{$}} -# CHECK-UNKNOWN: 77 a5 93 86 +# CHECK-UNKNOWN: 8693a577 vsm4k.vi v10, v9, 31 # CHECK-INST: vsm4k.vi v10, v9, 31 # CHECK-ENCODING: [0x77,0xa5,0x9f,0x86] # CHECK-ERROR: instruction requires the following: 'Zvksed' (SM4 Block Cipher Instructions){{$}} -# CHECK-UNKNOWN: 77 a5 9f 86 +# CHECK-UNKNOWN: 869fa577 vsm4r.vv v10, v9 # CHECK-INST: vsm4r.vv v10, v9 # CHECK-ENCODING: [0x77,0x25,0x98,0xa2] # CHECK-ERROR: instruction requires the following: 'Zvksed' (SM4 Block Cipher Instructions){{$}} -# CHECK-UNKNOWN: 77 25 98 a2 +# CHECK-UNKNOWN: a2982577 vsm4r.vs v10, v9 # CHECK-INST: vsm4r.vs v10, v9 # CHECK-ENCODING: [0x77,0x25,0x98,0xa6] # CHECK-ERROR: instruction requires the following: 'Zvksed' (SM4 Block Cipher Instructions){{$}} -# CHECK-UNKNOWN: 77 25 98 a6 +# CHECK-UNKNOWN: a6982577 diff --git a/llvm/test/MC/RISCV/rvv/zvksh.s b/llvm/test/MC/RISCV/rvv/zvksh.s index 06251ff6efe5c..ef1c654b4605f 100644 --- a/llvm/test/MC/RISCV/rvv/zvksh.s +++ b/llvm/test/MC/RISCV/rvv/zvksh.s @@ -12,17 +12,17 @@ vsm3c.vi v10, v9, 7 # CHECK-INST: vsm3c.vi v10, v9, 7 # CHECK-ENCODING: [0x77,0xa5,0x93,0xae] # CHECK-ERROR: instruction requires the following: 'Zvksh' (SM3 Hash Function Instructions){{$}} -# CHECK-UNKNOWN: 77 a5 93 ae +# CHECK-UNKNOWN: ae93a577 vsm3me.vv v10, v9, v8 # CHECK-INST: vsm3me.vv v10, v9, v8 # CHECK-ENCODING: [0x77,0x25,0x94,0x82] # CHECK-ERROR: instruction requires the following: 'Zvksh' (SM3 Hash Function Instructions){{$}} -# CHECK-UNKNOWN: 77 25 94 82 +# CHECK-UNKNOWN: 82942577 # vs1 is allowed to overlap, but not vs2. vsm3me.vv v10, v9, v10 # CHECK-INST: vsm3me.vv v10, v9, v10 # CHECK-ENCODING: [0x77,0x25,0x95,0x82] # CHECK-ERROR: instruction requires the following: 'Zvksh' (SM3 Hash Function Instructions){{$}} -# CHECK-UNKNOWN: 77 25 95 82 +# CHECK-UNKNOWN: 82952577 diff --git a/llvm/test/MC/RISCV/rvv/zvlsseg.s b/llvm/test/MC/RISCV/rvv/zvlsseg.s index 9a83ea9f8721f..65089e2261be2 100644 --- a/llvm/test/MC/RISCV/rvv/zvlsseg.s +++ b/llvm/test/MC/RISCV/rvv/zvlsseg.s @@ -13,3076 +13,3076 @@ vlseg2e8.v v8, (a0), v0.t # CHECK-INST: vlseg2e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 20 +# CHECK-UNKNOWN: 20050407 vlseg2e8.v v8, (a0) # CHECK-INST: vlseg2e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 22 +# CHECK-UNKNOWN: 22050407 vlseg2e16.v v8, (a0), v0.t # CHECK-INST: vlseg2e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 20 +# CHECK-UNKNOWN: 20055407 vlseg2e16.v v8, (a0) # CHECK-INST: vlseg2e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 22 +# CHECK-UNKNOWN: 22055407 vlseg2e32.v v8, (a0), v0.t # CHECK-INST: vlseg2e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 20 +# CHECK-UNKNOWN: 20056407 vlseg2e32.v v8, (a0) # CHECK-INST: vlseg2e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 22 +# CHECK-UNKNOWN: 22056407 vlseg2e64.v v8, (a0), v0.t # CHECK-INST: vlseg2e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 20 +# CHECK-UNKNOWN: 20057407 vlseg2e64.v v8, (a0) # CHECK-INST: vlseg2e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 22 +# CHECK-UNKNOWN: 22057407 vlseg2e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x21] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 21 +# CHECK-UNKNOWN: 21050407 vlseg2e8ff.v v8, (a0) # CHECK-INST: vlseg2e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x23] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 23 +# CHECK-UNKNOWN: 23050407 vlseg2e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x21] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 21 +# CHECK-UNKNOWN: 21055407 vlseg2e16ff.v v8, (a0) # CHECK-INST: vlseg2e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x23] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 23 +# CHECK-UNKNOWN: 23055407 vlseg2e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x21] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 21 +# CHECK-UNKNOWN: 21056407 vlseg2e32ff.v v8, (a0) # CHECK-INST: vlseg2e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x23] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 23 +# CHECK-UNKNOWN: 23056407 vlseg2e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg2e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x21] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 21 +# CHECK-UNKNOWN: 21057407 vlseg2e64ff.v v8, (a0) # CHECK-INST: vlseg2e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x23] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 23 +# CHECK-UNKNOWN: 23057407 vlsseg2e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 28 +# CHECK-UNKNOWN: 28b50407 vlsseg2e8.v v8, (a0), a1 # CHECK-INST: vlsseg2e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 2a +# CHECK-UNKNOWN: 2ab50407 vlsseg2e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 28 +# CHECK-UNKNOWN: 28b55407 vlsseg2e16.v v8, (a0), a1 # CHECK-INST: vlsseg2e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 2a +# CHECK-UNKNOWN: 2ab55407 vlsseg2e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 28 +# CHECK-UNKNOWN: 28b56407 vlsseg2e32.v v8, (a0), a1 # CHECK-INST: vlsseg2e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 2a +# CHECK-UNKNOWN: 2ab56407 vlsseg2e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg2e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 28 +# CHECK-UNKNOWN: 28b57407 vlsseg2e64.v v8, (a0), a1 # CHECK-INST: vlsseg2e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 2a +# CHECK-UNKNOWN: 2ab57407 vluxseg2ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 24 +# CHECK-UNKNOWN: 24450407 vluxseg2ei8.v v8, (a0), v4 # CHECK-INST: vluxseg2ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 26 +# CHECK-UNKNOWN: 26450407 vluxseg2ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 24 +# CHECK-UNKNOWN: 24455407 vluxseg2ei16.v v8, (a0), v4 # CHECK-INST: vluxseg2ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 26 +# CHECK-UNKNOWN: 26455407 vluxseg2ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 24 +# CHECK-UNKNOWN: 24456407 vluxseg2ei32.v v8, (a0), v4 # CHECK-INST: vluxseg2ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 26 +# CHECK-UNKNOWN: 26456407 vluxseg2ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg2ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 24 +# CHECK-UNKNOWN: 24457407 vluxseg2ei64.v v8, (a0), v4 # CHECK-INST: vluxseg2ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 26 +# CHECK-UNKNOWN: 26457407 vloxseg2ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 2c +# CHECK-UNKNOWN: 2c450407 vloxseg2ei8.v v8, (a0), v4 # CHECK-INST: vloxseg2ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 2e +# CHECK-UNKNOWN: 2e450407 vloxseg2ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 2c +# CHECK-UNKNOWN: 2c455407 vloxseg2ei16.v v8, (a0), v4 # CHECK-INST: vloxseg2ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 2e +# CHECK-UNKNOWN: 2e455407 vloxseg2ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 2c +# CHECK-UNKNOWN: 2c456407 vloxseg2ei32.v v8, (a0), v4 # CHECK-INST: vloxseg2ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 2e +# CHECK-UNKNOWN: 2e456407 vloxseg2ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg2ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 2c +# CHECK-UNKNOWN: 2c457407 vloxseg2ei64.v v8, (a0), v4 # CHECK-INST: vloxseg2ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 2e +# CHECK-UNKNOWN: 2e457407 vlseg3e8.v v8, (a0), v0.t # CHECK-INST: vlseg3e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 40 +# CHECK-UNKNOWN: 40050407 vlseg3e8.v v8, (a0) # CHECK-INST: vlseg3e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 42 +# CHECK-UNKNOWN: 42050407 vlseg3e16.v v8, (a0), v0.t # CHECK-INST: vlseg3e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 40 +# CHECK-UNKNOWN: 40055407 vlseg3e16.v v8, (a0) # CHECK-INST: vlseg3e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 42 +# CHECK-UNKNOWN: 42055407 vlseg3e32.v v8, (a0), v0.t # CHECK-INST: vlseg3e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 40 +# CHECK-UNKNOWN: 40056407 vlseg3e32.v v8, (a0) # CHECK-INST: vlseg3e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 42 +# CHECK-UNKNOWN: 42056407 vlseg3e64.v v8, (a0), v0.t # CHECK-INST: vlseg3e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 40 +# CHECK-UNKNOWN: 40057407 vlseg3e64.v v8, (a0) # CHECK-INST: vlseg3e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 42 +# CHECK-UNKNOWN: 42057407 vlseg3e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x41] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 41 +# CHECK-UNKNOWN: 41050407 vlseg3e8ff.v v8, (a0) # CHECK-INST: vlseg3e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x43] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 43 +# CHECK-UNKNOWN: 43050407 vlseg3e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x41] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 41 +# CHECK-UNKNOWN: 41055407 vlseg3e16ff.v v8, (a0) # CHECK-INST: vlseg3e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x43] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 43 +# CHECK-UNKNOWN: 43055407 vlseg3e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x41] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 41 +# CHECK-UNKNOWN: 41056407 vlseg3e32ff.v v8, (a0) # CHECK-INST: vlseg3e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x43] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 43 +# CHECK-UNKNOWN: 43056407 vlseg3e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg3e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x41] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 41 +# CHECK-UNKNOWN: 41057407 vlseg3e64ff.v v8, (a0) # CHECK-INST: vlseg3e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x43] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 43 +# CHECK-UNKNOWN: 43057407 vlsseg3e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 48 +# CHECK-UNKNOWN: 48b50407 vlsseg3e8.v v8, (a0), a1 # CHECK-INST: vlsseg3e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 4a +# CHECK-UNKNOWN: 4ab50407 vlsseg3e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 48 +# CHECK-UNKNOWN: 48b55407 vlsseg3e16.v v8, (a0), a1 # CHECK-INST: vlsseg3e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 4a +# CHECK-UNKNOWN: 4ab55407 vlsseg3e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 48 +# CHECK-UNKNOWN: 48b56407 vlsseg3e32.v v8, (a0), a1 # CHECK-INST: vlsseg3e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 4a +# CHECK-UNKNOWN: 4ab56407 vlsseg3e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg3e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 48 +# CHECK-UNKNOWN: 48b57407 vlsseg3e64.v v8, (a0), a1 # CHECK-INST: vlsseg3e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 4a +# CHECK-UNKNOWN: 4ab57407 vluxseg3ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 44 +# CHECK-UNKNOWN: 44450407 vluxseg3ei8.v v8, (a0), v4 # CHECK-INST: vluxseg3ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 46 +# CHECK-UNKNOWN: 46450407 vluxseg3ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 44 +# CHECK-UNKNOWN: 44455407 vluxseg3ei16.v v8, (a0), v4 # CHECK-INST: vluxseg3ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 46 +# CHECK-UNKNOWN: 46455407 vluxseg3ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 44 +# CHECK-UNKNOWN: 44456407 vluxseg3ei32.v v8, (a0), v4 # CHECK-INST: vluxseg3ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 46 +# CHECK-UNKNOWN: 46456407 vluxseg3ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg3ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 44 +# CHECK-UNKNOWN: 44457407 vluxseg3ei64.v v8, (a0), v4 # CHECK-INST: vluxseg3ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 46 +# CHECK-UNKNOWN: 46457407 vloxseg3ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 4c +# CHECK-UNKNOWN: 4c450407 vloxseg3ei8.v v8, (a0), v4 # CHECK-INST: vloxseg3ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 4e +# CHECK-UNKNOWN: 4e450407 vloxseg3ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 4c +# CHECK-UNKNOWN: 4c455407 vloxseg3ei16.v v8, (a0), v4 # CHECK-INST: vloxseg3ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 4e +# CHECK-UNKNOWN: 4e455407 vloxseg3ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 4c +# CHECK-UNKNOWN: 4c456407 vloxseg3ei32.v v8, (a0), v4 # CHECK-INST: vloxseg3ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 4e +# CHECK-UNKNOWN: 4e456407 vloxseg3ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg3ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 4c +# CHECK-UNKNOWN: 4c457407 vloxseg3ei64.v v8, (a0), v4 # CHECK-INST: vloxseg3ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 4e +# CHECK-UNKNOWN: 4e457407 vlseg4e8.v v8, (a0), v0.t # CHECK-INST: vlseg4e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 60 +# CHECK-UNKNOWN: 60050407 vlseg4e8.v v8, (a0) # CHECK-INST: vlseg4e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 62 +# CHECK-UNKNOWN: 62050407 vlseg4e16.v v8, (a0), v0.t # CHECK-INST: vlseg4e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 60 +# CHECK-UNKNOWN: 60055407 vlseg4e16.v v8, (a0) # CHECK-INST: vlseg4e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 62 +# CHECK-UNKNOWN: 62055407 vlseg4e32.v v8, (a0), v0.t # CHECK-INST: vlseg4e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 60 +# CHECK-UNKNOWN: 60056407 vlseg4e32.v v8, (a0) # CHECK-INST: vlseg4e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 62 +# CHECK-UNKNOWN: 62056407 vlseg4e64.v v8, (a0), v0.t # CHECK-INST: vlseg4e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 60 +# CHECK-UNKNOWN: 60057407 vlseg4e64.v v8, (a0) # CHECK-INST: vlseg4e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 62 +# CHECK-UNKNOWN: 62057407 vlseg4e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x61] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 61 +# CHECK-UNKNOWN: 61050407 vlseg4e8ff.v v8, (a0) # CHECK-INST: vlseg4e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x63] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 63 +# CHECK-UNKNOWN: 63050407 vlseg4e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x61] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 61 +# CHECK-UNKNOWN: 61055407 vlseg4e16ff.v v8, (a0) # CHECK-INST: vlseg4e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x63] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 63 +# CHECK-UNKNOWN: 63055407 vlseg4e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x61] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 61 +# CHECK-UNKNOWN: 61056407 vlseg4e32ff.v v8, (a0) # CHECK-INST: vlseg4e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x63] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 63 +# CHECK-UNKNOWN: 63056407 vlseg4e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg4e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x61] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 61 +# CHECK-UNKNOWN: 61057407 vlseg4e64ff.v v8, (a0) # CHECK-INST: vlseg4e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x63] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 63 +# CHECK-UNKNOWN: 63057407 vlsseg4e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 68 +# CHECK-UNKNOWN: 68b50407 vlsseg4e8.v v8, (a0), a1 # CHECK-INST: vlsseg4e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 6a +# CHECK-UNKNOWN: 6ab50407 vlsseg4e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 68 +# CHECK-UNKNOWN: 68b55407 vlsseg4e16.v v8, (a0), a1 # CHECK-INST: vlsseg4e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 6a +# CHECK-UNKNOWN: 6ab55407 vlsseg4e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 68 +# CHECK-UNKNOWN: 68b56407 vlsseg4e32.v v8, (a0), a1 # CHECK-INST: vlsseg4e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 6a +# CHECK-UNKNOWN: 6ab56407 vlsseg4e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg4e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 68 +# CHECK-UNKNOWN: 68b57407 vlsseg4e64.v v8, (a0), a1 # CHECK-INST: vlsseg4e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 6a +# CHECK-UNKNOWN: 6ab57407 vluxseg4ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 64 +# CHECK-UNKNOWN: 64450407 vluxseg4ei8.v v8, (a0), v4 # CHECK-INST: vluxseg4ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 66 +# CHECK-UNKNOWN: 66450407 vluxseg4ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 64 +# CHECK-UNKNOWN: 64455407 vluxseg4ei16.v v8, (a0), v4 # CHECK-INST: vluxseg4ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 66 +# CHECK-UNKNOWN: 66455407 vluxseg4ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 64 +# CHECK-UNKNOWN: 64456407 vluxseg4ei32.v v8, (a0), v4 # CHECK-INST: vluxseg4ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 66 +# CHECK-UNKNOWN: 66456407 vluxseg4ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg4ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 64 +# CHECK-UNKNOWN: 64457407 vluxseg4ei64.v v8, (a0), v4 # CHECK-INST: vluxseg4ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 66 +# CHECK-UNKNOWN: 66457407 vloxseg4ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 6c +# CHECK-UNKNOWN: 6c450407 vloxseg4ei8.v v8, (a0), v4 # CHECK-INST: vloxseg4ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 6e +# CHECK-UNKNOWN: 6e450407 vloxseg4ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 6c +# CHECK-UNKNOWN: 6c455407 vloxseg4ei16.v v8, (a0), v4 # CHECK-INST: vloxseg4ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 6e +# CHECK-UNKNOWN: 6e455407 vloxseg4ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 6c +# CHECK-UNKNOWN: 6c456407 vloxseg4ei32.v v8, (a0), v4 # CHECK-INST: vloxseg4ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 6e +# CHECK-UNKNOWN: 6e456407 vloxseg4ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg4ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 6c +# CHECK-UNKNOWN: 6c457407 vloxseg4ei64.v v8, (a0), v4 # CHECK-INST: vloxseg4ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 6e +# CHECK-UNKNOWN: 6e457407 vlseg5e8.v v8, (a0), v0.t # CHECK-INST: vlseg5e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 80 +# CHECK-UNKNOWN: 80050407 vlseg5e8.v v8, (a0) # CHECK-INST: vlseg5e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 82 +# CHECK-UNKNOWN: 82050407 vlseg5e16.v v8, (a0), v0.t # CHECK-INST: vlseg5e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 80 +# CHECK-UNKNOWN: 80055407 vlseg5e16.v v8, (a0) # CHECK-INST: vlseg5e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 82 +# CHECK-UNKNOWN: 82055407 vlseg5e32.v v8, (a0), v0.t # CHECK-INST: vlseg5e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 80 +# CHECK-UNKNOWN: 80056407 vlseg5e32.v v8, (a0) # CHECK-INST: vlseg5e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 82 +# CHECK-UNKNOWN: 82056407 vlseg5e64.v v8, (a0), v0.t # CHECK-INST: vlseg5e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 80 +# CHECK-UNKNOWN: 80057407 vlseg5e64.v v8, (a0) # CHECK-INST: vlseg5e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 82 +# CHECK-UNKNOWN: 82057407 vlseg5e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x81] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 81 +# CHECK-UNKNOWN: 81050407 vlseg5e8ff.v v8, (a0) # CHECK-INST: vlseg5e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0x83] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 83 +# CHECK-UNKNOWN: 83050407 vlseg5e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0x81] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 81 +# CHECK-UNKNOWN: 81055407 vlseg5e16ff.v v8, (a0) # CHECK-INST: vlseg5e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x83] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 83 +# CHECK-UNKNOWN: 83055407 vlseg5e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0x81] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 81 +# CHECK-UNKNOWN: 81056407 vlseg5e32ff.v v8, (a0) # CHECK-INST: vlseg5e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0x83] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 83 +# CHECK-UNKNOWN: 83056407 vlseg5e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg5e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0x81] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 81 +# CHECK-UNKNOWN: 81057407 vlseg5e64ff.v v8, (a0) # CHECK-INST: vlseg5e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0x83] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 83 +# CHECK-UNKNOWN: 83057407 vlsseg5e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 88 +# CHECK-UNKNOWN: 88b50407 vlsseg5e8.v v8, (a0), a1 # CHECK-INST: vlsseg5e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 8a +# CHECK-UNKNOWN: 8ab50407 vlsseg5e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 88 +# CHECK-UNKNOWN: 88b55407 vlsseg5e16.v v8, (a0), a1 # CHECK-INST: vlsseg5e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 8a +# CHECK-UNKNOWN: 8ab55407 vlsseg5e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 88 +# CHECK-UNKNOWN: 88b56407 vlsseg5e32.v v8, (a0), a1 # CHECK-INST: vlsseg5e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 8a +# CHECK-UNKNOWN: 8ab56407 vlsseg5e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg5e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 88 +# CHECK-UNKNOWN: 88b57407 vlsseg5e64.v v8, (a0), a1 # CHECK-INST: vlsseg5e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 8a +# CHECK-UNKNOWN: 8ab57407 vluxseg5ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 84 +# CHECK-UNKNOWN: 84450407 vluxseg5ei8.v v8, (a0), v4 # CHECK-INST: vluxseg5ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 86 +# CHECK-UNKNOWN: 86450407 vluxseg5ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 84 +# CHECK-UNKNOWN: 84455407 vluxseg5ei16.v v8, (a0), v4 # CHECK-INST: vluxseg5ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 86 +# CHECK-UNKNOWN: 86455407 vluxseg5ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 84 +# CHECK-UNKNOWN: 84456407 vluxseg5ei32.v v8, (a0), v4 # CHECK-INST: vluxseg5ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 86 +# CHECK-UNKNOWN: 86456407 vluxseg5ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg5ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 84 +# CHECK-UNKNOWN: 84457407 vluxseg5ei64.v v8, (a0), v4 # CHECK-INST: vluxseg5ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 86 +# CHECK-UNKNOWN: 86457407 vloxseg5ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 8c +# CHECK-UNKNOWN: 8c450407 vloxseg5ei8.v v8, (a0), v4 # CHECK-INST: vloxseg5ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 8e +# CHECK-UNKNOWN: 8e450407 vloxseg5ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 8c +# CHECK-UNKNOWN: 8c455407 vloxseg5ei16.v v8, (a0), v4 # CHECK-INST: vloxseg5ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 8e +# CHECK-UNKNOWN: 8e455407 vloxseg5ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 8c +# CHECK-UNKNOWN: 8c456407 vloxseg5ei32.v v8, (a0), v4 # CHECK-INST: vloxseg5ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 8e +# CHECK-UNKNOWN: 8e456407 vloxseg5ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg5ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 8c +# CHECK-UNKNOWN: 8c457407 vloxseg5ei64.v v8, (a0), v4 # CHECK-INST: vloxseg5ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 8e +# CHECK-UNKNOWN: 8e457407 vlseg6e8.v v8, (a0), v0.t # CHECK-INST: vlseg6e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 a0 +# CHECK-UNKNOWN: a0050407 vlseg6e8.v v8, (a0) # CHECK-INST: vlseg6e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 a2 +# CHECK-UNKNOWN: a2050407 vlseg6e16.v v8, (a0), v0.t # CHECK-INST: vlseg6e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 a0 +# CHECK-UNKNOWN: a0055407 vlseg6e16.v v8, (a0) # CHECK-INST: vlseg6e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 a2 +# CHECK-UNKNOWN: a2055407 vlseg6e32.v v8, (a0), v0.t # CHECK-INST: vlseg6e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 a0 +# CHECK-UNKNOWN: a0056407 vlseg6e32.v v8, (a0) # CHECK-INST: vlseg6e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 a2 +# CHECK-UNKNOWN: a2056407 vlseg6e64.v v8, (a0), v0.t # CHECK-INST: vlseg6e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 a0 +# CHECK-UNKNOWN: a0057407 vlseg6e64.v v8, (a0) # CHECK-INST: vlseg6e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 a2 +# CHECK-UNKNOWN: a2057407 vlseg6e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xa1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 a1 +# CHECK-UNKNOWN: a1050407 vlseg6e8ff.v v8, (a0) # CHECK-INST: vlseg6e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xa3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 a3 +# CHECK-UNKNOWN: a3050407 vlseg6e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xa1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 a1 +# CHECK-UNKNOWN: a1055407 vlseg6e16ff.v v8, (a0) # CHECK-INST: vlseg6e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xa3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 a3 +# CHECK-UNKNOWN: a3055407 vlseg6e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xa1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 a1 +# CHECK-UNKNOWN: a1056407 vlseg6e32ff.v v8, (a0) # CHECK-INST: vlseg6e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xa3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 a3 +# CHECK-UNKNOWN: a3056407 vlseg6e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg6e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xa1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 a1 +# CHECK-UNKNOWN: a1057407 vlseg6e64ff.v v8, (a0) # CHECK-INST: vlseg6e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xa3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 a3 +# CHECK-UNKNOWN: a3057407 vlsseg6e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 a8 +# CHECK-UNKNOWN: a8b50407 vlsseg6e8.v v8, (a0), a1 # CHECK-INST: vlsseg6e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 aa +# CHECK-UNKNOWN: aab50407 vlsseg6e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 a8 +# CHECK-UNKNOWN: a8b55407 vlsseg6e16.v v8, (a0), a1 # CHECK-INST: vlsseg6e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 aa +# CHECK-UNKNOWN: aab55407 vlsseg6e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 a8 +# CHECK-UNKNOWN: a8b56407 vlsseg6e32.v v8, (a0), a1 # CHECK-INST: vlsseg6e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 aa +# CHECK-UNKNOWN: aab56407 vlsseg6e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg6e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 a8 +# CHECK-UNKNOWN: a8b57407 vlsseg6e64.v v8, (a0), a1 # CHECK-INST: vlsseg6e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 aa +# CHECK-UNKNOWN: aab57407 vluxseg6ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 a4 +# CHECK-UNKNOWN: a4450407 vluxseg6ei8.v v8, (a0), v4 # CHECK-INST: vluxseg6ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 a6 +# CHECK-UNKNOWN: a6450407 vluxseg6ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 a4 +# CHECK-UNKNOWN: a4455407 vluxseg6ei16.v v8, (a0), v4 # CHECK-INST: vluxseg6ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 a6 +# CHECK-UNKNOWN: a6455407 vluxseg6ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 a4 +# CHECK-UNKNOWN: a4456407 vluxseg6ei32.v v8, (a0), v4 # CHECK-INST: vluxseg6ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 a6 +# CHECK-UNKNOWN: a6456407 vluxseg6ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg6ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 a4 +# CHECK-UNKNOWN: a4457407 vluxseg6ei64.v v8, (a0), v4 # CHECK-INST: vluxseg6ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 a6 +# CHECK-UNKNOWN: a6457407 vloxseg6ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 ac +# CHECK-UNKNOWN: ac450407 vloxseg6ei8.v v8, (a0), v4 # CHECK-INST: vloxseg6ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 ae +# CHECK-UNKNOWN: ae450407 vloxseg6ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 ac +# CHECK-UNKNOWN: ac455407 vloxseg6ei16.v v8, (a0), v4 # CHECK-INST: vloxseg6ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 ae +# CHECK-UNKNOWN: ae455407 vloxseg6ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 ac +# CHECK-UNKNOWN: ac456407 vloxseg6ei32.v v8, (a0), v4 # CHECK-INST: vloxseg6ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 ae +# CHECK-UNKNOWN: ae456407 vloxseg6ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg6ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 ac +# CHECK-UNKNOWN: ac457407 vloxseg6ei64.v v8, (a0), v4 # CHECK-INST: vloxseg6ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 ae +# CHECK-UNKNOWN: ae457407 vlseg7e8.v v8, (a0), v0.t # CHECK-INST: vlseg7e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 c0 +# CHECK-UNKNOWN: c0050407 vlseg7e8.v v8, (a0) # CHECK-INST: vlseg7e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 c2 +# CHECK-UNKNOWN: c2050407 vlseg7e16.v v8, (a0), v0.t # CHECK-INST: vlseg7e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 c0 +# CHECK-UNKNOWN: c0055407 vlseg7e16.v v8, (a0) # CHECK-INST: vlseg7e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 c2 +# CHECK-UNKNOWN: c2055407 vlseg7e32.v v8, (a0), v0.t # CHECK-INST: vlseg7e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 c0 +# CHECK-UNKNOWN: c0056407 vlseg7e32.v v8, (a0) # CHECK-INST: vlseg7e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 c2 +# CHECK-UNKNOWN: c2056407 vlseg7e64.v v8, (a0), v0.t # CHECK-INST: vlseg7e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 c0 +# CHECK-UNKNOWN: c0057407 vlseg7e64.v v8, (a0) # CHECK-INST: vlseg7e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 c2 +# CHECK-UNKNOWN: c2057407 vlseg7e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xc1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 c1 +# CHECK-UNKNOWN: c1050407 vlseg7e8ff.v v8, (a0) # CHECK-INST: vlseg7e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xc3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 c3 +# CHECK-UNKNOWN: c3050407 vlseg7e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xc1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 c1 +# CHECK-UNKNOWN: c1055407 vlseg7e16ff.v v8, (a0) # CHECK-INST: vlseg7e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xc3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 c3 +# CHECK-UNKNOWN: c3055407 vlseg7e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xc1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 c1 +# CHECK-UNKNOWN: c1056407 vlseg7e32ff.v v8, (a0) # CHECK-INST: vlseg7e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xc3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 c3 +# CHECK-UNKNOWN: c3056407 vlseg7e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg7e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xc1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 c1 +# CHECK-UNKNOWN: c1057407 vlseg7e64ff.v v8, (a0) # CHECK-INST: vlseg7e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xc3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 c3 +# CHECK-UNKNOWN: c3057407 vlsseg7e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 c8 +# CHECK-UNKNOWN: c8b50407 vlsseg7e8.v v8, (a0), a1 # CHECK-INST: vlsseg7e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 ca +# CHECK-UNKNOWN: cab50407 vlsseg7e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 c8 +# CHECK-UNKNOWN: c8b55407 vlsseg7e16.v v8, (a0), a1 # CHECK-INST: vlsseg7e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 ca +# CHECK-UNKNOWN: cab55407 vlsseg7e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 c8 +# CHECK-UNKNOWN: c8b56407 vlsseg7e32.v v8, (a0), a1 # CHECK-INST: vlsseg7e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 ca +# CHECK-UNKNOWN: cab56407 vlsseg7e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg7e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 c8 +# CHECK-UNKNOWN: c8b57407 vlsseg7e64.v v8, (a0), a1 # CHECK-INST: vlsseg7e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 ca +# CHECK-UNKNOWN: cab57407 vluxseg7ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 c4 +# CHECK-UNKNOWN: c4450407 vluxseg7ei8.v v8, (a0), v4 # CHECK-INST: vluxseg7ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 c6 +# CHECK-UNKNOWN: c6450407 vluxseg7ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 c4 +# CHECK-UNKNOWN: c4455407 vluxseg7ei16.v v8, (a0), v4 # CHECK-INST: vluxseg7ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 c6 +# CHECK-UNKNOWN: c6455407 vluxseg7ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 c4 +# CHECK-UNKNOWN: c4456407 vluxseg7ei32.v v8, (a0), v4 # CHECK-INST: vluxseg7ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 c6 +# CHECK-UNKNOWN: c6456407 vluxseg7ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg7ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 c4 +# CHECK-UNKNOWN: c4457407 vluxseg7ei64.v v8, (a0), v4 # CHECK-INST: vluxseg7ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 c6 +# CHECK-UNKNOWN: c6457407 vloxseg7ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 cc +# CHECK-UNKNOWN: cc450407 vloxseg7ei8.v v8, (a0), v4 # CHECK-INST: vloxseg7ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 ce +# CHECK-UNKNOWN: ce450407 vloxseg7ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 cc +# CHECK-UNKNOWN: cc455407 vloxseg7ei16.v v8, (a0), v4 # CHECK-INST: vloxseg7ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 ce +# CHECK-UNKNOWN: ce455407 vloxseg7ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 cc +# CHECK-UNKNOWN: cc456407 vloxseg7ei32.v v8, (a0), v4 # CHECK-INST: vloxseg7ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 ce +# CHECK-UNKNOWN: ce456407 vloxseg7ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg7ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 cc +# CHECK-UNKNOWN: cc457407 vloxseg7ei64.v v8, (a0), v4 # CHECK-INST: vloxseg7ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 ce +# CHECK-UNKNOWN: ce457407 vlseg8e8.v v8, (a0), v0.t # CHECK-INST: vlseg8e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 e0 +# CHECK-UNKNOWN: e0050407 vlseg8e8.v v8, (a0) # CHECK-INST: vlseg8e8.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 e2 +# CHECK-UNKNOWN: e2050407 vlseg8e16.v v8, (a0), v0.t # CHECK-INST: vlseg8e16.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 e0 +# CHECK-UNKNOWN: e0055407 vlseg8e16.v v8, (a0) # CHECK-INST: vlseg8e16.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 e2 +# CHECK-UNKNOWN: e2055407 vlseg8e32.v v8, (a0), v0.t # CHECK-INST: vlseg8e32.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 e0 +# CHECK-UNKNOWN: e0056407 vlseg8e32.v v8, (a0) # CHECK-INST: vlseg8e32.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 e2 +# CHECK-UNKNOWN: e2056407 vlseg8e64.v v8, (a0), v0.t # CHECK-INST: vlseg8e64.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 e0 +# CHECK-UNKNOWN: e0057407 vlseg8e64.v v8, (a0) # CHECK-INST: vlseg8e64.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 e2 +# CHECK-UNKNOWN: e2057407 vlseg8e8ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e8ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0xe1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 e1 +# CHECK-UNKNOWN: e1050407 vlseg8e8ff.v v8, (a0) # CHECK-INST: vlseg8e8ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x04,0x05,0xe3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 e3 +# CHECK-UNKNOWN: e3050407 vlseg8e16ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e16ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x54,0x05,0xe1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 e1 +# CHECK-UNKNOWN: e1055407 vlseg8e16ff.v v8, (a0) # CHECK-INST: vlseg8e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0xe3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 e3 +# CHECK-UNKNOWN: e3055407 vlseg8e32ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e32ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x64,0x05,0xe1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 e1 +# CHECK-UNKNOWN: e1056407 vlseg8e32ff.v v8, (a0) # CHECK-INST: vlseg8e32ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x64,0x05,0xe3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 05 e3 +# CHECK-UNKNOWN: e3056407 vlseg8e64ff.v v8, (a0), v0.t # CHECK-INST: vlseg8e64ff.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x74,0x05,0xe1] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 e1 +# CHECK-UNKNOWN: e1057407 vlseg8e64ff.v v8, (a0) # CHECK-INST: vlseg8e64ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x74,0x05,0xe3] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 05 e3 +# CHECK-UNKNOWN: e3057407 vlsseg8e8.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e8.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x04,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 e8 +# CHECK-UNKNOWN: e8b50407 vlsseg8e8.v v8, (a0), a1 # CHECK-INST: vlsseg8e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 ea +# CHECK-UNKNOWN: eab50407 vlsseg8e16.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e16.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x54,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 e8 +# CHECK-UNKNOWN: e8b55407 vlsseg8e16.v v8, (a0), a1 # CHECK-INST: vlsseg8e16.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x54,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 b5 ea +# CHECK-UNKNOWN: eab55407 vlsseg8e32.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e32.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x64,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 e8 +# CHECK-UNKNOWN: e8b56407 vlsseg8e32.v v8, (a0), a1 # CHECK-INST: vlsseg8e32.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x64,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 b5 ea +# CHECK-UNKNOWN: eab56407 vlsseg8e64.v v8, (a0), a1, v0.t # CHECK-INST: vlsseg8e64.v v8, (a0), a1, v0.t # CHECK-ENCODING: [0x07,0x74,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 e8 +# CHECK-UNKNOWN: e8b57407 vlsseg8e64.v v8, (a0), a1 # CHECK-INST: vlsseg8e64.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x74,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 b5 ea +# CHECK-UNKNOWN: eab57407 vluxseg8ei8.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 e4 +# CHECK-UNKNOWN: e4450407 vluxseg8ei8.v v8, (a0), v4 # CHECK-INST: vluxseg8ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 e6 +# CHECK-UNKNOWN: e6450407 vluxseg8ei16.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 e4 +# CHECK-UNKNOWN: e4455407 vluxseg8ei16.v v8, (a0), v4 # CHECK-INST: vluxseg8ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 e6 +# CHECK-UNKNOWN: e6455407 vluxseg8ei32.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 e4 +# CHECK-UNKNOWN: e4456407 vluxseg8ei32.v v8, (a0), v4 # CHECK-INST: vluxseg8ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 e6 +# CHECK-UNKNOWN: e6456407 vluxseg8ei64.v v8, (a0), v4, v0.t # CHECK-INST: vluxseg8ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 e4 +# CHECK-UNKNOWN: e4457407 vluxseg8ei64.v v8, (a0), v4 # CHECK-INST: vluxseg8ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 e6 +# CHECK-UNKNOWN: e6457407 vloxseg8ei8.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei8.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x04,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 ec +# CHECK-UNKNOWN: ec450407 vloxseg8ei8.v v8, (a0), v4 # CHECK-INST: vloxseg8ei8.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x04,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 45 ee +# CHECK-UNKNOWN: ee450407 vloxseg8ei16.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei16.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x54,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 ec +# CHECK-UNKNOWN: ec455407 vloxseg8ei16.v v8, (a0), v4 # CHECK-INST: vloxseg8ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 ee +# CHECK-UNKNOWN: ee455407 vloxseg8ei32.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei32.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x64,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 ec +# CHECK-UNKNOWN: ec456407 vloxseg8ei32.v v8, (a0), v4 # CHECK-INST: vloxseg8ei32.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x64,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 64 45 ee +# CHECK-UNKNOWN: ee456407 vloxseg8ei64.v v8, (a0), v4, v0.t # CHECK-INST: vloxseg8ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 ec +# CHECK-UNKNOWN: ec457407 vloxseg8ei64.v v8, (a0), v4 # CHECK-INST: vloxseg8ei64.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x74,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 ee +# CHECK-UNKNOWN: ee457407 vsseg2e8.v v24, (a0), v0.t # CHECK-INST: vsseg2e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 20 +# CHECK-UNKNOWN: 20050c27 vsseg2e8.v v24, (a0) # CHECK-INST: vsseg2e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 22 +# CHECK-UNKNOWN: 22050c27 vsseg2e16.v v24, (a0), v0.t # CHECK-INST: vsseg2e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 20 +# CHECK-UNKNOWN: 20055c27 vsseg2e16.v v24, (a0) # CHECK-INST: vsseg2e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 22 +# CHECK-UNKNOWN: 22055c27 vsseg2e32.v v24, (a0), v0.t # CHECK-INST: vsseg2e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 20 +# CHECK-UNKNOWN: 20056c27 vsseg2e32.v v24, (a0) # CHECK-INST: vsseg2e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 22 +# CHECK-UNKNOWN: 22056c27 vsseg2e64.v v24, (a0), v0.t # CHECK-INST: vsseg2e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 20 +# CHECK-UNKNOWN: 20057c27 vsseg2e64.v v24, (a0) # CHECK-INST: vsseg2e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x22] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 22 +# CHECK-UNKNOWN: 22057c27 vssseg2e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 28 +# CHECK-UNKNOWN: 28b50c27 vssseg2e8.v v24, (a0), a1 # CHECK-INST: vssseg2e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 2a +# CHECK-UNKNOWN: 2ab50c27 vssseg2e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 28 +# CHECK-UNKNOWN: 28b55c27 vssseg2e16.v v24, (a0), a1 # CHECK-INST: vssseg2e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 2a +# CHECK-UNKNOWN: 2ab55c27 vssseg2e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 28 +# CHECK-UNKNOWN: 28b56c27 vssseg2e32.v v24, (a0), a1 # CHECK-INST: vssseg2e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 2a +# CHECK-UNKNOWN: 2ab56c27 vssseg2e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg2e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 28 +# CHECK-UNKNOWN: 28b57c27 vssseg2e64.v v24, (a0), a1 # CHECK-INST: vssseg2e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 2a +# CHECK-UNKNOWN: 2ab57c27 vsuxseg2ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 24 +# CHECK-UNKNOWN: 24450c27 vsuxseg2ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 26 +# CHECK-UNKNOWN: 26450c27 vsuxseg2ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 24 +# CHECK-UNKNOWN: 24455c27 vsuxseg2ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 26 +# CHECK-UNKNOWN: 26455c27 vsuxseg2ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 24 +# CHECK-UNKNOWN: 24456c27 vsuxseg2ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 26 +# CHECK-UNKNOWN: 26456c27 vsuxseg2ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg2ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x24] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 24 +# CHECK-UNKNOWN: 24457c27 vsuxseg2ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg2ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x26] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 26 +# CHECK-UNKNOWN: 26457c27 vsoxseg2ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 2c +# CHECK-UNKNOWN: 2c450c27 vsoxseg2ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 2e +# CHECK-UNKNOWN: 2e450c27 vsoxseg2ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 2c +# CHECK-UNKNOWN: 2c455c27 vsoxseg2ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 2e +# CHECK-UNKNOWN: 2e455c27 vsoxseg2ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 2c +# CHECK-UNKNOWN: 2c456c27 vsoxseg2ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 2e +# CHECK-UNKNOWN: 2e456c27 vsoxseg2ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg2ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x2c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 2c +# CHECK-UNKNOWN: 2c457c27 vsoxseg2ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg2ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x2e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 2e +# CHECK-UNKNOWN: 2e457c27 vsseg3e8.v v24, (a0), v0.t # CHECK-INST: vsseg3e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 40 +# CHECK-UNKNOWN: 40050c27 vsseg3e8.v v24, (a0) # CHECK-INST: vsseg3e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 42 +# CHECK-UNKNOWN: 42050c27 vsseg3e16.v v24, (a0), v0.t # CHECK-INST: vsseg3e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 40 +# CHECK-UNKNOWN: 40055c27 vsseg3e16.v v24, (a0) # CHECK-INST: vsseg3e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 42 +# CHECK-UNKNOWN: 42055c27 vsseg3e32.v v24, (a0), v0.t # CHECK-INST: vsseg3e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 40 +# CHECK-UNKNOWN: 40056c27 vsseg3e32.v v24, (a0) # CHECK-INST: vsseg3e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 42 +# CHECK-UNKNOWN: 42056c27 vsseg3e64.v v24, (a0), v0.t # CHECK-INST: vsseg3e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x40] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 40 +# CHECK-UNKNOWN: 40057c27 vsseg3e64.v v24, (a0) # CHECK-INST: vsseg3e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x42] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 42 +# CHECK-UNKNOWN: 42057c27 vssseg3e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 48 +# CHECK-UNKNOWN: 48b50c27 vssseg3e8.v v24, (a0), a1 # CHECK-INST: vssseg3e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 4a +# CHECK-UNKNOWN: 4ab50c27 vssseg3e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 48 +# CHECK-UNKNOWN: 48b55c27 vssseg3e16.v v24, (a0), a1 # CHECK-INST: vssseg3e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 4a +# CHECK-UNKNOWN: 4ab55c27 vssseg3e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 48 +# CHECK-UNKNOWN: 48b56c27 vssseg3e32.v v24, (a0), a1 # CHECK-INST: vssseg3e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 4a +# CHECK-UNKNOWN: 4ab56c27 vssseg3e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg3e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x48] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 48 +# CHECK-UNKNOWN: 48b57c27 vssseg3e64.v v24, (a0), a1 # CHECK-INST: vssseg3e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x4a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 4a +# CHECK-UNKNOWN: 4ab57c27 vsuxseg3ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 44 +# CHECK-UNKNOWN: 44450c27 vsuxseg3ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 46 +# CHECK-UNKNOWN: 46450c27 vsuxseg3ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 44 +# CHECK-UNKNOWN: 44455c27 vsuxseg3ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 46 +# CHECK-UNKNOWN: 46455c27 vsuxseg3ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 44 +# CHECK-UNKNOWN: 44456c27 vsuxseg3ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 46 +# CHECK-UNKNOWN: 46456c27 vsuxseg3ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg3ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x44] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 44 +# CHECK-UNKNOWN: 44457c27 vsuxseg3ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg3ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 46 +# CHECK-UNKNOWN: 46457c27 vsoxseg3ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 4c +# CHECK-UNKNOWN: 4c450c27 vsoxseg3ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 4e +# CHECK-UNKNOWN: 4e450c27 vsoxseg3ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 4c +# CHECK-UNKNOWN: 4c455c27 vsoxseg3ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 4e +# CHECK-UNKNOWN: 4e455c27 vsoxseg3ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 4c +# CHECK-UNKNOWN: 4c456c27 vsoxseg3ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 4e +# CHECK-UNKNOWN: 4e456c27 vsoxseg3ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg3ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x4c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 4c +# CHECK-UNKNOWN: 4c457c27 vsoxseg3ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg3ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x4e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 4e +# CHECK-UNKNOWN: 4e457c27 vsseg4e8.v v24, (a0), v0.t # CHECK-INST: vsseg4e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 60 +# CHECK-UNKNOWN: 60050c27 vsseg4e8.v v24, (a0) # CHECK-INST: vsseg4e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 62 +# CHECK-UNKNOWN: 62050c27 vsseg4e16.v v24, (a0), v0.t # CHECK-INST: vsseg4e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 60 +# CHECK-UNKNOWN: 60055c27 vsseg4e16.v v24, (a0) # CHECK-INST: vsseg4e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 62 +# CHECK-UNKNOWN: 62055c27 vsseg4e32.v v24, (a0), v0.t # CHECK-INST: vsseg4e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 60 +# CHECK-UNKNOWN: 60056c27 vsseg4e32.v v24, (a0) # CHECK-INST: vsseg4e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 62 +# CHECK-UNKNOWN: 62056c27 vsseg4e64.v v24, (a0), v0.t # CHECK-INST: vsseg4e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x60] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 60 +# CHECK-UNKNOWN: 60057c27 vsseg4e64.v v24, (a0) # CHECK-INST: vsseg4e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x62] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 62 +# CHECK-UNKNOWN: 62057c27 vssseg4e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 68 +# CHECK-UNKNOWN: 68b50c27 vssseg4e8.v v24, (a0), a1 # CHECK-INST: vssseg4e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 6a +# CHECK-UNKNOWN: 6ab50c27 vssseg4e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 68 +# CHECK-UNKNOWN: 68b55c27 vssseg4e16.v v24, (a0), a1 # CHECK-INST: vssseg4e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 6a +# CHECK-UNKNOWN: 6ab55c27 vssseg4e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 68 +# CHECK-UNKNOWN: 68b56c27 vssseg4e32.v v24, (a0), a1 # CHECK-INST: vssseg4e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 6a +# CHECK-UNKNOWN: 6ab56c27 vssseg4e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg4e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x68] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 68 +# CHECK-UNKNOWN: 68b57c27 vssseg4e64.v v24, (a0), a1 # CHECK-INST: vssseg4e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x6a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 6a +# CHECK-UNKNOWN: 6ab57c27 vsuxseg4ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 64 +# CHECK-UNKNOWN: 64450c27 vsuxseg4ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 66 +# CHECK-UNKNOWN: 66450c27 vsuxseg4ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 64 +# CHECK-UNKNOWN: 64455c27 vsuxseg4ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 66 +# CHECK-UNKNOWN: 66455c27 vsuxseg4ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 64 +# CHECK-UNKNOWN: 64456c27 vsuxseg4ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 66 +# CHECK-UNKNOWN: 66456c27 vsuxseg4ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg4ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x64] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 64 +# CHECK-UNKNOWN: 64457c27 vsuxseg4ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg4ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x66] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 66 +# CHECK-UNKNOWN: 66457c27 vsoxseg4ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 6c +# CHECK-UNKNOWN: 6c450c27 vsoxseg4ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 6e +# CHECK-UNKNOWN: 6e450c27 vsoxseg4ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 6c +# CHECK-UNKNOWN: 6c455c27 vsoxseg4ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 6e +# CHECK-UNKNOWN: 6e455c27 vsoxseg4ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 6c +# CHECK-UNKNOWN: 6c456c27 vsoxseg4ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 6e +# CHECK-UNKNOWN: 6e456c27 vsoxseg4ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg4ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 6c +# CHECK-UNKNOWN: 6c457c27 vsoxseg4ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg4ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x6e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 6e +# CHECK-UNKNOWN: 6e457c27 vsseg5e8.v v24, (a0), v0.t # CHECK-INST: vsseg5e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 80 +# CHECK-UNKNOWN: 80050c27 vsseg5e8.v v24, (a0) # CHECK-INST: vsseg5e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 82 +# CHECK-UNKNOWN: 82050c27 vsseg5e16.v v24, (a0), v0.t # CHECK-INST: vsseg5e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 80 +# CHECK-UNKNOWN: 80055c27 vsseg5e16.v v24, (a0) # CHECK-INST: vsseg5e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 82 +# CHECK-UNKNOWN: 82055c27 vsseg5e32.v v24, (a0), v0.t # CHECK-INST: vsseg5e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 80 +# CHECK-UNKNOWN: 80056c27 vsseg5e32.v v24, (a0) # CHECK-INST: vsseg5e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 82 +# CHECK-UNKNOWN: 82056c27 vsseg5e64.v v24, (a0), v0.t # CHECK-INST: vsseg5e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 80 +# CHECK-UNKNOWN: 80057c27 vsseg5e64.v v24, (a0) # CHECK-INST: vsseg5e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0x82] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 82 +# CHECK-UNKNOWN: 82057c27 vssseg5e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 88 +# CHECK-UNKNOWN: 88b50c27 vssseg5e8.v v24, (a0), a1 # CHECK-INST: vssseg5e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 8a +# CHECK-UNKNOWN: 8ab50c27 vssseg5e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 88 +# CHECK-UNKNOWN: 88b55c27 vssseg5e16.v v24, (a0), a1 # CHECK-INST: vssseg5e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 8a +# CHECK-UNKNOWN: 8ab55c27 vssseg5e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 88 +# CHECK-UNKNOWN: 88b56c27 vssseg5e32.v v24, (a0), a1 # CHECK-INST: vssseg5e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 8a +# CHECK-UNKNOWN: 8ab56c27 vssseg5e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg5e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0x88] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 88 +# CHECK-UNKNOWN: 88b57c27 vssseg5e64.v v24, (a0), a1 # CHECK-INST: vssseg5e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0x8a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 8a +# CHECK-UNKNOWN: 8ab57c27 vsuxseg5ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 84 +# CHECK-UNKNOWN: 84450c27 vsuxseg5ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 86 +# CHECK-UNKNOWN: 86450c27 vsuxseg5ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 84 +# CHECK-UNKNOWN: 84455c27 vsuxseg5ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 86 +# CHECK-UNKNOWN: 86455c27 vsuxseg5ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 84 +# CHECK-UNKNOWN: 84456c27 vsuxseg5ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 86 +# CHECK-UNKNOWN: 86456c27 vsuxseg5ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg5ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x84] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 84 +# CHECK-UNKNOWN: 84457c27 vsuxseg5ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg5ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x86] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 86 +# CHECK-UNKNOWN: 86457c27 vsoxseg5ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 8c +# CHECK-UNKNOWN: 8c450c27 vsoxseg5ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 8e +# CHECK-UNKNOWN: 8e450c27 vsoxseg5ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 8c +# CHECK-UNKNOWN: 8c455c27 vsoxseg5ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 8e +# CHECK-UNKNOWN: 8e455c27 vsoxseg5ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 8c +# CHECK-UNKNOWN: 8c456c27 vsoxseg5ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 8e +# CHECK-UNKNOWN: 8e456c27 vsoxseg5ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg5ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0x8c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 8c +# CHECK-UNKNOWN: 8c457c27 vsoxseg5ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg5ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0x8e] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 8e +# CHECK-UNKNOWN: 8e457c27 vsseg6e8.v v24, (a0), v0.t # CHECK-INST: vsseg6e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 a0 +# CHECK-UNKNOWN: a0050c27 vsseg6e8.v v24, (a0) # CHECK-INST: vsseg6e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 a2 +# CHECK-UNKNOWN: a2050c27 vsseg6e16.v v24, (a0), v0.t # CHECK-INST: vsseg6e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 a0 +# CHECK-UNKNOWN: a0055c27 vsseg6e16.v v24, (a0) # CHECK-INST: vsseg6e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 a2 +# CHECK-UNKNOWN: a2055c27 vsseg6e32.v v24, (a0), v0.t # CHECK-INST: vsseg6e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 a0 +# CHECK-UNKNOWN: a0056c27 vsseg6e32.v v24, (a0) # CHECK-INST: vsseg6e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 a2 +# CHECK-UNKNOWN: a2056c27 vsseg6e64.v v24, (a0), v0.t # CHECK-INST: vsseg6e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xa0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 a0 +# CHECK-UNKNOWN: a0057c27 vsseg6e64.v v24, (a0) # CHECK-INST: vsseg6e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xa2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 a2 +# CHECK-UNKNOWN: a2057c27 vssseg6e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 a8 +# CHECK-UNKNOWN: a8b50c27 vssseg6e8.v v24, (a0), a1 # CHECK-INST: vssseg6e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 aa +# CHECK-UNKNOWN: aab50c27 vssseg6e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 a8 +# CHECK-UNKNOWN: a8b55c27 vssseg6e16.v v24, (a0), a1 # CHECK-INST: vssseg6e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 aa +# CHECK-UNKNOWN: aab55c27 vssseg6e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 a8 +# CHECK-UNKNOWN: a8b56c27 vssseg6e32.v v24, (a0), a1 # CHECK-INST: vssseg6e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 aa +# CHECK-UNKNOWN: aab56c27 vssseg6e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg6e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xa8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 a8 +# CHECK-UNKNOWN: a8b57c27 vssseg6e64.v v24, (a0), a1 # CHECK-INST: vssseg6e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xaa] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 aa +# CHECK-UNKNOWN: aab57c27 vsuxseg6ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 a4 +# CHECK-UNKNOWN: a4450c27 vsuxseg6ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 a6 +# CHECK-UNKNOWN: a6450c27 vsuxseg6ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 a4 +# CHECK-UNKNOWN: a4455c27 vsuxseg6ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 a6 +# CHECK-UNKNOWN: a6455c27 vsuxseg6ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 a4 +# CHECK-UNKNOWN: a4456c27 vsuxseg6ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 a6 +# CHECK-UNKNOWN: a6456c27 vsuxseg6ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg6ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 a4 +# CHECK-UNKNOWN: a4457c27 vsuxseg6ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg6ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xa6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 a6 +# CHECK-UNKNOWN: a6457c27 vsoxseg6ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 ac +# CHECK-UNKNOWN: ac450c27 vsoxseg6ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 ae +# CHECK-UNKNOWN: ae450c27 vsoxseg6ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ac +# CHECK-UNKNOWN: ac455c27 vsoxseg6ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ae +# CHECK-UNKNOWN: ae455c27 vsoxseg6ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 ac +# CHECK-UNKNOWN: ac456c27 vsoxseg6ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 ae +# CHECK-UNKNOWN: ae456c27 vsoxseg6ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg6ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xac] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 ac +# CHECK-UNKNOWN: ac457c27 vsoxseg6ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg6ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xae] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 ae +# CHECK-UNKNOWN: ae457c27 vsseg7e8.v v24, (a0), v0.t # CHECK-INST: vsseg7e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 c0 +# CHECK-UNKNOWN: c0050c27 vsseg7e8.v v24, (a0) # CHECK-INST: vsseg7e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 c2 +# CHECK-UNKNOWN: c2050c27 vsseg7e16.v v24, (a0), v0.t # CHECK-INST: vsseg7e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 c0 +# CHECK-UNKNOWN: c0055c27 vsseg7e16.v v24, (a0) # CHECK-INST: vsseg7e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 c2 +# CHECK-UNKNOWN: c2055c27 vsseg7e32.v v24, (a0), v0.t # CHECK-INST: vsseg7e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 c0 +# CHECK-UNKNOWN: c0056c27 vsseg7e32.v v24, (a0) # CHECK-INST: vsseg7e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 c2 +# CHECK-UNKNOWN: c2056c27 vsseg7e64.v v24, (a0), v0.t # CHECK-INST: vsseg7e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xc0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 c0 +# CHECK-UNKNOWN: c0057c27 vsseg7e64.v v24, (a0) # CHECK-INST: vsseg7e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xc2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 c2 +# CHECK-UNKNOWN: c2057c27 vssseg7e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 c8 +# CHECK-UNKNOWN: c8b50c27 vssseg7e8.v v24, (a0), a1 # CHECK-INST: vssseg7e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 ca +# CHECK-UNKNOWN: cab50c27 vssseg7e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 c8 +# CHECK-UNKNOWN: c8b55c27 vssseg7e16.v v24, (a0), a1 # CHECK-INST: vssseg7e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 ca +# CHECK-UNKNOWN: cab55c27 vssseg7e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 c8 +# CHECK-UNKNOWN: c8b56c27 vssseg7e32.v v24, (a0), a1 # CHECK-INST: vssseg7e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 ca +# CHECK-UNKNOWN: cab56c27 vssseg7e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg7e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xc8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 c8 +# CHECK-UNKNOWN: c8b57c27 vssseg7e64.v v24, (a0), a1 # CHECK-INST: vssseg7e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xca] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 ca +# CHECK-UNKNOWN: cab57c27 vsuxseg7ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 c4 +# CHECK-UNKNOWN: c4450c27 vsuxseg7ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 c6 +# CHECK-UNKNOWN: c6450c27 vsuxseg7ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 c4 +# CHECK-UNKNOWN: c4455c27 vsuxseg7ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 c6 +# CHECK-UNKNOWN: c6455c27 vsuxseg7ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 c4 +# CHECK-UNKNOWN: c4456c27 vsuxseg7ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 c6 +# CHECK-UNKNOWN: c6456c27 vsuxseg7ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg7ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xc4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 c4 +# CHECK-UNKNOWN: c4457c27 vsuxseg7ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg7ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xc6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 c6 +# CHECK-UNKNOWN: c6457c27 vsoxseg7ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 cc +# CHECK-UNKNOWN: cc450c27 vsoxseg7ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 ce +# CHECK-UNKNOWN: ce450c27 vsoxseg7ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 cc +# CHECK-UNKNOWN: cc455c27 vsoxseg7ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ce +# CHECK-UNKNOWN: ce455c27 vsoxseg7ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 cc +# CHECK-UNKNOWN: cc456c27 vsoxseg7ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 ce +# CHECK-UNKNOWN: ce456c27 vsoxseg7ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg7ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xcc] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 cc +# CHECK-UNKNOWN: cc457c27 vsoxseg7ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg7ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 ce +# CHECK-UNKNOWN: ce457c27 vsseg8e8.v v24, (a0), v0.t # CHECK-INST: vsseg8e8.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x0c,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 e0 +# CHECK-UNKNOWN: e0050c27 vsseg8e8.v v24, (a0) # CHECK-INST: vsseg8e8.v v24, (a0) # CHECK-ENCODING: [0x27,0x0c,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 05 e2 +# CHECK-UNKNOWN: e2050c27 vsseg8e16.v v24, (a0), v0.t # CHECK-INST: vsseg8e16.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x5c,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 e0 +# CHECK-UNKNOWN: e0055c27 vsseg8e16.v v24, (a0) # CHECK-INST: vsseg8e16.v v24, (a0) # CHECK-ENCODING: [0x27,0x5c,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 05 e2 +# CHECK-UNKNOWN: e2055c27 vsseg8e32.v v24, (a0), v0.t # CHECK-INST: vsseg8e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 e0 +# CHECK-UNKNOWN: e0056c27 vsseg8e32.v v24, (a0) # CHECK-INST: vsseg8e32.v v24, (a0) # CHECK-ENCODING: [0x27,0x6c,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 e2 +# CHECK-UNKNOWN: e2056c27 vsseg8e64.v v24, (a0), v0.t # CHECK-INST: vsseg8e64.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x7c,0x05,0xe0] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 e0 +# CHECK-UNKNOWN: e0057c27 vsseg8e64.v v24, (a0) # CHECK-INST: vsseg8e64.v v24, (a0) # CHECK-ENCODING: [0x27,0x7c,0x05,0xe2] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 05 e2 +# CHECK-UNKNOWN: e2057c27 vssseg8e8.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 e8 +# CHECK-UNKNOWN: e8b50c27 vssseg8e8.v v24, (a0), a1 # CHECK-INST: vssseg8e8.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x0c,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 ea +# CHECK-UNKNOWN: eab50c27 vssseg8e16.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e16.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x5c,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 e8 +# CHECK-UNKNOWN: e8b55c27 vssseg8e16.v v24, (a0), a1 # CHECK-INST: vssseg8e16.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x5c,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c b5 ea +# CHECK-UNKNOWN: eab55c27 vssseg8e32.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e32.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x6c,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 e8 +# CHECK-UNKNOWN: e8b56c27 vssseg8e32.v v24, (a0), a1 # CHECK-INST: vssseg8e32.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x6c,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c b5 ea +# CHECK-UNKNOWN: eab56c27 vssseg8e64.v v24, (a0), a1, v0.t # CHECK-INST: vssseg8e64.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x7c,0xb5,0xe8] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 e8 +# CHECK-UNKNOWN: e8b57c27 vssseg8e64.v v24, (a0), a1 # CHECK-INST: vssseg8e64.v v24, (a0), a1 # CHECK-ENCODING: [0x27,0x7c,0xb5,0xea] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c b5 ea +# CHECK-UNKNOWN: eab57c27 vsuxseg8ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 e4 +# CHECK-UNKNOWN: e4450c27 vsuxseg8ei8.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 e6 +# CHECK-UNKNOWN: e6450c27 vsuxseg8ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 e4 +# CHECK-UNKNOWN: e4455c27 vsuxseg8ei16.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 e6 +# CHECK-UNKNOWN: e6455c27 vsuxseg8ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 e4 +# CHECK-UNKNOWN: e4456c27 vsuxseg8ei32.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 e6 +# CHECK-UNKNOWN: e6456c27 vsuxseg8ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsuxseg8ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xe4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 e4 +# CHECK-UNKNOWN: e4457c27 vsuxseg8ei64.v v24, (a0), v4 # CHECK-INST: vsuxseg8ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xe6] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 e6 +# CHECK-UNKNOWN: e6457c27 vsoxseg8ei8.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei8.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x0c,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 ec +# CHECK-UNKNOWN: ec450c27 vsoxseg8ei8.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei8.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x0c,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c 45 ee +# CHECK-UNKNOWN: ee450c27 vsoxseg8ei16.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei16.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x5c,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ec +# CHECK-UNKNOWN: ec455c27 vsoxseg8ei16.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ee +# CHECK-UNKNOWN: ee455c27 vsoxseg8ei32.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 ec +# CHECK-UNKNOWN: ec456c27 vsoxseg8ei32.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei32.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x6c,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 ee +# CHECK-UNKNOWN: ee456c27 vsoxseg8ei64.v v24, (a0), v4, v0.t # CHECK-INST: vsoxseg8ei64.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x7c,0x45,0xec] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 ec +# CHECK-UNKNOWN: ec457c27 vsoxseg8ei64.v v24, (a0), v4 # CHECK-INST: vsoxseg8ei64.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x7c,0x45,0xee] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 7c 45 ee +# CHECK-UNKNOWN: ee457c27 vlseg2e8.v v8, 0(a0), v0.t # CHECK-INST: vlseg2e8.v v8, (a0), v0.t # CHECK-ENCODING: [0x07,0x04,0x05,0x20] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 05 20 +# CHECK-UNKNOWN: 20050407 vlseg2e16ff.v v8, 0(a0) # CHECK-INST: vlseg2e16ff.v v8, (a0) # CHECK-ENCODING: [0x07,0x54,0x05,0x23] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 05 23 +# CHECK-UNKNOWN: 23055407 vlsseg2e8.v v8, 0(a0), a1 # CHECK-INST: vlsseg2e8.v v8, (a0), a1 # CHECK-ENCODING: [0x07,0x04,0xb5,0x2a] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 04 b5 2a +# CHECK-UNKNOWN: 2ab50407 vluxseg3ei16.v v8, 0(a0), v4 # CHECK-INST: vluxseg3ei16.v v8, (a0), v4 # CHECK-ENCODING: [0x07,0x54,0x45,0x46] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 54 45 46 +# CHECK-UNKNOWN: 46455407 vloxseg4ei64.v v8, 0(a0), v4, v0.t # CHECK-INST: vloxseg4ei64.v v8, (a0), v4, v0.t # CHECK-ENCODING: [0x07,0x74,0x45,0x6c] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors) or 'Zve64x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 07 74 45 6c +# CHECK-UNKNOWN: 6c457407 vsseg5e32.v v24, 0(a0), v0.t # CHECK-INST: vsseg5e32.v v24, (a0), v0.t # CHECK-ENCODING: [0x27,0x6c,0x05,0x80] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 05 80 +# CHECK-UNKNOWN: 80056c27 vssseg2e8.v v24, 0(a0), a1, v0.t # CHECK-INST: vssseg2e8.v v24, (a0), a1, v0.t # CHECK-ENCODING: [0x27,0x0c,0xb5,0x28] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 0c b5 28 +# CHECK-UNKNOWN: 28b50c27 vsoxseg7ei16.v v24, 0(a0), v4 # CHECK-INST: vsoxseg7ei16.v v24, (a0), v4 # CHECK-ENCODING: [0x27,0x5c,0x45,0xce] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 5c 45 ce +# CHECK-UNKNOWN: ce455c27 vsuxseg6ei32.v v24, 0(a0), v4, v0.t # CHECK-INST: vsuxseg6ei32.v v24, (a0), v4, v0.t # CHECK-ENCODING: [0x27,0x6c,0x45,0xa4] # CHECK-ERROR: instruction requires the following: 'V' (Vector Extension for Application Processors), 'Zve32x' (Vector Extensions for Embedded Processors){{$}} -# CHECK-UNKNOWN: 27 6c 45 a4 +# CHECK-UNKNOWN: a4456c27 diff --git a/llvm/tools/llvm-objdump/llvm-objdump.cpp b/llvm/tools/llvm-objdump/llvm-objdump.cpp index 339822e4adcd0..675364a1c1bcf 100644 --- a/llvm/tools/llvm-objdump/llvm-objdump.cpp +++ b/llvm/tools/llvm-objdump/llvm-objdump.cpp @@ -947,6 +947,55 @@ class AArch64PrettyPrinter : public PrettyPrinter { }; AArch64PrettyPrinter AArch64PrettyPrinterInst; +class RISCVPrettyPrinter : public PrettyPrinter { +public: + void printInst(MCInstPrinter &IP, const MCInst *MI, ArrayRef Bytes, + object::SectionedAddress Address, formatted_raw_ostream &OS, + StringRef Annot, MCSubtargetInfo const &STI, SourcePrinter *SP, + StringRef ObjectFilename, std::vector *Rels, + LiveVariablePrinter &LVP) override { + if (SP && (PrintSource || PrintLines)) + SP->printSourceLine(OS, Address, ObjectFilename, LVP); + LVP.printBetweenInsts(OS, false); + + size_t Start = OS.tell(); + if (LeadingAddr) + OS << format("%8" PRIx64 ":", Address.Address); + if (ShowRawInsn) { + size_t Pos = 0, End = Bytes.size(); + if (End % 4 == 0) { + // 32-bit and 64-bit instructions. + for (; Pos + 4 <= End; Pos += 4) + OS << ' ' + << format_hex_no_prefix( + llvm::support::endian::read( + Bytes.data() + Pos, llvm::endianness::little), + 8); + } else if (End % 2 == 0) { + // 16-bit and 48-bits instructions. + for (; Pos + 2 <= End; Pos += 2) + OS << ' ' + << format_hex_no_prefix( + llvm::support::endian::read( + Bytes.data() + Pos, llvm::endianness::little), + 4); + } + if (Pos < End) { + OS << ' '; + dumpBytes(Bytes.slice(Pos), OS); + } + } + + AlignToInstStartColumn(Start, STI, OS); + + if (MI) { + IP.printInst(MI, Address.Address, "", STI, OS); + } else + OS << "\t"; + } +}; +RISCVPrettyPrinter RISCVPrettyPrinterInst; + PrettyPrinter &selectPrettyPrinter(Triple const &Triple) { switch(Triple.getArch()) { default: @@ -967,6 +1016,9 @@ PrettyPrinter &selectPrettyPrinter(Triple const &Triple) { case Triple::aarch64_be: case Triple::aarch64_32: return AArch64PrettyPrinterInst; + case Triple::riscv32: + case Triple::riscv64: + return RISCVPrettyPrinterInst; } }