diff --git a/llvm/test/CodeGen/ARM/static-addr-hoisting.ll b/llvm/test/CodeGen/ARM/static-addr-hoisting.ll
index 683d607936b85b..01b6437143eab7 100644
--- a/llvm/test/CodeGen/ARM/static-addr-hoisting.ll
+++ b/llvm/test/CodeGen/ARM/static-addr-hoisting.ll
@@ -1,19 +1,19 @@
-; RUN: llc -mtriple=thumbv7-apple-ios %s -o -  | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=thumbv7-none-eabi %s -o -  | FileCheck %s
 
 define void @multiple_store() {
 ; CHECK-LABEL: multiple_store:
-; CHECK: movw r[[BASE1:[0-9]+]], #16960
-; CHECK: movs [[VAL:r[0-9]+]], #42
-; CHECK: movt r[[BASE1]], #15
-
-; CHECK-DAG: str [[VAL]], [r[[BASE1]]]
-; CHECK-DAG: str [[VAL]], [r[[BASE1]], #24]
-; CHECK-DAG: str.w [[VAL]], [r[[BASE1]], #42]
-
-; CHECK: movw r[[BASE2:[0-9]+]], #20394
-; CHECK: movt r[[BASE2]], #18
-
-; CHECK: str [[VAL]], [r[[BASE2]]]
+; CHECK:       @ %bb.0:
+; CHECK-NEXT:    movw r0, #16960
+; CHECK-NEXT:    movs r1, #42
+; CHECK-NEXT:    movt r0, #15
+; CHECK-NEXT:    str.w r1, [r0, #42]
+; CHECK-NEXT:    str r1, [r0, #24]
+; CHECK-NEXT:    str r1, [r0]
+; CHECK-NEXT:    movw r0, #20394
+; CHECK-NEXT:    movt r0, #18
+; CHECK-NEXT:    str r1, [r0]
+; CHECK-NEXT:    bx lr
   store i32 42, i32* inttoptr(i32 1000000 to i32*)
   store i32 42, i32* inttoptr(i32 1000024 to i32*)
   store i32 42, i32* inttoptr(i32 1000042 to i32*)