diff --git a/lld/ELF/Arch/PPC64.cpp b/lld/ELF/Arch/PPC64.cpp
index 70d284cfad713..c448d8488b8bb 100644
--- a/lld/ELF/Arch/PPC64.cpp
+++ b/lld/ELF/Arch/PPC64.cpp
@@ -172,7 +172,11 @@ bool elf::tryRelaxPPC64TocIndirection(RelType type, const Relocation &rel,
                    : getRelaTocSymAndAddend<ELF64BE>(tocISB, rel.addend);
 
   // Only non-preemptable defined symbols can be relaxed.
-  if (!d || d->isPreemptible)
+  //
+  // The toc entry of a non-preemptable ifunc is relocated by R_PPC64_IRELATIVE,
+  // which will run at load time to determine the relocated value. It is not
+  // known until load time, so the access cannot be relaxed.
+  if (!d || d->isPreemptible || d->isGnuIFunc())
     return false;
 
   // Two instructions can materialize a 32-bit signed offset from the toc base.
diff --git a/lld/test/ELF/ppc64-toc-relax-ifunc.s b/lld/test/ELF/ppc64-toc-relax-ifunc.s
new file mode 100644
index 0000000000000..54467e416b6cb
--- /dev/null
+++ b/lld/test/ELF/ppc64-toc-relax-ifunc.s
@@ -0,0 +1,20 @@
+# REQUIRES: ppc
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: echo '.globl ifunc; .type ifunc, %gnu_indirect_function; ifunc:' | \
+# RUN:   llvm-mc -filetype=obj -triple=powerpc64le - -o %t1.o
+# RUN: ld.lld %t.o %t1.o -o %t
+# RUN: llvm-objdump -d %t | FileCheck %s
+
+## ifunc is a non-preemptable STT_GNU_IFUNC. Its toc entry will be
+## relocated by R_PPC64_IRELATIVE, not representable by a toc-relative value.
+## Check the toc-indirect access is not relaxed.
+
+# CHECK:      nop
+# CHECK-NEXT: ld 3, -32768(2)
+
+addis 3, 2, .toc@toc@ha
+ld 3, .toc@toc@l(3)
+
+.section .toc,"aw",@progbits
+  .quad ifunc