diff --git a/clang/test/Preprocessor/riscv-target-features.c b/clang/test/Preprocessor/riscv-target-features.c index 72377c64c5671..7f0016f14c8da 100644 --- a/clang/test/Preprocessor/riscv-target-features.c +++ b/clang/test/Preprocessor/riscv-target-features.c @@ -55,11 +55,13 @@ // CHECK-NOT: __riscv_zvbc {{.*$}} // CHECK-NOT: __riscv_zvkg {{.*$}} // CHECK-NOT: __riscv_zvkn {{.*$}} +// CHECK-NOT: __riscv_zvknc {{.*$}} // CHECK-NOT: __riscv_zvkned {{.*$}} // CHECK-NOT: __riscv_zvkng {{.*$}} // CHECK-NOT: __riscv_zvknha {{.*$}} // CHECK-NOT: __riscv_zvknhb {{.*$}} // CHECK-NOT: __riscv_zvks {{.*$}} +// CHECK-NOT: __riscv_zvksc {{.*$}} // CHECK-NOT: __riscv_zvksed {{.*$}} // CHECK-NOT: __riscv_zvksg {{.*$}} // CHECK-NOT: __riscv_zvksh {{.*$}} @@ -551,108 +553,124 @@ // CHECK-ZFA-EXT: __riscv_zfa 2000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvbb0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvbb0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVBB-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvbb0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvbb0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVBB-EXT %s -// CHECK-ZVBB-EXT: __riscv_zvbb 5000{{$}} +// CHECK-ZVBB-EXT: __riscv_zvbb 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvbc0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvbc0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVBC-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvbc0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvbc0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVBC-EXT %s -// CHECK-ZVBC-EXT: __riscv_zvbc 5000{{$}} +// CHECK-ZVBC-EXT: __riscv_zvbc 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvkg0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvkg0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKG-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvkg0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvkg0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKG-EXT %s -// CHECK-ZVKG-EXT: __riscv_zvkg 5000{{$}} +// CHECK-ZVKG-EXT: __riscv_zvkg 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvkn0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvkn0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKN-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvkn0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvkn0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKN-EXT %s -// CHECK-ZVKN-EXT: __riscv_zvkn 5000{{$}} +// CHECK-ZVKN-EXT: __riscv_zvkn 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvkng0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvknc0p9 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNC-EXT %s +// RUN: %clang -target riscv64 -menable-experimental-extensions \ +// RUN: -march=rv64i_zve64x_zvknc0p9 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNC-EXT %s +// CHECK-ZVKNC-EXT: __riscv_zvknc 9000{{$}} + +// RUN: %clang -target riscv32 -menable-experimental-extensions \ +// RUN: -march=rv32i_zve64x_zvkng0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNG-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvkng0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvkng0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNG-EXT %s -// CHECK-ZVKNG-EXT: __riscv_zvkng 5000{{$}} +// CHECK-ZVKNG-EXT: __riscv_zvkng 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvknha0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvknha0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNHA-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvknha0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvknha0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNHA-EXT %s -// CHECK-ZVKNHA-EXT: __riscv_zvknha 5000{{$}} +// CHECK-ZVKNHA-EXT: __riscv_zvknha 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvknhb0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvknhb0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNHB-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvknhb0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvknhb0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNHB-EXT %s -// CHECK-ZVKNHB-EXT: __riscv_zvknhb 5000{{$}} +// CHECK-ZVKNHB-EXT: __riscv_zvknhb 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvkned0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvkned0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNED-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvkned0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvkned0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKNED-EXT %s -// CHECK-ZVKNED-EXT: __riscv_zvkned 5000{{$}} +// CHECK-ZVKNED-EXT: __riscv_zvkned 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvks0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvks0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKS-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvks0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvks0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKS-EXT %s -// CHECK-ZVKS-EXT: __riscv_zvks 5000{{$}} +// CHECK-ZVKS-EXT: __riscv_zvks 9000{{$}} + +// RUN: %clang -target riscv32 -menable-experimental-extensions \ +// RUN: -march=rv32i_zve64x_zvksc0p9 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSC-EXT %s +// RUN: %clang -target riscv64 -menable-experimental-extensions \ +// RUN: -march=rv64i_zve64x_zvksc0p9 -x c -E -dM %s \ +// RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSC-EXT %s +// CHECK-ZVKSC-EXT: __riscv_zvksc 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvksed0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvksed0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSED-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvksed0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvksed0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSED-EXT %s -// CHECK-ZVKSED-EXT: __riscv_zvksed 5000{{$}} +// CHECK-ZVKSED-EXT: __riscv_zvksed 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve64x_zvksg0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve64x_zvksg0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSG-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve64x_zvksg0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve64x_zvksg0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSG-EXT %s -// CHECK-ZVKSG-EXT: __riscv_zvksg 5000{{$}} +// CHECK-ZVKSG-EXT: __riscv_zvksg 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvksh0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvksh0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSH-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvksh0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvksh0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKSH-EXT %s -// CHECK-ZVKSH-EXT: __riscv_zvksh 5000{{$}} +// CHECK-ZVKSH-EXT: __riscv_zvksh 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ -// RUN: -march=rv32i_zve32x_zvkt0p5 -x c -E -dM %s \ +// RUN: -march=rv32i_zve32x_zvkt0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKT-EXT %s // RUN: %clang -target riscv64 -menable-experimental-extensions \ -// RUN: -march=rv64i_zve32x_zvkt0p5 -x c -E -dM %s \ +// RUN: -march=rv64i_zve32x_zvkt0p9 -x c -E -dM %s \ // RUN: -o - | FileCheck --check-prefix=CHECK-ZVKT-EXT %s -// CHECK-ZVKT-EXT: __riscv_zvkt 5000{{$}} +// CHECK-ZVKT-EXT: __riscv_zvkt 9000{{$}} // RUN: %clang -target riscv32 -menable-experimental-extensions \ // RUN: -march=rv32i_zicond1p0 -x c -E -dM %s \ diff --git a/llvm/docs/RISCVUsage.rst b/llvm/docs/RISCVUsage.rst index f56007349b8a6..7ea7dba043605 100644 --- a/llvm/docs/RISCVUsage.rst +++ b/llvm/docs/RISCVUsage.rst @@ -225,8 +225,8 @@ The primary goal of experimental support is to assist in the process of ratifica ``experimental-zvfh`` LLVM implements `this draft text `__. -``experimental-zvbb``, ``experimental-zvbc``, ``experimental-zvkg``, ``experimental-zvkn``, ``experimental-zvkng``, ``experimental-zvknha``, ``experimental-zvknhb``, ``experimental-zvkns``, ``experimental-zvks``, ``experimental-zvksed``, ``experimental-zvksg``, ``experimental-zvksh``, ``experimental-zvkt`` - LLVM implements the `0.5 draft specification `__. Note that current vector crypto extension version can be found in: . +``experimental-zvbb``, ``experimental-zvbc``, ``experimental-zvkg``, ``experimental-zvkn``, ``experimental-zvknc``, ``experimental-zvkned``, ``experimental-zvkng``, ``experimental-zvknha``, ``experimental-zvknhb``, ``experimental-zvks``, ``experimental-zvksc``, ``experimental-zvksed``, ``experimental-zvksg``, ``experimental-zvksh``, ``experimental-zvkt`` + LLVM implements the `0.9.7 draft specification `__. Note that current vector crypto extension version can be found in: . To use an experimental extension from `clang`, you must add `-menable-experimental-extensions` to the command line, and specify the exact version of the experimental extension you are using. To use an experimental extension with LLVM's internal developer tools (e.g. `llc`, `llvm-objdump`, `llvm-mc`), you must prefix the extension name with `experimental-`. Note that you don't need to specify the version with internal tools, and shouldn't include the `experimental-` prefix with `clang`. diff --git a/llvm/lib/Support/RISCVISAInfo.cpp b/llvm/lib/Support/RISCVISAInfo.cpp index 4e4a5c04bfe89..5bb393bd3e895 100644 --- a/llvm/lib/Support/RISCVISAInfo.cpp +++ b/llvm/lib/Support/RISCVISAInfo.cpp @@ -155,19 +155,21 @@ static const RISCVSupportedExtension SupportedExperimentalExtensions[] = { {"ztso", RISCVExtensionVersion{0, 1}}, // vector crypto - {"zvbb", RISCVExtensionVersion{0, 5}}, - {"zvbc", RISCVExtensionVersion{0, 5}}, - {"zvkg", RISCVExtensionVersion{0, 5}}, - {"zvkn", RISCVExtensionVersion{0, 5}}, - {"zvkned", RISCVExtensionVersion{0, 5}}, - {"zvkng", RISCVExtensionVersion{0, 5}}, - {"zvknha", RISCVExtensionVersion{0, 5}}, - {"zvknhb", RISCVExtensionVersion{0, 5}}, - {"zvks", RISCVExtensionVersion{0, 5}}, - {"zvksed", RISCVExtensionVersion{0, 5}}, - {"zvksg", RISCVExtensionVersion{0, 5}}, - {"zvksh", RISCVExtensionVersion{0, 5}}, - {"zvkt", RISCVExtensionVersion{0, 5}}, + {"zvbb", RISCVExtensionVersion{0, 9}}, + {"zvbc", RISCVExtensionVersion{0, 9}}, + {"zvkg", RISCVExtensionVersion{0, 9}}, + {"zvkn", RISCVExtensionVersion{0, 9}}, + {"zvknc", RISCVExtensionVersion{0, 9}}, + {"zvkned", RISCVExtensionVersion{0, 9}}, + {"zvkng", RISCVExtensionVersion{0, 9}}, + {"zvknha", RISCVExtensionVersion{0, 9}}, + {"zvknhb", RISCVExtensionVersion{0, 9}}, + {"zvks", RISCVExtensionVersion{0, 9}}, + {"zvksc", RISCVExtensionVersion{0, 9}}, + {"zvksed", RISCVExtensionVersion{0, 9}}, + {"zvksg", RISCVExtensionVersion{0, 9}}, + {"zvksh", RISCVExtensionVersion{0, 9}}, + {"zvkt", RISCVExtensionVersion{0, 9}}, }; static bool stripExperimentalPrefix(StringRef &Ext) { @@ -944,13 +946,13 @@ static const char *ImpliedExtsZve64x[] = {"zve32x", "zvl64b"}; static const char *ImpliedExtsZvfbfmin[] = {"zve32f"}; static const char *ImpliedExtsZvfbfwma[] = {"zve32f"}; static const char *ImpliedExtsZvfh[] = {"zve32f", "zfhmin"}; -static const char *ImpliedExtsZvkn[] = {"zvbb", "zvbc", "zvkned", "zvknhb", - "zvkt"}; +static const char *ImpliedExtsZvkn[] = {"zvbb", "zvkned", "zvknhb", "zvkt"}; +static const char *ImpliedExtsZvknc[] = {"zvbc", "zvkn"}; static const char *ImpliedExtsZvkng[] = {"zvkg", "zvkn"}; static const char *ImpliedExtsZvknhb[] = {"zvknha"}; -static const char *ImpliedExtsZvks[] = {"zvbb", "zvbc", "zvksed", "zvksh", - "zvkt"}; -static const char *ImpliedExtsZvksg[] = {"zvks", "zvkg"}; +static const char *ImpliedExtsZvks[] = {"zvbb", "zvksed", "zvksh", "zvkt"}; +static const char *ImpliedExtsZvksc[] = {"zvbc", "zvks"}; +static const char *ImpliedExtsZvksg[] = {"zvkg", "zvks"}; static const char *ImpliedExtsZvl1024b[] = {"zvl512b"}; static const char *ImpliedExtsZvl128b[] = {"zvl64b"}; static const char *ImpliedExtsZvl16384b[] = {"zvl8192b"}; @@ -1006,9 +1008,11 @@ static constexpr ImpliedExtsEntry ImpliedExts[] = { {{"zvfbfwma"}, {ImpliedExtsZvfbfwma}}, {{"zvfh"}, {ImpliedExtsZvfh}}, {{"zvkn"}, {ImpliedExtsZvkn}}, + {{"zvknc"}, {ImpliedExtsZvknc}}, {{"zvkng"}, {ImpliedExtsZvkng}}, {{"zvknhb"}, {ImpliedExtsZvknhb}}, {{"zvks"}, {ImpliedExtsZvks}}, + {{"zvksc"}, {ImpliedExtsZvksc}}, {{"zvksg"}, {ImpliedExtsZvksg}}, {{"zvl1024b"}, {ImpliedExtsZvl1024b}}, {{"zvl128b"}, {ImpliedExtsZvl128b}}, diff --git a/llvm/lib/Target/RISCV/RISCVFeatures.td b/llvm/lib/Target/RISCV/RISCVFeatures.td index d5213a07ea1ca..319a4097e8a68 100644 --- a/llvm/lib/Target/RISCV/RISCVFeatures.td +++ b/llvm/lib/Target/RISCV/RISCVFeatures.td @@ -555,6 +555,11 @@ def FeatureStdExtZvkn "This extension is shorthand for the following set of " "other extensions: Zvkned, Zvknhb, Zvbb, Zvbc, and Zvkt.">; +def FeatureStdExtZvknc + : SubtargetFeature<"experimental-zvknc", "HasStdExtZvknc", "true", + "This extension is shorthand for the following set of " + "other extensions: Zvkn and Zvbc.">; + def FeatureStdExtZvkned : SubtargetFeature<"experimental-zvkned", "HasStdExtZvkned", "true", "'Zvkned' (Vector AES Encryption & Decryption (Single Round))">; @@ -584,6 +589,11 @@ def FeatureStdExtZvks "This extension is shorthand for the following set of " "other extensions: Zvksed, Zvksh, Zvbb, Zvbc, and Zvkt.">; +def FeatureStdExtZvksc + : SubtargetFeature<"experimental-zvksc", "HasStdExtZvksc", "true", + "This extension is shorthand for the following set of " + "other extensions: Zvks and Zvbc.">; + def FeatureStdExtZvksed : SubtargetFeature<"experimental-zvksed", "HasStdExtZvksed", "true", "'Zvksed' (SM4 Block Cipher Instructions)">; diff --git a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td index db8c90e834a1f..3ab2d81000f9a 100644 --- a/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td +++ b/llvm/lib/Target/RISCV/RISCVInstrInfoZvk.td @@ -7,7 +7,7 @@ //===----------------------------------------------------------------------===// // // This file describes the RISC-V instructions from the standard 'Zvk', -// Vector Cryptography Instructions extension, version 0.5.1. +// Vector Cryptography Instructions extension, version 0.9.7. // //===----------------------------------------------------------------------===// diff --git a/llvm/test/CodeGen/RISCV/attributes.ll b/llvm/test/CodeGen/RISCV/attributes.ll index 98b02bd81c312..8283bf6a691b5 100644 --- a/llvm/test/CodeGen/RISCV/attributes.ll +++ b/llvm/test/CodeGen/RISCV/attributes.ll @@ -62,11 +62,13 @@ ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvbc %s -o - | FileCheck --check-prefix=RV32ZVBC %s ; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvkg %s -o - | FileCheck --check-prefix=RV32ZVKG %s ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvkn %s -o - | FileCheck --check-prefix=RV32ZVKN %s +; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvknc %s -o - | FileCheck --check-prefix=RV32ZVKNC %s ; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvkned %s -o - | FileCheck --check-prefix=RV32ZVKNED %s ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvkng %s -o - | FileCheck --check-prefix=RV32ZVKNG %s ; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvknha %s -o - | FileCheck --check-prefix=RV32ZVKNHA %s ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvknhb %s -o - | FileCheck --check-prefix=RV32ZVKNHB %s ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvks %s -o - | FileCheck --check-prefix=RV32ZVKS %s +; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvksc %s -o - | FileCheck --check-prefix=RV32ZVKSC %s ; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvksed %s -o - | FileCheck --check-prefix=RV32ZVKSED %s ; RUN: llc -mtriple=riscv32 -mattr=+zve64x -mattr=+experimental-zvksg %s -o - | FileCheck --check-prefix=RV32ZVKSG %s ; RUN: llc -mtriple=riscv32 -mattr=+zve32x -mattr=+experimental-zvksh %s -o - | FileCheck --check-prefix=RV32ZVKSH %s @@ -146,13 +148,15 @@ ; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvbc %s -o - | FileCheck --check-prefix=RV64ZVBC %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvkg %s -o - | FileCheck --check-prefix=RV64ZVKG %s ; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvkn %s -o - | FileCheck --check-prefix=RV64ZVKN %s +; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvknc %s -o - | FileCheck --check-prefix=RV64ZVKNC %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvkned %s -o - | FileCheck --check-prefix=RV64ZVKNED %s ; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvkng %s -o - | FileCheck --check-prefix=RV64ZVKNG %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvknha %s -o - | FileCheck --check-prefix=RV64ZVKNHA %s ; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvknhb %s -o - | FileCheck --check-prefix=RV64ZVKNHB %s -; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvks %s -o - | FileCheck --check-prefix=RV64ZVKS %s +; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvks %s -o - | FileCheck --check-prefix=RV64ZVKS %s +; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvksc %s -o - | FileCheck --check-prefix=RV64ZVKSC %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvksed %s -o - | FileCheck --check-prefix=RV64ZVKSED %s -; RUN: llc -mtriple=riscv64 -mattr=+zve64x -mattr=+experimental-zvksg %s -o - | FileCheck --check-prefix=RV64ZVKSG %s +; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvksg %s -o - | FileCheck --check-prefix=RV64ZVKSG %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvksh %s -o - | FileCheck --check-prefix=RV64ZVKSH %s ; RUN: llc -mtriple=riscv64 -mattr=+zve32x -mattr=+experimental-zvkt %s -o - | FileCheck --check-prefix=RV64ZVKT %s ; RUN: llc -mtriple=riscv64 -mattr=+experimental-zicond %s -o - | FileCheck --check-prefix=RV64ZICOND %s @@ -221,19 +225,21 @@ ; RV32ZICNTR: .attribute 5, "rv32i2p1_zicntr1p0_zicsr2p0" ; RV32ZIHPM: .attribute 5, "rv32i2p1_zicsr2p0_zihpm1p0" ; RV32ZFA: .attribute 5, "rv32i2p1_f2p2_zicsr2p0_zfa0p2" -; RV32ZVBB: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zve32x1p0_zvl32b1p0" -; RV32ZVBC: .attribute 5, "rv32i2p1_zicsr2p0_zvbc0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" -; RV32ZVKG: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p5_zvl32b1p0" -; RV32ZVKN: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkn0p5_zvkned0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV32ZVKNED: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p5_zvl32b1p0" -; RV32ZVKNG: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvkn0p5_zvkned0p5_zvkng0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV32ZVKNHA: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p5_zvl32b1p0" -; RV32ZVKNHB: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p5_zvknhb0p5_zvl32b1p0_zvl64b1p0" -; RV32ZVKS: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvks0p5_zvksed0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV32ZVKSED: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksed0p5_zvl32b1p0" -; RV32ZVKSG: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvks0p5_zvksed0p5_zvksg0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV32ZVKSH: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksh0p5_zvl32b1p0" -; RV32ZVKT: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkt0p5_zvl32b1p0" +; RV32ZVBB: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zvl32b1p0" +; RV32ZVBC: .attribute 5, "rv32i2p1_zicsr2p0_zvbc0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" +; RV32ZVKG: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p9_zvl32b1p0" +; RV32ZVKN: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKNC: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvknc0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKNED: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p9_zvl32b1p0" +; RV32ZVKNG: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvkn0p9_zvkned0p9_zvkng0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKNHA: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p9_zvl32b1p0" +; RV32ZVKNHB: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p9_zvknhb0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKS: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKSC: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksc0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKSED: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksed0p9_zvl32b1p0" +; RV32ZVKSG: .attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvks0p9_zvksed0p9_zvksg0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV32ZVKSH: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksh0p9_zvl32b1p0" +; RV32ZVKT: .attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkt0p9_zvl32b1p0" ; RV32ZICOND: .attribute 5, "rv32i2p1_zicond1p0" ; RV32SMAIA: .attribute 5, "rv32i2p1_smaia1p0" ; RV32SSAIA: .attribute 5, "rv32i2p1_ssaia1p0" @@ -304,19 +310,21 @@ ; RV64ZICNTR: .attribute 5, "rv64i2p1_zicntr1p0_zicsr2p0" ; RV64ZIHPM: .attribute 5, "rv64i2p1_zicsr2p0_zihpm1p0" ; RV64ZFA: .attribute 5, "rv64i2p1_f2p2_zicsr2p0_zfa0p2" -; RV64ZVBB: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p5_zve32x1p0_zvl32b1p0" -; RV64ZVBC: .attribute 5, "rv64i2p1_zicsr2p0_zvbc0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" -; RV64ZVKG: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkg0p5_zvl32b1p0" -; RV64ZVKN: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkn0p5_zvkned0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV64ZVKNED: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkned0p5_zvl32b1p0" -; RV64ZVKNG: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvkn0p5_zvkned0p5_zvkng0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV64ZVKNHA: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvknha0p5_zvl32b1p0" -; RV64ZVKNHB: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p5_zvknhb0p5_zvl32b1p0_zvl64b1p0" -; RV64ZVKS: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvks0p5_zvksed0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV64ZVKSED: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvksed0p5_zvl32b1p0" -; RV64ZVKSG: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvks0p5_zvksed0p5_zvksg0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" -; RV64ZVKSH: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvksh0p5_zvl32b1p0" -; RV64ZVKT: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkt0p5_zvl32b1p0" +; RV64ZVBB: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zvl32b1p0" +; RV64ZVBC: .attribute 5, "rv64i2p1_zicsr2p0_zvbc0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" +; RV64ZVKG: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkg0p9_zvl32b1p0" +; RV64ZVKN: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV64ZVKNC: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvknc0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV64ZVKNED: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkned0p9_zvl32b1p0" +; RV64ZVKNG: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvkn0p9_zvkned0p9_zvkng0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV64ZVKNHA: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvknha0p9_zvl32b1p0" +; RV64ZVKNHB: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p9_zvknhb0p9_zvl32b1p0_zvl64b1p0" +; RV64ZVKS: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zvks0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0" +; RV64ZVKSC: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksc0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" +; RV64ZVKSED: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvksed0p9_zvl32b1p0" +; RV64ZVKSG: .attribute 5, "rv64i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zvkg0p9_zvks0p9_zvksed0p9_zvksg0p9_zvksh0p9_zvkt0p9_zvl32b1p0" +; RV64ZVKSH: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvksh0p9_zvl32b1p0" +; RV64ZVKT: .attribute 5, "rv64i2p1_zicsr2p0_zve32x1p0_zvkt0p9_zvl32b1p0" ; RV64ZICOND: .attribute 5, "rv64i2p1_zicond1p0" ; RV64SMAIA: .attribute 5, "rv64i2p1_smaia1p0" ; RV64SSAIA: .attribute 5, "rv64i2p1_ssaia1p0" diff --git a/llvm/test/MC/RISCV/attribute-arch.s b/llvm/test/MC/RISCV/attribute-arch.s index eb99421e452c7..afa980e9b327a 100644 --- a/llvm/test/MC/RISCV/attribute-arch.s +++ b/llvm/test/MC/RISCV/attribute-arch.s @@ -111,44 +111,50 @@ .attribute arch, "rv32izbc1p0" # CHECK: attribute 5, "rv32i2p1_zbc1p0" -.attribute arch, "rv32i_zve64x_zvbb0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvbb0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve64x_zvbc0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbc0p5_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvbc0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbc0p9_zve32x1p0_zve64x1p0_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve32x_zvkg0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p5_zvl32b1p0" +.attribute arch, "rv32i_zve32x_zvkg0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkg0p9_zvl32b1p0" -.attribute arch, "rv32i_zve64x_zvkn0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkn0p5_zvkned0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvkn0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" + +.attribute arch, "rv32i_zve64x_zvknc0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvkn0p9_zvknc0p9_zvkned0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve64x_zvkng0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvkn0p5_zvkned0p5_zvkng0p5_zvknha0p5_zvknhb0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvkng0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvkn0p9_zvkned0p9_zvkng0p9_zvknha0p9_zvknhb0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve32x_zvknha0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p5_zvl32b1p0" +.attribute arch, "rv32i_zve32x_zvknha0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvknha0p9_zvl32b1p0" -.attribute arch, "rv32i_zve64x_zvknhb0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p5_zvknhb0p5_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvknhb0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zve64x1p0_zvknha0p9_zvknhb0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve32x_zvkned0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p5_zvl32b1p0" +.attribute arch, "rv32i_zve32x_zvkned0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvkned0p9_zvl32b1p0" -.attribute arch, "rv32i_zve64x_zvks0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvks0p5_zvksed0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvks0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve64x_zvksg0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p5_zvbc0p5_zve32x1p0_zve64x1p0_zvkg0p5_zvks0p5_zvksed0p5_zvksg0p5_zvksh0p5_zvkt0p5_zvl32b1p0_zvl64b1p0" +.attribute arch, "rv32i_zve64x_zvksc0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zvbc0p9_zve32x1p0_zve64x1p0_zvks0p9_zvksc0p9_zvksed0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve32x_zvksed0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksed0p5_zvl32b1p0" +.attribute arch, "rv32i_zve64x_zvksg0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zvbb0p9_zve32x1p0_zve64x1p0_zvkg0p9_zvks0p9_zvksed0p9_zvksg0p9_zvksh0p9_zvkt0p9_zvl32b1p0_zvl64b1p0" -.attribute arch, "rv32i_zve32x_zvksh0p5" -# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksh0p5_zvl32b1p0" +.attribute arch, "rv32i_zve32x_zvksed0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksed0p9_zvl32b1p0" -.attribute arch, "rv32i_zvkt0p5" -# CHECK: attribute 5, "rv32i2p1_zvkt0p5" +.attribute arch, "rv32i_zve32x_zvksh0p9" +# CHECK: attribute 5, "rv32i2p1_zicsr2p0_zve32x1p0_zvksh0p9_zvl32b1p0" + +.attribute arch, "rv32i_zvkt0p9" +# CHECK: attribute 5, "rv32i2p1_zvkt0p9" .attribute arch, "rv32izbs1p0" # CHECK: attribute 5, "rv32i2p1_zbs1p0"