diff --git a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
index 1aba6b78d8a9d..2baaadd8ae00a 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVLegalizerInfo.cpp
@@ -131,13 +131,14 @@ RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
 
   getActionDefinitionsBuilder(G_BRCOND).legalFor({sXLen}).minScalar(0, sXLen);
 
+  getActionDefinitionsBuilder(G_BRJT).legalFor({{p0, sXLen}});
+
   getActionDefinitionsBuilder(G_PHI)
       .legalFor({p0, sXLen})
       .widenScalarToNextPow2(0)
       .clampScalar(0, sXLen, sXLen);
 
-  getActionDefinitionsBuilder(G_GLOBAL_VALUE)
-      .legalFor({p0});
+  getActionDefinitionsBuilder({G_GLOBAL_VALUE, G_JUMP_TABLE}).legalFor({p0});
 
   if (ST.hasStdExtM() || ST.hasStdExtZmmul()) {
     getActionDefinitionsBuilder(G_MUL)
diff --git a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
index 60b6de0a760dc..3cdee17be8d1d 100644
--- a/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
+++ b/llvm/lib/Target/RISCV/GISel/RISCVRegisterBankInfo.cpp
@@ -166,12 +166,17 @@ RISCVRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
   case TargetOpcode::G_CONSTANT:
   case TargetOpcode::G_FRAME_INDEX:
   case TargetOpcode::G_GLOBAL_VALUE:
+  case TargetOpcode::G_JUMP_TABLE:
   case TargetOpcode::G_BRCOND:
     OperandsMapping = getOperandsMapping({GPRValueMapping, nullptr});
     break;
   case TargetOpcode::G_BR:
     OperandsMapping = getOperandsMapping({nullptr});
     break;
+  case TargetOpcode::G_BRJT:
+    OperandsMapping =
+        getOperandsMapping({GPRValueMapping, nullptr, GPRValueMapping});
+    break;
   case TargetOpcode::G_ICMP:
     OperandsMapping = getOperandsMapping(
         {GPRValueMapping, nullptr, GPRValueMapping, GPRValueMapping});
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jump-table-brjt.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jump-table-brjt.mir
new file mode 100644
index 0000000000000..a7fd7da77261f
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv32/legalize-jump-table-brjt.mir
@@ -0,0 +1,153 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+--- |
+  define i32 @jt_test(i32 signext %in) {
+  entry:
+    switch i32 %in, label %default [
+      i32 1, label %bb1
+      i32 2, label %bb2
+      i32 3, label %bb3
+      i32 4, label %bb4
+      i32 5, label %bb5
+      i32 6, label %bb6
+    ]
+
+  bb1:                                              ; preds = %entry
+    ret i32 4
+
+  bb2:                                              ; preds = %entry
+    ret i32 3
+
+  bb3:                                              ; preds = %entry
+    ret i32 2
+
+  bb4:                                              ; preds = %entry
+    ret i32 1
+
+  bb5:                                              ; preds = %entry
+    ret i32 100
+
+  bb6:                                              ; preds = %entry
+    ret i32 200
+
+  default:                                          ; preds = %entry
+    ret i32 1000
+  }
+
+...
+---
+name:            jt_test
+tracksRegLiveness: true
+jumpTable:
+  kind:            block-address
+  entries:
+    - id:              0
+      blocks:          [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6', '%bb.7' ]
+body:             |
+  ; CHECK-LABEL: name: jt_test
+  ; CHECK: bb.0.entry:
+  ; CHECK-NEXT:   successors: %bb.8(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT:   liveins: $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s32) = COPY $x10
+  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 5
+  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 200
+  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 100
+  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s32) = G_CONSTANT i32 2
+  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s32) = G_CONSTANT i32 3
+  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s32) = G_CONSTANT i32 4
+  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s32) = G_CONSTANT i32 1000
+  ; CHECK-NEXT:   [[C8:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
+  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[C8]]
+  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[SUB]](s32), [[C]]
+  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s32), %bb.8
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1.entry:
+  ; CHECK-NEXT:   successors: %bb.2(0x15555555), %bb.3(0x15555555), %bb.4(0x15555555), %bb.5(0x15555555), %bb.6(0x15555555), %bb.7(0x15555555)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[JUMP_TABLE:%[0-9]+]]:_(p0) = G_JUMP_TABLE %jump-table.0
+  ; CHECK-NEXT:   G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[SUB]](s32)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2.bb1:
+  ; CHECK-NEXT:   $x10 = COPY [[C6]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3.bb2:
+  ; CHECK-NEXT:   $x10 = COPY [[C5]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4.bb3:
+  ; CHECK-NEXT:   $x10 = COPY [[C4]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5.bb4:
+  ; CHECK-NEXT:   $x10 = COPY [[C3]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.6.bb5:
+  ; CHECK-NEXT:   $x10 = COPY [[C2]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.7.bb6:
+  ; CHECK-NEXT:   $x10 = COPY [[C1]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.8.default:
+  ; CHECK-NEXT:   $x10 = COPY [[C7]](s32)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  bb.1.entry:
+    successors: %bb.8, %bb.9
+    liveins: $x10
+
+    %0:_(s32) = COPY $x10
+    %4:_(s32) = G_CONSTANT i32 5
+    %8:_(s32) = G_CONSTANT i32 200
+    %9:_(s32) = G_CONSTANT i32 100
+    %10:_(s32) = G_CONSTANT i32 1
+    %11:_(s32) = G_CONSTANT i32 2
+    %12:_(s32) = G_CONSTANT i32 3
+    %13:_(s32) = G_CONSTANT i32 4
+    %14:_(s32) = G_CONSTANT i32 1000
+    %1:_(s32) = G_CONSTANT i32 1
+    %2:_(s32) = G_SUB %0, %1
+    %6:_(s1) = G_ICMP intpred(ugt), %2(s32), %4
+    G_BRCOND %6(s1), %bb.8
+
+  bb.9.entry:
+    successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+
+    %7:_(p0) = G_JUMP_TABLE %jump-table.0
+    G_BRJT %7(p0), %jump-table.0, %2(s32)
+
+  bb.2.bb1:
+    $x10 = COPY %13(s32)
+    PseudoRET implicit $x10
+
+  bb.3.bb2:
+    $x10 = COPY %12(s32)
+    PseudoRET implicit $x10
+
+  bb.4.bb3:
+    $x10 = COPY %11(s32)
+    PseudoRET implicit $x10
+
+  bb.5.bb4:
+    $x10 = COPY %10(s32)
+    PseudoRET implicit $x10
+
+  bb.6.bb5:
+    $x10 = COPY %9(s32)
+    PseudoRET implicit $x10
+
+  bb.7.bb6:
+    $x10 = COPY %8(s32)
+    PseudoRET implicit $x10
+
+  bb.8.default:
+    $x10 = COPY %14(s32)
+    PseudoRET implicit $x10
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jump-table-brjt.mir b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jump-table-brjt.mir
new file mode 100644
index 0000000000000..9910e98a3e820
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/legalizer/rv64/legalize-jump-table-brjt.mir
@@ -0,0 +1,159 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=legalizer %s -o - \
+# RUN: | FileCheck %s
+
+--- |
+  define i32 @jt_test(i32 signext %in) {
+  entry:
+    %0 = sext i32 %in to i64
+    switch i64 %0, label %default [
+      i64 1, label %bb1
+      i64 2, label %bb2
+      i64 3, label %bb3
+      i64 4, label %bb4
+      i64 5, label %bb5
+      i64 6, label %bb6
+    ]
+
+  bb1:
+    ret i32 4
+
+  bb2:
+    ret i32 3
+
+  bb3:
+    ret i32 2
+
+  bb4:
+    ret i32 1
+
+  bb5:
+    ret i32 100
+
+  bb6:
+    ret i32 200
+
+  default:
+    ret i32 1000
+  }
+
+...
+---
+name:            jt_test
+tracksRegLiveness: true
+jumpTable:
+  kind:            custom32
+  entries:
+    - id:              0
+      blocks:          [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6', '%bb.7' ]
+body:             |
+  ; CHECK-LABEL: name: jt_test
+  ; CHECK: bb.0.entry:
+  ; CHECK-NEXT:   successors: %bb.8(0x40000000), %bb.1(0x40000000)
+  ; CHECK-NEXT:   liveins: $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[COPY:%[0-9]+]]:_(s64) = COPY $x10
+  ; CHECK-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:_(s64) = G_ASSERT_SEXT [[COPY]], 32
+  ; CHECK-NEXT:   [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 5
+  ; CHECK-NEXT:   [[SEXT_INREG:%[0-9]+]]:_(s64) = G_SEXT_INREG [[ASSERT_SEXT]], 32
+  ; CHECK-NEXT:   [[C1:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+  ; CHECK-NEXT:   [[SUB:%[0-9]+]]:_(s64) = G_SUB [[SEXT_INREG]], [[C1]]
+  ; CHECK-NEXT:   [[ICMP:%[0-9]+]]:_(s64) = G_ICMP intpred(ugt), [[SUB]](s64), [[C]]
+  ; CHECK-NEXT:   G_BRCOND [[ICMP]](s64), %bb.8
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.1.entry:
+  ; CHECK-NEXT:   successors: %bb.2(0x15555555), %bb.3(0x15555555), %bb.4(0x15555555), %bb.5(0x15555555), %bb.6(0x15555555), %bb.7(0x15555555)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT:   [[JUMP_TABLE:%[0-9]+]]:_(p0) = G_JUMP_TABLE %jump-table.0
+  ; CHECK-NEXT:   G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[SUB]](s64)
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.2.bb1:
+  ; CHECK-NEXT:   [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 4
+  ; CHECK-NEXT:   $x10 = COPY [[C2]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.3.bb2:
+  ; CHECK-NEXT:   [[C3:%[0-9]+]]:_(s64) = G_CONSTANT i64 3
+  ; CHECK-NEXT:   $x10 = COPY [[C3]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.4.bb3:
+  ; CHECK-NEXT:   [[C4:%[0-9]+]]:_(s64) = G_CONSTANT i64 2
+  ; CHECK-NEXT:   $x10 = COPY [[C4]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.5.bb4:
+  ; CHECK-NEXT:   [[C5:%[0-9]+]]:_(s64) = G_CONSTANT i64 1
+  ; CHECK-NEXT:   $x10 = COPY [[C5]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.6.bb5:
+  ; CHECK-NEXT:   [[C6:%[0-9]+]]:_(s64) = G_CONSTANT i64 100
+  ; CHECK-NEXT:   $x10 = COPY [[C6]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.7.bb6:
+  ; CHECK-NEXT:   [[C7:%[0-9]+]]:_(s64) = G_CONSTANT i64 200
+  ; CHECK-NEXT:   $x10 = COPY [[C7]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  ; CHECK-NEXT: {{  $}}
+  ; CHECK-NEXT: bb.8.default:
+  ; CHECK-NEXT:   [[C8:%[0-9]+]]:_(s64) = G_CONSTANT i64 1000
+  ; CHECK-NEXT:   $x10 = COPY [[C8]](s64)
+  ; CHECK-NEXT:   PseudoRET implicit $x10
+  bb.1.entry:
+    successors: %bb.8, %bb.9
+    liveins: $x10
+
+    %1:_(s64) = COPY $x10
+    %2:_(s64) = G_ASSERT_SEXT %1, 32
+    %0:_(s32) = G_TRUNC %2(s64)
+    %7:_(s64) = G_CONSTANT i64 5
+    %3:_(s64) = G_SEXT %0(s32)
+    %4:_(s64) = G_CONSTANT i64 1
+    %5:_(s64) = G_SUB %3, %4
+    %9:_(s1) = G_ICMP intpred(ugt), %5(s64), %7
+    G_BRCOND %9(s1), %bb.8
+
+  bb.9.entry:
+    successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+
+    %10:_(p0) = G_JUMP_TABLE %jump-table.0
+    G_BRJT %10(p0), %jump-table.0, %5(s64)
+
+  bb.2.bb1:
+    %22:_(s64) = G_CONSTANT i64 4
+    $x10 = COPY %22(s64)
+    PseudoRET implicit $x10
+
+  bb.3.bb2:
+    %20:_(s64) = G_CONSTANT i64 3
+    $x10 = COPY %20(s64)
+    PseudoRET implicit $x10
+
+  bb.4.bb3:
+    %18:_(s64) = G_CONSTANT i64 2
+    $x10 = COPY %18(s64)
+    PseudoRET implicit $x10
+
+  bb.5.bb4:
+    %16:_(s64) = G_CONSTANT i64 1
+    $x10 = COPY %16(s64)
+    PseudoRET implicit $x10
+
+  bb.6.bb5:
+    %14:_(s64) = G_CONSTANT i64 100
+    $x10 = COPY %14(s64)
+    PseudoRET implicit $x10
+
+  bb.7.bb6:
+    %12:_(s64) = G_CONSTANT i64 200
+    $x10 = COPY %12(s64)
+    PseudoRET implicit $x10
+
+  bb.8.default:
+    %24:_(s64) = G_CONSTANT i64 1000
+    $x10 = COPY %24(s64)
+    PseudoRET implicit $x10
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv32.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv32.mir
new file mode 100644
index 0000000000000..b7fd2a3ce01aa
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv32.mir
@@ -0,0 +1,154 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv32 -run-pass=regbankselect \
+# RUN:   -simplify-mir -verify-machineinstrs %s \
+# RUN:   -o - | FileCheck -check-prefix=RV32I %s
+
+--- |
+  define i32 @jt_test(i32 signext %in) {
+  entry:
+    switch i32 %in, label %default [
+      i32 1, label %bb1
+      i32 2, label %bb2
+      i32 3, label %bb3
+      i32 4, label %bb4
+      i32 5, label %bb5
+      i32 6, label %bb6
+    ]
+
+  bb1:                                              ; preds = %entry
+    ret i32 4
+
+  bb2:                                              ; preds = %entry
+    ret i32 3
+
+  bb3:                                              ; preds = %entry
+    ret i32 2
+
+  bb4:                                              ; preds = %entry
+    ret i32 1
+
+  bb5:                                              ; preds = %entry
+    ret i32 100
+
+  bb6:                                              ; preds = %entry
+    ret i32 200
+
+  default:                                          ; preds = %entry
+    ret i32 1000
+  }
+
+...
+---
+name:            jt_test
+legalized:       true
+tracksRegLiveness: true
+jumpTable:
+  kind:            block-address
+  entries:
+    - id:              0
+      blocks:          [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6', '%bb.7' ]
+body:             |
+  ; RV32I-LABEL: name: jt_test
+  ; RV32I: bb.0.entry:
+  ; RV32I-NEXT:   liveins: $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT:   [[COPY:%[0-9]+]]:gprb(s32) = COPY $x10
+  ; RV32I-NEXT:   [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 5
+  ; RV32I-NEXT:   [[C1:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 200
+  ; RV32I-NEXT:   [[C2:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 100
+  ; RV32I-NEXT:   [[C3:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
+  ; RV32I-NEXT:   [[C4:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 2
+  ; RV32I-NEXT:   [[C5:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 3
+  ; RV32I-NEXT:   [[C6:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 4
+  ; RV32I-NEXT:   [[C7:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1000
+  ; RV32I-NEXT:   [[C8:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1
+  ; RV32I-NEXT:   [[SUB:%[0-9]+]]:gprb(s32) = G_SUB [[COPY]], [[C8]]
+  ; RV32I-NEXT:   [[ICMP:%[0-9]+]]:gprb(s32) = G_ICMP intpred(ugt), [[SUB]](s32), [[C]]
+  ; RV32I-NEXT:   G_BRCOND [[ICMP]](s32), %bb.8
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.1.entry:
+  ; RV32I-NEXT:   successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT:   [[JUMP_TABLE:%[0-9]+]]:gprb(p0) = G_JUMP_TABLE %jump-table.0
+  ; RV32I-NEXT:   G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[SUB]](s32)
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.2.bb1:
+  ; RV32I-NEXT:   $x10 = COPY [[C6]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.3.bb2:
+  ; RV32I-NEXT:   $x10 = COPY [[C5]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.4.bb3:
+  ; RV32I-NEXT:   $x10 = COPY [[C4]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.5.bb4:
+  ; RV32I-NEXT:   $x10 = COPY [[C3]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.6.bb5:
+  ; RV32I-NEXT:   $x10 = COPY [[C2]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.7.bb6:
+  ; RV32I-NEXT:   $x10 = COPY [[C1]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  ; RV32I-NEXT: {{  $}}
+  ; RV32I-NEXT: bb.8.default:
+  ; RV32I-NEXT:   $x10 = COPY [[C7]](s32)
+  ; RV32I-NEXT:   PseudoRET implicit $x10
+  bb.1.entry:
+    successors: %bb.8, %bb.9
+    liveins: $x10
+
+    %0:_(s32) = COPY $x10
+    %4:_(s32) = G_CONSTANT i32 5
+    %8:_(s32) = G_CONSTANT i32 200
+    %9:_(s32) = G_CONSTANT i32 100
+    %10:_(s32) = G_CONSTANT i32 1
+    %11:_(s32) = G_CONSTANT i32 2
+    %12:_(s32) = G_CONSTANT i32 3
+    %13:_(s32) = G_CONSTANT i32 4
+    %14:_(s32) = G_CONSTANT i32 1000
+    %1:_(s32) = G_CONSTANT i32 1
+    %2:_(s32) = G_SUB %0, %1
+    %16:_(s32) = G_ICMP intpred(ugt), %2(s32), %4
+    G_BRCOND %16(s32), %bb.8
+
+  bb.9.entry:
+    successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+
+    %7:_(p0) = G_JUMP_TABLE %jump-table.0
+    G_BRJT %7(p0), %jump-table.0, %2(s32)
+
+  bb.2.bb1:
+    $x10 = COPY %13(s32)
+    PseudoRET implicit $x10
+
+  bb.3.bb2:
+    $x10 = COPY %12(s32)
+    PseudoRET implicit $x10
+
+  bb.4.bb3:
+    $x10 = COPY %11(s32)
+    PseudoRET implicit $x10
+
+  bb.5.bb4:
+    $x10 = COPY %10(s32)
+    PseudoRET implicit $x10
+
+  bb.6.bb5:
+    $x10 = COPY %9(s32)
+    PseudoRET implicit $x10
+
+  bb.7.bb6:
+    $x10 = COPY %8(s32)
+    PseudoRET implicit $x10
+
+  bb.8.default:
+    $x10 = COPY %14(s32)
+    PseudoRET implicit $x10
+
+...
diff --git a/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv64.mir b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv64.mir
new file mode 100644
index 0000000000000..56cac99a2b411
--- /dev/null
+++ b/llvm/test/CodeGen/RISCV/GlobalISel/regbankselect/jump-table-brjt-rv64.mir
@@ -0,0 +1,159 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=riscv64 -run-pass=regbankselect \
+# RUN:   -simplify-mir -verify-machineinstrs %s \
+# RUN:   -o - | FileCheck -check-prefix=RV64I %s
+
+--- |
+  define i32 @jt_test(i32 signext %in) {
+  entry:
+    %0 = sext i32 %in to i64
+    switch i64 %0, label %default [
+      i64 1, label %bb1
+      i64 2, label %bb2
+      i64 3, label %bb3
+      i64 4, label %bb4
+      i64 5, label %bb5
+      i64 6, label %bb6
+    ]
+
+  bb1:                                              ; preds = %entry
+    ret i32 4
+
+  bb2:                                              ; preds = %entry
+    ret i32 3
+
+  bb3:                                              ; preds = %entry
+    ret i32 2
+
+  bb4:                                              ; preds = %entry
+    ret i32 1
+
+  bb5:                                              ; preds = %entry
+    ret i32 100
+
+  bb6:                                              ; preds = %entry
+    ret i32 200
+
+  default:                                          ; preds = %entry
+    ret i32 1000
+  }
+
+...
+---
+name:            jt_test
+legalized:       true
+tracksRegLiveness: true
+jumpTable:
+  kind:            custom32
+  entries:
+    - id:              0
+      blocks:          [ '%bb.2', '%bb.3', '%bb.4', '%bb.5', '%bb.6', '%bb.7' ]
+body:             |
+  ; RV64I-LABEL: name: jt_test
+  ; RV64I: bb.0.entry:
+  ; RV64I-NEXT:   liveins: $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT:   [[COPY:%[0-9]+]]:gprb(s64) = COPY $x10
+  ; RV64I-NEXT:   [[ASSERT_SEXT:%[0-9]+]]:gprb(s64) = G_ASSERT_SEXT [[COPY]], 32
+  ; RV64I-NEXT:   [[C:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 5
+  ; RV64I-NEXT:   [[SEXT_INREG:%[0-9]+]]:gprb(s64) = G_SEXT_INREG [[ASSERT_SEXT]], 32
+  ; RV64I-NEXT:   [[C1:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
+  ; RV64I-NEXT:   [[SUB:%[0-9]+]]:gprb(s64) = G_SUB [[SEXT_INREG]], [[C1]]
+  ; RV64I-NEXT:   [[ICMP:%[0-9]+]]:gprb(s64) = G_ICMP intpred(ugt), [[SUB]](s64), [[C]]
+  ; RV64I-NEXT:   G_BRCOND [[ICMP]](s64), %bb.8
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.1.entry:
+  ; RV64I-NEXT:   successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT:   [[JUMP_TABLE:%[0-9]+]]:gprb(p0) = G_JUMP_TABLE %jump-table.0
+  ; RV64I-NEXT:   G_BRJT [[JUMP_TABLE]](p0), %jump-table.0, [[SUB]](s64)
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.2.bb1:
+  ; RV64I-NEXT:   [[C2:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 4
+  ; RV64I-NEXT:   $x10 = COPY [[C2]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.3.bb2:
+  ; RV64I-NEXT:   [[C3:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 3
+  ; RV64I-NEXT:   $x10 = COPY [[C3]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.4.bb3:
+  ; RV64I-NEXT:   [[C4:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 2
+  ; RV64I-NEXT:   $x10 = COPY [[C4]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.5.bb4:
+  ; RV64I-NEXT:   [[C5:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1
+  ; RV64I-NEXT:   $x10 = COPY [[C5]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.6.bb5:
+  ; RV64I-NEXT:   [[C6:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 100
+  ; RV64I-NEXT:   $x10 = COPY [[C6]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.7.bb6:
+  ; RV64I-NEXT:   [[C7:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 200
+  ; RV64I-NEXT:   $x10 = COPY [[C7]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  ; RV64I-NEXT: {{  $}}
+  ; RV64I-NEXT: bb.8.default:
+  ; RV64I-NEXT:   [[C8:%[0-9]+]]:gprb(s64) = G_CONSTANT i64 1000
+  ; RV64I-NEXT:   $x10 = COPY [[C8]](s64)
+  ; RV64I-NEXT:   PseudoRET implicit $x10
+  bb.1.entry:
+    successors: %bb.8, %bb.9
+    liveins: $x10
+
+    %1:_(s64) = COPY $x10
+    %2:_(s64) = G_ASSERT_SEXT %1, 32
+    %7:_(s64) = G_CONSTANT i64 5
+    %3:_(s64) = G_SEXT_INREG %2, 32
+    %4:_(s64) = G_CONSTANT i64 1
+    %5:_(s64) = G_SUB %3, %4
+    %26:_(s64) = G_ICMP intpred(ugt), %5(s64), %7
+    G_BRCOND %26(s64), %bb.8
+
+  bb.9.entry:
+    successors: %bb.2, %bb.3, %bb.4, %bb.5, %bb.6, %bb.7
+
+    %10:_(p0) = G_JUMP_TABLE %jump-table.0
+    G_BRJT %10(p0), %jump-table.0, %5(s64)
+
+  bb.2.bb1:
+    %22:_(s64) = G_CONSTANT i64 4
+    $x10 = COPY %22(s64)
+    PseudoRET implicit $x10
+
+  bb.3.bb2:
+    %20:_(s64) = G_CONSTANT i64 3
+    $x10 = COPY %20(s64)
+    PseudoRET implicit $x10
+
+  bb.4.bb3:
+    %18:_(s64) = G_CONSTANT i64 2
+    $x10 = COPY %18(s64)
+    PseudoRET implicit $x10
+
+  bb.5.bb4:
+    %16:_(s64) = G_CONSTANT i64 1
+    $x10 = COPY %16(s64)
+    PseudoRET implicit $x10
+
+  bb.6.bb5:
+    %14:_(s64) = G_CONSTANT i64 100
+    $x10 = COPY %14(s64)
+    PseudoRET implicit $x10
+
+  bb.7.bb6:
+    %12:_(s64) = G_CONSTANT i64 200
+    $x10 = COPY %12(s64)
+    PseudoRET implicit $x10
+
+  bb.8.default:
+    %24:_(s64) = G_CONSTANT i64 1000
+    $x10 = COPY %24(s64)
+    PseudoRET implicit $x10
+
+...