diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp index 158fc7d5db067d..fabbe5daeee783 100644 --- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp @@ -168,7 +168,7 @@ static SDValue createTuple(SelectionDAG &CurDAG, ArrayRef Regs, } } -void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, unsigned IntNo, +void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, unsigned IntNo, bool IsMasked, bool IsStrided) { SDLoc DL(Node); unsigned NF = Node->getNumValues() - 1; @@ -177,55 +177,23 @@ void RISCVDAGToDAGISel::selectVLSEG(SDNode *Node, unsigned IntNo, MVT XLenVT = Subtarget->getXLenVT(); RISCVVLMUL LMUL = getLMUL(VT); SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Operands; - Operands.push_back(Node->getOperand(2)); // Base pointer. - if (IsStrided) { - Operands.push_back(Node->getOperand(3)); // Stride. - Operands.push_back(Node->getOperand(4)); // VL. - } else { - Operands.push_back(Node->getOperand(3)); // VL. - } - Operands.push_back(SEW); - Operands.push_back(Node->getOperand(0)); // Chain. - const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( - IntNo, ScalarSize, static_cast(LMUL), - static_cast(RISCVVLMUL::LMUL_1)); - SDNode *Load = - CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped, MVT::Other, Operands); - SDValue SuperReg = SDValue(Load, 0); - for (unsigned I = 0; I < NF; ++I) - ReplaceUses(SDValue(Node, I), - CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL, - VT, SuperReg)); - - ReplaceUses(SDValue(Node, NF), SDValue(Load, 1)); - CurDAG->RemoveDeadNode(Node); -} - -void RISCVDAGToDAGISel::selectVLSEGMask(SDNode *Node, unsigned IntNo, - bool IsStrided) { - SDLoc DL(Node); - unsigned NF = Node->getNumValues() - 1; - MVT VT = Node->getSimpleValueType(0); - unsigned ScalarSize = VT.getScalarSizeInBits(); - MVT XLenVT = Subtarget->getXLenVT(); - RISCVVLMUL LMUL = getLMUL(VT); - SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); - SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); + unsigned CurOp = 2; SmallVector Operands; - Operands.push_back(MaskedOff); - Operands.push_back(Node->getOperand(NF + 2)); // Base pointer. - if (IsStrided) { - Operands.push_back(Node->getOperand(NF + 3)); // Stride. - Operands.push_back(Node->getOperand(NF + 4)); // Mask. - Operands.push_back(Node->getOperand(NF + 5)); // VL. - } else { - Operands.push_back(Node->getOperand(NF + 3)); // Mask. - Operands.push_back(Node->getOperand(NF + 4)); // VL. + if (IsMasked) { + SmallVector Regs(Node->op_begin() + CurOp, + Node->op_begin() + CurOp + NF); + SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); + Operands.push_back(MaskedOff); + CurOp += NF; } + Operands.push_back(Node->getOperand(CurOp++)); // Base pointer. + if (IsStrided) + Operands.push_back(Node->getOperand(CurOp++)); // Stride. + if (IsMasked) + Operands.push_back(Node->getOperand(CurOp++)); // Mask. + Operands.push_back(Node->getOperand(CurOp++)); // VL. Operands.push_back(SEW); - Operands.push_back(Node->getOperand(0)); /// Chain. + Operands.push_back(Node->getOperand(0)); // Chain. const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( IntNo, ScalarSize, static_cast(LMUL), static_cast(RISCVVLMUL::LMUL_1)); @@ -241,57 +209,31 @@ void RISCVDAGToDAGISel::selectVLSEGMask(SDNode *Node, unsigned IntNo, CurDAG->RemoveDeadNode(Node); } -void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node) { +void RISCVDAGToDAGISel::selectVLSEGFF(SDNode *Node, bool IsMasked) { SDLoc DL(Node); unsigned IntNo = cast(Node->getOperand(1))->getZExtValue(); unsigned NF = Node->getNumValues() - 2; // Do not count VL and Chain. MVT VT = Node->getSimpleValueType(0); - unsigned ScalarSize = VT.getScalarSizeInBits(); MVT XLenVT = Subtarget->getXLenVT(); - RISCVVLMUL LMUL = getLMUL(VT); - SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Operands; - Operands.push_back(Node->getOperand(2)); // Base pointer. - Operands.push_back(Node->getOperand(3)); // VL. - Operands.push_back(SEW); - Operands.push_back(Node->getOperand(0)); // Chain. - const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( - IntNo, ScalarSize, static_cast(LMUL), - static_cast(RISCVVLMUL::LMUL_1)); - SDNode *Load = CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped, MVT::Other, - MVT::Glue, Operands); - SDNode *ReadVL = CurDAG->getMachineNode(RISCV::PseudoReadVL, DL, XLenVT, - /*Glue*/ SDValue(Load, 2)); - - SDValue SuperReg = SDValue(Load, 0); - for (unsigned I = 0; I < NF; ++I) - ReplaceUses(SDValue(Node, I), - CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL, - VT, SuperReg)); - - ReplaceUses(SDValue(Node, NF), SDValue(ReadVL, 0)); // VL - ReplaceUses(SDValue(Node, NF + 1), SDValue(Load, 1)); // Chain - CurDAG->RemoveDeadNode(Node); -} - -void RISCVDAGToDAGISel::selectVLSEGFFMask(SDNode *Node) { - SDLoc DL(Node); - unsigned IntNo = cast(Node->getOperand(1))->getZExtValue(); - unsigned NF = Node->getNumValues() - 2; // Do not count VL and Chain. - MVT VT = Node->getSimpleValueType(0); unsigned ScalarSize = VT.getScalarSizeInBits(); - MVT XLenVT = Subtarget->getXLenVT(); RISCVVLMUL LMUL = getLMUL(VT); SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); - SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); + + unsigned CurOp = 2; SmallVector Operands; - Operands.push_back(MaskedOff); - Operands.push_back(Node->getOperand(NF + 2)); // Base pointer. - Operands.push_back(Node->getOperand(NF + 3)); // Mask. - Operands.push_back(Node->getOperand(NF + 4)); // VL. + if (IsMasked) { + SmallVector Regs(Node->op_begin() + CurOp, + Node->op_begin() + CurOp + NF); + SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); + Operands.push_back(MaskedOff); + CurOp += NF; + } + Operands.push_back(Node->getOperand(CurOp++)); // Base pointer. + if (IsMasked) + Operands.push_back(Node->getOperand(CurOp++)); // Mask. + Operands.push_back(Node->getOperand(CurOp++)); // VL. Operands.push_back(SEW); - Operands.push_back(Node->getOperand(0)); /// Chain. + Operands.push_back(Node->getOperand(0)); // Chain. const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( IntNo, ScalarSize, static_cast(LMUL), static_cast(RISCVVLMUL::LMUL_1)); @@ -311,7 +253,8 @@ void RISCVDAGToDAGISel::selectVLSEGFFMask(SDNode *Node) { CurDAG->RemoveDeadNode(Node); } -void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, unsigned IntNo) { +void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, unsigned IntNo, + bool IsMasked) { SDLoc DL(Node); unsigned NF = Node->getNumValues() - 1; MVT VT = Node->getSimpleValueType(0); @@ -319,52 +262,24 @@ void RISCVDAGToDAGISel::selectVLXSEG(SDNode *Node, unsigned IntNo) { MVT XLenVT = Subtarget->getXLenVT(); RISCVVLMUL LMUL = getLMUL(VT); SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SDValue Operands[] = { - Node->getOperand(2), // Base pointer. - Node->getOperand(3), // Index. - Node->getOperand(4), // VL. - SEW, Node->getOperand(0) // Chain. - }; - - MVT IndexVT = Node->getOperand(3)->getSimpleValueType(0); - RISCVVLMUL IndexLMUL = getLMUL(IndexVT); - unsigned IndexScalarSize = IndexVT.getScalarSizeInBits(); - const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( - IntNo, IndexScalarSize, static_cast(LMUL), - static_cast(IndexLMUL)); - SDNode *Load = - CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped, MVT::Other, Operands); - SDValue SuperReg = SDValue(Load, 0); - for (unsigned I = 0; I < NF; ++I) - ReplaceUses(SDValue(Node, I), - CurDAG->getTargetExtractSubreg(getSubregIndexByMVT(VT, I), DL, - VT, SuperReg)); - - ReplaceUses(SDValue(Node, NF), SDValue(Load, 1)); - CurDAG->RemoveDeadNode(Node); -} + unsigned CurOp = 2; + SmallVector Operands; + if (IsMasked) { + SmallVector Regs(Node->op_begin() + CurOp, + Node->op_begin() + CurOp + NF); + SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); + Operands.push_back(MaskedOff); + CurOp += NF; + } + Operands.push_back(Node->getOperand(CurOp++)); // Base pointer. + Operands.push_back(Node->getOperand(CurOp++)); // Index. + MVT IndexVT = Operands.back()->getSimpleValueType(0); + if (IsMasked) + Operands.push_back(Node->getOperand(CurOp++)); // Mask. + Operands.push_back(Node->getOperand(CurOp++)); // VL. + Operands.push_back(SEW); + Operands.push_back(Node->getOperand(0)); // Chain. -void RISCVDAGToDAGISel::selectVLXSEGMask(SDNode *Node, unsigned IntNo) { - SDLoc DL(Node); - unsigned NF = Node->getNumValues() - 1; - MVT VT = Node->getSimpleValueType(0); - unsigned ScalarSize = VT.getScalarSizeInBits(); - MVT XLenVT = Subtarget->getXLenVT(); - RISCVVLMUL LMUL = getLMUL(VT); - SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); - SDValue MaskedOff = createTuple(*CurDAG, Regs, NF, LMUL); - SDValue Operands[] = { - MaskedOff, - Node->getOperand(NF + 2), // Base pointer. - Node->getOperand(NF + 3), // Index. - Node->getOperand(NF + 4), // Mask. - Node->getOperand(NF + 5), // VL. - SEW, - Node->getOperand(0) // Chain. - }; - - MVT IndexVT = Node->getOperand(NF + 3)->getSimpleValueType(0); RISCVVLMUL IndexLMUL = getLMUL(IndexVT); unsigned IndexScalarSize = IndexVT.getScalarSizeInBits(); const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( @@ -382,12 +297,14 @@ void RISCVDAGToDAGISel::selectVLXSEGMask(SDNode *Node, unsigned IntNo) { CurDAG->RemoveDeadNode(Node); } -void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, unsigned IntNo, +void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, unsigned IntNo, bool IsMasked, bool IsStrided) { SDLoc DL(Node); unsigned NF = Node->getNumOperands() - 4; if (IsStrided) NF--; + if (IsMasked) + NF--; MVT VT = Node->getOperand(2)->getSimpleValueType(0); unsigned ScalarSize = VT.getScalarSizeInBits(); MVT XLenVT = Subtarget->getXLenVT(); @@ -395,15 +312,15 @@ void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, unsigned IntNo, SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); SDValue StoreVal = createTuple(*CurDAG, Regs, NF, LMUL); - SmallVector Operands; + SmallVector Operands; Operands.push_back(StoreVal); - Operands.push_back(Node->getOperand(2 + NF)); // Base pointer. - if (IsStrided) { - Operands.push_back(Node->getOperand(3 + NF)); // Stride. - Operands.push_back(Node->getOperand(4 + NF)); // VL. - } else { - Operands.push_back(Node->getOperand(3 + NF)); // VL. - } + unsigned CurOp = 2 + NF; + Operands.push_back(Node->getOperand(CurOp++)); // Base pointer. + if (IsStrided) + Operands.push_back(Node->getOperand(CurOp++)); // Stride. + if (IsMasked) + Operands.push_back(Node->getOperand(CurOp++)); // Mask. + Operands.push_back(Node->getOperand(CurOp++)); // VL. Operands.push_back(SEW); Operands.push_back(Node->getOperand(0)); // Chain. const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( @@ -414,91 +331,31 @@ void RISCVDAGToDAGISel::selectVSSEG(SDNode *Node, unsigned IntNo, ReplaceNode(Node, Store); } -void RISCVDAGToDAGISel::selectVSSEGMask(SDNode *Node, unsigned IntNo, - bool IsStrided) { +void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, unsigned IntNo, + bool IsMasked) { SDLoc DL(Node); unsigned NF = Node->getNumOperands() - 5; - if (IsStrided) - NF--; + if (IsMasked) + --NF; MVT VT = Node->getOperand(2)->getSimpleValueType(0); unsigned ScalarSize = VT.getScalarSizeInBits(); MVT XLenVT = Subtarget->getXLenVT(); RISCVVLMUL LMUL = getLMUL(VT); SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); + SmallVector Operands; SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); SDValue StoreVal = createTuple(*CurDAG, Regs, NF, LMUL); - SmallVector Operands; Operands.push_back(StoreVal); - Operands.push_back(Node->getOperand(2 + NF)); // Base pointer. - if (IsStrided) { - Operands.push_back(Node->getOperand(3 + NF)); // Stride. - Operands.push_back(Node->getOperand(4 + NF)); // Mask. - Operands.push_back(Node->getOperand(5 + NF)); // VL. - } else { - Operands.push_back(Node->getOperand(3 + NF)); // Mask. - Operands.push_back(Node->getOperand(4 + NF)); // VL. - } + unsigned CurOp = 2 + NF; + Operands.push_back(Node->getOperand(CurOp++)); // Base pointer. + Operands.push_back(Node->getOperand(CurOp++)); // Index. + MVT IndexVT = Operands.back()->getSimpleValueType(0); + if (IsMasked) + Operands.push_back(Node->getOperand(CurOp++)); // Mask. + Operands.push_back(Node->getOperand(CurOp++)); // VL. Operands.push_back(SEW); Operands.push_back(Node->getOperand(0)); // Chain. - const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( - IntNo, ScalarSize, static_cast(LMUL), - static_cast(RISCVVLMUL::LMUL_1)); - SDNode *Store = - CurDAG->getMachineNode(P->Pseudo, DL, Node->getValueType(0), Operands); - ReplaceNode(Node, Store); -} -void RISCVDAGToDAGISel::selectVSXSEG(SDNode *Node, unsigned IntNo) { - SDLoc DL(Node); - unsigned NF = Node->getNumOperands() - 5; - MVT VT = Node->getOperand(2)->getSimpleValueType(0); - unsigned ScalarSize = VT.getScalarSizeInBits(); - MVT XLenVT = Subtarget->getXLenVT(); - RISCVVLMUL LMUL = getLMUL(VT); - SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); - SDValue StoreVal = createTuple(*CurDAG, Regs, NF, LMUL); - SDValue Operands[] = { - StoreVal, - Node->getOperand(2 + NF), // Base pointer. - Node->getOperand(3 + NF), // Index. - Node->getOperand(4 + NF), // VL. - SEW, - Node->getOperand(0) // Chain. - }; - - MVT IndexVT = Node->getOperand(3 + NF)->getSimpleValueType(0); - RISCVVLMUL IndexLMUL = getLMUL(IndexVT); - unsigned IndexScalarSize = IndexVT.getScalarSizeInBits(); - const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( - IntNo, IndexScalarSize, static_cast(LMUL), - static_cast(IndexLMUL)); - SDNode *Store = - CurDAG->getMachineNode(P->Pseudo, DL, Node->getValueType(0), Operands); - ReplaceNode(Node, Store); -} - -void RISCVDAGToDAGISel::selectVSXSEGMask(SDNode *Node, unsigned IntNo) { - SDLoc DL(Node); - unsigned NF = Node->getNumOperands() - 6; - MVT VT = Node->getOperand(2)->getSimpleValueType(0); - unsigned ScalarSize = VT.getScalarSizeInBits(); - MVT XLenVT = Subtarget->getXLenVT(); - RISCVVLMUL LMUL = getLMUL(VT); - SDValue SEW = CurDAG->getTargetConstant(ScalarSize, DL, XLenVT); - SmallVector Regs(Node->op_begin() + 2, Node->op_begin() + 2 + NF); - SDValue StoreVal = createTuple(*CurDAG, Regs, NF, LMUL); - SDValue Operands[] = { - StoreVal, - Node->getOperand(2 + NF), // Base pointer. - Node->getOperand(3 + NF), // Index. - Node->getOperand(4 + NF), // Mask. - Node->getOperand(5 + NF), // VL. - SEW, - Node->getOperand(0) // Chain. - }; - - MVT IndexVT = Node->getOperand(3 + NF)->getSimpleValueType(0); RISCVVLMUL IndexLMUL = getLMUL(IndexVT); unsigned IndexScalarSize = IndexVT.getScalarSizeInBits(); const RISCVZvlssegTable::RISCVZvlsseg *P = RISCVZvlssegTable::getPseudo( @@ -660,7 +517,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlseg6: case Intrinsic::riscv_vlseg7: case Intrinsic::riscv_vlseg8: { - selectVLSEG(Node, IntNo, /*IsStrided=*/false); + selectVLSEG(Node, IntNo, /*IsMasked*/ false, /*IsStrided*/ false); return; } case Intrinsic::riscv_vlseg2_mask: @@ -670,7 +527,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlseg6_mask: case Intrinsic::riscv_vlseg7_mask: case Intrinsic::riscv_vlseg8_mask: { - selectVLSEGMask(Node, IntNo, /*IsStrided=*/false); + selectVLSEG(Node, IntNo, /*IsMasked*/ true, /*IsStrided*/ false); return; } case Intrinsic::riscv_vlsseg2: @@ -680,7 +537,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlsseg6: case Intrinsic::riscv_vlsseg7: case Intrinsic::riscv_vlsseg8: { - selectVLSEG(Node, IntNo, /*IsStrided=*/true); + selectVLSEG(Node, IntNo, /*IsMasked*/ false, /*IsStrided*/ true); return; } case Intrinsic::riscv_vlsseg2_mask: @@ -690,7 +547,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlsseg6_mask: case Intrinsic::riscv_vlsseg7_mask: case Intrinsic::riscv_vlsseg8_mask: { - selectVLSEGMask(Node, IntNo, /*IsStrided=*/true); + selectVLSEG(Node, IntNo, /*IsMasked*/ true, /*IsStrided*/ true); return; } case Intrinsic::riscv_vloxseg2: @@ -707,7 +564,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vluxseg6: case Intrinsic::riscv_vluxseg7: case Intrinsic::riscv_vluxseg8: { - selectVLXSEG(Node, IntNo); + selectVLXSEG(Node, IntNo, /*IsMasked*/ false); return; } case Intrinsic::riscv_vloxseg2_mask: @@ -724,7 +581,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vluxseg6_mask: case Intrinsic::riscv_vluxseg7_mask: case Intrinsic::riscv_vluxseg8_mask: { - selectVLXSEGMask(Node, IntNo); + selectVLXSEG(Node, IntNo, /*IsMasked*/ true); return; } case Intrinsic::riscv_vlseg8ff: @@ -734,7 +591,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlseg4ff: case Intrinsic::riscv_vlseg3ff: case Intrinsic::riscv_vlseg2ff: { - selectVLSEGFF(Node); + selectVLSEGFF(Node, /*IsMasked*/ false); return; } case Intrinsic::riscv_vlseg8ff_mask: @@ -744,7 +601,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vlseg4ff_mask: case Intrinsic::riscv_vlseg3ff_mask: case Intrinsic::riscv_vlseg2ff_mask: { - selectVLSEGFFMask(Node); + selectVLSEGFF(Node, /*IsMasked*/ true); return; } } @@ -760,7 +617,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vsseg6: case Intrinsic::riscv_vsseg7: case Intrinsic::riscv_vsseg8: { - selectVSSEG(Node, IntNo, /*IsStrided=*/false); + selectVSSEG(Node, IntNo, /*IsMasked*/ false, /*IsStrided*/ false); return; } case Intrinsic::riscv_vsseg2_mask: @@ -770,7 +627,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vsseg6_mask: case Intrinsic::riscv_vsseg7_mask: case Intrinsic::riscv_vsseg8_mask: { - selectVSSEGMask(Node, IntNo, /*IsStrided=*/false); + selectVSSEG(Node, IntNo, /*IsMasked*/ true, /*IsStrided*/ false); return; } case Intrinsic::riscv_vssseg2: @@ -780,7 +637,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vssseg6: case Intrinsic::riscv_vssseg7: case Intrinsic::riscv_vssseg8: { - selectVSSEG(Node, IntNo, /*IsStrided=*/true); + selectVSSEG(Node, IntNo, /*IsMasked*/ false, /*IsStrided*/ true); return; } case Intrinsic::riscv_vssseg2_mask: @@ -790,7 +647,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vssseg6_mask: case Intrinsic::riscv_vssseg7_mask: case Intrinsic::riscv_vssseg8_mask: { - selectVSSEGMask(Node, IntNo, /*IsStrided=*/true); + selectVSSEG(Node, IntNo, /*IsMasked*/ true, /*IsStrided*/ true); return; } case Intrinsic::riscv_vsoxseg2: @@ -807,7 +664,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vsuxseg6: case Intrinsic::riscv_vsuxseg7: case Intrinsic::riscv_vsuxseg8: { - selectVSXSEG(Node, IntNo); + selectVSXSEG(Node, IntNo, /*IsMasked*/ false); return; } case Intrinsic::riscv_vsoxseg2_mask: @@ -824,7 +681,7 @@ void RISCVDAGToDAGISel::Select(SDNode *Node) { case Intrinsic::riscv_vsuxseg6_mask: case Intrinsic::riscv_vsuxseg7_mask: case Intrinsic::riscv_vsuxseg8_mask: { - selectVSXSEGMask(Node, IntNo); + selectVSXSEG(Node, IntNo, /*IsMasked*/ true); return; } } diff --git a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h index a790d6051c3134..f6059dd9dd1304 100644 --- a/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h +++ b/llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h @@ -73,16 +73,11 @@ class RISCVDAGToDAGISel : public SelectionDAGISel { return selectRVVUimm5(N, Width, Imm); } - void selectVLSEG(SDNode *Node, unsigned IntNo, bool IsStrided); - void selectVLSEGMask(SDNode *Node, unsigned IntNo, bool IsStrided); - void selectVLSEGFF(SDNode *Node); - void selectVLSEGFFMask(SDNode *Node); - void selectVLXSEG(SDNode *Node, unsigned IntNo); - void selectVLXSEGMask(SDNode *Node, unsigned IntNo); - void selectVSSEG(SDNode *Node, unsigned IntNo, bool IsStrided); - void selectVSSEGMask(SDNode *Node, unsigned IntNo, bool IsStrided); - void selectVSXSEG(SDNode *Node, unsigned IntNo); - void selectVSXSEGMask(SDNode *Node, unsigned IntNo); + void selectVLSEG(SDNode *Node, unsigned IntNo, bool IsMasked, bool IsStrided); + void selectVLSEGFF(SDNode *Node, bool IsMasked); + void selectVLXSEG(SDNode *Node, unsigned IntNo, bool IsMasked); + void selectVSSEG(SDNode *Node, unsigned IntNo, bool IsMasked, bool IsStrided); + void selectVSXSEG(SDNode *Node, unsigned IntNo, bool IsMasked); // Include the pieces autogenerated from the target description. #include "RISCVGenDAGISel.inc"