diff --git a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll index 784b3e4fe6875c..38f6523bec397f 100644 --- a/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll +++ b/llvm/test/Transforms/InstCombine/2006-12-15-Range-Test.ll @@ -1,31 +1,44 @@ -; RUN: opt < %s -instcombine -S | \ -; RUN: grep icmp | count 1 -; RUN: opt < %s -instcombine -S | \ -; RUN: grep "icmp ugt" | count 1 -; END. +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s target datalayout = "e-p:32:32" target triple = "i686-pc-linux-gnu" @r = external global [17 x i32] ; <[17 x i32]*> [#uses=1] define i1 @print_pgm_cond_true(i32 %tmp12.reload, i32* %tmp16.out) { +; CHECK-LABEL: @print_pgm_cond_true( +; CHECK-NEXT: newFuncRoot: +; CHECK-NEXT: br label [[COND_TRUE:%.*]] +; CHECK: bb27.exitStub: +; CHECK-NEXT: store i32 [[TMP16:%.*]], i32* [[TMP16_OUT:%.*]], align 4 +; CHECK-NEXT: ret i1 true +; CHECK: cond_next23.exitStub: +; CHECK-NEXT: store i32 [[TMP16]], i32* [[TMP16_OUT]], align 4 +; CHECK-NEXT: ret i1 false +; CHECK: cond_true: +; CHECK-NEXT: [[TMP15:%.*]] = getelementptr [17 x i32], [17 x i32]* @r, i32 0, i32 [[TMP12_RELOAD:%.*]] +; CHECK-NEXT: [[TMP16]] = load i32, i32* [[TMP15]], align 4 +; CHECK-NEXT: [[TMP16_OFF:%.*]] = add i32 [[TMP16]], 31 +; CHECK-NEXT: [[TMP0:%.*]] = icmp ugt i32 [[TMP16_OFF]], 62 +; CHECK-NEXT: br i1 [[TMP0]], label [[BB27_EXITSTUB:%.*]], label [[COND_NEXT23_EXITSTUB:%.*]] +; newFuncRoot: - br label %cond_true + br label %cond_true bb27.exitStub: ; preds = %cond_true - store i32 %tmp16, i32* %tmp16.out - ret i1 true + store i32 %tmp16, i32* %tmp16.out + ret i1 true cond_next23.exitStub: ; preds = %cond_true - store i32 %tmp16, i32* %tmp16.out - ret i1 false + store i32 %tmp16, i32* %tmp16.out + ret i1 false cond_true: ; preds = %newFuncRoot - %tmp15 = getelementptr [17 x i32], [17 x i32]* @r, i32 0, i32 %tmp12.reload ; [#uses=1] - %tmp16 = load i32, i32* %tmp15 ; [#uses=4] - %tmp18 = icmp slt i32 %tmp16, -31 ; [#uses=1] - %tmp21 = icmp sgt i32 %tmp16, 31 ; [#uses=1] - %bothcond = or i1 %tmp18, %tmp21 ; [#uses=1] - br i1 %bothcond, label %bb27.exitStub, label %cond_next23.exitStub + %tmp15 = getelementptr [17 x i32], [17 x i32]* @r, i32 0, i32 %tmp12.reload ; [#uses=1] + %tmp16 = load i32, i32* %tmp15 ; [#uses=4] + %tmp18 = icmp slt i32 %tmp16, -31 ; [#uses=1] + %tmp21 = icmp sgt i32 %tmp16, 31 ; [#uses=1] + %bothcond = or i1 %tmp18, %tmp21 ; [#uses=1] + br i1 %bothcond, label %bb27.exitStub, label %cond_next23.exitStub } diff --git a/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll b/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll index 826d68aefc1a68..6db886b25ede40 100644 --- a/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll +++ b/llvm/test/Transforms/InstCombine/2007-03-13-CompareMerge.ll @@ -1,9 +1,15 @@ -; RUN: opt < %s -instcombine -S | grep "icmp sle" +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + ; PR1244 define i1 @test(i32 %c.3.i, i32 %d.292.2.i) { - %tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i - %tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i - %sel_tmp80 = or i1 %tmp266.i, %tmp276.i - ret i1 %sel_tmp80 +; CHECK-LABEL: @test( +; CHECK-NEXT: [[TMP1:%.*]] = icmp sle i32 [[C_3_I:%.*]], [[D_292_2_I:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; + %tmp266.i = icmp slt i32 %c.3.i, %d.292.2.i + %tmp276.i = icmp eq i32 %c.3.i, %d.292.2.i + %sel_tmp80 = or i1 %tmp266.i, %tmp276.i + ret i1 %sel_tmp80 } diff --git a/llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll b/llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll index 4af5dfeef5ddb9..fb9b9a6cb5af73 100644 --- a/llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll +++ b/llvm/test/Transforms/InstCombine/2007-05-10-icmp-or.ll @@ -1,8 +1,14 @@ -; RUN: opt < %s -instcombine -disable-output +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + define i1 @test(i32 %tmp9) { - %tmp20 = icmp ugt i32 %tmp9, 255 ; [#uses=1] - %tmp11.not = icmp sgt i32 %tmp9, 255 ; [#uses=1] - %bothcond = or i1 %tmp20, %tmp11.not ; [#uses=1] - ret i1 %bothcond +; CHECK-LABEL: @test( +; CHECK-NEXT: [[TMP20:%.*]] = icmp ugt i32 [[TMP9:%.*]], 255 +; CHECK-NEXT: ret i1 [[TMP20]] +; + %tmp20 = icmp ugt i32 %tmp9, 255 ; [#uses=1] + %tmp11.not = icmp sgt i32 %tmp9, 255 ; [#uses=1] + %bothcond = or i1 %tmp20, %tmp11.not ; [#uses=1] + ret i1 %bothcond } diff --git a/llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll b/llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll index 6b83dd982dc891..f872b6a98e096b 100644 --- a/llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll +++ b/llvm/test/Transforms/InstCombine/2007-11-15-CompareMiscomp.ll @@ -1,10 +1,16 @@ -; RUN: opt < %s -instcombine -S | grep "icmp eq i32 %In, 1" +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + ; PR1800 define i1 @test(i32 %In) { - %c1 = icmp sgt i32 %In, -1 - %c2 = icmp eq i32 %In, 1 - %V = and i1 %c1, %c2 - ret i1 %V +; CHECK-LABEL: @test( +; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[IN:%.*]], 1 +; CHECK-NEXT: ret i1 [[C2]] +; + %c1 = icmp sgt i32 %In, -1 + %c2 = icmp eq i32 %In, 1 + %V = and i1 %c1, %c2 + ret i1 %V } diff --git a/llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll b/llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll index fbc8ba972a032c..eb3329b4dd02bf 100644 --- a/llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll +++ b/llvm/test/Transforms/InstCombine/2008-01-13-AndCmpCmp.ll @@ -1,9 +1,17 @@ -; RUN: opt < %s -instcombine -S | grep and +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + ; PR1907 define i1 @test(i32 %c84.17) { - %tmp2696 = icmp ne i32 %c84.17, 34 ; [#uses=2] - %tmp2699 = icmp sgt i32 %c84.17, -1 ; [#uses=1] - %tmp2703 = and i1 %tmp2696, %tmp2699 ; [#uses=1] - ret i1 %tmp2703 +; CHECK-LABEL: @test( +; CHECK-NEXT: [[TMP2696:%.*]] = icmp ne i32 [[C84_17:%.*]], 34 +; CHECK-NEXT: [[TMP2699:%.*]] = icmp sgt i32 [[C84_17]], -1 +; CHECK-NEXT: [[TMP2703:%.*]] = and i1 [[TMP2696]], [[TMP2699]] +; CHECK-NEXT: ret i1 [[TMP2703]] +; + %tmp2696 = icmp ne i32 %c84.17, 34 ; [#uses=2] + %tmp2699 = icmp sgt i32 %c84.17, -1 ; [#uses=1] + %tmp2703 = and i1 %tmp2696, %tmp2699 ; [#uses=1] + ret i1 %tmp2703 } diff --git a/llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll b/llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll index 7f8bd4fb8a90ff..7b08a7b3a02577 100644 --- a/llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll +++ b/llvm/test/Transforms/InstCombine/2008-02-28-OrFCmpCrash.ll @@ -1,16 +1,29 @@ -; RUN: opt < %s -instcombine | llvm-dis +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + ; rdar://5771353 define float @test(float %x, x86_fp80 %y) nounwind readonly { +; CHECK-LABEL: @test( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[TMP67:%.*]] = fcmp uno x86_fp80 [[Y:%.*]], 0xK00000000000000000000 +; CHECK-NEXT: [[TMP71:%.*]] = fcmp uno float [[X:%.*]], 0.000000e+00 +; CHECK-NEXT: [[BOTHCOND:%.*]] = or i1 [[TMP67]], [[TMP71]] +; CHECK-NEXT: br i1 [[BOTHCOND]], label [[BB74:%.*]], label [[BB80:%.*]] +; CHECK: bb74: +; CHECK-NEXT: ret float 0.000000e+00 +; CHECK: bb80: +; CHECK-NEXT: ret float 0.000000e+00 +; entry: - %tmp67 = fcmp uno x86_fp80 %y, 0xK00000000000000000000 ; [#uses=1] - %tmp71 = fcmp uno float %x, 0.000000e+00 ; [#uses=1] - %bothcond = or i1 %tmp67, %tmp71 ; [#uses=1] - br i1 %bothcond, label %bb74, label %bb80 + %tmp67 = fcmp uno x86_fp80 %y, 0xK00000000000000000000 ; [#uses=1] + %tmp71 = fcmp uno float %x, 0.000000e+00 ; [#uses=1] + %bothcond = or i1 %tmp67, %tmp71 ; [#uses=1] + br i1 %bothcond, label %bb74, label %bb80 bb74: ; preds = %entry - ret float 0.000000e+00 + ret float 0.000000e+00 bb80: ; preds = %entry - ret float 0.000000e+00 + ret float 0.000000e+00 } diff --git a/llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll b/llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll index 80bd83bc6ba0d9..11226bcf41855b 100644 --- a/llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll +++ b/llvm/test/Transforms/InstCombine/2008-06-21-CompareMiscomp.ll @@ -1,11 +1,17 @@ -; RUN: opt < %s -instcombine -S | grep "icmp eq i32 %In, 15" +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s + ; PR2479 ; (See also PR1800.) define i1 @test(i32 %In) { - %c1 = icmp ugt i32 %In, 13 - %c2 = icmp eq i32 %In, 15 - %V = and i1 %c1, %c2 - ret i1 %V +; CHECK-LABEL: @test( +; CHECK-NEXT: [[C2:%.*]] = icmp eq i32 [[IN:%.*]], 15 +; CHECK-NEXT: ret i1 [[C2]] +; + %c1 = icmp ugt i32 %In, 13 + %c2 = icmp eq i32 %In, 15 + %V = and i1 %c1, %c2 + ret i1 %V } diff --git a/llvm/test/Transforms/InstCombine/2008-08-05-And.ll b/llvm/test/Transforms/InstCombine/2008-08-05-And.ll index 91f1c0b0a986b2..9efc35fb2d20ba 100644 --- a/llvm/test/Transforms/InstCombine/2008-08-05-And.ll +++ b/llvm/test/Transforms/InstCombine/2008-08-05-And.ll @@ -1,23 +1,40 @@ -; RUN: opt < %s -instcombine -S | not grep or +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt < %s -instcombine -S | FileCheck %s ; PR2629 define void @f(i8* %x) nounwind { +; CHECK-LABEL: @f( +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[BB:%.*]] +; CHECK: bb: +; CHECK-NEXT: [[L1:%.*]] = load i8, i8* [[X:%.*]], align 1 +; CHECK-NEXT: [[S1:%.*]] = add i8 [[L1]], -6 +; CHECK-NEXT: [[C1:%.*]] = icmp ugt i8 [[S1]], 2 +; CHECK-NEXT: [[S2:%.*]] = add i8 [[L1]], -10 +; CHECK-NEXT: [[C2:%.*]] = icmp ugt i8 [[S2]], 2 +; CHECK-NEXT: [[A1:%.*]] = and i1 [[C1]], [[C2]] +; CHECK-NEXT: br i1 [[A1]], label [[INCOMPATIBLE:%.*]], label [[OKAY:%.*]] +; CHECK: okay: +; CHECK-NEXT: ret void +; CHECK: incompatible: +; CHECK-NEXT: ret void +; entry: - br label %bb + br label %bb bb: - %g1 = getelementptr i8, i8* %x, i32 0 - %l1 = load i8, i8* %g1, align 1 - %s1 = sub i8 %l1, 6 - %c1 = icmp ugt i8 %s1, 2 - %s2 = sub i8 %l1, 10 - %c2 = icmp ugt i8 %s2, 2 - %a1 = and i1 %c1, %c2 - br i1 %a1, label %incompatible, label %okay + %g1 = getelementptr i8, i8* %x, i32 0 + %l1 = load i8, i8* %g1, align 1 + %s1 = sub i8 %l1, 6 + %c1 = icmp ugt i8 %s1, 2 + %s2 = sub i8 %l1, 10 + %c2 = icmp ugt i8 %s2, 2 + %a1 = and i1 %c1, %c2 + br i1 %a1, label %incompatible, label %okay okay: - ret void + ret void incompatible: - ret void + ret void } diff --git a/llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll b/llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll index 82cf85fa4cd842..97956bc2e24975 100644 --- a/llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll +++ b/llvm/test/Transforms/InstCombine/2012-02-28-ICmp.ll @@ -1,15 +1,18 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s + ; ; There should be no transformation. -; CHECK: %a = trunc i32 %x to i8 -; CHECK: %b = icmp ne i8 %a, 0 -; CHECK: %c = and i32 %x, 16711680 -; CHECK: %d = icmp ne i32 %c, 0 -; CHECK: %e = and i1 %b, %d -; CHECK: ret i1 %e - define i1 @f1(i32 %x) { +; CHECK-LABEL: @f1( +; CHECK-NEXT: [[A:%.*]] = trunc i32 [[X:%.*]] to i8 +; CHECK-NEXT: [[B:%.*]] = icmp ne i8 [[A]], 0 +; CHECK-NEXT: [[C:%.*]] = and i32 [[X]], 16711680 +; CHECK-NEXT: [[D:%.*]] = icmp ne i32 [[C]], 0 +; CHECK-NEXT: [[E:%.*]] = and i1 [[B]], [[D]] +; CHECK-NEXT: ret i1 [[E]] +; %a = trunc i32 %x to i8 %b = icmp ne i8 %a, 0 %c = and i32 %x, 16711680 diff --git a/llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll b/llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll index d1860bccd75ee8..8ef65a27c1f55e 100644 --- a/llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll +++ b/llvm/test/Transforms/InstCombine/2012-03-10-InstCombine.ll @@ -1,13 +1,30 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -S -instcombine | FileCheck %s ; Derived from gcc.c-torture/execute/frame-address.c -; CHECK-LABEL: @func( -; CHECK: return: -; CHECK-NOT: ret i32 0 -; CHECK: ret i32 %retval - define i32 @func(i8* %c, i8* %f) nounwind uwtable readnone noinline ssp { +; CHECK-LABEL: @func( +; CHECK-NEXT: entry: +; CHECK-NEXT: [[D:%.*]] = alloca i8, align 1 +; CHECK-NEXT: store i8 0, i8* [[D]], align 1 +; CHECK-NEXT: [[CMP:%.*]] = icmp ugt i8* [[D]], [[C:%.*]] +; CHECK-NEXT: br i1 [[CMP]], label [[IF_ELSE:%.*]], label [[IF_THEN:%.*]] +; CHECK: if.then: +; CHECK-NEXT: [[CMP2:%.*]] = icmp ule i8* [[D]], [[F:%.*]] +; CHECK-NEXT: [[NOT_CMP1:%.*]] = icmp uge i8* [[C]], [[F]] +; CHECK-NEXT: [[DOTCMP2:%.*]] = and i1 [[CMP2]], [[NOT_CMP1]] +; CHECK-NEXT: br label [[RETURN:%.*]] +; CHECK: if.else: +; CHECK-NEXT: [[CMP5:%.*]] = icmp uge i8* [[D]], [[F]] +; CHECK-NEXT: [[NOT_CMP3:%.*]] = icmp ule i8* [[C]], [[F]] +; CHECK-NEXT: [[DOTCMP5:%.*]] = and i1 [[CMP5]], [[NOT_CMP3]] +; CHECK-NEXT: br label [[RETURN]] +; CHECK: return: +; CHECK-NEXT: [[RETVAL_0_IN:%.*]] = phi i1 [ [[DOTCMP2]], [[IF_THEN]] ], [ [[DOTCMP5]], [[IF_ELSE]] ] +; CHECK-NEXT: [[RETVAL_0:%.*]] = zext i1 [[RETVAL_0_IN]] to i32 +; CHECK-NEXT: ret i32 [[RETVAL_0]] +; entry: %d = alloca i8, align 1 store i8 0, i8* %d, align 1 diff --git a/llvm/test/Transforms/InstCombine/range-check.ll b/llvm/test/Transforms/InstCombine/range-check.ll index 35f11dd39ef39e..ba77beae0f6864 100644 --- a/llvm/test/Transforms/InstCombine/range-check.ll +++ b/llvm/test/Transforms/InstCombine/range-check.ll @@ -1,12 +1,15 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py ; RUN: opt < %s -instcombine -S | FileCheck %s ; Check simplification of ; (icmp sgt x, -1) & (icmp sgt/sge n, x) --> icmp ugt/uge n, x -; CHECK-LABEL: define i1 @test_and1 -; CHECK: [[R:%[0-9]+]] = icmp ugt i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_and1(i32 %x, i32 %n) { +; CHECK-LABEL: @test_and1( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sge i32 %x, 0 %b = icmp slt i32 %x, %nn @@ -14,10 +17,12 @@ define i1 @test_and1(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_and2 -; CHECK: [[R:%[0-9]+]] = icmp uge i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_and2(i32 %x, i32 %n) { +; CHECK-LABEL: @test_and2( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sgt i32 %x, -1 %b = icmp sle i32 %x, %nn @@ -25,10 +30,12 @@ define i1 @test_and2(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_and3 -; CHECK: [[R:%[0-9]+]] = icmp ugt i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_and3(i32 %x, i32 %n) { +; CHECK-LABEL: @test_and3( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sgt i32 %nn, %x %b = icmp sge i32 %x, 0 @@ -36,10 +43,12 @@ define i1 @test_and3(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_and4 -; CHECK: [[R:%[0-9]+]] = icmp uge i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_and4(i32 %x, i32 %n) { +; CHECK-LABEL: @test_and4( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp uge i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sge i32 %nn, %x %b = icmp sge i32 %x, 0 @@ -47,10 +56,12 @@ define i1 @test_and4(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_or1 -; CHECK: [[R:%[0-9]+]] = icmp ule i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_or1(i32 %x, i32 %n) { +; CHECK-LABEL: @test_or1( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp slt i32 %x, 0 %b = icmp sge i32 %x, %nn @@ -58,10 +69,12 @@ define i1 @test_or1(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_or2 -; CHECK: [[R:%[0-9]+]] = icmp ult i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_or2(i32 %x, i32 %n) { +; CHECK-LABEL: @test_or2( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sle i32 %x, -1 %b = icmp sgt i32 %x, %nn @@ -69,10 +82,12 @@ define i1 @test_or2(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_or3 -; CHECK: [[R:%[0-9]+]] = icmp ule i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_or3(i32 %x, i32 %n) { +; CHECK-LABEL: @test_or3( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ule i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp sle i32 %nn, %x %b = icmp slt i32 %x, 0 @@ -80,10 +95,12 @@ define i1 @test_or3(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @test_or4 -; CHECK: [[R:%[0-9]+]] = icmp ult i32 %nn, %x -; CHECK: ret i1 [[R]] define i1 @test_or4(i32 %x, i32 %n) { +; CHECK-LABEL: @test_or4( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: ret i1 [[TMP1]] +; %nn = and i32 %n, 2147483647 %a = icmp slt i32 %nn, %x %b = icmp slt i32 %x, 0 @@ -93,12 +110,14 @@ define i1 @test_or4(i32 %x, i32 %n) { ; Negative tests -; CHECK-LABEL: define i1 @negative1 -; CHECK: %a = icmp -; CHECK: %b = icmp -; CHECK: %c = and i1 %a, %b -; CHECK: ret i1 %c define i1 @negative1(i32 %x, i32 %n) { +; CHECK-LABEL: @negative1( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], 0 +; CHECK-NEXT: [[C:%.*]] = and i1 [[A]], [[B]] +; CHECK-NEXT: ret i1 [[C]] +; %nn = and i32 %n, 2147483647 %a = icmp slt i32 %x, %nn %b = icmp sgt i32 %x, 0 ; should be: icmp sge @@ -106,24 +125,27 @@ define i1 @negative1(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @negative2 -; CHECK: %a = icmp -; CHECK: %b = icmp -; CHECK: %c = and i1 %a, %b -; CHECK: ret i1 %c define i1 @negative2(i32 %x, i32 %n) { +; CHECK-LABEL: @negative2( +; CHECK-NEXT: [[A:%.*]] = icmp slt i32 [[X:%.*]], [[N:%.*]] +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], -1 +; CHECK-NEXT: [[C:%.*]] = and i1 [[A]], [[B]] +; CHECK-NEXT: ret i1 [[C]] +; %a = icmp slt i32 %x, %n ; n can be negative %b = icmp sge i32 %x, 0 %c = and i1 %a, %b ret i1 %c } -; CHECK-LABEL: define i1 @negative3 -; CHECK: %a = icmp -; CHECK: %b = icmp -; CHECK: %c = and i1 %a, %b -; CHECK: ret i1 %c define i1 @negative3(i32 %x, i32 %y, i32 %n) { +; CHECK-LABEL: @negative3( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[Y:%.*]], -1 +; CHECK-NEXT: [[C:%.*]] = and i1 [[A]], [[B]] +; CHECK-NEXT: ret i1 [[C]] +; %nn = and i32 %n, 2147483647 %a = icmp slt i32 %x, %nn %b = icmp sge i32 %y, 0 ; should compare %x and not %y @@ -131,12 +153,14 @@ define i1 @negative3(i32 %x, i32 %y, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @negative4 -; CHECK: %a = icmp -; CHECK: %b = icmp -; CHECK: %c = and i1 %a, %b -; CHECK: ret i1 %c define i1 @negative4(i32 %x, i32 %n) { +; CHECK-LABEL: @negative4( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[A:%.*]] = icmp ne i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], -1 +; CHECK-NEXT: [[C:%.*]] = and i1 [[A]], [[B]] +; CHECK-NEXT: ret i1 [[C]] +; %nn = and i32 %n, 2147483647 %a = icmp ne i32 %x, %nn ; should be: icmp slt/sle %b = icmp sge i32 %x, 0 @@ -144,12 +168,14 @@ define i1 @negative4(i32 %x, i32 %n) { ret i1 %c } -; CHECK-LABEL: define i1 @negative5 -; CHECK: %a = icmp -; CHECK: %b = icmp -; CHECK: %c = or i1 %a, %b -; CHECK: ret i1 %c define i1 @negative5(i32 %x, i32 %n) { +; CHECK-LABEL: @negative5( +; CHECK-NEXT: [[NN:%.*]] = and i32 [[N:%.*]], 2147483647 +; CHECK-NEXT: [[A:%.*]] = icmp sgt i32 [[NN]], [[X:%.*]] +; CHECK-NEXT: [[B:%.*]] = icmp sgt i32 [[X]], -1 +; CHECK-NEXT: [[C:%.*]] = or i1 [[A]], [[B]] +; CHECK-NEXT: ret i1 [[C]] +; %nn = and i32 %n, 2147483647 %a = icmp slt i32 %x, %nn %b = icmp sge i32 %x, 0