diff --git a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp index fb046d519ac894..52ee13757f276f 100644 --- a/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp +++ b/llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp @@ -2393,30 +2393,14 @@ LegalizerHelper::widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy) { return Legalized; } case TargetOpcode::G_FCONSTANT: { + // To avoid changing the bits of the constant due to extension to a larger + // type and then using G_FPTRUNC, we simply convert to a G_CONSTANT. MachineOperand &SrcMO = MI.getOperand(1); - LLVMContext &Ctx = MIRBuilder.getMF().getFunction().getContext(); - APFloat Val = SrcMO.getFPImm()->getValueAPF(); - bool LosesInfo; - switch (WideTy.getSizeInBits()) { - case 32: - Val.convert(APFloat::IEEEsingle(), APFloat::rmNearestTiesToEven, - &LosesInfo); - break; - case 64: - Val.convert(APFloat::IEEEdouble(), APFloat::rmNearestTiesToEven, - &LosesInfo); - break; - default: - return UnableToLegalize; - } - - assert(!LosesInfo && "extend should always be lossless"); - - Observer.changingInstr(MI); - SrcMO.setFPImm(ConstantFP::get(Ctx, Val)); - - widenScalarDst(MI, WideTy, 0, TargetOpcode::G_FPTRUNC); - Observer.changedInstr(MI); + APInt Val = SrcMO.getFPImm()->getValueAPF().bitcastToAPInt(); + MIRBuilder.setInstrAndDebugLoc(MI); + auto IntCst = MIRBuilder.buildConstant(MI.getOperand(0).getReg(), Val); + widenScalarDst(*IntCst, WideTy, 0, TargetOpcode::G_TRUNC); + MI.eraseFromParent(); return Legalized; } case TargetOpcode::G_IMPLICIT_DEF: { diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir index 07eec1101e0a38..96be30b31b6275 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-constant.mir @@ -48,10 +48,8 @@ body: | ; CHECK-NEXT: $w0 = COPY [[C]](s32) ; CHECK-NEXT: [[C1:%[0-9]+]]:_(s64) = G_FCONSTANT double 2.000000e+00 ; CHECK-NEXT: $x0 = COPY [[C1]](s64) - ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00 - ; CHECK-NEXT: [[FPTRUNC:%[0-9]+]]:_(s16) = G_FPTRUNC [[C2]](s32) - ; CHECK-NEXT: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[FPTRUNC]](s16) - ; CHECK-NEXT: $w0 = COPY [[ANYEXT]](s32) + ; CHECK-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 0 + ; CHECK-NEXT: $w0 = COPY [[C2]](s32) %0:_(s32) = G_FCONSTANT float 1.0 $w0 = COPY %0 %1:_(s64) = G_FCONSTANT double 2.0 diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir index 4d4a3693fe316f..44d6b95eb5491e 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/legalize-fp16-fconstant.mir @@ -8,8 +8,7 @@ tracksRegLiveness: true body: | bb.0: ; NO-FP16-LABEL: name: fp16 - ; NO-FP16: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0.000000e+00 - ; NO-FP16-NEXT: %cst:_(s16) = G_FPTRUNC [[C]](s32) + ; NO-FP16: %cst:_(s16) = G_CONSTANT i16 0 ; NO-FP16-NEXT: $h0 = COPY %cst(s16) ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 ; FP16-LABEL: name: fp16 @@ -19,4 +18,42 @@ body: | %cst:_(s16) = G_FCONSTANT half 0.0 $h0 = COPY %cst RET_ReallyLR implicit $h0 +... +--- +name: fp16_non_zero +tracksRegLiveness: true +body: | + bb.0: + ; NO-FP16-LABEL: name: fp16_non_zero + ; NO-FP16: %cst:_(s16) = G_CONSTANT i16 16384 + ; NO-FP16-NEXT: $h0 = COPY %cst(s16) + ; NO-FP16-NEXT: RET_ReallyLR implicit $h0 + ; FP16-LABEL: name: fp16_non_zero + ; FP16: %cst:_(s16) = G_FCONSTANT half 0xH4000 + ; FP16-NEXT: $h0 = COPY %cst(s16) + ; FP16-NEXT: RET_ReallyLR implicit $h0 + %cst:_(s16) = G_FCONSTANT half 2.0 + $h0 = COPY %cst + RET_ReallyLR implicit $h0 +... +--- +name: nan +tracksRegLiveness: true +body: | + bb.1.entry: + ; NO-FP16-LABEL: name: nan + ; NO-FP16: %cst:_(s16) = G_CONSTANT i16 31745 + ; NO-FP16-NEXT: %ext:_(s32) = G_FPEXT %cst(s16) + ; NO-FP16-NEXT: $w0 = COPY %ext(s32) + ; NO-FP16-NEXT: RET_ReallyLR implicit $w0 + ; FP16-LABEL: name: nan + ; FP16: %cst:_(s16) = G_FCONSTANT half 0xH7C01 + ; FP16-NEXT: %ext:_(s32) = G_FPEXT %cst(s16) + ; FP16-NEXT: $w0 = COPY %ext(s32) + ; FP16-NEXT: RET_ReallyLR implicit $w0 + %cst:_(s16) = G_FCONSTANT half 0xH7C01 + %ext:_(s32) = G_FPEXT %cst(s16) + $w0 = COPY %ext(s32) + RET_ReallyLR implicit $w0 +...