diff --git a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
index 94d28dc0a2c74..5090b0a07da4b 100644
--- a/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
+++ b/llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp
@@ -368,8 +368,7 @@ MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI,
       }
       // Validate OP_SEL has to be set to all 0 and OP_SEL_HI has to be set to
       // all 1.
-      if (auto *OpSelOpr =
-              TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel)) {
+      if (TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel)) {
         int64_t OpSel = 0;
         OpSel |= (Mod0 ? (!!(Mod0->getImm() & SISrcMods::OP_SEL_0) << 0) : 0);
         OpSel |= (Mod1 ? (!!(Mod1->getImm() & SISrcMods::OP_SEL_0) << 1) : 0);
@@ -385,8 +384,7 @@ MachineInstr *GCNDPPCombine::createDPPInst(MachineInstr &OrigMI,
         if (AMDGPU::hasNamedOperand(DPPOp, AMDGPU::OpName::op_sel))
           DPPInst.addImm(OpSel);
       }
-      if (auto *OpSelHiOpr =
-              TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel_hi)) {
+      if (TII->getNamedOperand(OrigMI, AMDGPU::OpName::op_sel_hi)) {
         int64_t OpSelHi = 0;
         OpSelHi |= (Mod0 ? (!!(Mod0->getImm() & SISrcMods::OP_SEL_1) << 0) : 0);
         OpSelHi |= (Mod1 ? (!!(Mod1->getImm() & SISrcMods::OP_SEL_1) << 1) : 0);