diff --git a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
index a21cc412fb161..255176efb4cd1 100644
--- a/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
+++ b/llvm/test/CodeGen/RISCV/riscv-func-target-feature.ll
@@ -34,3 +34,11 @@ define void @test4() {
 entry:
   ret void
 }
+
+; CHECK: .option push
+define void @test5() "target-features"="+unaligned-scalar-mem" {
+; CHECK-LABEL: test5
+; CHECK: .option pop
+entry:
+  ret void
+}