diff --git a/llvm/test/CodeGen/X86/fold-select.ll b/llvm/test/CodeGen/X86/fold-select.ll new file mode 100644 index 00000000000000..ed622d85588021 --- /dev/null +++ b/llvm/test/CodeGen/X86/fold-select.ll @@ -0,0 +1,46 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=skx | FileCheck %s + +define <8 x float> @select_and_v8i1(<8 x i1> %a, <8 x i1> %b, <8 x i1> %c, <8 x float> %d) { +; CHECK-LABEL: select_and_v8i1: +; CHECK: # %bb.0: +; CHECK-NEXT: vpsllw $15, %xmm2, %xmm4 +; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 +; CHECK-NEXT: vpmovw2m %xmm0, %k1 +; CHECK-NEXT: vpxor %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: vpcmpgtw %xmm4, %xmm0, %k0 {%k1} +; CHECK-NEXT: vpand %xmm1, %xmm2, %xmm0 +; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 +; CHECK-NEXT: vpmovw2m %xmm0, %k2 +; CHECK-NEXT: kandnb %k2, %k1, %k1 +; CHECK-NEXT: korb %k1, %k0, %k1 +; CHECK-NEXT: vbroadcastss {{.*#+}} ymm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; CHECK-NEXT: vmovaps %ymm3, %ymm0 {%k1} +; CHECK-NEXT: retq + %t2 = select <8 x i1> %a, <8 x i1> , <8 x i1> %b + %t3 = and <8 x i1> %c, %t2 + %t4= select <8 x i1> %t3, <8 x float> %d, <8 x float> + ret <8 x float> %t4 +} + +define <8 x float> @select_or_v8i1(<8 x i1> %a, <8 x i1> %b, <8 x i1> %c, <8 x float> %d) { +; CHECK-LABEL: select_or_v8i1: +; CHECK: # %bb.0: +; CHECK-NEXT: vpsllw $15, %xmm2, %xmm4 +; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 +; CHECK-NEXT: vpmovw2m %xmm0, %k1 +; CHECK-NEXT: vpxor %xmm0, %xmm0, %xmm0 +; CHECK-NEXT: vpcmpgtw %xmm4, %xmm0, %k0 {%k1} +; CHECK-NEXT: vpor %xmm1, %xmm2, %xmm0 +; CHECK-NEXT: vpsllw $15, %xmm0, %xmm0 +; CHECK-NEXT: vpmovw2m %xmm0, %k2 +; CHECK-NEXT: kandnb %k2, %k1, %k1 +; CHECK-NEXT: korb %k1, %k0, %k1 +; CHECK-NEXT: vbroadcastss {{.*#+}} ymm0 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] +; CHECK-NEXT: vmovaps %ymm3, %ymm0 {%k1} +; CHECK-NEXT: retq + %t2 = select <8 x i1> %a, <8 x i1> , <8 x i1> %b + %t3 = or <8 x i1> %c, %t2 + %t4= select <8 x i1> %t3, <8 x float> %d, <8 x float> + ret <8 x float> %t4 +}