diff --git a/llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll b/llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
index 46894009fca562..5c2896ba3c4a44 100644
--- a/llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
+++ b/llvm/test/Transforms/SLPVectorizer/X86/reduction-logical.ll
@@ -1,5 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
-; RUN: opt < %s -slp-vectorizer -mtriple=x86_64-- -S | FileCheck %s
+; RUN: opt < %s -slp-vectorizer -mtriple=x86_64--                 -S | FileCheck %s --check-prefixes=CHECK,SSE
+; RUN: opt < %s -slp-vectorizer -mtriple=x86_64-- -mattr=avx512vl -S | FileCheck %s --check-prefixes=CHECK,AVX512
+
+declare void @use1(i1)
 
 define i1 @logical_and_icmp(<4 x i32> %x) {
 ; CHECK-LABEL: @logical_and_icmp(
@@ -168,6 +171,29 @@ define i1 @mixed_logical_icmp(<4 x i32> %x) {
   ret i1 %s3
 }
 
+define i1 @logical_and_icmp_subvec(<4 x i32> %x) {
+; CHECK-LABEL: @logical_and_icmp_subvec(
+; CHECK-NEXT:    [[X0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
+; CHECK-NEXT:    [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[X0]], 0
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[X1]], 0
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i32 [[X2]], 0
+; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C0]], i1 [[C1]], i1 false
+; CHECK-NEXT:    [[S2:%.*]] = select i1 [[S1]], i1 [[C2]], i1 false
+; CHECK-NEXT:    ret i1 [[S2]]
+;
+  %x0 = extractelement <4 x i32> %x, i32 0
+  %x1 = extractelement <4 x i32> %x, i32 1
+  %x2 = extractelement <4 x i32> %x, i32 2
+  %c0 = icmp slt i32 %x0, 0
+  %c1 = icmp slt i32 %x1, 0
+  %c2 = icmp slt i32 %x2, 0
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  ret i1 %s2
+}
+
 ; TODO: This is better than all-scalar and still safe,
 ;       but we want this to be 2 reductions with glue
 ;       logic...or a wide reduction?
@@ -212,3 +238,261 @@ define i1 @logical_and_icmp_clamp(<4 x i32> %x) {
   %s7 = select i1 %s6, i1 %d3, i1 false
   ret i1 %s7
 }
+
+define i1 @logical_and_icmp_clamp_extra_use_cmp(<4 x i32> %x) {
+; CHECK-LABEL: @logical_and_icmp_clamp_extra_use_cmp(
+; CHECK-NEXT:    [[X0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
+; CHECK-NEXT:    [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2
+; CHECK-NEXT:    [[X3:%.*]] = extractelement <4 x i32> [[X]], i32 3
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[X0]], 42
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[X1]], 42
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i32 [[X2]], 42
+; CHECK-NEXT:    call void @use1(i1 [[C2]])
+; CHECK-NEXT:    [[C3:%.*]] = icmp slt i32 [[X3]], 42
+; CHECK-NEXT:    [[D0:%.*]] = icmp sgt i32 [[X0]], 17
+; CHECK-NEXT:    [[D1:%.*]] = icmp sgt i32 [[X1]], 17
+; CHECK-NEXT:    [[D2:%.*]] = icmp sgt i32 [[X2]], 17
+; CHECK-NEXT:    [[D3:%.*]] = icmp sgt i32 [[X3]], 17
+; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C0]], i1 [[C1]], i1 false
+; CHECK-NEXT:    [[S2:%.*]] = select i1 [[S1]], i1 [[C2]], i1 false
+; CHECK-NEXT:    [[S3:%.*]] = select i1 [[S2]], i1 [[C3]], i1 false
+; CHECK-NEXT:    [[S4:%.*]] = select i1 [[S3]], i1 [[D0]], i1 false
+; CHECK-NEXT:    [[S5:%.*]] = select i1 [[S4]], i1 [[D1]], i1 false
+; CHECK-NEXT:    [[S6:%.*]] = select i1 [[S5]], i1 [[D2]], i1 false
+; CHECK-NEXT:    [[S7:%.*]] = select i1 [[S6]], i1 [[D3]], i1 false
+; CHECK-NEXT:    ret i1 [[S7]]
+;
+  %x0 = extractelement <4 x i32> %x, i32 0
+  %x1 = extractelement <4 x i32> %x, i32 1
+  %x2 = extractelement <4 x i32> %x, i32 2
+  %x3 = extractelement <4 x i32> %x, i32 3
+  %c0 = icmp slt i32 %x0, 42
+  %c1 = icmp slt i32 %x1, 42
+  %c2 = icmp slt i32 %x2, 42
+  call void @use1(i1 %c2)
+  %c3 = icmp slt i32 %x3, 42
+  %d0 = icmp sgt i32 %x0, 17
+  %d1 = icmp sgt i32 %x1, 17
+  %d2 = icmp sgt i32 %x2, 17
+  %d3 = icmp sgt i32 %x3, 17
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  %s3 = select i1 %s2, i1 %c3, i1 false
+  %s4 = select i1 %s3, i1 %d0, i1 false
+  %s5 = select i1 %s4, i1 %d1, i1 false
+  %s6 = select i1 %s5, i1 %d2, i1 false
+  %s7 = select i1 %s6, i1 %d3, i1 false
+  ret i1 %s7
+}
+
+define i1 @logical_and_icmp_clamp_extra_use_select(<4 x i32> %x) {
+; CHECK-LABEL: @logical_and_icmp_clamp_extra_use_select(
+; CHECK-NEXT:    [[X0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
+; CHECK-NEXT:    [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2
+; CHECK-NEXT:    [[X3:%.*]] = extractelement <4 x i32> [[X]], i32 3
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[X0]], 42
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[X1]], 42
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i32 [[X2]], 42
+; CHECK-NEXT:    [[C3:%.*]] = icmp slt i32 [[X3]], 42
+; CHECK-NEXT:    [[D0:%.*]] = icmp sgt i32 [[X0]], 17
+; CHECK-NEXT:    [[D1:%.*]] = icmp sgt i32 [[X1]], 17
+; CHECK-NEXT:    [[D2:%.*]] = icmp sgt i32 [[X2]], 17
+; CHECK-NEXT:    [[D3:%.*]] = icmp sgt i32 [[X3]], 17
+; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C0]], i1 [[C1]], i1 false
+; CHECK-NEXT:    [[S2:%.*]] = select i1 [[S1]], i1 [[C2]], i1 false
+; CHECK-NEXT:    call void @use1(i1 [[S2]])
+; CHECK-NEXT:    [[S3:%.*]] = select i1 [[S2]], i1 [[C3]], i1 false
+; CHECK-NEXT:    [[S4:%.*]] = select i1 [[S3]], i1 [[D0]], i1 false
+; CHECK-NEXT:    [[S5:%.*]] = select i1 [[S4]], i1 [[D1]], i1 false
+; CHECK-NEXT:    [[S6:%.*]] = select i1 [[S5]], i1 [[D2]], i1 false
+; CHECK-NEXT:    [[S7:%.*]] = select i1 [[S6]], i1 [[D3]], i1 false
+; CHECK-NEXT:    ret i1 [[S7]]
+;
+  %x0 = extractelement <4 x i32> %x, i32 0
+  %x1 = extractelement <4 x i32> %x, i32 1
+  %x2 = extractelement <4 x i32> %x, i32 2
+  %x3 = extractelement <4 x i32> %x, i32 3
+  %c0 = icmp slt i32 %x0, 42
+  %c1 = icmp slt i32 %x1, 42
+  %c2 = icmp slt i32 %x2, 42
+  %c3 = icmp slt i32 %x3, 42
+  %d0 = icmp sgt i32 %x0, 17
+  %d1 = icmp sgt i32 %x1, 17
+  %d2 = icmp sgt i32 %x2, 17
+  %d3 = icmp sgt i32 %x3, 17
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  call void @use1(i1 %s2)
+  %s3 = select i1 %s2, i1 %c3, i1 false
+  %s4 = select i1 %s3, i1 %d0, i1 false
+  %s5 = select i1 %s4, i1 %d1, i1 false
+  %s6 = select i1 %s5, i1 %d2, i1 false
+  %s7 = select i1 %s6, i1 %d3, i1 false
+  ret i1 %s7
+}
+
+define i1 @logical_and_icmp_clamp_v8i32(<8 x i32> %x, <8 x i32> %y) {
+; SSE-LABEL: @logical_and_icmp_clamp_v8i32(
+; SSE-NEXT:    [[X0:%.*]] = extractelement <8 x i32> [[X:%.*]], i32 0
+; SSE-NEXT:    [[X1:%.*]] = extractelement <8 x i32> [[X]], i32 1
+; SSE-NEXT:    [[X2:%.*]] = extractelement <8 x i32> [[X]], i32 2
+; SSE-NEXT:    [[X3:%.*]] = extractelement <8 x i32> [[X]], i32 3
+; SSE-NEXT:    [[Y0:%.*]] = extractelement <8 x i32> [[Y:%.*]], i32 0
+; SSE-NEXT:    [[Y1:%.*]] = extractelement <8 x i32> [[Y]], i32 1
+; SSE-NEXT:    [[Y2:%.*]] = extractelement <8 x i32> [[Y]], i32 2
+; SSE-NEXT:    [[Y3:%.*]] = extractelement <8 x i32> [[Y]], i32 3
+; SSE-NEXT:    [[TMP1:%.*]] = insertelement <8 x i32> poison, i32 [[X0]], i32 0
+; SSE-NEXT:    [[TMP2:%.*]] = insertelement <8 x i32> [[TMP1]], i32 [[X1]], i32 1
+; SSE-NEXT:    [[TMP3:%.*]] = insertelement <8 x i32> [[TMP2]], i32 [[X2]], i32 2
+; SSE-NEXT:    [[TMP4:%.*]] = insertelement <8 x i32> [[TMP3]], i32 [[X3]], i32 3
+; SSE-NEXT:    [[SHUFFLE:%.*]] = shufflevector <8 x i32> [[TMP4]], <8 x i32> poison, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3>
+; SSE-NEXT:    [[TMP5:%.*]] = insertelement <8 x i32> <i32 42, i32 42, i32 42, i32 42, i32 poison, i32 poison, i32 poison, i32 poison>, i32 [[Y0]], i32 4
+; SSE-NEXT:    [[TMP6:%.*]] = insertelement <8 x i32> [[TMP5]], i32 [[Y1]], i32 5
+; SSE-NEXT:    [[TMP7:%.*]] = insertelement <8 x i32> [[TMP6]], i32 [[Y2]], i32 6
+; SSE-NEXT:    [[TMP8:%.*]] = insertelement <8 x i32> [[TMP7]], i32 [[Y3]], i32 7
+; SSE-NEXT:    [[TMP9:%.*]] = icmp slt <8 x i32> [[SHUFFLE]], [[TMP8]]
+; SSE-NEXT:    [[TMP10:%.*]] = freeze <8 x i1> [[TMP9]]
+; SSE-NEXT:    [[TMP11:%.*]] = call i1 @llvm.vector.reduce.and.v8i1(<8 x i1> [[TMP10]])
+; SSE-NEXT:    ret i1 [[TMP11]]
+;
+; AVX512-LABEL: @logical_and_icmp_clamp_v8i32(
+; AVX512-NEXT:    [[X0:%.*]] = extractelement <8 x i32> [[X:%.*]], i32 0
+; AVX512-NEXT:    [[X1:%.*]] = extractelement <8 x i32> [[X]], i32 1
+; AVX512-NEXT:    [[X2:%.*]] = extractelement <8 x i32> [[X]], i32 2
+; AVX512-NEXT:    [[X3:%.*]] = extractelement <8 x i32> [[X]], i32 3
+; AVX512-NEXT:    [[Y0:%.*]] = extractelement <8 x i32> [[Y:%.*]], i32 0
+; AVX512-NEXT:    [[Y1:%.*]] = extractelement <8 x i32> [[Y]], i32 1
+; AVX512-NEXT:    [[Y2:%.*]] = extractelement <8 x i32> [[Y]], i32 2
+; AVX512-NEXT:    [[Y3:%.*]] = extractelement <8 x i32> [[Y]], i32 3
+; AVX512-NEXT:    [[TMP1:%.*]] = insertelement <4 x i32> poison, i32 [[X0]], i32 0
+; AVX512-NEXT:    [[TMP2:%.*]] = insertelement <4 x i32> [[TMP1]], i32 [[X1]], i32 1
+; AVX512-NEXT:    [[TMP3:%.*]] = insertelement <4 x i32> [[TMP2]], i32 [[X2]], i32 2
+; AVX512-NEXT:    [[TMP4:%.*]] = insertelement <4 x i32> [[TMP3]], i32 [[X3]], i32 3
+; AVX512-NEXT:    [[TMP5:%.*]] = icmp slt <4 x i32> [[TMP4]], <i32 42, i32 42, i32 42, i32 42>
+; AVX512-NEXT:    [[D0:%.*]] = icmp slt i32 [[X0]], [[Y0]]
+; AVX512-NEXT:    [[D1:%.*]] = icmp slt i32 [[X1]], [[Y1]]
+; AVX512-NEXT:    [[D2:%.*]] = icmp slt i32 [[X2]], [[Y2]]
+; AVX512-NEXT:    [[D3:%.*]] = icmp slt i32 [[X3]], [[Y3]]
+; AVX512-NEXT:    [[TMP6:%.*]] = freeze <4 x i1> [[TMP5]]
+; AVX512-NEXT:    [[TMP7:%.*]] = call i1 @llvm.vector.reduce.and.v4i1(<4 x i1> [[TMP6]])
+; AVX512-NEXT:    [[S4:%.*]] = select i1 [[TMP7]], i1 [[D0]], i1 false
+; AVX512-NEXT:    [[S5:%.*]] = select i1 [[S4]], i1 [[D1]], i1 false
+; AVX512-NEXT:    [[S6:%.*]] = select i1 [[S5]], i1 [[D2]], i1 false
+; AVX512-NEXT:    [[S7:%.*]] = select i1 [[S6]], i1 [[D3]], i1 false
+; AVX512-NEXT:    ret i1 [[S7]]
+;
+  %x0 = extractelement <8 x i32> %x, i32 0
+  %x1 = extractelement <8 x i32> %x, i32 1
+  %x2 = extractelement <8 x i32> %x, i32 2
+  %x3 = extractelement <8 x i32> %x, i32 3
+  %y0 = extractelement <8 x i32> %y, i32 0
+  %y1 = extractelement <8 x i32> %y, i32 1
+  %y2 = extractelement <8 x i32> %y, i32 2
+  %y3 = extractelement <8 x i32> %y, i32 3
+  %c0 = icmp slt i32 %x0, 42
+  %c1 = icmp slt i32 %x1, 42
+  %c2 = icmp slt i32 %x2, 42
+  %c3 = icmp slt i32 %x3, 42
+  %d0 = icmp slt i32 %x0, %y0
+  %d1 = icmp slt i32 %x1, %y1
+  %d2 = icmp slt i32 %x2, %y2
+  %d3 = icmp slt i32 %x3, %y3
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  %s3 = select i1 %s2, i1 %c3, i1 false
+  %s4 = select i1 %s3, i1 %d0, i1 false
+  %s5 = select i1 %s4, i1 %d1, i1 false
+  %s6 = select i1 %s5, i1 %d2, i1 false
+  %s7 = select i1 %s6, i1 %d3, i1 false
+  ret i1 %s7
+}
+
+define i1 @logical_and_icmp_clamp_partial(<4 x i32> %x) {
+; CHECK-LABEL: @logical_and_icmp_clamp_partial(
+; CHECK-NEXT:    [[X0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
+; CHECK-NEXT:    [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2
+; CHECK-NEXT:    [[X3:%.*]] = extractelement <4 x i32> [[X]], i32 3
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[X0]], 42
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[X1]], 42
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i32 [[X2]], 42
+; CHECK-NEXT:    [[D0:%.*]] = icmp sgt i32 [[X0]], 17
+; CHECK-NEXT:    [[D1:%.*]] = icmp sgt i32 [[X1]], 17
+; CHECK-NEXT:    [[D2:%.*]] = icmp sgt i32 [[X2]], 17
+; CHECK-NEXT:    [[D3:%.*]] = icmp sgt i32 [[X3]], 17
+; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C0]], i1 [[C1]], i1 false
+; CHECK-NEXT:    [[S2:%.*]] = select i1 [[S1]], i1 [[C2]], i1 false
+; CHECK-NEXT:    [[S4:%.*]] = select i1 [[S2]], i1 [[D0]], i1 false
+; CHECK-NEXT:    [[S5:%.*]] = select i1 [[S4]], i1 [[D1]], i1 false
+; CHECK-NEXT:    [[S6:%.*]] = select i1 [[S5]], i1 [[D2]], i1 false
+; CHECK-NEXT:    [[S7:%.*]] = select i1 [[S6]], i1 [[D3]], i1 false
+; CHECK-NEXT:    ret i1 [[S7]]
+;
+  %x0 = extractelement <4 x i32> %x, i32 0
+  %x1 = extractelement <4 x i32> %x, i32 1
+  %x2 = extractelement <4 x i32> %x, i32 2
+  %x3 = extractelement <4 x i32> %x, i32 3
+  %c0 = icmp slt i32 %x0, 42
+  %c1 = icmp slt i32 %x1, 42
+  %c2 = icmp slt i32 %x2, 42
+  ; remove an element from the previous test
+  %d0 = icmp sgt i32 %x0, 17
+  %d1 = icmp sgt i32 %x1, 17
+  %d2 = icmp sgt i32 %x2, 17
+  %d3 = icmp sgt i32 %x3, 17
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  ; remove an element from the previous test
+  %s4 = select i1 %s2, i1 %d0, i1 false
+  %s5 = select i1 %s4, i1 %d1, i1 false
+  %s6 = select i1 %s5, i1 %d2, i1 false
+  %s7 = select i1 %s6, i1 %d3, i1 false
+  ret i1 %s7
+}
+
+define i1 @logical_and_icmp_clamp_pred_diff(<4 x i32> %x) {
+; CHECK-LABEL: @logical_and_icmp_clamp_pred_diff(
+; CHECK-NEXT:    [[X0:%.*]] = extractelement <4 x i32> [[X:%.*]], i32 0
+; CHECK-NEXT:    [[X1:%.*]] = extractelement <4 x i32> [[X]], i32 1
+; CHECK-NEXT:    [[X2:%.*]] = extractelement <4 x i32> [[X]], i32 2
+; CHECK-NEXT:    [[X3:%.*]] = extractelement <4 x i32> [[X]], i32 3
+; CHECK-NEXT:    [[C0:%.*]] = icmp slt i32 [[X0]], 42
+; CHECK-NEXT:    [[C1:%.*]] = icmp slt i32 [[X1]], 42
+; CHECK-NEXT:    [[C2:%.*]] = icmp slt i32 [[X2]], 42
+; CHECK-NEXT:    [[C3:%.*]] = icmp ult i32 [[X3]], 42
+; CHECK-NEXT:    [[D0:%.*]] = icmp sgt i32 [[X0]], 17
+; CHECK-NEXT:    [[D1:%.*]] = icmp sgt i32 [[X1]], 17
+; CHECK-NEXT:    [[D2:%.*]] = icmp sgt i32 [[X2]], 17
+; CHECK-NEXT:    [[D3:%.*]] = icmp sgt i32 [[X3]], 17
+; CHECK-NEXT:    [[S1:%.*]] = select i1 [[C0]], i1 [[C1]], i1 false
+; CHECK-NEXT:    [[S2:%.*]] = select i1 [[S1]], i1 [[C2]], i1 false
+; CHECK-NEXT:    [[S3:%.*]] = select i1 [[S2]], i1 [[C3]], i1 false
+; CHECK-NEXT:    [[S4:%.*]] = select i1 [[S3]], i1 [[D0]], i1 false
+; CHECK-NEXT:    [[S5:%.*]] = select i1 [[S4]], i1 [[D1]], i1 false
+; CHECK-NEXT:    [[S6:%.*]] = select i1 [[S5]], i1 [[D2]], i1 false
+; CHECK-NEXT:    [[S7:%.*]] = select i1 [[S6]], i1 [[D3]], i1 false
+; CHECK-NEXT:    ret i1 [[S7]]
+;
+  %x0 = extractelement <4 x i32> %x, i32 0
+  %x1 = extractelement <4 x i32> %x, i32 1
+  %x2 = extractelement <4 x i32> %x, i32 2
+  %x3 = extractelement <4 x i32> %x, i32 3
+  %c0 = icmp slt i32 %x0, 42
+  %c1 = icmp slt i32 %x1, 42
+  %c2 = icmp slt i32 %x2, 42
+  %c3 = icmp ult i32 %x3, 42 ; predicate changed
+  %d0 = icmp sgt i32 %x0, 17
+  %d1 = icmp sgt i32 %x1, 17
+  %d2 = icmp sgt i32 %x2, 17
+  %d3 = icmp sgt i32 %x3, 17
+  %s1 = select i1 %c0, i1 %c1, i1 false
+  %s2 = select i1 %s1, i1 %c2, i1 false
+  %s3 = select i1 %s2, i1 %c3, i1 false
+  %s4 = select i1 %s3, i1 %d0, i1 false
+  %s5 = select i1 %s4, i1 %d1, i1 false
+  %s6 = select i1 %s5, i1 %d2, i1 false
+  %s7 = select i1 %s6, i1 %d3, i1 false
+  ret i1 %s7
+}