diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 9e4a30323b99..2200586692b3 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -323,6 +323,7 @@ class WebAssemblyPassConfig final : public TargetPassConfig {
   void addIRPasses() override;
   void addISelPrepare() override;
   bool addInstSelector() override;
+  void addOptimizedRegAlloc() override;
   void addPostRegAlloc() override;
   bool addGCPasses() override { return false; }
   void addPreEmitPass() override;
@@ -480,6 +481,19 @@ bool WebAssemblyPassConfig::addInstSelector() {
   return false;
 }
 
+void WebAssemblyPassConfig::addOptimizedRegAlloc() {
+  // Currently RegisterCoalesce degrades wasm debug info quality by a
+  // significant margin. As a quick fix, disable this for -O1, which is often
+  // used for debugging large applications. Disabling this increases code size
+  // of Emscripten core benchmarks by ~5%, which is acceptable for -O1, which is
+  // usually not used for production builds.
+  // TODO Investigate why RegisterCoalesce degrades debug info quality and fix
+  // it properly
+  if (getOptLevel() == CodeGenOpt::Less)
+    disablePass(&RegisterCoalescerID);
+  TargetPassConfig::addOptimizedRegAlloc();
+}
+
 void WebAssemblyPassConfig::addPostRegAlloc() {
   // TODO: The following CodeGen passes don't currently support code containing
   // virtual registers. Consider removing their restrictions and re-enabling
diff --git a/llvm/test/CodeGen/WebAssembly/regcoalesce-disable.ll b/llvm/test/CodeGen/WebAssembly/regcoalesce-disable.ll
new file mode 100644
index 000000000000..82d99d2b75b2
--- /dev/null
+++ b/llvm/test/CodeGen/WebAssembly/regcoalesce-disable.ll
@@ -0,0 +1,12 @@
+; RUN: llc < %s -O1 --debug-pass=Structure 2>&1 | FileCheck %s --check-prefix=O1
+; RUN: llc < %s -O2 --debug-pass=Structure 2>&1 | FileCheck %s --check-prefix=O2
+
+; Test if RegisterCoalesce pass is disabled in -O1.
+
+; O1-NOT: Simple Register Coalescing
+; O2: Simple Register Coalescing
+target triple = "wasm32-unknown-unknown"
+
+define void @test() {
+  ret void
+}