From d9fdad72aefb6e152a1505807e5afad3a6d7e57b Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Thu, 21 Jul 2016 03:50:39 +0000 Subject: [PATCH] IPRA: Fix RegMask calculation for alias registers This patch fixes a very subtle bug in regmask calculation. Thanks to zan jyu Wong for bringing this to notice. For example if CL is only clobbered than CH should not be marked clobbered but CX, RCX and ECX should be mark clobbered. Previously for each modified register all of its aliases are marked clobbered by markRegClobbred() in RegUsageInfoCollector.cpp but that is wrong because when CL is clobbered then MRI::isPhysRegModified() will return true for CL, CX, ECX, RCX which is correct behavior but then for CX, EXC, RCX we mark CH also clobbered as CH is aliased to CX,ECX,RCX so markRegClobbred() is not required because isPhysRegModified already take cares of proper aliasing register. A very simple test case has been added to verify this change. Please find relevant bug report here : http://llvm.org/PR28567 Patch by Vivek Pandya Differential Revision: https://reviews.llvm.org/D22400 llvm-svn: 276235 --- llvm/lib/CodeGen/RegUsageInfoCollector.cpp | 13 +------------ llvm/test/CodeGen/X86/ipra-reg-alias.ll | 12 ++++++++++++ 2 files changed, 13 insertions(+), 12 deletions(-) create mode 100644 llvm/test/CodeGen/X86/ipra-reg-alias.ll diff --git a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp index 50b8854233753..22eb1cea83006 100644 --- a/llvm/lib/CodeGen/RegUsageInfoCollector.cpp +++ b/llvm/lib/CodeGen/RegUsageInfoCollector.cpp @@ -57,10 +57,6 @@ class RegUsageInfoCollector : public MachineFunctionPass { bool runOnMachineFunction(MachineFunction &MF) override; static char ID; - -private: - void markRegClobbered(const TargetRegisterInfo *TRI, uint32_t *RegMask, - unsigned PReg); }; } // end of anonymous namespace @@ -76,13 +72,6 @@ FunctionPass *llvm::createRegUsageInfoCollector() { return new RegUsageInfoCollector(); } -void RegUsageInfoCollector::markRegClobbered(const TargetRegisterInfo *TRI, - uint32_t *RegMask, unsigned PReg) { - // If PReg is clobbered then all of its alias are also clobbered. - for (MCRegAliasIterator AI(PReg, TRI, true); AI.isValid(); ++AI) - RegMask[*AI / 32] &= ~(1u << *AI % 32); -} - void RegUsageInfoCollector::getAnalysisUsage(AnalysisUsage &AU) const { AU.addRequired(); AU.setPreservesAll(); @@ -116,7 +105,7 @@ bool RegUsageInfoCollector::runOnMachineFunction(MachineFunction &MF) { for (unsigned PReg = 1, PRegE = TRI->getNumRegs(); PReg < PRegE; ++PReg) if (MRI->isPhysRegModified(PReg, true)) - markRegClobbered(TRI, &RegMask[0], PReg); + RegMask[PReg / 32] &= ~(1u << PReg % 32); if (!TargetFrameLowering::isSafeForNoCSROpt(F)) { const uint32_t *CallPreservedMask = diff --git a/llvm/test/CodeGen/X86/ipra-reg-alias.ll b/llvm/test/CodeGen/X86/ipra-reg-alias.ll new file mode 100644 index 0000000000000..36b768e4c4fff --- /dev/null +++ b/llvm/test/CodeGen/X86/ipra-reg-alias.ll @@ -0,0 +1,12 @@ +; RUN: llc -enable-ipra -print-regusage -o /dev/null 2>&1 < %s | FileCheck %s +target triple = "x86_64--" + +define i8 @main(i8 %X) { + %inc = add i8 %X, 1 + %inc2 = mul i8 %inc, 5 +; Here only CL is clobbred so CH should not be clobbred, but CX, ECX and RCX +; should be clobbered. +; CHECK: main Clobbered Registers: AH AL AX CL CX EAX ECX EFLAGS RAX RCX + ret i8 %inc2 +} +