From e201232ececbf386e9b45db7a6ee9dde348e124e Mon Sep 17 00:00:00 2001 From: Andrew Savonichev Date: Wed, 7 Apr 2021 19:05:54 +0300 Subject: [PATCH] [NFC][AArch64] Handle processLogicalImmediate error If processLogicalImmediate fails, we should return from the function without changing InsInstrs or DelInstrs. This happens for CodeGen/AArch64/urem-seteq-nonzero.ll LIT test as described in https://reviews.llvm.org/D99662#2662296. Callers of genAlternativeCodeSequence skip patterns where InsInstrs stays empty, so this does not cause any issues now. Differential Revision: https://reviews.llvm.org/D100047 --- llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 39 +++++++++----------- 1 file changed, 18 insertions(+), 21 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 4aed4c99d2e77..f8f8ee3f1e6c8 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -5432,15 +5432,15 @@ void AArch64InstrInfo::genAlternativeCodeSequence( } uint64_t UImm = SignExtend64(Imm, BitSize); uint64_t Encoding; - if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) { - MachineInstrBuilder MIB1 = - BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) - .addReg(ZeroReg) - .addImm(Encoding); - InsInstrs.push_back(MIB1); - InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); - MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); - } + if (!AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) + return; + MachineInstrBuilder MIB1 = + BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) + .addReg(ZeroReg) + .addImm(Encoding); + InsInstrs.push_back(MIB1); + InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); + MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); break; } case MachineCombinerPattern::MULSUBW_OP1: @@ -5523,15 +5523,15 @@ void AArch64InstrInfo::genAlternativeCodeSequence( } uint64_t UImm = SignExtend64(-Imm, BitSize); uint64_t Encoding; - if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) { - MachineInstrBuilder MIB1 = - BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) - .addReg(ZeroReg) - .addImm(Encoding); - InsInstrs.push_back(MIB1); - InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); - MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); - } + if (!AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) + return; + MachineInstrBuilder MIB1 = + BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc), NewVR) + .addReg(ZeroReg) + .addImm(Encoding); + InsInstrs.push_back(MIB1); + InstrIdxForVirtReg.insert(std::make_pair(NewVR, 0)); + MUL = genMaddR(MF, MRI, TII, Root, InsInstrs, 1, Opc, NewVR, RC); break; } @@ -6221,9 +6221,6 @@ void AArch64InstrInfo::genAlternativeCodeSequence( } } // end switch (Pattern) // Record MUL and ADD/SUB for deletion - // FIXME: This assertion fails in CodeGen/AArch64/tailmerging_in_mbp.ll and - // CodeGen/AArch64/urem-seteq-nonzero.ll. - // assert(MUL && "MUL was never set"); if (MUL) DelInstrs.push_back(MUL); DelInstrs.push_back(&Root);