diff --git a/llvm/include/llvm/CodeGen/MachineFrameInfo.h b/llvm/include/llvm/CodeGen/MachineFrameInfo.h index ed6281497e3a7a..755e8d8b6f76eb 100644 --- a/llvm/include/llvm/CodeGen/MachineFrameInfo.h +++ b/llvm/include/llvm/CodeGen/MachineFrameInfo.h @@ -797,8 +797,8 @@ class MachineFrameInfo { /// Used by prolog/epilog inserter to set the function's callee saved /// information. - void setCalleeSavedInfo(const std::vector &CSI) { - CSInfo = CSI; + void setCalleeSavedInfo(std::vector CSI) { + CSInfo = std::move(CSI); } /// Has the callee saved info been calculated yet? diff --git a/llvm/include/llvm/CodeGen/TargetFrameLowering.h b/llvm/include/llvm/CodeGen/TargetFrameLowering.h index edfbdc3350b4a6..b328a271a60ef6 100644 --- a/llvm/include/llvm/CodeGen/TargetFrameLowering.h +++ b/llvm/include/llvm/CodeGen/TargetFrameLowering.h @@ -213,7 +213,7 @@ class TargetFrameLowering { /// storeRegToStackSlot(). Returns false otherwise. virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { return false; } diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp index de726b326197c5..703c77b77ce580 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -1971,7 +1971,7 @@ struct RegPairInfo { } // end anonymous namespace static void computeCalleeSaveRegisterPairs( - MachineFunction &MF, const std::vector &CSI, + MachineFunction &MF, ArrayRef CSI, const TargetRegisterInfo *TRI, SmallVectorImpl &RegPairs, bool &NeedShadowCallStackProlog, bool NeedsFrameRecord) { @@ -2116,8 +2116,7 @@ static void computeCalleeSaveRegisterPairs( bool AArch64FrameLowering::spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { + ArrayRef CSI, const TargetRegisterInfo *TRI) const { MachineFunction &MF = *MBB.getParent(); const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo(); bool NeedsWinCFI = needsWinCFI(MF); diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.h b/llvm/lib/Target/AArch64/AArch64FrameLowering.h index 57a7924fb8f8fd..a6c4c89178e9a9 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.h +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.h @@ -49,7 +49,7 @@ class AArch64FrameLowering : public TargetFrameLowering { bool PreferFP, bool ForSimm) const; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, diff --git a/llvm/lib/Target/ARC/ARCFrameLowering.cpp b/llvm/lib/Target/ARC/ARCFrameLowering.cpp index d8946d97deffd9..c90b75b64223d2 100644 --- a/llvm/lib/Target/ARC/ARCFrameLowering.cpp +++ b/llvm/lib/Target/ARC/ARCFrameLowering.cpp @@ -74,8 +74,7 @@ static void generateStackAdjustment(MachineBasicBlock &MBB, .addImm(AbsAmount); } -static unsigned -determineLastCalleeSave(const std::vector &CSI) { +static unsigned determineLastCalleeSave(ArrayRef CSI) { unsigned Last = 0; for (auto Reg : CSI) { assert(Reg.getReg() >= ARC::R13 && Reg.getReg() <= ARC::R25 && @@ -401,8 +400,7 @@ bool ARCFrameLowering::assignCalleeSavedSpillSlots( bool ARCFrameLowering::spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { + ArrayRef CSI, const TargetRegisterInfo *TRI) const { LLVM_DEBUG(dbgs() << "Spill callee saved registers: " << MBB.getParent()->getName() << "\n"); // There are routines for saving at least 3 registers (r13 to r15, etc.) diff --git a/llvm/lib/Target/ARC/ARCFrameLowering.h b/llvm/lib/Target/ARC/ARCFrameLowering.h index 9242400fb28de2..a96bf8eae6a340 100644 --- a/llvm/lib/Target/ARC/ARCFrameLowering.h +++ b/llvm/lib/Target/ARC/ARCFrameLowering.h @@ -42,7 +42,7 @@ class ARCFrameLowering : public TargetFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp index cb98b2b34efdb9..ae4b330cdce856 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp +++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp @@ -969,10 +969,9 @@ ARMFrameLowering::ResolveFrameIndexReference(const MachineFunction &MF, void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, unsigned StmOpc, unsigned StrOpc, - bool NoGap, - bool(*Func)(unsigned, bool), + bool NoGap, bool (*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs, unsigned MIFlags) const { MachineFunction &MF = *MBB.getParent(); @@ -1162,7 +1161,7 @@ void ARMFrameLowering::emitPopInst(MachineBasicBlock &MBB, static void emitAlignedDPRCS2Spills(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); @@ -1335,7 +1334,7 @@ skipAlignedDPRCS2Spills(MachineBasicBlock::iterator MI, static void emitAlignedDPRCS2Restores(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned NumAlignedDPRCS2Regs, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) { MachineFunction &MF = *MBB.getParent(); ARMFunctionInfo *AFI = MF.getInfo(); @@ -1422,10 +1421,9 @@ static void emitAlignedDPRCS2Restores(MachineBasicBlock &MBB, std::prev(MI)->addRegisterKilled(ARM::R4, TRI); } -bool ARMFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool ARMFrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) return false; diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.h b/llvm/lib/Target/ARM/ARMFrameLowering.h index 0462b01af707ca..dfaa7d38e9196d 100644 --- a/llvm/lib/Target/ARM/ARMFrameLowering.h +++ b/llvm/lib/Target/ARM/ARMFrameLowering.h @@ -33,7 +33,7 @@ class ARMFrameLowering : public TargetFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, @@ -73,10 +73,9 @@ class ARMFrameLowering : public TargetFrameLowering { private: void emitPushInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, unsigned StmOpc, - unsigned StrOpc, bool NoGap, - bool(*Func)(unsigned, bool), unsigned NumAlignedDPRCS2Regs, - unsigned MIFlags = 0) const; + ArrayRef CSI, unsigned StmOpc, + unsigned StrOpc, bool NoGap, bool (*Func)(unsigned, bool), + unsigned NumAlignedDPRCS2Regs, unsigned MIFlags = 0) const; void emitPopInst(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector &CSI, unsigned LdmOpc, unsigned LdrOpc, bool isVarArg, bool NoGap, diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp index 956d474f1d79c8..cccda3421a04bd 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp @@ -804,11 +804,9 @@ static const unsigned *findNextOrderedReg(const unsigned *CurrentReg, return CurrentReg; } -bool Thumb1FrameLowering:: -spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool Thumb1FrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) return false; diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.h b/llvm/lib/Target/ARM/Thumb1FrameLowering.h index 61af48712b6cf6..422d42caf999da 100644 --- a/llvm/lib/Target/ARM/Thumb1FrameLowering.h +++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.h @@ -27,7 +27,7 @@ class Thumb1FrameLowering : public ARMFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, diff --git a/llvm/lib/Target/AVR/AVRFrameLowering.cpp b/llvm/lib/Target/AVR/AVRFrameLowering.cpp index 97e1292b3dd7fe..4b7bdbe361d829 100644 --- a/llvm/lib/Target/AVR/AVRFrameLowering.cpp +++ b/llvm/lib/Target/AVR/AVRFrameLowering.cpp @@ -233,8 +233,7 @@ bool AVRFrameLowering::hasFP(const MachineFunction &MF) const { bool AVRFrameLowering::spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) { return false; } diff --git a/llvm/lib/Target/AVR/AVRFrameLowering.h b/llvm/lib/Target/AVR/AVRFrameLowering.h index a7658438232a46..f4497e157d12c6 100644 --- a/llvm/lib/Target/AVR/AVRFrameLowering.h +++ b/llvm/lib/Target/AVR/AVRFrameLowering.h @@ -24,7 +24,7 @@ class AVRFrameLowering : public TargetFrameLowering { bool hasFP(const MachineFunction &MF) const override; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index c8948ecc905266..1a2d92719c5e7e 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -261,20 +261,20 @@ static unsigned getMax32BitSubRegister(unsigned Reg, } /// Returns the callee saved register with the largest id in the vector. -static unsigned getMaxCalleeSavedReg(const std::vector &CSI, +static unsigned getMaxCalleeSavedReg(ArrayRef CSI, const TargetRegisterInfo &TRI) { - static_assert(Hexagon::R1 > 0, - "Assume physical registers are encoded as positive integers"); - if (CSI.empty()) - return 0; - - unsigned Max = getMax32BitSubRegister(CSI[0].getReg(), TRI); - for (unsigned I = 1, E = CSI.size(); I < E; ++I) { - unsigned Reg = getMax32BitSubRegister(CSI[I].getReg(), TRI); - if (Reg > Max) - Max = Reg; - } - return Max; + static_assert(Hexagon::R1 > 0, + "Assume physical registers are encoded as positive integers"); + if (CSI.empty()) + return 0; + + unsigned Max = getMax32BitSubRegister(CSI[0].getReg(), TRI); + for (unsigned I = 1, E = CSI.size(); I < E; ++I) { + unsigned Reg = getMax32BitSubRegister(CSI[I].getReg(), TRI); + if (Reg > Max) + Max = Reg; + } + return Max; } /// Checks if the basic block contains any instruction that needs a stack diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h index 8625aa687f21fa..b967f525ca761c 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.h +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.h @@ -45,8 +45,9 @@ class HexagonFrameLowering : public TargetFrameLowering { bool enableCalleeSaveSkip(const MachineFunction &MF) const override; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, const std::vector &CSI, - const TargetRegisterInfo *TRI) const override { + MachineBasicBlock::iterator MI, + ArrayRef CSI, + const TargetRegisterInfo *TRI) const override { return true; } diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp index de60ad9bd7e6f0..4af31344753c2c 100644 --- a/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp +++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.cpp @@ -176,11 +176,9 @@ void MSP430FrameLowering::emitEpilogue(MachineFunction &MF, } // FIXME: Can we eleminate these in favour of generic code? -bool -MSP430FrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool MSP430FrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) return false; diff --git a/llvm/lib/Target/MSP430/MSP430FrameLowering.h b/llvm/lib/Target/MSP430/MSP430FrameLowering.h index 70e2840530211f..821db7cb38e3d0 100644 --- a/llvm/lib/Target/MSP430/MSP430FrameLowering.h +++ b/llvm/lib/Target/MSP430/MSP430FrameLowering.h @@ -36,7 +36,7 @@ class MSP430FrameLowering : public TargetFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, diff --git a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp index 5a2a916a6b7a11..274bc5cf922025 100644 --- a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp +++ b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp @@ -109,11 +109,9 @@ void Mips16FrameLowering::emitEpilogue(MachineFunction &MF, TII.restoreFrame(Mips::SP, StackSize, MBB, MBBI); } -bool Mips16FrameLowering:: -spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool Mips16FrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { MachineFunction *MF = MBB.getParent(); // diff --git a/llvm/lib/Target/Mips/Mips16FrameLowering.h b/llvm/lib/Target/Mips/Mips16FrameLowering.h index 6b62453f8dfe9b..585d24097d2cb6 100644 --- a/llvm/lib/Target/Mips/Mips16FrameLowering.h +++ b/llvm/lib/Target/Mips/Mips16FrameLowering.h @@ -27,7 +27,7 @@ class Mips16FrameLowering : public MipsFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp index e8734c4fa96006..3403ec01aef2fc 100644 --- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp +++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp @@ -182,7 +182,7 @@ unsigned Mips16InstrInfo::getOppositeBranchOpc(unsigned Opc) const { } static void addSaveRestoreRegs(MachineInstrBuilder &MIB, - const std::vector &CSI, + ArrayRef CSI, unsigned Flags = 0) { for (unsigned i = 0, e = CSI.size(); i != e; ++i) { // Add the callee-saved register as live-in. Do not add if the register is diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp index 166ddea0431f3c..d5a44801dcf27b 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.cpp @@ -789,11 +789,9 @@ int MipsSEFrameLowering::getFrameIndexReference(const MachineFunction &MF, getOffsetOfLocalArea() + MFI.getOffsetAdjustment(); } -bool MipsSEFrameLowering:: -spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool MipsSEFrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { MachineFunction *MF = MBB.getParent(); const TargetInstrInfo &TII = *STI.getInstrInfo(); diff --git a/llvm/lib/Target/Mips/MipsSEFrameLowering.h b/llvm/lib/Target/Mips/MipsSEFrameLowering.h index 78ffe161d9c6b2..6c586c46ce1e14 100644 --- a/llvm/lib/Target/Mips/MipsSEFrameLowering.h +++ b/llvm/lib/Target/Mips/MipsSEFrameLowering.h @@ -32,7 +32,7 @@ class MipsSEFrameLowering : public MipsFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool hasReservedCallFrame(const MachineFunction &MF) const override; diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp index 15b2d9cb5dc286..a614eaf9e217ff 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.cpp @@ -2162,12 +2162,9 @@ bool PPCFrameLowering::assignCalleeSavedSpillSlots( return AllSpilledToReg; } - -bool -PPCFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool PPCFrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { // Currently, this function only handles SVR4 32- and 64-bit ABIs. // Return false otherwise to maintain pre-existing behavior. @@ -2256,11 +2253,10 @@ PPCFrameLowering::spillCalleeSavedRegisters(MachineBasicBlock &MBB, return true; } -static void -restoreCRs(bool isPPC64, bool is31, - bool CR2Spilled, bool CR3Spilled, bool CR4Spilled, - MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, unsigned CSIIndex) { +static void restoreCRs(bool isPPC64, bool is31, bool CR2Spilled, + bool CR3Spilled, bool CR4Spilled, MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + ArrayRef CSI, unsigned CSIIndex) { MachineFunction *MF = MBB.getParent(); const PPCInstrInfo &TII = *MF->getSubtarget().getInstrInfo(); diff --git a/llvm/lib/Target/PowerPC/PPCFrameLowering.h b/llvm/lib/Target/PowerPC/PPCFrameLowering.h index a5fbc9acbb28cc..ecddcedf58b304 100644 --- a/llvm/lib/Target/PowerPC/PPCFrameLowering.h +++ b/llvm/lib/Target/PowerPC/PPCFrameLowering.h @@ -113,7 +113,7 @@ class PPCFrameLowering: public TargetFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; /// This function will assign callee saved gprs to volatile vector registers /// for prologue spills when applicable. It returns false if there are any diff --git a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp index 3cdf6bf98ee088..0d9150394d8cd7 100644 --- a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp +++ b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp @@ -234,11 +234,9 @@ static void addSavedGPR(MachineBasicBlock &MBB, MachineInstrBuilder &MIB, } } -bool SystemZFrameLowering:: -spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MBBI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool SystemZFrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) return false; diff --git a/llvm/lib/Target/SystemZ/SystemZFrameLowering.h b/llvm/lib/Target/SystemZ/SystemZFrameLowering.h index 4189a92b8294c5..177dfeb138e61c 100644 --- a/llvm/lib/Target/SystemZ/SystemZFrameLowering.h +++ b/llvm/lib/Target/SystemZ/SystemZFrameLowering.h @@ -32,7 +32,7 @@ class SystemZFrameLowering : public TargetFrameLowering { RegScavenger *RS) const override; bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBII, diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp index d89a1d59399291..39f73d9fb5858b 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.cpp +++ b/llvm/lib/Target/X86/X86FrameLowering.cpp @@ -2061,8 +2061,7 @@ bool X86FrameLowering::assignCalleeSavedSpillSlots( bool X86FrameLowering::spillCalleeSavedRegisters( MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { + ArrayRef CSI, const TargetRegisterInfo *TRI) const { DebugLoc DL = MBB.findDebugLoc(MI); // Don't save CSRs in 32-bit EH funclets. The caller saves EBX, EBP, ESI, EDI diff --git a/llvm/lib/Target/X86/X86FrameLowering.h b/llvm/lib/Target/X86/X86FrameLowering.h index 24f4a0346d7d2e..a59ad175b11c7b 100644 --- a/llvm/lib/Target/X86/X86FrameLowering.h +++ b/llvm/lib/Target/X86/X86FrameLowering.h @@ -83,7 +83,7 @@ class X86FrameLowering : public TargetFrameLowering { bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, - const std::vector &CSI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp index fd8b37e26e471c..30a01c1aeb3403 100644 --- a/llvm/lib/Target/XCore/XCoreFrameLowering.cpp +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.cpp @@ -412,11 +412,9 @@ void XCoreFrameLowering::emitEpilogue(MachineFunction &MF, } // else Don't erase the return instruction. } -bool XCoreFrameLowering:: -spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const { +bool XCoreFrameLowering::spillCalleeSavedRegisters( + MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, + ArrayRef CSI, const TargetRegisterInfo *TRI) const { if (CSI.empty()) return true; @@ -429,8 +427,7 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB, if (MI != MBB.end() && !MI->isDebugInstr()) DL = MI->getDebugLoc(); - for (std::vector::const_iterator it = CSI.begin(); - it != CSI.end(); ++it) { + for (auto it = CSI.begin(); it != CSI.end(); ++it) { unsigned Reg = it->getReg(); assert(Reg != XCore::LR && !(Reg == XCore::R10 && hasFP(*MF)) && "LR & FP are always handled in emitPrologue"); diff --git a/llvm/lib/Target/XCore/XCoreFrameLowering.h b/llvm/lib/Target/XCore/XCoreFrameLowering.h index 95c3a2973033d9..02ea4185bed9b4 100644 --- a/llvm/lib/Target/XCore/XCoreFrameLowering.h +++ b/llvm/lib/Target/XCore/XCoreFrameLowering.h @@ -31,10 +31,11 @@ namespace llvm { void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; - bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, - MachineBasicBlock::iterator MI, - const std::vector &CSI, - const TargetRegisterInfo *TRI) const override; + bool + spillCalleeSavedRegisters(MachineBasicBlock &MBB, + MachineBasicBlock::iterator MI, + ArrayRef CSI, + const TargetRegisterInfo *TRI) const override; bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, std::vector &CSI,