diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp index 58d8ce2f1e67d..5e0755e47bbfb 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp @@ -2436,6 +2436,16 @@ SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, const SDLoc &dl) { EVT OpVT = N1.getValueType(); + auto GetUndefBooleanConstant = [&]() { + if (VT.getScalarType() == MVT::i1 || + TLI->getBooleanContents(OpVT) == + TargetLowering::UndefinedBooleanContent) + return getUNDEF(VT); + // ZeroOrOne / ZeroOrNegative require specific values for the high bits, + // so we cannot use getUNDEF(). Return zero instead. + return getConstant(0, dl, VT); + }; + // These setcc operations always fold. switch (Cond) { default: break; @@ -2465,12 +2475,12 @@ SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2, // icmp eq/ne X, undef -> undef. if ((N1.isUndef() || N2.isUndef()) && (Cond == ISD::SETEQ || Cond == ISD::SETNE)) - return getUNDEF(VT); + return GetUndefBooleanConstant(); // If both operands are undef, we can return undef for int comparison. // icmp undef, undef -> undef. if (N1.isUndef() && N2.isUndef()) - return getUNDEF(VT); + return GetUndefBooleanConstant(); // icmp X, X -> true/false // icmp X, undef -> true/false because undef could be X. @@ -2496,34 +2506,34 @@ SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2, switch (Cond) { default: break; case ISD::SETEQ: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETOEQ: return getBoolConstant(R==APFloat::cmpEqual, dl, VT, OpVT); case ISD::SETNE: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETONE: return getBoolConstant(R==APFloat::cmpGreaterThan || R==APFloat::cmpLessThan, dl, VT, OpVT); case ISD::SETLT: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETOLT: return getBoolConstant(R==APFloat::cmpLessThan, dl, VT, OpVT); case ISD::SETGT: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETOGT: return getBoolConstant(R==APFloat::cmpGreaterThan, dl, VT, OpVT); case ISD::SETLE: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETOLE: return getBoolConstant(R==APFloat::cmpLessThan || R==APFloat::cmpEqual, dl, VT, OpVT); case ISD::SETGE: if (R==APFloat::cmpUnordered) - return getUNDEF(VT); + return GetUndefBooleanConstant(); [[fallthrough]]; case ISD::SETOGE: return getBoolConstant(R==APFloat::cmpGreaterThan || R==APFloat::cmpEqual, dl, VT, OpVT); @@ -2568,7 +2578,7 @@ SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1, SDValue N2, case 1: // Known true. return getBoolConstant(true, dl, VT, OpVT); case 2: // Undefined. - return getUNDEF(VT); + return GetUndefBooleanConstant(); } } diff --git a/llvm/test/CodeGen/X86/avx512-insert-extract.ll b/llvm/test/CodeGen/X86/avx512-insert-extract.ll index f3e73c4fd85d5..89b245b4ca8ef 100644 --- a/llvm/test/CodeGen/X86/avx512-insert-extract.ll +++ b/llvm/test/CodeGen/X86/avx512-insert-extract.ll @@ -1878,10 +1878,11 @@ define i96 @test_insertelement_variable_v96i1(<96 x i8> %a, i8 %b, i32 %index) n ; KNL-NEXT: vpinsrb $14, 720(%rbp), %xmm3, %xmm3 ; KNL-NEXT: vpinsrb $15, 728(%rbp), %xmm3, %xmm3 ; KNL-NEXT: vinserti128 $1, %xmm3, %ymm2, %ymm2 -; KNL-NEXT: vpcmpeqb %ymm0, %ymm2, %ymm0 -; KNL-NEXT: vpternlogq $15, %zmm0, %zmm0, %zmm0 +; KNL-NEXT: vpcmpeqb %ymm0, %ymm2, %ymm2 +; KNL-NEXT: vpternlogq $15, %zmm2, %zmm2, %zmm2 ; KNL-NEXT: cmpb $0, 736(%rbp) ; KNL-NEXT: vmovdqa %ymm0, {{[0-9]+}}(%rsp) +; KNL-NEXT: vmovdqa %ymm2, {{[0-9]+}}(%rsp) ; KNL-NEXT: vmovdqa64 %zmm1, (%rsp) ; KNL-NEXT: setne (%rsp,%rax) ; KNL-NEXT: vpmovsxbd (%rsp), %zmm0 diff --git a/llvm/test/CodeGen/X86/setcc.ll b/llvm/test/CodeGen/X86/setcc.ll index cd28df0a1244c..c38318d5f6a25 100644 --- a/llvm/test/CodeGen/X86/setcc.ll +++ b/llvm/test/CodeGen/X86/setcc.ll @@ -339,17 +339,16 @@ define i32 @PR55138(i32 %x) { ret i32 %and } -; FIXME: Miscompile. define i64 @pr63055(double %arg) { ; X86-LABEL: pr63055: ; X86: ## %bb.0: -; X86-NEXT: movl $255, %eax +; X86-NEXT: movl $1, %eax ; X86-NEXT: xorl %edx, %edx ; X86-NEXT: retl ; ; X64-LABEL: pr63055: ; X64: ## %bb.0: -; X64-NEXT: movl $255, %eax +; X64-NEXT: movl $1, %eax ; X64-NEXT: retq %fcmp = fcmp une double 0x7FF8000000000000, %arg %ext = zext i1 %fcmp to i64