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Revert Register/MCRegister: Add conversion operators to avoid use of …

…implicit convert to unsigned. NFC

MSVC finds ambiguity where clang doesn't and it looks like it's not going to be an easy fix
Reverting while I figure out how to fix it

This reverts r367916 (git commit aa15ec3)
This reverts r367920 (git commit 5d14efe)

llvm-svn: 367932
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dsandersllvm committed Aug 5, 2019
1 parent 924d213 commit eac86ec25f5cd5d7a973c913d3c2ca8c90b24115
@@ -113,19 +113,6 @@ class Register {
bool isValid() const {
return Reg != 0;
}

/// Comparisons between register objects
bool operator==(const Register &Other) const { return Reg == Other.Reg; }
bool operator!=(const Register &Other) const { return Reg != Other.Reg; }

/// Comparisons against register constants. E.g.
/// * R == AArch64::WZR
/// * R == 0
/// * R == VirtRegMap::NO_PHYS_REG
bool operator==(unsigned Other) const { return Reg == Other; }
bool operator!=(unsigned Other) const { return Reg != Other; }
bool operator==(int Other) const { return Reg == unsigned(Other); }
bool operator!=(int Other) const { return Reg != unsigned(Other); }
};

// Provide DenseMapInfo for Register
@@ -63,19 +63,6 @@ class MCRegister {
bool isValid() const {
return Reg != 0;
}

/// Comparisons between register objects
bool operator==(const MCRegister &Other) const { return Reg == Other.Reg; }
bool operator!=(const MCRegister &Other) const { return Reg != Other.Reg; }

/// Comparisons against register constants. E.g.
/// * R == AArch64::WZR
/// * R == 0
/// * R == VirtRegMap::NO_PHYS_REG
bool operator==(unsigned Other) const { return Reg == Other; }
bool operator!=(unsigned Other) const { return Reg != Other; }
bool operator==(int Other) const { return Reg == unsigned(Other); }
bool operator!=(int Other) const { return Reg != unsigned(Other); }
};

// Provide DenseMapInfo for MCRegister
@@ -499,7 +499,7 @@ MachineBasicBlock::addLiveIn(MCPhysReg PhysReg, const TargetRegisterClass *RC) {
// Look for an existing copy.
if (LiveIn)
for (;I != E && I->isCopy(); ++I)
if (I->getOperand(1).getReg() == Register(PhysReg)) {
if (I->getOperand(1).getReg() == PhysReg) {
unsigned VirtReg = I->getOperand(0).getReg();
if (!MRI.constrainRegClass(VirtReg, RC))
llvm_unreachable("Incompatible live-in register class.");

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