diff --git a/llvm/test/CodeGen/X86/bool-vector.ll b/llvm/test/CodeGen/X86/bool-vector.ll index ae4bcd5c8a26de..d0de7b2ca625d3 100644 --- a/llvm/test/CodeGen/X86/bool-vector.ll +++ b/llvm/test/CodeGen/X86/bool-vector.ll @@ -1,42 +1,30 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X32 -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32-SSE2 -; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32-AVX2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefix=X64 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64-SSE2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64-AVX2 +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefixes=X86 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s --check-prefixes=X64 +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2,X86-SSE2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE2,X64-SSE2 +; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,X86-AVX2 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX2,X64-AVX2 define i32 @PR15215_bad(<4 x i32> %input) { -; X32-LABEL: PR15215_bad: -; X32: # %bb.0: # %entry -; X32-NEXT: movb {{[0-9]+}}(%esp), %al -; X32-NEXT: movb {{[0-9]+}}(%esp), %cl -; X32-NEXT: movb {{[0-9]+}}(%esp), %dl -; X32-NEXT: movb {{[0-9]+}}(%esp), %ah -; X32-NEXT: addb %ah, %ah -; X32-NEXT: andb $1, %dl -; X32-NEXT: orb %ah, %dl -; X32-NEXT: shlb $2, %dl -; X32-NEXT: addb %cl, %cl -; X32-NEXT: andb $1, %al -; X32-NEXT: orb %cl, %al -; X32-NEXT: andb $3, %al -; X32-NEXT: orb %dl, %al -; X32-NEXT: movzbl %al, %eax -; X32-NEXT: andl $15, %eax -; X32-NEXT: retl -; -; X32-SSE2-LABEL: PR15215_bad: -; X32-SSE2: # %bb.0: # %entry -; X32-SSE2-NEXT: pslld $31, %xmm0 -; X32-SSE2-NEXT: movmskps %xmm0, %eax -; X32-SSE2-NEXT: retl -; -; X32-AVX2-LABEL: PR15215_bad: -; X32-AVX2: # %bb.0: # %entry -; X32-AVX2-NEXT: vpslld $31, %xmm0, %xmm0 -; X32-AVX2-NEXT: vmovmskps %xmm0, %eax -; X32-AVX2-NEXT: retl +; X86-LABEL: PR15215_bad: +; X86: # %bb.0: # %entry +; X86-NEXT: movb {{[0-9]+}}(%esp), %al +; X86-NEXT: movb {{[0-9]+}}(%esp), %cl +; X86-NEXT: movb {{[0-9]+}}(%esp), %dl +; X86-NEXT: movb {{[0-9]+}}(%esp), %ah +; X86-NEXT: addb %ah, %ah +; X86-NEXT: andb $1, %dl +; X86-NEXT: orb %ah, %dl +; X86-NEXT: shlb $2, %dl +; X86-NEXT: addb %cl, %cl +; X86-NEXT: andb $1, %al +; X86-NEXT: orb %cl, %al +; X86-NEXT: andb $3, %al +; X86-NEXT: orb %dl, %al +; X86-NEXT: movzbl %al, %eax +; X86-NEXT: andl $15, %eax +; X86-NEXT: retl ; ; X64-LABEL: PR15215_bad: ; X64: # %bb.0: # %entry @@ -53,17 +41,17 @@ define i32 @PR15215_bad(<4 x i32> %input) { ; X64-NEXT: andl $15, %eax ; X64-NEXT: retq ; -; X64-SSE2-LABEL: PR15215_bad: -; X64-SSE2: # %bb.0: # %entry -; X64-SSE2-NEXT: pslld $31, %xmm0 -; X64-SSE2-NEXT: movmskps %xmm0, %eax -; X64-SSE2-NEXT: retq +; SSE2-LABEL: PR15215_bad: +; SSE2: # %bb.0: # %entry +; SSE2-NEXT: pslld $31, %xmm0 +; SSE2-NEXT: movmskps %xmm0, %eax +; SSE2-NEXT: ret{{[l|q]}} ; -; X64-AVX2-LABEL: PR15215_bad: -; X64-AVX2: # %bb.0: # %entry -; X64-AVX2-NEXT: vpslld $31, %xmm0, %xmm0 -; X64-AVX2-NEXT: vmovmskps %xmm0, %eax -; X64-AVX2-NEXT: retq +; AVX2-LABEL: PR15215_bad: +; AVX2: # %bb.0: # %entry +; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 +; AVX2-NEXT: vmovmskps %xmm0, %eax +; AVX2-NEXT: ret{{[l|q]}} entry: %0 = trunc <4 x i32> %input to <4 x i1> %1 = bitcast <4 x i1> %0 to i4 @@ -72,37 +60,25 @@ entry: } define i32 @PR15215_good(<4 x i32> %input) { -; X32-LABEL: PR15215_good: -; X32: # %bb.0: # %entry -; X32-NEXT: pushl %esi -; X32-NEXT: .cfi_def_cfa_offset 8 -; X32-NEXT: .cfi_offset %esi, -8 -; X32-NEXT: movl {{[0-9]+}}(%esp), %eax -; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: movl {{[0-9]+}}(%esp), %edx -; X32-NEXT: movl {{[0-9]+}}(%esp), %esi -; X32-NEXT: andl $1, %esi -; X32-NEXT: andl $1, %edx -; X32-NEXT: andl $1, %ecx -; X32-NEXT: andl $1, %eax -; X32-NEXT: leal (%esi,%edx,2), %edx -; X32-NEXT: leal (%edx,%ecx,4), %ecx -; X32-NEXT: leal (%ecx,%eax,8), %eax -; X32-NEXT: popl %esi -; X32-NEXT: .cfi_def_cfa_offset 4 -; X32-NEXT: retl -; -; X32-SSE2-LABEL: PR15215_good: -; X32-SSE2: # %bb.0: # %entry -; X32-SSE2-NEXT: pslld $31, %xmm0 -; X32-SSE2-NEXT: movmskps %xmm0, %eax -; X32-SSE2-NEXT: retl -; -; X32-AVX2-LABEL: PR15215_good: -; X32-AVX2: # %bb.0: # %entry -; X32-AVX2-NEXT: vpslld $31, %xmm0, %xmm0 -; X32-AVX2-NEXT: vmovmskps %xmm0, %eax -; X32-AVX2-NEXT: retl +; X86-LABEL: PR15215_good: +; X86: # %bb.0: # %entry +; X86-NEXT: pushl %esi +; X86-NEXT: .cfi_def_cfa_offset 8 +; X86-NEXT: .cfi_offset %esi, -8 +; X86-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx +; X86-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-NEXT: movl {{[0-9]+}}(%esp), %esi +; X86-NEXT: andl $1, %esi +; X86-NEXT: andl $1, %edx +; X86-NEXT: andl $1, %ecx +; X86-NEXT: andl $1, %eax +; X86-NEXT: leal (%esi,%edx,2), %edx +; X86-NEXT: leal (%edx,%ecx,4), %ecx +; X86-NEXT: leal (%ecx,%eax,8), %eax +; X86-NEXT: popl %esi +; X86-NEXT: .cfi_def_cfa_offset 4 +; X86-NEXT: retl ; ; X64-LABEL: PR15215_good: ; X64: # %bb.0: # %entry @@ -119,17 +95,17 @@ define i32 @PR15215_good(<4 x i32> %input) { ; X64-NEXT: leal (%rax,%rcx,8), %eax ; X64-NEXT: retq ; -; X64-SSE2-LABEL: PR15215_good: -; X64-SSE2: # %bb.0: # %entry -; X64-SSE2-NEXT: pslld $31, %xmm0 -; X64-SSE2-NEXT: movmskps %xmm0, %eax -; X64-SSE2-NEXT: retq +; SSE2-LABEL: PR15215_good: +; SSE2: # %bb.0: # %entry +; SSE2-NEXT: pslld $31, %xmm0 +; SSE2-NEXT: movmskps %xmm0, %eax +; SSE2-NEXT: ret{{[l|q]}} ; -; X64-AVX2-LABEL: PR15215_good: -; X64-AVX2: # %bb.0: # %entry -; X64-AVX2-NEXT: vpslld $31, %xmm0, %xmm0 -; X64-AVX2-NEXT: vmovmskps %xmm0, %eax -; X64-AVX2-NEXT: retq +; AVX2-LABEL: PR15215_good: +; AVX2: # %bb.0: # %entry +; AVX2-NEXT: vpslld $31, %xmm0, %xmm0 +; AVX2-NEXT: vmovmskps %xmm0, %eax +; AVX2-NEXT: ret{{[l|q]}} entry: %0 = trunc <4 x i32> %input to <4 x i1> %1 = extractelement <4 x i1> %0, i32 0