diff --git a/llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp b/llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
index b19090adfbc00..0aad16c15353d 100644
--- a/llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
+++ b/llvm/lib/Target/CSKY/CSKYConstantIslandPass.cpp
@@ -905,8 +905,7 @@ static inline unsigned getUnconditionalBrDisp(int Opc) {
     Scale = 2;
     break;
   default:
-    assert(0);
-    break;
+    llvm_unreachable("");
   }
 
   unsigned MaxOffs = ((1 << (Bits - 1)) - 1) * Scale;
diff --git a/llvm/lib/Target/CSKY/CSKYInstrFormats.td b/llvm/lib/Target/CSKY/CSKYInstrFormats.td
index 9b6ef9ca23db5..8144a501b3d27 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrFormats.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrFormats.td
@@ -655,7 +655,7 @@ class R_Z_1<bits<6> sop, bits<5> pcode, string op>
 
 // Format< OP[6] | RZ[5] | 00000[5] | SOP[6] | PCODE[5] | 00000[5] >
 // Instructions:(2) clrf32, clrt32
-class R_Z_2<bits<6> sop, bits<5> pcode, string op, list<dag> pattern>
+class R_Z_2<bits<6> sop, bits<5> pcode, string op>
     : CSKY32Inst<AddrModeNone, 0x31, (outs GPR:$rz),
     (ins CARRY:$ca, GPR:$false), !strconcat(op, "\t$rz"), []> {
   bits<5> rz;
diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp b/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
index 628e949fd60c4..5eb7bb700790e 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.cpp
@@ -476,9 +476,6 @@ void CSKYInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
                                 MachineBasicBlock::iterator I,
                                 const DebugLoc &DL, MCRegister DestReg,
                                 MCRegister SrcReg, bool KillSrc) const {
-
-  MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
-
   if (CSKY::GPRRegClass.contains(SrcReg) &&
       CSKY::CARRYRegClass.contains(DestReg)) {
     if (STI.hasE2()) {
diff --git a/llvm/lib/Target/CSKY/CSKYInstrInfo.td b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
index 28e364ce48743..300ecceae9060 100644
--- a/llvm/lib/Target/CSKY/CSKYInstrInfo.td
+++ b/llvm/lib/Target/CSKY/CSKYInstrInfo.td
@@ -734,8 +734,8 @@ let Predicates= [iHasE2] in {
 
 let Predicates = [iHas2E3] in {
   def MVCV32 : R_Z_1<0x1, 0x10, "mvcv32">;
-  def CLRF32 : R_Z_2<0xB, 0x1, "clrf32", []>;
-  def CLRT32 : R_Z_2<0xB, 0x2, "clrt32", []>;
+  def CLRF32 : R_Z_2<0xB, 0x1, "clrf32">;
+  def CLRT32 : R_Z_2<0xB, 0x2, "clrt32">;
 }
 
 //===----------------------------------------------------------------------===//
@@ -1363,4 +1363,4 @@ def CONSTPOOL_ENTRY : CSKYPseudo<(outs),
 include "CSKYInstrInfo16Instr.td"
 include "CSKYInstrInfoF1.td"
 include "CSKYInstrInfoF2.td"
-include "CSKYInstrAlias.td"
\ No newline at end of file
+include "CSKYInstrAlias.td"
diff --git a/llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h b/llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h
index b6e303f8ccfb5..36691a7a798a0 100644
--- a/llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h
+++ b/llvm/lib/Target/CSKY/CSKYMachineFunctionInfo.h
@@ -18,8 +18,6 @@
 namespace llvm {
 
 class CSKYMachineFunctionInfo : public MachineFunctionInfo {
-  MachineFunction &MF;
-
   Register GlobalBaseReg = 0;
   bool SpillsCR = false;
 
@@ -33,7 +31,7 @@ class CSKYMachineFunctionInfo : public MachineFunctionInfo {
   unsigned PICLabelUId = 0;
 
 public:
-  CSKYMachineFunctionInfo(MachineFunction &MF) : MF(MF) {}
+  CSKYMachineFunctionInfo(MachineFunction &) {}
 
   Register getGlobalBaseReg() const { return GlobalBaseReg; }
   void setGlobalBaseReg(Register Reg) { GlobalBaseReg = Reg; }
diff --git a/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp b/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp
index b0ee915904102..898523ce32c9a 100644
--- a/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp
+++ b/llvm/lib/Target/CSKY/Disassembler/CSKYDisassembler.cpp
@@ -33,7 +33,6 @@ typedef MCDisassembler::DecodeStatus DecodeStatus;
 namespace {
 class CSKYDisassembler : public MCDisassembler {
   std::unique_ptr<MCInstrInfo const> const MCII;
-  mutable bool inDataRegion = false;
   mutable StringRef symbolName;
 
   DecodeStatus handleCROperand(MCInst &Instr) const;
@@ -166,6 +165,8 @@ static DecodeStatus DecodeFPR64RegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
+// TODO
+LLVM_ATTRIBUTE_UNUSED
 static DecodeStatus DecodesFPR128RegisterClass(MCInst &Inst, uint64_t RegNo,
                                                uint64_t Address,
                                                const MCDisassembler *Decoder) {
@@ -196,6 +197,8 @@ static DecodeStatus DecodemGPRRegisterClass(MCInst &Inst, uint64_t RegNo,
   return MCDisassembler::Success;
 }
 
+// TODO
+LLVM_ATTRIBUTE_UNUSED
 static DecodeStatus DecodeGPRSPRegisterClass(MCInst &Inst, uint64_t RegNo,
                                              uint64_t Address,
                                              const MCDisassembler *Decoder) {
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp
index a07e6282cf8f1..d7cc4c8525ee2 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFObjectWriter.cpp
@@ -121,6 +121,7 @@ unsigned CSKYELFObjectWriter::getRelocType(MCContext &Ctx,
         return ELF::R_CKCORE_ADDR32;
       }
     }
+    return ELF::R_CKCORE_NONE;
   case FK_Data_8:
     Ctx.reportError(Fixup.getLoc(), "8-byte data relocations not supported");
     return ELF::R_CKCORE_NONE;
diff --git a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.h b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.h
index 17f96ea6e1fd8..b7931e9222792 100644
--- a/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.h
+++ b/llvm/lib/Target/CSKY/MCTargetDesc/CSKYELFStreamer.h
@@ -137,7 +137,7 @@ class CSKYELFStreamer : public MCELFStreamer {
     EmitMappingSymbol("$d");
     MCELFStreamer::emitValueImpl(Value, Size, Loc);
   }
-  void reset() {
+  void reset() override {
     MappingSymbolCounter = 0;
     State = EMS_None;
     MCELFStreamer::reset();