From f35d482ffdaf6cf540fa619596ffcb3af17f6c88 Mon Sep 17 00:00:00 2001 From: Nick Desaulniers Date: Wed, 21 Dec 2022 12:28:37 -0800 Subject: [PATCH] [llvm][AArch64ISelDAGToDAG] support -{start|stop}-{before|after}=aarch64-isel Follow a similar pattern as AMDGPUDAGToDAGISel's constructor so that we can use INITIALIZE_PASS to register a pass. This allows for more fine grain testability of SelectionDAGISel via: llc -stop-{before,after}=aarch64-isel Link: https://github.com/llvm/llvm-project/issues/59538 See also: https://reviews.llvm.org/D140323 Reviewed By: MaskRay Differential Revision: https://reviews.llvm.org/D140331 --- llvm/lib/Target/AArch64/AArch64.h | 1 + llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp | 7 +++---- llvm/lib/Target/AArch64/AArch64TargetMachine.cpp | 1 + 3 files changed, 5 insertions(+), 4 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64.h b/llvm/lib/Target/AArch64/AArch64.h index 72fb6f4bd92ac..6ef0c804ede36 100644 --- a/llvm/lib/Target/AArch64/AArch64.h +++ b/llvm/lib/Target/AArch64/AArch64.h @@ -81,6 +81,7 @@ void initializeAArch64CompressJumpTablesPass(PassRegistry&); void initializeAArch64CondBrTuningPass(PassRegistry &); void initializeAArch64ConditionOptimizerPass(PassRegistry&); void initializeAArch64ConditionalComparesPass(PassRegistry &); +void initializeAArch64DAGToDAGISelPass(PassRegistry &); void initializeAArch64DeadRegisterDefinitionsPass(PassRegistry&); void initializeAArch64ExpandPseudoPass(PassRegistry &); void initializeAArch64KCFIPass(PassRegistry &); diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp index ab454109826bf..0a5eb0ee4c109 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp @@ -29,6 +29,7 @@ using namespace llvm; #define DEBUG_TYPE "aarch64-isel" +#define PASS_NAME "AArch64 Instruction Selection" //===--------------------------------------------------------------------===// /// AArch64DAGToDAGISel - AArch64 specific code to select AArch64 machine @@ -51,10 +52,6 @@ class AArch64DAGToDAGISel : public SelectionDAGISel { CodeGenOpt::Level OptLevel) : SelectionDAGISel(ID, tm, OptLevel), Subtarget(nullptr) {} - StringRef getPassName() const override { - return "AArch64 Instruction Selection"; - } - bool runOnMachineFunction(MachineFunction &MF) override { Subtarget = &MF.getSubtarget(); return SelectionDAGISel::runOnMachineFunction(MF); @@ -425,6 +422,8 @@ class AArch64DAGToDAGISel : public SelectionDAGISel { char AArch64DAGToDAGISel::ID = 0; +INITIALIZE_PASS(AArch64DAGToDAGISel, DEBUG_TYPE, PASS_NAME, false, false) + /// isIntImmediate - This method tests to see if the node is a constant /// operand. If so Imm will receive the 32-bit value. static bool isIntImmediate(const SDNode *N, uint64_t &Imm) { diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index 037745c83ca75..896b9f9bcdc8d 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -237,6 +237,7 @@ extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAArch64Target() { initializeAArch64StackTaggingPass(*PR); initializeAArch64StackTaggingPreRAPass(*PR); initializeAArch64LowerHomogeneousPrologEpilogPass(*PR); + initializeAArch64DAGToDAGISelPass(*PR); } //===----------------------------------------------------------------------===//