diff --git a/clang/lib/AST/ASTContext.cpp b/clang/lib/AST/ASTContext.cpp
index d5611f8f953f6..d5b08649cbca3 100644
--- a/clang/lib/AST/ASTContext.cpp
+++ b/clang/lib/AST/ASTContext.cpp
@@ -9599,7 +9599,8 @@ bool ASTContext::areCompatibleRVVTypes(QualType FirstType,
                  VT->getElementType().getCanonicalType() ==
                      FirstType->getRVVEltType(*this);
         if (VT->getVectorKind() == VectorType::GenericVector)
-          return getTypeSize(SecondType) == getRVVTypeSize(*this, BT) &&
+          return FirstType->isRVVVLSBuiltinType() &&
+                 getTypeSize(SecondType) == getRVVTypeSize(*this, BT) &&
                  hasSameType(VT->getElementType(),
                              getBuiltinVectorTypeInfo(BT).ElementType);
       }
@@ -9623,6 +9624,9 @@ bool ASTContext::areLaxCompatibleRVVTypes(QualType FirstType,
     if (!BT)
       return false;
 
+    if (!BT->isRVVVLSBuiltinType())
+      return false;
+
     const auto *VecTy = SecondType->getAs<VectorType>();
     if (VecTy &&
         (VecTy->getVectorKind() == VectorType::RVVFixedLengthDataVector ||
diff --git a/clang/test/Sema/attr-riscv-rvv-vector-bits.c b/clang/test/Sema/attr-riscv-rvv-vector-bits.c
index bc1a70830eafc..e23f490427dec 100644
--- a/clang/test/Sema/attr-riscv-rvv-vector-bits.c
+++ b/clang/test/Sema/attr-riscv-rvv-vector-bits.c
@@ -17,6 +17,8 @@ typedef __rvv_uint64m1_t vuint64m1_t;
 typedef __rvv_float32m1_t vfloat32m1_t;
 typedef __rvv_float64m1_t vfloat64m1_t;
 
+typedef __rvv_int32m2_t vint32m2_t;
+
 // Define valid fixed-width RVV types
 typedef vint8m1_t fixed_int8m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
 typedef vint16m1_t fixed_int16m1_t __attribute__((riscv_rvv_vector_bits(__riscv_v_fixed_vlen)));
@@ -45,6 +47,8 @@ typedef uint64_t gnu_uint64m1_t __attribute__((vector_size(__riscv_v_fixed_vlen
 typedef float gnu_float32m1_t __attribute__((vector_size(__riscv_v_fixed_vlen / 8)));
 typedef double gnu_float64m1_t __attribute__((vector_size(__riscv_v_fixed_vlen / 8)));
 
+typedef int32_t gnu_int32m2_t __attribute__((vector_size((__riscv_v_fixed_vlen * 2) / 8)));
+
 // Attribute must have a single argument
 typedef vint8m1_t no_argument __attribute__((riscv_rvv_vector_bits));         // expected-error {{'riscv_rvv_vector_bits' attribute takes one argument}}
 typedef vint8m1_t two_arguments __attribute__((riscv_rvv_vector_bits(2, 4))); // expected-error {{'riscv_rvv_vector_bits' attribute takes one argument}}
@@ -217,6 +221,11 @@ TEST_CAST_VECTOR(uint64m1)
 TEST_CAST_VECTOR(float32m1)
 TEST_CAST_VECTOR(float64m1)
 
+// Test that casts only work for LMUL=1 types and don't crash.
+vint32m2_t to_vint32m2_t_from_gnut(gnu_int32m2_t x) { return x; } // expected-error-re {{returning 'gnu_int32m2_t' (vector of {{[0-9]+}} 'int32_t' values) from a function with incompatible result type 'vint32m2_t' (aka '__rvv_int32m2_t')}}
+
+gnu_int32m2_t to_gnut_from_svint32_t(vint32m2_t x) { return x; } // expected-error-re {{returning 'vint32m2_t' (aka '__rvv_int32m2_t') from a function with incompatible result type 'gnu_int32m2_t' (vector of {{[0-9]+}} 'int32_t' values)}}
+
 // --------------------------------------------------------------------------//
 // Test the scalable and fixed-length types can be used interchangeably