diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 52be35aafb0f5..f274da6f6f776 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1286,6 +1286,11 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::CTLZ, VT, Custom); } + if (Subtarget.hasGFNI()) { + setOperationAction(ISD::BITREVERSE, MVT::i32, Custom); + setOperationAction(ISD::BITREVERSE, MVT::i64, Custom); + } + // These might be better off as horizontal vector ops. setOperationAction(ISD::ADD, MVT::i16, Custom); setOperationAction(ISD::ADD, MVT::i32, Custom); @@ -1496,11 +1501,6 @@ X86TargetLowering::X86TargetLowering(const X86TargetMachine &TM, setOperationAction(ISD::TRUNCATE, MVT::v32i32, Custom); setOperationAction(ISD::TRUNCATE, MVT::v32i64, Custom); - if (Subtarget.hasGFNI()) { - setOperationAction(ISD::BITREVERSE, MVT::i32, Custom); - setOperationAction(ISD::BITREVERSE, MVT::i64, Custom); - } - for (auto VT : { MVT::v32i8, MVT::v16i16, MVT::v8i32, MVT::v4i64 }) { setOperationAction(ISD::SETCC, VT, Custom); setOperationAction(ISD::CTPOP, VT, Custom); @@ -31337,12 +31337,9 @@ static SDValue LowerBITREVERSE(SDValue Op, const X86Subtarget &Subtarget, if (VT.is256BitVector() && !Subtarget.hasInt256()) return splitVectorIntUnary(Op, DAG, DL); - // Lower i32/i64 to GFNI as vXi8 BITREVERSE + BSWAP + // Lower i32/i64 as vXi8 BITREVERSE + BSWAP if (!VT.isVector()) { - - assert((VT.getScalarType() == MVT::i32) || - (VT.getScalarType() == MVT::i64)); - + assert((VT == MVT::i32 || VT == MVT::i64) && "Only tested for i32/i64"); MVT VecVT = MVT::getVectorVT(VT, 128 / VT.getSizeInBits()); SDValue Res = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, VecVT, In); Res = DAG.getNode(ISD::BITREVERSE, DL, MVT::v16i8, diff --git a/llvm/test/CodeGen/X86/vector-bitreverse.ll b/llvm/test/CodeGen/X86/vector-bitreverse.ll index 1c5326d35bb00..b22b508db8b28 100644 --- a/llvm/test/CodeGen/X86/vector-bitreverse.ll +++ b/llvm/test/CodeGen/X86/vector-bitreverse.ll @@ -254,24 +254,10 @@ define i32 @test_bitreverse_i32(i32 %a) nounwind { ; ; GFNISSE-LABEL: test_bitreverse_i32: ; GFNISSE: # %bb.0: -; GFNISSE-NEXT: # kill: def $edi killed $edi def $rdi -; GFNISSE-NEXT: bswapl %edi -; GFNISSE-NEXT: movl %edi, %eax -; GFNISSE-NEXT: andl $252645135, %eax # imm = 0xF0F0F0F -; GFNISSE-NEXT: shll $4, %eax -; GFNISSE-NEXT: shrl $4, %edi -; GFNISSE-NEXT: andl $252645135, %edi # imm = 0xF0F0F0F -; GFNISSE-NEXT: orl %eax, %edi -; GFNISSE-NEXT: movl %edi, %eax -; GFNISSE-NEXT: andl $858993459, %eax # imm = 0x33333333 -; GFNISSE-NEXT: shrl $2, %edi -; GFNISSE-NEXT: andl $858993459, %edi # imm = 0x33333333 -; GFNISSE-NEXT: leal (%rdi,%rax,4), %eax -; GFNISSE-NEXT: movl %eax, %ecx -; GFNISSE-NEXT: andl $1431655765, %ecx # imm = 0x55555555 -; GFNISSE-NEXT: shrl %eax -; GFNISSE-NEXT: andl $1431655765, %eax # imm = 0x55555555 -; GFNISSE-NEXT: leal (%rax,%rcx,2), %eax +; GFNISSE-NEXT: movd %edi, %xmm0 +; GFNISSE-NEXT: gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; GFNISSE-NEXT: movd %xmm0, %eax +; GFNISSE-NEXT: bswapl %eax ; GFNISSE-NEXT: retq ; ; GFNIAVX-LABEL: test_bitreverse_i32: @@ -343,26 +329,10 @@ define i64 @test_bitreverse_i64(i64 %a) nounwind { ; ; GFNISSE-LABEL: test_bitreverse_i64: ; GFNISSE: # %bb.0: -; GFNISSE-NEXT: bswapq %rdi -; GFNISSE-NEXT: movq %rdi, %rax -; GFNISSE-NEXT: shrq $4, %rax -; GFNISSE-NEXT: movabsq $1085102592571150095, %rcx # imm = 0xF0F0F0F0F0F0F0F -; GFNISSE-NEXT: andq %rcx, %rax -; GFNISSE-NEXT: andq %rcx, %rdi -; GFNISSE-NEXT: shlq $4, %rdi -; GFNISSE-NEXT: orq %rax, %rdi -; GFNISSE-NEXT: movabsq $3689348814741910323, %rax # imm = 0x3333333333333333 -; GFNISSE-NEXT: movq %rdi, %rcx -; GFNISSE-NEXT: andq %rax, %rcx -; GFNISSE-NEXT: shrq $2, %rdi -; GFNISSE-NEXT: andq %rax, %rdi -; GFNISSE-NEXT: leaq (%rdi,%rcx,4), %rax -; GFNISSE-NEXT: movabsq $6148914691236517205, %rcx # imm = 0x5555555555555555 -; GFNISSE-NEXT: movq %rax, %rdx -; GFNISSE-NEXT: andq %rcx, %rdx -; GFNISSE-NEXT: shrq %rax -; GFNISSE-NEXT: andq %rcx, %rax -; GFNISSE-NEXT: leaq (%rax,%rdx,2), %rax +; GFNISSE-NEXT: movq %rdi, %xmm0 +; GFNISSE-NEXT: gf2p8affineqb $0, {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0 +; GFNISSE-NEXT: movq %xmm0, %rax +; GFNISSE-NEXT: bswapq %rax ; GFNISSE-NEXT: retq ; ; GFNIAVX-LABEL: test_bitreverse_i64: