558 changes: 117 additions & 441 deletions lldb/source/Plugins/ABI/SysV-ppc64/ABISysV_ppc64.cpp
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2 changes: 2 additions & 0 deletions lldb/source/Plugins/ABI/SysV-ppc64/ABISysV_ppc64.h
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Expand Up @@ -108,6 +108,8 @@ class ABISysV_ppc64 : public lldb_private::ABI {
ABISysV_ppc64(lldb::ProcessSP process_sp) : lldb_private::ABI(process_sp) {
// Call CreateInstance instead.
}

lldb::ByteOrder GetByteOrder() const;
};

#endif // liblldb_ABISysV_ppc64_h_
331 changes: 331 additions & 0 deletions lldb/source/Plugins/Process/Utility/RegisterInfos_ppc64.h
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//===-- RegisterInfos_ppc64.h -----------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//

#ifdef DECLARE_REGISTER_INFOS_PPC64_STRUCT

// C Includes
#include <stddef.h>

// Computes the offset of the given GPR_PPC64 in the user data area.
#define GPR_PPC64_OFFSET(regname) (offsetof(GPR_PPC64, regname))
#define FPR_PPC64_OFFSET(regname) (offsetof(FPR_PPC64, regname) \
+ sizeof(GPR_PPC64))
#define VMX_PPC64_OFFSET(regname) (offsetof(VMX_PPC64, regname) \
+ sizeof(GPR_PPC64) + sizeof(FPR_PPC64))
#define GPR_PPC64_SIZE(regname) (sizeof(((GPR_PPC64 *)NULL)->regname))

#include "Utility/PPC64_DWARF_Registers.h"
#include "lldb-ppc64-register-enums.h"

// Note that the size and offset will be updated by platform-specific classes.
#define DEFINE_GPR_PPC64(reg, alt, lldb_kind) \
{ \
#reg, alt, GPR_PPC64_SIZE(reg), GPR_PPC64_OFFSET(reg), lldb::eEncodingUint,\
lldb::eFormatHex, \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, \
lldb_kind, \
LLDB_INVALID_REGNUM, \
gpr_##reg##_ppc64 }, \
NULL, NULL, NULL, 0 \
}
#define DEFINE_FPR_PPC64(reg, alt, lldb_kind) \
{ \
#reg, alt, 8, FPR_PPC64_OFFSET(reg), lldb::eEncodingIEEE754, \
lldb::eFormatFloat, \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
fpr_##reg##_ppc64 }, \
NULL, NULL, NULL, 0 \
}
#define DEFINE_VMX_PPC64(reg, lldb_kind) \
{ \
#reg, NULL, 16, VMX_PPC64_OFFSET(reg), lldb::eEncodingVector, \
lldb::eFormatVectorOfUInt32, \
{ppc64_dwarf::dwarf_##reg##_ppc64, \
ppc64_dwarf::dwarf_##reg##_ppc64, lldb_kind, LLDB_INVALID_REGNUM, \
vmx_##reg##_ppc64 }, \
NULL, NULL, NULL, 0 \
}

// General purpose registers.
// EH_Frame, Generic, Process Plugin
#define PPC64_REGS \
DEFINE_GPR_PPC64(r0, NULL, LLDB_INVALID_REGNUM) \
, DEFINE_GPR_PPC64(r1, "sp", LLDB_REGNUM_GENERIC_SP), \
DEFINE_GPR_PPC64(r2, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r3, "arg1", LLDB_REGNUM_GENERIC_ARG1), \
DEFINE_GPR_PPC64(r4, "arg2", LLDB_REGNUM_GENERIC_ARG2), \
DEFINE_GPR_PPC64(r5, "arg3", LLDB_REGNUM_GENERIC_ARG3), \
DEFINE_GPR_PPC64(r6, "arg4", LLDB_REGNUM_GENERIC_ARG4), \
DEFINE_GPR_PPC64(r7, "arg5", LLDB_REGNUM_GENERIC_ARG5), \
DEFINE_GPR_PPC64(r8, "arg6", LLDB_REGNUM_GENERIC_ARG6), \
DEFINE_GPR_PPC64(r9, "arg7", LLDB_REGNUM_GENERIC_ARG7), \
DEFINE_GPR_PPC64(r10, "arg8", LLDB_REGNUM_GENERIC_ARG8), \
DEFINE_GPR_PPC64(r11, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r12, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r13, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r14, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r15, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r16, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r17, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r18, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r19, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r20, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r21, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r22, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r23, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r24, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r25, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r26, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r27, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r28, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r29, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r30, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(r31, NULL, LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(cr, "cr", LLDB_REGNUM_GENERIC_FLAGS), \
DEFINE_GPR_PPC64(msr, "msr", LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(xer, "xer", LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(lr, "lr", LLDB_REGNUM_GENERIC_RA), \
DEFINE_GPR_PPC64(ctr, "ctr", LLDB_INVALID_REGNUM), \
DEFINE_GPR_PPC64(pc, "pc", LLDB_REGNUM_GENERIC_PC), \
DEFINE_FPR_PPC64(f0, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f1, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f2, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f3, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f4, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f5, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f6, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f7, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f8, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f9, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f10, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f11, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f12, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f13, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f14, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f15, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f16, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f17, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f18, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f19, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f20, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f21, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f22, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f23, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f24, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f25, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f26, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f27, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f28, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f29, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f30, NULL, LLDB_INVALID_REGNUM), \
DEFINE_FPR_PPC64(f31, NULL, LLDB_INVALID_REGNUM), \
{"fpscr", \
NULL, \
8, \
FPR_PPC64_OFFSET(fpscr), \
lldb::eEncodingUint, \
lldb::eFormatHex, \
{ppc64_dwarf::dwarf_fpscr_ppc64, \
ppc64_dwarf::dwarf_fpscr_ppc64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, fpr_fpscr_ppc64}, \
NULL, \
NULL, \
NULL, \
0}, \
DEFINE_VMX_PPC64(vr0, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr1, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr2, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr3, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr4, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr5, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr6, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr7, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr8, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr9, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr10, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr11, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr12, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr13, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr14, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr15, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr16, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr17, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr18, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr19, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr20, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr21, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr22, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr23, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr24, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr25, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr26, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr27, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr28, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr29, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr30, LLDB_INVALID_REGNUM), \
DEFINE_VMX_PPC64(vr31, LLDB_INVALID_REGNUM), \
{"vscr", \
NULL, \
4, \
VMX_PPC64_OFFSET(vscr), \
lldb::eEncodingUint, \
lldb::eFormatHex, \
{ppc64_dwarf::dwarf_vscr_ppc64, ppc64_dwarf::dwarf_vscr_ppc64, \
LLDB_INVALID_REGNUM, LLDB_INVALID_REGNUM, vmx_vscr_ppc64}, \
NULL, \
NULL, \
NULL, \
0}, \
{"vrsave", \
NULL, \
4, \
VMX_PPC64_OFFSET(vrsave), \
lldb::eEncodingUint, \
lldb::eFormatHex, \
{ppc64_dwarf::dwarf_vrsave_ppc64, \
ppc64_dwarf::dwarf_vrsave_ppc64, LLDB_INVALID_REGNUM, \
LLDB_INVALID_REGNUM, vmx_vrsave_ppc64}, \
NULL, \
NULL, \
NULL, \
0}, /* */

typedef struct _GPR_PPC64 {
uint64_t r0;
uint64_t r1;
uint64_t r2;
uint64_t r3;
uint64_t r4;
uint64_t r5;
uint64_t r6;
uint64_t r7;
uint64_t r8;
uint64_t r9;
uint64_t r10;
uint64_t r11;
uint64_t r12;
uint64_t r13;
uint64_t r14;
uint64_t r15;
uint64_t r16;
uint64_t r17;
uint64_t r18;
uint64_t r19;
uint64_t r20;
uint64_t r21;
uint64_t r22;
uint64_t r23;
uint64_t r24;
uint64_t r25;
uint64_t r26;
uint64_t r27;
uint64_t r28;
uint64_t r29;
uint64_t r30;
uint64_t r31;
uint64_t cr;
uint64_t msr;
uint64_t xer;
uint64_t lr;
uint64_t ctr;
uint64_t pc;
uint64_t pad[3];
} GPR_PPC64;

typedef struct _FPR_PPC64 {
uint64_t f0;
uint64_t f1;
uint64_t f2;
uint64_t f3;
uint64_t f4;
uint64_t f5;
uint64_t f6;
uint64_t f7;
uint64_t f8;
uint64_t f9;
uint64_t f10;
uint64_t f11;
uint64_t f12;
uint64_t f13;
uint64_t f14;
uint64_t f15;
uint64_t f16;
uint64_t f17;
uint64_t f18;
uint64_t f19;
uint64_t f20;
uint64_t f21;
uint64_t f22;
uint64_t f23;
uint64_t f24;
uint64_t f25;
uint64_t f26;
uint64_t f27;
uint64_t f28;
uint64_t f29;
uint64_t f30;
uint64_t f31;
uint64_t fpscr;
} FPR_PPC64;

typedef struct _VMX_PPC64 {
uint32_t vr0[4];
uint32_t vr1[4];
uint32_t vr2[4];
uint32_t vr3[4];
uint32_t vr4[4];
uint32_t vr5[4];
uint32_t vr6[4];
uint32_t vr7[4];
uint32_t vr8[4];
uint32_t vr9[4];
uint32_t vr10[4];
uint32_t vr11[4];
uint32_t vr12[4];
uint32_t vr13[4];
uint32_t vr14[4];
uint32_t vr15[4];
uint32_t vr16[4];
uint32_t vr17[4];
uint32_t vr18[4];
uint32_t vr19[4];
uint32_t vr20[4];
uint32_t vr21[4];
uint32_t vr22[4];
uint32_t vr23[4];
uint32_t vr24[4];
uint32_t vr25[4];
uint32_t vr26[4];
uint32_t vr27[4];
uint32_t vr28[4];
uint32_t vr29[4];
uint32_t vr30[4];
uint32_t vr31[4];
uint32_t pad[2];
uint32_t vscr[2];
uint32_t vrsave;
} VMX_PPC64;


static lldb_private::RegisterInfo g_register_infos_ppc64[] = {
PPC64_REGS
};

static_assert((sizeof(g_register_infos_ppc64) /
sizeof(g_register_infos_ppc64[0])) ==
k_num_registers_ppc64,
"g_register_infos_powerpc64 has wrong number of register infos");

#undef DEFINE_FPR_PPC64
#undef DEFINE_GPR_PPC64
#undef DEFINE_VMX_PPC64

#endif // DECLARE_REGISTER_INFOS_PPC64_STRUCT
139 changes: 139 additions & 0 deletions lldb/source/Plugins/Process/Utility/lldb-ppc64-register-enums.h
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//===-- lldb-ppc64-register-enums.h ---------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//

#ifndef lldb_ppc64_register_enums_h
#define lldb_ppc64_register_enums_h

// LLDB register codes (e.g. RegisterKind == eRegisterKindLLDB)

// ---------------------------------------------------------------------------
// Internal codes for all ppc64 registers.
// ---------------------------------------------------------------------------
enum {
k_first_gpr_ppc64,
gpr_r0_ppc64 = k_first_gpr_ppc64,
gpr_r1_ppc64,
gpr_r2_ppc64,
gpr_r3_ppc64,
gpr_r4_ppc64,
gpr_r5_ppc64,
gpr_r6_ppc64,
gpr_r7_ppc64,
gpr_r8_ppc64,
gpr_r9_ppc64,
gpr_r10_ppc64,
gpr_r11_ppc64,
gpr_r12_ppc64,
gpr_r13_ppc64,
gpr_r14_ppc64,
gpr_r15_ppc64,
gpr_r16_ppc64,
gpr_r17_ppc64,
gpr_r18_ppc64,
gpr_r19_ppc64,
gpr_r20_ppc64,
gpr_r21_ppc64,
gpr_r22_ppc64,
gpr_r23_ppc64,
gpr_r24_ppc64,
gpr_r25_ppc64,
gpr_r26_ppc64,
gpr_r27_ppc64,
gpr_r28_ppc64,
gpr_r29_ppc64,
gpr_r30_ppc64,
gpr_r31_ppc64,
gpr_cr_ppc64,
gpr_msr_ppc64,
gpr_xer_ppc64,
gpr_lr_ppc64,
gpr_ctr_ppc64,
gpr_pc_ppc64,
k_last_gpr_ppc64 = gpr_pc_ppc64,

k_first_fpr_ppc64,
fpr_f0_ppc64 = k_first_fpr_ppc64,
fpr_f1_ppc64,
fpr_f2_ppc64,
fpr_f3_ppc64,
fpr_f4_ppc64,
fpr_f5_ppc64,
fpr_f6_ppc64,
fpr_f7_ppc64,
fpr_f8_ppc64,
fpr_f9_ppc64,
fpr_f10_ppc64,
fpr_f11_ppc64,
fpr_f12_ppc64,
fpr_f13_ppc64,
fpr_f14_ppc64,
fpr_f15_ppc64,
fpr_f16_ppc64,
fpr_f17_ppc64,
fpr_f18_ppc64,
fpr_f19_ppc64,
fpr_f20_ppc64,
fpr_f21_ppc64,
fpr_f22_ppc64,
fpr_f23_ppc64,
fpr_f24_ppc64,
fpr_f25_ppc64,
fpr_f26_ppc64,
fpr_f27_ppc64,
fpr_f28_ppc64,
fpr_f29_ppc64,
fpr_f30_ppc64,
fpr_f31_ppc64,
fpr_fpscr_ppc64,
k_last_fpr_ppc64 = fpr_fpscr_ppc64,

k_first_vmx_ppc64,
vmx_vr0_ppc64 = k_first_vmx_ppc64,
vmx_vr1_ppc64,
vmx_vr2_ppc64,
vmx_vr3_ppc64,
vmx_vr4_ppc64,
vmx_vr5_ppc64,
vmx_vr6_ppc64,
vmx_vr7_ppc64,
vmx_vr8_ppc64,
vmx_vr9_ppc64,
vmx_vr10_ppc64,
vmx_vr11_ppc64,
vmx_vr12_ppc64,
vmx_vr13_ppc64,
vmx_vr14_ppc64,
vmx_vr15_ppc64,
vmx_vr16_ppc64,
vmx_vr17_ppc64,
vmx_vr18_ppc64,
vmx_vr19_ppc64,
vmx_vr20_ppc64,
vmx_vr21_ppc64,
vmx_vr22_ppc64,
vmx_vr23_ppc64,
vmx_vr24_ppc64,
vmx_vr25_ppc64,
vmx_vr26_ppc64,
vmx_vr27_ppc64,
vmx_vr28_ppc64,
vmx_vr29_ppc64,
vmx_vr30_ppc64,
vmx_vr31_ppc64,
vmx_vscr_ppc64,
vmx_vrsave_ppc64,
k_last_vmx_ppc64 = vmx_vrsave_ppc64,

k_num_registers_ppc64,
k_num_gpr_registers_ppc64 = k_last_gpr_ppc64 - k_first_gpr_ppc64 + 1,
k_num_fpr_registers_ppc64 = k_last_fpr_ppc64 - k_first_fpr_ppc64 + 1,
k_num_vmx_registers_ppc64 = k_last_vmx_ppc64 - k_first_vmx_ppc64 + 1,
};

#endif // #ifndef lldb_ppc64_register_enums_h
127 changes: 127 additions & 0 deletions lldb/source/Utility/PPC64_DWARF_Registers.h
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//===-- PPC64_DWARF_Registers.h ---------------------------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//

#ifndef utility_PPC64_DWARF_Registers_h_
#define utility_PPC64_DWARF_Registers_h_

#include "lldb/lldb-private.h"

namespace ppc64_dwarf {

enum {
dwarf_r0_ppc64 = 0,
dwarf_r1_ppc64,
dwarf_r2_ppc64,
dwarf_r3_ppc64,
dwarf_r4_ppc64,
dwarf_r5_ppc64,
dwarf_r6_ppc64,
dwarf_r7_ppc64,
dwarf_r8_ppc64,
dwarf_r9_ppc64,
dwarf_r10_ppc64,
dwarf_r11_ppc64,
dwarf_r12_ppc64,
dwarf_r13_ppc64,
dwarf_r14_ppc64,
dwarf_r15_ppc64,
dwarf_r16_ppc64,
dwarf_r17_ppc64,
dwarf_r18_ppc64,
dwarf_r19_ppc64,
dwarf_r20_ppc64,
dwarf_r21_ppc64,
dwarf_r22_ppc64,
dwarf_r23_ppc64,
dwarf_r24_ppc64,
dwarf_r25_ppc64,
dwarf_r26_ppc64,
dwarf_r27_ppc64,
dwarf_r28_ppc64,
dwarf_r29_ppc64,
dwarf_r30_ppc64,
dwarf_r31_ppc64,
dwarf_f0_ppc64,
dwarf_f1_ppc64,
dwarf_f2_ppc64,
dwarf_f3_ppc64,
dwarf_f4_ppc64,
dwarf_f5_ppc64,
dwarf_f6_ppc64,
dwarf_f7_ppc64,
dwarf_f8_ppc64,
dwarf_f9_ppc64,
dwarf_f10_ppc64,
dwarf_f11_ppc64,
dwarf_f12_ppc64,
dwarf_f13_ppc64,
dwarf_f14_ppc64,
dwarf_f15_ppc64,
dwarf_f16_ppc64,
dwarf_f17_ppc64,
dwarf_f18_ppc64,
dwarf_f19_ppc64,
dwarf_f20_ppc64,
dwarf_f21_ppc64,
dwarf_f22_ppc64,
dwarf_f23_ppc64,
dwarf_f24_ppc64,
dwarf_f25_ppc64,
dwarf_f26_ppc64,
dwarf_f27_ppc64,
dwarf_f28_ppc64,
dwarf_f29_ppc64,
dwarf_f30_ppc64,
dwarf_f31_ppc64,
dwarf_cr_ppc64 = 64,
dwarf_fpscr_ppc64,
dwarf_msr_ppc64,
dwarf_xer_ppc64 = 100,
dwarf_lr_ppc64 = 108,
dwarf_ctr_ppc64,
dwarf_vscr_ppc64,
dwarf_vrsave_ppc64 = 356,
dwarf_pc_ppc64,
dwarf_vr0_ppc64 = 1124,
dwarf_vr1_ppc64,
dwarf_vr2_ppc64,
dwarf_vr3_ppc64,
dwarf_vr4_ppc64,
dwarf_vr5_ppc64,
dwarf_vr6_ppc64,
dwarf_vr7_ppc64,
dwarf_vr8_ppc64,
dwarf_vr9_ppc64,
dwarf_vr10_ppc64,
dwarf_vr11_ppc64,
dwarf_vr12_ppc64,
dwarf_vr13_ppc64,
dwarf_vr14_ppc64,
dwarf_vr15_ppc64,
dwarf_vr16_ppc64,
dwarf_vr17_ppc64,
dwarf_vr18_ppc64,
dwarf_vr19_ppc64,
dwarf_vr20_ppc64,
dwarf_vr21_ppc64,
dwarf_vr22_ppc64,
dwarf_vr23_ppc64,
dwarf_vr24_ppc64,
dwarf_vr25_ppc64,
dwarf_vr26_ppc64,
dwarf_vr27_ppc64,
dwarf_vr28_ppc64,
dwarf_vr29_ppc64,
dwarf_vr30_ppc64,
dwarf_vr31_ppc64,
};

} // namespace ppc64_dwarf

#endif // utility_PPC64_DWARF_Registers_h_