diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.cpp
diff --git a/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h b/lldb/source/Plugins/Instruction/MIPS64/EmulateInstructionMIPS64.h
@@ -131,14 +131,140 @@ class EmulateInstructionMIPS64 : public lldb_private::EmulateInstruction
     Emulate_LD (llvm::MCInst& insn);
 
     bool
-    Emulate_B (llvm::MCInst& insn);
-
+    Emulate_BEQ (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNE (llvm::MCInst& insn);
+
+    bool
+    Emulate_BEQL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNEL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEZALL (llvm::MCInst& insn);
+
     bool
     Emulate_BAL (llvm::MCInst& insn);
 
+    bool
+    Emulate_BGEZAL (llvm::MCInst& insn);
+
     bool
     Emulate_BALC (llvm::MCInst& insn);
 
+    bool
+    Emulate_BC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEZ (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLEZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGTZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BEQZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNEZALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BEQC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNEC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTUC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEUC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLEZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGTZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BEQZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNEZC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGEZL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGTZ (llvm::MCInst& insn);
+
+    bool
+    Emulate_BGTZL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLEZ (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLEZL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZ (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZAL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZALL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BLTZL (llvm::MCInst& insn);
+
+    bool
+    Emulate_BOVC (llvm::MCInst& insn);
+
+    bool
+    Emulate_BNVC (llvm::MCInst& insn);
+
+    bool
+    Emulate_J (llvm::MCInst& insn);
+
+    bool
+    Emulate_JAL (llvm::MCInst& insn);
+
+    bool
+    Emulate_JALR (llvm::MCInst& insn);
+
+    bool
+    Emulate_JIALC (llvm::MCInst& insn);
+
+    bool
+    Emulate_JIC (llvm::MCInst& insn);
+
+    bool
+    Emulate_JR (llvm::MCInst& insn);
+
     bool
     nonvolatile_reg_p (uint64_t regnum);