569 changes: 142 additions & 427 deletions lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -101,23 +101,29 @@ static_assert((sizeof(g_fpu_regnums_x86_64) / sizeof(g_fpu_regnums_x86_64[0])) -
k_num_fpr_registers_x86_64,
"g_fpu_regnums_x86_64 has wrong number of register infos");

// x86 64-bit registers available via XState.
static const uint32_t g_xstate_regnums_x86_64[] = {
lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64,
lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
static const uint32_t g_avx_regnums_x86_64[] = {
lldb_ymm0_x86_64, lldb_ymm1_x86_64, lldb_ymm2_x86_64, lldb_ymm3_x86_64,
lldb_ymm4_x86_64, lldb_ymm5_x86_64, lldb_ymm6_x86_64, lldb_ymm7_x86_64,
lldb_ymm8_x86_64, lldb_ymm9_x86_64, lldb_ymm10_x86_64, lldb_ymm11_x86_64,
lldb_ymm12_x86_64, lldb_ymm13_x86_64, lldb_ymm14_x86_64, lldb_ymm15_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_avx_regnums_x86_64) / sizeof(g_avx_regnums_x86_64[0])) -
1 ==
k_num_avx_registers_x86_64,
"g_avx_regnums_x86_64 has wrong number of register infos");

static const uint32_t g_mpx_regnums_x86_64[] = {
// Note: we currently do not provide them but this is needed to avoid
// unnamed groups in SBFrame::GetRegisterContext().
lldb_bnd0_x86_64, lldb_bnd1_x86_64, lldb_bnd2_x86_64, lldb_bnd3_x86_64,
lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
lldb_bnd0_x86_64, lldb_bnd1_x86_64, lldb_bnd2_x86_64,
lldb_bnd3_x86_64, lldb_bndcfgu_x86_64, lldb_bndstatus_x86_64,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_xstate_regnums_x86_64) /
sizeof(g_xstate_regnums_x86_64[0])) -
static_assert((sizeof(g_mpx_regnums_x86_64) / sizeof(g_mpx_regnums_x86_64[0])) -
1 ==
k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
"g_xstate_regnums_x86_64 has wrong number of register infos");
k_num_mpx_registers_x86_64,
"g_mpx_regnums_x86_64 has wrong number of register infos");

// x86 debug registers.
static const uint32_t g_dbr_regnums_x86_64[] = {
Expand Down Expand Up @@ -165,20 +171,27 @@ static_assert((sizeof(g_fpu_regnums_i386) / sizeof(g_fpu_regnums_i386[0])) -
k_num_fpr_registers_i386,
"g_fpu_regnums_i386 has wrong number of register infos");

// x86 64-bit registers available via XState.
static const uint32_t g_xstate_regnums_i386[] = {
lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
static const uint32_t g_avx_regnums_i386[] = {
lldb_ymm0_i386, lldb_ymm1_i386, lldb_ymm2_i386, lldb_ymm3_i386,
lldb_ymm4_i386, lldb_ymm5_i386, lldb_ymm6_i386, lldb_ymm7_i386,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert((sizeof(g_avx_regnums_i386) / sizeof(g_avx_regnums_i386[0])) -
1 ==
k_num_avx_registers_i386,
"g_avx_regnums_i386 has wrong number of register infos");

static const uint32_t g_mpx_regnums_i386[] = {
// Note: we currently do not provide them but this is needed to avoid
// unnamed groups in SBFrame::GetRegisterContext().
lldb_bnd0_i386, lldb_bnd1_i386, lldb_bnd2_i386, lldb_bnd3_i386,
lldb_bndcfgu_i386, lldb_bndstatus_i386,
lldb_bnd0_i386, lldb_bnd1_i386, lldb_bnd2_i386,
lldb_bnd3_i386, lldb_bndcfgu_i386, lldb_bndstatus_i386,
LLDB_INVALID_REGNUM // register sets need to end with this flag
};
static_assert(
(sizeof(g_xstate_regnums_i386) / sizeof(g_xstate_regnums_i386[0])) - 1 ==
k_num_avx_registers_i386 + k_num_mpx_registers_i386,
"g_xstate_regnums_i386 has wrong number of register infos");
static_assert((sizeof(g_mpx_regnums_i386) / sizeof(g_mpx_regnums_i386[0])) -
1 ==
k_num_mpx_registers_i386,
"g_mpx_regnums_i386 has wrong number of register infos");

// x86 debug registers.
static const uint32_t g_dbr_regnums_i386[] = {
Expand All @@ -192,18 +205,19 @@ static_assert((sizeof(g_dbr_regnums_i386) / sizeof(g_dbr_regnums_i386[0])) -
"g_dbr_regnums_i386 has wrong number of register infos");

// Number of register sets provided by this context.
enum { k_num_register_sets = 4 };
enum { k_num_register_sets = 5 };

// Register sets for x86 32-bit.
static const RegisterSet g_reg_sets_i386[k_num_register_sets] = {
{"General Purpose Registers", "gpr", k_num_gpr_registers_i386,
g_gpr_regnums_i386},
{"Floating Point Registers", "fpu", k_num_fpr_registers_i386,
g_fpu_regnums_i386},
{"Extended State Registers", "xstate",
k_num_avx_registers_i386 + k_num_mpx_registers_i386,
g_xstate_regnums_i386},
{"Debug Registers", "dbr", k_num_dbr_registers_i386, g_dbr_regnums_i386},
{"Extended AVX registers", "avx", k_num_avx_registers_i386,
g_avx_regnums_i386},
{"Extended MPX registers", "mpx", k_num_mpx_registers_i386,
g_mpx_regnums_i386},
};

// Register sets for x86 64-bit.
Expand All @@ -212,11 +226,12 @@ static const RegisterSet g_reg_sets_x86_64[k_num_register_sets] = {
g_gpr_regnums_x86_64},
{"Floating Point Registers", "fpu", k_num_fpr_registers_x86_64,
g_fpu_regnums_x86_64},
{"Extended State Registers", "xstate",
k_num_avx_registers_x86_64 + k_num_mpx_registers_x86_64,
g_xstate_regnums_x86_64},
{"Debug Registers", "dbr", k_num_dbr_registers_x86_64,
g_dbr_regnums_x86_64},
{"Extended AVX registers", "avx", k_num_avx_registers_x86_64,
g_avx_regnums_x86_64},
{"Extended MPX registers", "mpx", k_num_mpx_registers_x86_64,
g_mpx_regnums_x86_64},
};

#define REG_CONTEXT_SIZE (GetRegisterInfoInterface().GetGPRSize())
Expand Down Expand Up @@ -248,12 +263,29 @@ NativeRegisterContextFreeBSD_x86_64::NativeRegisterContextFreeBSD_x86_64(
const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
: NativeRegisterContextRegisterInfo(
native_thread, CreateRegisterInfoInterface(target_arch)),
m_fpr(), m_dbr() {
m_regset_offsets({0}) {
assert(m_gpr.size() == GetRegisterInfoInterface().GetGPRSize());
std::array<uint32_t, MaxRegSet + 1> first_regnos;

switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86:
first_regnos[FPRegSet] = lldb_fctrl_i386;
first_regnos[DBRegSet] = lldb_dr0_i386;
break;
case llvm::Triple::x86_64:
first_regnos[FPRegSet] = lldb_fctrl_x86_64;
first_regnos[DBRegSet] = lldb_dr0_x86_64;
break;
default:
llvm_unreachable("Unhandled target architecture.");
}

for (int i: {FPRegSet, DBRegSet})
m_regset_offsets[i] = GetRegisterInfoInterface()
.GetRegisterInfo()[first_regnos[i]]
.byte_offset;
}

// CONSIDER after local and llgs debugging are merged, register set support can
// be moved into a base x86-64 class with IsRegisterSetAvailable made virtual.
uint32_t NativeRegisterContextFreeBSD_x86_64::GetRegisterSetCount() const {
uint32_t sets = 0;
for (uint32_t set_index = 0; set_index < k_num_register_sets; ++set_index) {
Expand All @@ -276,87 +308,6 @@ NativeRegisterContextFreeBSD_x86_64::GetRegisterSet(uint32_t set_index) const {
}
}

static constexpr int RegNumX86ToX86_64(int regnum) {
switch (regnum) {
case lldb_fctrl_i386:
return lldb_fctrl_x86_64;
case lldb_fstat_i386:
return lldb_fstat_x86_64;
case lldb_ftag_i386:
return lldb_ftag_x86_64;
case lldb_fop_i386:
return lldb_fop_x86_64;
case lldb_fiseg_i386:
return lldb_fiseg_x86_64;
case lldb_fioff_i386:
return lldb_fioff_x86_64;
case lldb_foseg_i386:
return lldb_foseg_x86_64;
case lldb_fooff_i386:
return lldb_fooff_x86_64;
case lldb_mxcsr_i386:
return lldb_mxcsr_x86_64;
case lldb_mxcsrmask_i386:
return lldb_mxcsrmask_x86_64;
case lldb_st0_i386:
case lldb_st1_i386:
case lldb_st2_i386:
case lldb_st3_i386:
case lldb_st4_i386:
case lldb_st5_i386:
case lldb_st6_i386:
case lldb_st7_i386:
return lldb_st0_x86_64 + regnum - lldb_st0_i386;
case lldb_mm0_i386:
case lldb_mm1_i386:
case lldb_mm2_i386:
case lldb_mm3_i386:
case lldb_mm4_i386:
case lldb_mm5_i386:
case lldb_mm6_i386:
case lldb_mm7_i386:
return lldb_mm0_x86_64 + regnum - lldb_mm0_i386;
case lldb_xmm0_i386:
case lldb_xmm1_i386:
case lldb_xmm2_i386:
case lldb_xmm3_i386:
case lldb_xmm4_i386:
case lldb_xmm5_i386:
case lldb_xmm6_i386:
case lldb_xmm7_i386:
return lldb_xmm0_x86_64 + regnum - lldb_xmm0_i386;
case lldb_ymm0_i386:
case lldb_ymm1_i386:
case lldb_ymm2_i386:
case lldb_ymm3_i386:
case lldb_ymm4_i386:
case lldb_ymm5_i386:
case lldb_ymm6_i386:
case lldb_ymm7_i386:
return lldb_ymm0_x86_64 + regnum - lldb_ymm0_i386;
case lldb_bnd0_i386:
case lldb_bnd1_i386:
case lldb_bnd2_i386:
case lldb_bnd3_i386:
return lldb_bnd0_x86_64 + regnum - lldb_bnd0_i386;
case lldb_bndcfgu_i386:
return lldb_bndcfgu_x86_64;
case lldb_bndstatus_i386:
return lldb_bndstatus_x86_64;
case lldb_dr0_i386:
case lldb_dr1_i386:
case lldb_dr2_i386:
case lldb_dr3_i386:
case lldb_dr4_i386:
case lldb_dr5_i386:
case lldb_dr6_i386:
case lldb_dr7_i386:
return lldb_dr0_x86_64 + regnum - lldb_dr0_i386;
default:
llvm_unreachable("Unhandled i386 register.");
}
}

llvm::Optional<enum NativeRegisterContextFreeBSD_x86_64::RegSetKind>
NativeRegisterContextFreeBSD_x86_64::GetSetForNativeRegNum(int reg_num) const {
switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
Expand All @@ -366,7 +317,7 @@ NativeRegisterContextFreeBSD_x86_64::GetSetForNativeRegNum(int reg_num) const {
if (reg_num >= k_first_fpr_i386 && reg_num <= k_last_fpr_i386)
return FPRegSet;
if (reg_num >= k_first_avx_i386 && reg_num <= k_last_avx_i386)
return XSaveRegSet; // AVX
return YMMRegSet;
if (reg_num >= k_first_mpxr_i386 && reg_num <= k_last_mpxr_i386)
return llvm::None; // MPXR
if (reg_num >= k_first_mpxc_i386 && reg_num <= k_last_mpxc_i386)
Expand All @@ -380,7 +331,7 @@ NativeRegisterContextFreeBSD_x86_64::GetSetForNativeRegNum(int reg_num) const {
if (reg_num >= k_first_fpr_x86_64 && reg_num <= k_last_fpr_x86_64)
return FPRegSet;
if (reg_num >= k_first_avx_x86_64 && reg_num <= k_last_avx_x86_64)
return XSaveRegSet; // AVX
return YMMRegSet;
if (reg_num >= k_first_mpxr_x86_64 && reg_num <= k_last_mpxr_x86_64)
return llvm::None; // MPXR
if (reg_num >= k_first_mpxc_x86_64 && reg_num <= k_last_mpxc_x86_64)
Expand All @@ -403,15 +354,16 @@ Status NativeRegisterContextFreeBSD_x86_64::ReadRegisterSet(uint32_t set) {
case FPRegSet:
#if defined(__x86_64__)
return NativeProcessFreeBSD::PtraceWrapper(PT_GETFPREGS, m_thread.GetID(),
&m_fpr);
m_fpr.data());
#else
return NativeProcessFreeBSD::PtraceWrapper(PT_GETXMMREGS, m_thread.GetID(),
&m_fpr);
m_fpr.data());
#endif
case DBRegSet:
return NativeProcessFreeBSD::PtraceWrapper(PT_GETDBREGS, m_thread.GetID(),
&m_dbr);
case XSaveRegSet: {
m_dbr.data());
case YMMRegSet:
case MPXRegSet: {
struct ptrace_xstate_info info;
Status ret = NativeProcessFreeBSD::PtraceWrapper(
PT_GETXSTATE_INFO, GetProcessPid(), &info, sizeof(info));
Expand All @@ -421,11 +373,10 @@ Status NativeRegisterContextFreeBSD_x86_64::ReadRegisterSet(uint32_t set) {
assert(info.xsave_mask & XFEATURE_ENABLED_X87);
assert(info.xsave_mask & XFEATURE_ENABLED_SSE);

m_xsave_offsets[YMMXSaveSet] = LLDB_INVALID_XSAVE_OFFSET;
m_xsave_offsets[YMMRegSet] = LLDB_INVALID_XSAVE_OFFSET;
if (info.xsave_mask & XFEATURE_ENABLED_YMM_HI128) {
uint32_t eax, ecx, edx;
__get_cpuid_count(0x0D, 2, &eax, &m_xsave_offsets[YMMXSaveSet], &ecx,
&edx);
__get_cpuid_count(0x0D, 2, &eax, &m_xsave_offsets[YMMRegSet], &ecx, &edx);
}

m_xsave.resize(info.xsave_len);
Expand All @@ -444,15 +395,16 @@ Status NativeRegisterContextFreeBSD_x86_64::WriteRegisterSet(uint32_t set) {
case FPRegSet:
#if defined(__x86_64__)
return NativeProcessFreeBSD::PtraceWrapper(PT_SETFPREGS, m_thread.GetID(),
&m_fpr);
m_fpr.data());
#else
return NativeProcessFreeBSD::PtraceWrapper(PT_SETXMMREGS, m_thread.GetID(),
&m_fpr);
m_fpr.data());
#endif
case DBRegSet:
return NativeProcessFreeBSD::PtraceWrapper(PT_SETDBREGS, m_thread.GetID(),
&m_dbr);
case XSaveRegSet:
m_dbr.data());
case YMMRegSet:
case MPXRegSet:
// ReadRegisterSet() must always be called before WriteRegisterSet().
assert(m_xsave.size() > 0);
return NativeProcessFreeBSD::PtraceWrapper(PT_SETXSTATE, GetProcessPid(),
Expand Down Expand Up @@ -497,165 +449,25 @@ NativeRegisterContextFreeBSD_x86_64::ReadRegister(const RegisterInfo *reg_info,

switch (set) {
case GPRegSet:
reg_value.SetBytes(m_gpr.data() + reg_info->byte_offset,
reg_info->byte_size, endian::InlHostByteOrder());
return error;
case FPRegSet:
case XSaveRegSet:
case DBRegSet:
// legacy logic
break;
}

switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86_64:
break;
case llvm::Triple::x86:
reg = RegNumX86ToX86_64(reg);
break;
default:
llvm_unreachable("Unhandled target architecture.");
}

switch (reg) {
#if defined(__x86_64__)
// the 32-bit field carries more detail, so we don't have to reinvent
// the wheel
#define FPR_ENV(x) ((struct envxmm32 *)m_fpr.fpr_env)->x
#else
#define FPR_ENV(x) ((struct envxmm *)m_fpr.xmm_env)->x
#endif
case lldb_fctrl_x86_64:
reg_value = (uint16_t)FPR_ENV(en_cw);
break;
case lldb_fstat_x86_64:
reg_value = (uint16_t)FPR_ENV(en_sw);
break;
case lldb_ftag_x86_64:
reg_value = (uint16_t)FPR_ENV(en_tw);
break;
case lldb_fop_x86_64:
reg_value = (uint16_t)FPR_ENV(en_opcode);
break;
case lldb_fiseg_x86_64:
reg_value = (uint32_t)FPR_ENV(en_fcs);
break;
case lldb_fioff_x86_64:
reg_value = (uint32_t)FPR_ENV(en_fip);
break;
case lldb_foseg_x86_64:
reg_value = (uint32_t)FPR_ENV(en_fos);
break;
case lldb_fooff_x86_64:
reg_value = (uint32_t)FPR_ENV(en_foo);
break;
case lldb_mxcsr_x86_64:
reg_value = (uint32_t)FPR_ENV(en_mxcsr);
break;
case lldb_mxcsrmask_x86_64:
reg_value = (uint32_t)FPR_ENV(en_mxcsr_mask);
break;
case lldb_st0_x86_64:
case lldb_st1_x86_64:
case lldb_st2_x86_64:
case lldb_st3_x86_64:
case lldb_st4_x86_64:
case lldb_st5_x86_64:
case lldb_st6_x86_64:
case lldb_st7_x86_64:
#if defined(__x86_64__)
reg_value.SetBytes(&m_fpr.fpr_acc[reg - lldb_st0_x86_64],
reg_value.SetBytes(GetOffsetRegSetData(set, reg_info->byte_offset),
reg_info->byte_size, endian::InlHostByteOrder());
#else
reg_value.SetBytes(&m_fpr.xmm_acc[reg - lldb_st0_x86_64],
reg_info->byte_size, endian::InlHostByteOrder());
#endif
break;
case lldb_mm0_x86_64:
case lldb_mm1_x86_64:
case lldb_mm2_x86_64:
case lldb_mm3_x86_64:
case lldb_mm4_x86_64:
case lldb_mm5_x86_64:
case lldb_mm6_x86_64:
case lldb_mm7_x86_64:
#if defined(__x86_64__)
reg_value.SetBytes(&m_fpr.fpr_acc[reg - lldb_mm0_x86_64],
reg_info->byte_size, endian::InlHostByteOrder());
#else
reg_value.SetBytes(&m_fpr.xmm_acc[reg - lldb_mm0_x86_64],
reg_info->byte_size, endian::InlHostByteOrder());
#endif
break;
case lldb_xmm0_x86_64:
case lldb_xmm1_x86_64:
case lldb_xmm2_x86_64:
case lldb_xmm3_x86_64:
case lldb_xmm4_x86_64:
case lldb_xmm5_x86_64:
case lldb_xmm6_x86_64:
case lldb_xmm7_x86_64:
case lldb_xmm8_x86_64:
case lldb_xmm9_x86_64:
case lldb_xmm10_x86_64:
case lldb_xmm11_x86_64:
case lldb_xmm12_x86_64:
case lldb_xmm13_x86_64:
case lldb_xmm14_x86_64:
case lldb_xmm15_x86_64:
#if defined(__x86_64__)
reg_value.SetBytes(&m_fpr.fpr_xacc[reg - lldb_xmm0_x86_64],
reg_info->byte_size, endian::InlHostByteOrder());
#else
reg_value.SetBytes(&m_fpr.xmm_reg[reg - lldb_xmm0_x86_64],
reg_info->byte_size, endian::InlHostByteOrder());
#endif
break;
case lldb_ymm0_x86_64:
case lldb_ymm1_x86_64:
case lldb_ymm2_x86_64:
case lldb_ymm3_x86_64:
case lldb_ymm4_x86_64:
case lldb_ymm5_x86_64:
case lldb_ymm6_x86_64:
case lldb_ymm7_x86_64:
case lldb_ymm8_x86_64:
case lldb_ymm9_x86_64:
case lldb_ymm10_x86_64:
case lldb_ymm11_x86_64:
case lldb_ymm12_x86_64:
case lldb_ymm13_x86_64:
case lldb_ymm14_x86_64:
case lldb_ymm15_x86_64: {
uint32_t offset = m_xsave_offsets[YMMXSaveSet];
if (offset == LLDB_INVALID_XSAVE_OFFSET) {
case YMMRegSet: {
llvm::Optional<YMMSplitPtr> ymm_reg = GetYMMSplitReg(reg);
if (!ymm_reg) {
error.SetErrorStringWithFormat(
"register \"%s\" not supported by CPU/kernel", reg_info->name);
} else {
uint32_t reg_index = reg - lldb_ymm0_x86_64;
auto *fpreg = reinterpret_cast<struct savexmm_ymm *>(m_xsave.data());
auto *ymmreg = reinterpret_cast<struct ymmacc *>(m_xsave.data() + offset);

YMMReg ymm =
XStateToYMM(reinterpret_cast<void *>(&fpreg->sv_xmm[reg_index]),
reinterpret_cast<void *>(&ymmreg[reg_index]));
YMMReg ymm = XStateToYMM(ymm_reg->xmm, ymm_reg->ymm_hi);
reg_value.SetBytes(ymm.bytes, reg_info->byte_size,
endian::InlHostByteOrder());
}
break;
}
case lldb_dr0_x86_64:
case lldb_dr1_x86_64:
case lldb_dr2_x86_64:
case lldb_dr3_x86_64:
case lldb_dr4_x86_64:
case lldb_dr5_x86_64:
case lldb_dr6_x86_64:
case lldb_dr7_x86_64:
reg_value = (uint64_t)m_dbr.dr[reg - lldb_dr0_x86_64];
break;
default:
llvm_unreachable("Reading unknown/unsupported register");
case MPXRegSet:
llvm_unreachable("MPX regset should have returned error");
}

return error;
Expand Down Expand Up @@ -697,157 +509,25 @@ Status NativeRegisterContextFreeBSD_x86_64::WriteRegister(

switch (set) {
case GPRegSet:
::memcpy(m_gpr.data() + reg_info->byte_offset, reg_value.GetBytes(),
reg_value.GetByteSize());
return WriteRegisterSet(set);
case FPRegSet:
case XSaveRegSet:
case DBRegSet:
// legacy logic
break;
}

switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86_64:
break;
case llvm::Triple::x86:
reg = RegNumX86ToX86_64(reg);
break;
default:
llvm_unreachable("Unhandled target architecture.");
}

switch (reg) {
case lldb_fctrl_x86_64:
FPR_ENV(en_cw) = reg_value.GetAsUInt16();
break;
case lldb_fstat_x86_64:
FPR_ENV(en_sw) = reg_value.GetAsUInt16();
break;
case lldb_ftag_x86_64:
FPR_ENV(en_tw) = reg_value.GetAsUInt16();
break;
case lldb_fop_x86_64:
FPR_ENV(en_opcode) = reg_value.GetAsUInt16();
break;
case lldb_fiseg_x86_64:
FPR_ENV(en_fcs) = reg_value.GetAsUInt32();
break;
case lldb_fioff_x86_64:
FPR_ENV(en_fip) = reg_value.GetAsUInt32();
break;
case lldb_foseg_x86_64:
FPR_ENV(en_fos) = reg_value.GetAsUInt32();
break;
case lldb_fooff_x86_64:
FPR_ENV(en_foo) = reg_value.GetAsUInt32();
break;
case lldb_mxcsr_x86_64:
FPR_ENV(en_mxcsr) = reg_value.GetAsUInt32();
break;
case lldb_mxcsrmask_x86_64:
FPR_ENV(en_mxcsr_mask) = reg_value.GetAsUInt32();
break;
case lldb_st0_x86_64:
case lldb_st1_x86_64:
case lldb_st2_x86_64:
case lldb_st3_x86_64:
case lldb_st4_x86_64:
case lldb_st5_x86_64:
case lldb_st6_x86_64:
case lldb_st7_x86_64:
#if defined(__x86_64__)
::memcpy(&m_fpr.fpr_acc[reg - lldb_st0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#else
::memcpy(&m_fpr.xmm_acc[reg - lldb_st0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#endif
break;
case lldb_mm0_x86_64:
case lldb_mm1_x86_64:
case lldb_mm2_x86_64:
case lldb_mm3_x86_64:
case lldb_mm4_x86_64:
case lldb_mm5_x86_64:
case lldb_mm6_x86_64:
case lldb_mm7_x86_64:
#if defined(__x86_64__)
::memcpy(&m_fpr.fpr_acc[reg - lldb_mm0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#else
::memcpy(&m_fpr.xmm_acc[reg - lldb_mm0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#endif
break;
case lldb_xmm0_x86_64:
case lldb_xmm1_x86_64:
case lldb_xmm2_x86_64:
case lldb_xmm3_x86_64:
case lldb_xmm4_x86_64:
case lldb_xmm5_x86_64:
case lldb_xmm6_x86_64:
case lldb_xmm7_x86_64:
case lldb_xmm8_x86_64:
case lldb_xmm9_x86_64:
case lldb_xmm10_x86_64:
case lldb_xmm11_x86_64:
case lldb_xmm12_x86_64:
case lldb_xmm13_x86_64:
case lldb_xmm14_x86_64:
case lldb_xmm15_x86_64:
#if defined(__x86_64__)
::memcpy(&m_fpr.fpr_xacc[reg - lldb_xmm0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#else
::memcpy(&m_fpr.xmm_reg[reg - lldb_xmm0_x86_64], reg_value.GetBytes(),
reg_value.GetByteSize());
#endif
::memcpy(GetOffsetRegSetData(set, reg_info->byte_offset),
reg_value.GetBytes(), reg_value.GetByteSize());
break;
case lldb_ymm0_x86_64:
case lldb_ymm1_x86_64:
case lldb_ymm2_x86_64:
case lldb_ymm3_x86_64:
case lldb_ymm4_x86_64:
case lldb_ymm5_x86_64:
case lldb_ymm6_x86_64:
case lldb_ymm7_x86_64:
case lldb_ymm8_x86_64:
case lldb_ymm9_x86_64:
case lldb_ymm10_x86_64:
case lldb_ymm11_x86_64:
case lldb_ymm12_x86_64:
case lldb_ymm13_x86_64:
case lldb_ymm14_x86_64:
case lldb_ymm15_x86_64: {
uint32_t offset = m_xsave_offsets[YMMXSaveSet];
if (offset == LLDB_INVALID_XSAVE_OFFSET) {
case YMMRegSet: {
llvm::Optional<YMMSplitPtr> ymm_reg = GetYMMSplitReg(reg);
if (!ymm_reg) {
error.SetErrorStringWithFormat(
"register \"%s\" not supported by CPU/kernel", reg_info->name);
} else {
uint32_t reg_index = reg - lldb_ymm0_x86_64;
auto *fpreg = reinterpret_cast<struct savexmm_ymm *>(m_xsave.data());
auto *ymmreg = reinterpret_cast<struct ymmacc *>(m_xsave.data() + offset);

YMMReg ymm;
::memcpy(ymm.bytes, reg_value.GetBytes(), reg_value.GetByteSize());
YMMToXState(ymm, reinterpret_cast<void *>(&fpreg->sv_xmm[reg_index]),
reinterpret_cast<void *>(&ymmreg[reg_index]));
YMMToXState(ymm, ymm_reg->xmm, ymm_reg->ymm_hi);
}
break;
}
case lldb_dr0_x86_64:
case lldb_dr1_x86_64:
case lldb_dr2_x86_64:
case lldb_dr3_x86_64:
case lldb_dr4_x86_64:
case lldb_dr5_x86_64:
case lldb_dr6_x86_64:
case lldb_dr7_x86_64:
m_dbr.dr[reg - lldb_dr0_x86_64] = reg_value.GetAsUInt64();
break;
default:
llvm_unreachable("Reading unknown/unsupported register");
case MPXRegSet:
llvm_unreachable("MPX regset should have returned error");
}

return WriteRegisterSet(set);
Expand Down Expand Up @@ -906,25 +586,15 @@ Status NativeRegisterContextFreeBSD_x86_64::WriteAllRegisterValues(
return error;
}

int NativeRegisterContextFreeBSD_x86_64::GetDR(int num) const {
assert(num >= 0 && num <= 7);
switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86:
return lldb_dr0_i386 + num;
case llvm::Triple::x86_64:
return lldb_dr0_x86_64 + num;
default:
llvm_unreachable("Unhandled target architecture.");
}
}

llvm::Error NativeRegisterContextFreeBSD_x86_64::CopyHardwareWatchpointsFrom(
NativeRegisterContextFreeBSD &source) {
auto &r_source = static_cast<NativeRegisterContextFreeBSD_x86_64 &>(source);
Status res = r_source.ReadRegisterSet(DBRegSet);
// NB: This implicitly reads the whole dbreg set.
RegisterValue dr7;
Status res = r_source.ReadRegister(GetDR(7), dr7);
if (!res.Fail()) {
// copy dbregs only if any watchpoints were set
if ((r_source.m_dbr.dr[7] & 0xFF) == 0)
if ((dr7.GetAsUInt64() & 0xFF) == 0)
return llvm::Error::success();

m_dbr = r_source.m_dbr;
Expand All @@ -933,4 +603,49 @@ llvm::Error NativeRegisterContextFreeBSD_x86_64::CopyHardwareWatchpointsFrom(
return res.ToError();
}

uint8_t *
NativeRegisterContextFreeBSD_x86_64::GetOffsetRegSetData(uint32_t set,
size_t reg_offset) {
uint8_t *base;
switch (set) {
case GPRegSet:
base = m_gpr.data();
break;
case FPRegSet:
base = m_fpr.data();
break;
case DBRegSet:
base = m_dbr.data();
break;
case YMMRegSet:
llvm_unreachable("GetRegSetData() is unsuitable for this regset.");
}
assert(reg_offset >= m_regset_offsets[set]);
return base + (reg_offset - m_regset_offsets[set]);
}

llvm::Optional<NativeRegisterContextFreeBSD_x86_64::YMMSplitPtr>
NativeRegisterContextFreeBSD_x86_64::GetYMMSplitReg(uint32_t reg) {
uint32_t offset = m_xsave_offsets[YMMRegSet];
if (offset == LLDB_INVALID_XSAVE_OFFSET)
return llvm::None;

uint32_t reg_index;
switch (GetRegisterInfoInterface().GetTargetArchitecture().GetMachine()) {
case llvm::Triple::x86:
reg_index = reg - lldb_ymm0_i386;
break;
case llvm::Triple::x86_64:
reg_index = reg - lldb_ymm0_x86_64;
break;
default:
llvm_unreachable("Unhandled target architecture.");
}

auto *fpreg = reinterpret_cast<struct savexmm_ymm *>(m_xsave.data());
auto *ymmreg = reinterpret_cast<struct ymmacc *>(m_xsave.data() + offset);

return YMMSplitPtr{&fpreg->sv_xmm[reg_index], &ymmreg[reg_index]};
}

#endif // defined(__x86_64__)
28 changes: 15 additions & 13 deletions lldb/source/Plugins/Process/FreeBSDRemote/NativeRegisterContextFreeBSD_x86_64.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -60,30 +60,32 @@ class NativeRegisterContextFreeBSD_x86_64
enum RegSetKind {
GPRegSet,
FPRegSet,
XSaveRegSet,
DBRegSet,
};
enum {
YMMXSaveSet,
MaxXSaveSet = YMMXSaveSet,
YMMRegSet,
MPXRegSet,
MaxRegSet = MPXRegSet,
};

// Private member variables.
std::array<uint8_t, sizeof(struct reg)> m_gpr;
#if defined(__x86_64__)
struct fpreg m_fpr;
#else
struct xmmreg m_fpr;
#endif
struct dbreg m_dbr;
std::array<uint8_t, 512> m_fpr; // FXSAVE
std::array<uint8_t, sizeof(struct dbreg)> m_dbr;
std::vector<uint8_t> m_xsave;
std::array<uint32_t, MaxXSaveSet + 1> m_xsave_offsets;
std::array<uint32_t, MaxRegSet + 1> m_xsave_offsets;
std::array<size_t, MaxRegSet + 1> m_regset_offsets;

llvm::Optional<enum RegSetKind> GetSetForNativeRegNum(int reg_num) const;
int GetDR(int num) const;

Status ReadRegisterSet(uint32_t set);
Status WriteRegisterSet(uint32_t set);

uint8_t *GetOffsetRegSetData(uint32_t set, size_t reg_offset);

struct YMMSplitPtr {
void *xmm;
void *ymm_hi;
};
llvm::Optional<YMMSplitPtr> GetYMMSplitReg(uint32_t reg);
};

} // namespace process_freebsd
Expand Down
1 change: 0 additions & 1 deletion lldb/source/Plugins/Process/Utility/NativeRegisterContextWatchpoint_x86.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -40,7 +40,6 @@ class NativeRegisterContextWatchpoint_x86

uint32_t NumSupportedHardwareWatchpoints() override;

private:
const RegisterInfo *GetDR(int num) const;
};

Expand Down
125 changes: 125 additions & 0 deletions lldb/unittests/Process/Utility/RegisterContextFreeBSDTest.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -29,12 +29,18 @@ std::pair<size_t, size_t> GetRegParams(RegisterInfoInterface &ctx,
return {info.byte_offset, info.byte_size};
}

#define EXPECT_OFF(regname, offset, size) \
EXPECT_THAT(GetRegParams(reg_ctx, lldb_##regname), \
::testing::Pair(offset + base_offset, size))

#if defined(__x86_64__)

#define EXPECT_GPR_X86_64(regname) \
EXPECT_THAT( \
GetRegParams(reg_ctx, lldb_##regname##_x86_64), \
::testing::Pair(offsetof(reg, r_##regname), sizeof(reg::r_##regname)))
#define EXPECT_DBR_X86_64(num) \
EXPECT_OFF(dr##num##_x86_64, offsetof(dbreg, dr[num]), sizeof(dbreg::dr[num]))

TEST(RegisterContextFreeBSDTest, x86_64) {
ArchSpec arch{"x86_64-unknown-freebsd"};
Expand Down Expand Up @@ -64,6 +70,67 @@ TEST(RegisterContextFreeBSDTest, x86_64) {
EXPECT_GPR_X86_64(rflags);
EXPECT_GPR_X86_64(rsp);
EXPECT_GPR_X86_64(ss);

// fctrl is the first FPR field, it is used to determine offset of the whole
// FPR struct
size_t base_offset = reg_ctx.GetRegisterInfo()[lldb_fctrl_x86_64].byte_offset;

// assert against FXSAVE struct
EXPECT_OFF(fctrl_x86_64, 0x00, 2);
EXPECT_OFF(fstat_x86_64, 0x02, 2);
// TODO: This is a known bug, abridged ftag should is 8 bits in length.
EXPECT_OFF(ftag_x86_64, 0x04, 2);
EXPECT_OFF(fop_x86_64, 0x06, 2);
// NB: Technically fiseg/foseg are 16-bit long and the higher 16 bits
// are reserved. However, we use them to access/recombine 64-bit FIP/FDP.
EXPECT_OFF(fioff_x86_64, 0x08, 4);
EXPECT_OFF(fiseg_x86_64, 0x0C, 4);
EXPECT_OFF(fooff_x86_64, 0x10, 4);
EXPECT_OFF(foseg_x86_64, 0x14, 4);
EXPECT_OFF(mxcsr_x86_64, 0x18, 4);
EXPECT_OFF(mxcsrmask_x86_64, 0x1C, 4);
EXPECT_OFF(st0_x86_64, 0x20, 10);
EXPECT_OFF(st1_x86_64, 0x30, 10);
EXPECT_OFF(st2_x86_64, 0x40, 10);
EXPECT_OFF(st3_x86_64, 0x50, 10);
EXPECT_OFF(st4_x86_64, 0x60, 10);
EXPECT_OFF(st5_x86_64, 0x70, 10);
EXPECT_OFF(st6_x86_64, 0x80, 10);
EXPECT_OFF(st7_x86_64, 0x90, 10);
EXPECT_OFF(mm0_x86_64, 0x20, 8);
EXPECT_OFF(mm1_x86_64, 0x30, 8);
EXPECT_OFF(mm2_x86_64, 0x40, 8);
EXPECT_OFF(mm3_x86_64, 0x50, 8);
EXPECT_OFF(mm4_x86_64, 0x60, 8);
EXPECT_OFF(mm5_x86_64, 0x70, 8);
EXPECT_OFF(mm6_x86_64, 0x80, 8);
EXPECT_OFF(mm7_x86_64, 0x90, 8);
EXPECT_OFF(xmm0_x86_64, 0xA0, 16);
EXPECT_OFF(xmm1_x86_64, 0xB0, 16);
EXPECT_OFF(xmm2_x86_64, 0xC0, 16);
EXPECT_OFF(xmm3_x86_64, 0xD0, 16);
EXPECT_OFF(xmm4_x86_64, 0xE0, 16);
EXPECT_OFF(xmm5_x86_64, 0xF0, 16);
EXPECT_OFF(xmm6_x86_64, 0x100, 16);
EXPECT_OFF(xmm7_x86_64, 0x110, 16);
EXPECT_OFF(xmm8_x86_64, 0x120, 16);
EXPECT_OFF(xmm9_x86_64, 0x130, 16);
EXPECT_OFF(xmm10_x86_64, 0x140, 16);
EXPECT_OFF(xmm11_x86_64, 0x150, 16);
EXPECT_OFF(xmm12_x86_64, 0x160, 16);
EXPECT_OFF(xmm13_x86_64, 0x170, 16);
EXPECT_OFF(xmm14_x86_64, 0x180, 16);
EXPECT_OFF(xmm15_x86_64, 0x190, 16);

base_offset = reg_ctx.GetRegisterInfo()[lldb_dr0_x86_64].byte_offset;
EXPECT_DBR_X86_64(0);
EXPECT_DBR_X86_64(1);
EXPECT_DBR_X86_64(2);
EXPECT_DBR_X86_64(3);
EXPECT_DBR_X86_64(4);
EXPECT_DBR_X86_64(5);
EXPECT_DBR_X86_64(6);
EXPECT_DBR_X86_64(7);
}

#endif // defined(__x86_64__)
Expand All @@ -74,15 +141,20 @@ TEST(RegisterContextFreeBSDTest, x86_64) {
EXPECT_THAT(GetRegParams(reg_ctx, lldb_##regname##_i386), \
::testing::Pair(offsetof(native_i386_regs, r_##regname), \
sizeof(native_i386_regs::r_##regname)))
#define EXPECT_DBR_I386(num) \
EXPECT_OFF(dr##num##_i386, offsetof(native_i386_dbregs, dr[num]), \
sizeof(native_i386_dbregs::dr[num]))

TEST(RegisterContextFreeBSDTest, i386) {
ArchSpec arch{"i686-unknown-freebsd"};
RegisterContextFreeBSD_i386 reg_ctx{arch};

#if defined(__i386__)
using native_i386_regs = ::reg;
using native_i386_dbregs = ::dbreg;
#else
using native_i386_regs = ::reg32;
using native_i386_dbregs = ::dbreg32;
#endif

EXPECT_GPR_I386(fs);
Expand All @@ -101,6 +173,59 @@ TEST(RegisterContextFreeBSDTest, i386) {
EXPECT_GPR_I386(esp);
EXPECT_GPR_I386(ss);
EXPECT_GPR_I386(gs);

// fctrl is the first FPR field, it is used to determine offset of the whole
// FPR struct
size_t base_offset = reg_ctx.GetRegisterInfo()[lldb_fctrl_i386].byte_offset;

// assert against FXSAVE struct
EXPECT_OFF(fctrl_i386, 0x00, 2);
EXPECT_OFF(fstat_i386, 0x02, 2);
// TODO: This is a known bug, abridged ftag should is 8 bits in length.
EXPECT_OFF(ftag_i386, 0x04, 2);
EXPECT_OFF(fop_i386, 0x06, 2);
// NB: Technically fiseg/foseg are 16-bit long and the higher 16 bits
// are reserved. However, we use them to access/recombine 64-bit FIP/FDP.
EXPECT_OFF(fioff_i386, 0x08, 4);
EXPECT_OFF(fiseg_i386, 0x0C, 4);
EXPECT_OFF(fooff_i386, 0x10, 4);
EXPECT_OFF(foseg_i386, 0x14, 4);
EXPECT_OFF(mxcsr_i386, 0x18, 4);
EXPECT_OFF(mxcsrmask_i386, 0x1C, 4);
EXPECT_OFF(st0_i386, 0x20, 10);
EXPECT_OFF(st1_i386, 0x30, 10);
EXPECT_OFF(st2_i386, 0x40, 10);
EXPECT_OFF(st3_i386, 0x50, 10);
EXPECT_OFF(st4_i386, 0x60, 10);
EXPECT_OFF(st5_i386, 0x70, 10);
EXPECT_OFF(st6_i386, 0x80, 10);
EXPECT_OFF(st7_i386, 0x90, 10);
EXPECT_OFF(mm0_i386, 0x20, 8);
EXPECT_OFF(mm1_i386, 0x30, 8);
EXPECT_OFF(mm2_i386, 0x40, 8);
EXPECT_OFF(mm3_i386, 0x50, 8);
EXPECT_OFF(mm4_i386, 0x60, 8);
EXPECT_OFF(mm5_i386, 0x70, 8);
EXPECT_OFF(mm6_i386, 0x80, 8);
EXPECT_OFF(mm7_i386, 0x90, 8);
EXPECT_OFF(xmm0_i386, 0xA0, 16);
EXPECT_OFF(xmm1_i386, 0xB0, 16);
EXPECT_OFF(xmm2_i386, 0xC0, 16);
EXPECT_OFF(xmm3_i386, 0xD0, 16);
EXPECT_OFF(xmm4_i386, 0xE0, 16);
EXPECT_OFF(xmm5_i386, 0xF0, 16);
EXPECT_OFF(xmm6_i386, 0x100, 16);
EXPECT_OFF(xmm7_i386, 0x110, 16);

base_offset = reg_ctx.GetRegisterInfo()[lldb_dr0_i386].byte_offset;
EXPECT_DBR_I386(0);
EXPECT_DBR_I386(1);
EXPECT_DBR_I386(2);
EXPECT_DBR_I386(3);
EXPECT_DBR_I386(4);
EXPECT_DBR_I386(5);
EXPECT_DBR_I386(6);
EXPECT_DBR_I386(7);
}

#endif // defined(__i386__) || defined(__x86_64__)
Expand Down