170 changes: 85 additions & 85 deletions lld/test/COFF/arm64-relocs-imports.test
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Original file line number Diff line number Diff line change
Expand Up @@ -7,94 +7,94 @@

# BEFORE: Disassembly of section .text:
# BEFORE-EMPTY:
# BEFORE: 0: fe 0f 1f f8 str x30, [sp, #-16]!
# BEFORE: 4: 00 00 00 90 adrp x0, 0x0
# BEFORE: 8: 00 08 00 91 add x0, x0, #2
# BEFORE: c: 00 00 00 94 bl 0xc
# BEFORE: 10: 00 01 40 39 ldrb w0, [x8]
# BEFORE: 14: 00 01 40 79 ldrh w0, [x8]
# BEFORE: 18: 00 01 40 b9 ldr w0, [x8]
# BEFORE: 1c: 00 01 40 f9 ldr x0, [x8]
# BEFORE: 20: 00 01 00 39 strb w0, [x8]
# BEFORE: 24: 00 01 00 79 strh w0, [x8]
# BEFORE: 28: 00 01 00 b9 str w0, [x8]
# BEFORE: 2c: 00 01 00 f9 str x0, [x8]
# BEFORE: 30: 00 01 40 3d ldr b0, [x8]
# BEFORE: 34: 00 01 40 7d ldr h0, [x8]
# BEFORE: 38: 00 01 40 bd ldr s0, [x8]
# BEFORE: 3c: 00 01 40 fd ldr d0, [x8]
# BEFORE: 40: 00 01 c0 3d ldr q0, [x8]
# BEFORE: 44: 00 01 00 3d str b0, [x8]
# BEFORE: 48: 00 01 00 7d str h0, [x8]
# BEFORE: 4c: 00 01 00 bd str s0, [x8]
# BEFORE: 50: 00 01 00 fd str d0, [x8]
# BEFORE: 54: 00 01 80 3d str q0, [x8]
# BEFORE: 58: 00 05 40 f9 ldr x0, [x8, #8]
# BEFORE: 5c: 20 1a 01 b0 adrp x0, 0x2345000
# BEFORE: 60: 00 fc 4f f9 ldr x0, [x0, #8184]
# BEFORE: 64: e0 03 1f 2a mov w0, wzr
# BEFORE: 68: fe 07 41 f8 ldr x30, [sp], #16
# BEFORE: 6c: c0 03 5f d6 ret
# BEFORE: 70: 08 00 00 00 udf #8
# BEFORE: 74: 00 00 00 00 udf #0
# BEFORE: 78: 01 00 00 00 udf #1
# BEFORE: 7c: 01 00 00 00 udf #1
# BEFORE: 80: 00 00 00 91 add x0, x0, #0
# BEFORE: 84: 00 00 40 91 add x0, x0, #0, lsl #12
# BEFORE: 88: 00 00 40 f9 ldr x0, [x0]
# BEFORE: 8c: 01 00 00 00 udf #1
# BEFORE: 90: 20 1a 09 30 adr x0, #74565
# BEFORE: 94: 01 00 00 54 b.ne 0x94
# BEFORE: 98: 00 00 00 36 tbz w0, #0, 0x98
# BEFORE: 9c: 01 00 00 00 udf #1
# BEFORE: a0: 02 00 80 90 adrp x2, 0xffffffff00000000
# BEFORE: 0: f81f0ffe str x30, [sp, #-16]!
# BEFORE: 4: 90000000 adrp x0, 0x0
# BEFORE: 8: 91000800 add x0, x0, #2
# BEFORE: c: 94000000 bl 0xc
# BEFORE: 10: 39400100 ldrb w0, [x8]
# BEFORE: 14: 79400100 ldrh w0, [x8]
# BEFORE: 18: b9400100 ldr w0, [x8]
# BEFORE: 1c: f9400100 ldr x0, [x8]
# BEFORE: 20: 39000100 strb w0, [x8]
# BEFORE: 24: 79000100 strh w0, [x8]
# BEFORE: 28: b9000100 str w0, [x8]
# BEFORE: 2c: f9000100 str x0, [x8]
# BEFORE: 30: 3d400100 ldr b0, [x8]
# BEFORE: 34: 7d400100 ldr h0, [x8]
# BEFORE: 38: bd400100 ldr s0, [x8]
# BEFORE: 3c: fd400100 ldr d0, [x8]
# BEFORE: 40: 3dc00100 ldr q0, [x8]
# BEFORE: 44: 3d000100 str b0, [x8]
# BEFORE: 48: 7d000100 str h0, [x8]
# BEFORE: 4c: bd000100 str s0, [x8]
# BEFORE: 50: fd000100 str d0, [x8]
# BEFORE: 54: 3d800100 str q0, [x8]
# BEFORE: 58: f9400500 ldr x0, [x8, #8]
# BEFORE: 5c: b0011a20 adrp x0, 0x2345000
# BEFORE: 60: f94ffc00 ldr x0, [x0, #8184]
# BEFORE: 64: 2a1f03e0 mov w0, wzr
# BEFORE: 68: f84107fe ldr x30, [sp], #16
# BEFORE: 6c: d65f03c0 ret
# BEFORE: 70: 00000008 udf #8
# BEFORE: 74: 00000000 udf #0
# BEFORE: 78: 00000001 udf #1
# BEFORE: 7c: 00000001 udf #1
# BEFORE: 80: 91000000 add x0, x0, #0
# BEFORE: 84: 91400000 add x0, x0, #0, lsl #12
# BEFORE: 88: f9400000 ldr x0, [x0]
# BEFORE: 8c: 00000001 udf #1
# BEFORE: 90: 30091a20 adr x0, #74565
# BEFORE: 94: 54000001 b.ne 0x94
# BEFORE: 98: 36000000 tbz w0, #0, 0x98
# BEFORE: 9c: 00000001 udf #1
# BEFORE: a0: 90800002 adrp x2, 0xffffffff00000000

# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
# AFTER: 140001000: fe 0f 1f f8 str x30, [sp, #-16]!
# AFTER: 140001004: 00 00 00 b0 adrp x0, 0x140002000
# AFTER: 140001008: 00 18 00 91 add x0, x0, #6
# AFTER: 14000100c: 26 00 00 94 bl 0x1400010a4
# AFTER: 140001010: 00 21 40 39 ldrb w0, [x8, #8]
# AFTER: 140001014: 00 11 40 79 ldrh w0, [x8, #8]
# AFTER: 140001018: 00 09 40 b9 ldr w0, [x8, #8]
# AFTER: 14000101c: 00 05 40 f9 ldr x0, [x8, #8]
# AFTER: 140001020: 00 21 00 39 strb w0, [x8, #8]
# AFTER: 140001024: 00 11 00 79 strh w0, [x8, #8]
# AFTER: 140001028: 00 09 00 b9 str w0, [x8, #8]
# AFTER: 14000102c: 00 05 00 f9 str x0, [x8, #8]
# AFTER: 140001030: 00 41 40 3d ldr b0, [x8, #16]
# AFTER: 140001034: 00 21 40 7d ldr h0, [x8, #16]
# AFTER: 140001038: 00 11 40 bd ldr s0, [x8, #16]
# AFTER: 14000103c: 00 09 40 fd ldr d0, [x8, #16]
# AFTER: 140001040: 00 05 c0 3d ldr q0, [x8, #16]
# AFTER: 140001044: 00 41 00 3d str b0, [x8, #16]
# AFTER: 140001048: 00 21 00 7d str h0, [x8, #16]
# AFTER: 14000104c: 00 11 00 bd str s0, [x8, #16]
# AFTER: 140001050: 00 09 00 fd str d0, [x8, #16]
# AFTER: 140001054: 00 05 80 3d str q0, [x8, #16]
# AFTER: 140001058: 00 09 40 f9 ldr x0, [x8, #16]
# AFTER: 14000105c: 00 00 00 f0 adrp x0, 0x140004000
# AFTER: 140001060: 00 fc 47 f9 ldr x0, [x0, #4088]
# AFTER: 140001064: e0 03 1f 2a mov w0, wzr
# AFTER: 140001068: fe 07 41 f8 ldr x30, [sp], #16
# AFTER: 14000106c: c0 03 5f d6 ret
# AFTER: 140001070: 10 20 00 40 <unknown>
# AFTER: 140001074: 01 00 00 00 udf #1
# AFTER: 140001078: 09 20 00 00 udf #8201
# AFTER: 14000107c: 09 00 00 00 udf #9
# AFTER: 140001080: 00 20 0e 91 add x0, x0, #904
# AFTER: 140001084: 00 04 40 91 add x0, x0, #1, lsl #12
# AFTER: 140001088: 00 c4 41 f9 ldr x0, [x0, #904]
# AFTER: 14000108c: 03 00 00 00 udf #3
# AFTER: 140001090: e0 95 09 30 adr x0, #78525
# AFTER: 140001094: 81 00 00 54 b.ne 0x1400010a4
# AFTER: 140001098: 60 00 00 36 tbz w0, #0, 0x1400010a4
# AFTER: 14000109c: 61 ff ff ff <unknown>
# AFTER: 1400010a0: 02 f8 ff b0 adrp x2, 0x13ff02000
# AFTER: 1400010a4: 10 00 00 b0 adrp x16, 0x140002000
# AFTER: 1400010a8: 10 2a 40 f9 ldr x16, [x16, #80]
# AFTER: 1400010ac: 00 02 1f d6 br x16
# AFTER: 140001000: f81f0ffe str x30, [sp, #-16]!
# AFTER: 140001004: b0000000 adrp x0, 0x140002000
# AFTER: 140001008: 91001800 add x0, x0, #6
# AFTER: 14000100c: 94000026 bl 0x1400010a4
# AFTER: 140001010: 39402100 ldrb w0, [x8, #8]
# AFTER: 140001014: 79401100 ldrh w0, [x8, #8]
# AFTER: 140001018: b9400900 ldr w0, [x8, #8]
# AFTER: 14000101c: f9400500 ldr x0, [x8, #8]
# AFTER: 140001020: 39002100 strb w0, [x8, #8]
# AFTER: 140001024: 79001100 strh w0, [x8, #8]
# AFTER: 140001028: b9000900 str w0, [x8, #8]
# AFTER: 14000102c: f9000500 str x0, [x8, #8]
# AFTER: 140001030: 3d404100 ldr b0, [x8, #16]
# AFTER: 140001034: 7d402100 ldr h0, [x8, #16]
# AFTER: 140001038: bd401100 ldr s0, [x8, #16]
# AFTER: 14000103c: fd400900 ldr d0, [x8, #16]
# AFTER: 140001040: 3dc00500 ldr q0, [x8, #16]
# AFTER: 140001044: 3d004100 str b0, [x8, #16]
# AFTER: 140001048: 7d002100 str h0, [x8, #16]
# AFTER: 14000104c: bd001100 str s0, [x8, #16]
# AFTER: 140001050: fd000900 str d0, [x8, #16]
# AFTER: 140001054: 3d800500 str q0, [x8, #16]
# AFTER: 140001058: f9400900 ldr x0, [x8, #16]
# AFTER: 14000105c: f0000000 adrp x0, 0x140004000
# AFTER: 140001060: f947fc00 ldr x0, [x0, #4088]
# AFTER: 140001064: 2a1f03e0 mov w0, wzr
# AFTER: 140001068: f84107fe ldr x30, [sp], #16
# AFTER: 14000106c: d65f03c0 ret
# AFTER: 140001070: 40002010 <unknown>
# AFTER: 140001074: 00000001 udf #1
# AFTER: 140001078: 00002009 udf #8201
# AFTER: 14000107c: 00000009 udf #9
# AFTER: 140001080: 910e2000 add x0, x0, #904
# AFTER: 140001084: 91400400 add x0, x0, #1, lsl #12
# AFTER: 140001088: f941c400 ldr x0, [x0, #904]
# AFTER: 14000108c: 00000003 udf #3
# AFTER: 140001090: 300995e0 adr x0, #78525
# AFTER: 140001094: 54000081 b.ne 0x1400010a4
# AFTER: 140001098: 36000060 tbz w0, #0, 0x1400010a4
# AFTER: 14000109c: ffffff61 <unknown>
# AFTER: 1400010a0: b0fff802 adrp x2, 0x13ff02000
# AFTER: 1400010a4: b0000010 adrp x16, 0x140002000
# AFTER: 1400010a8: f9402a10 ldr x16, [x16, #80]
# AFTER: 1400010ac: d61f0200 br x16

--- !COFF
header:
Expand Down
22 changes: 11 additions & 11 deletions lld/test/COFF/arm64-thunks.s
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Original file line number Diff line number Diff line change
Expand Up @@ -27,17 +27,17 @@ func2:
ret

// DISASM: 0000000140001000 <.text>:
// DISASM: 140001000: 40 00 00 36 tbz w0, #0, 0x140001008 <.text+0x8>
// DISASM: 140001004: c0 03 5f d6 ret
// DISASM: 140001008: 50 00 00 90 adrp x16, 0x140009000
// DISASM: 14000100c: 10 52 00 91 add x16, x16, #20
// DISASM: 140001010: 00 02 1f d6 br x16
// DISASM: 140001000: 36000040 tbz w0, #0, 0x140001008 <.text+0x8>
// DISASM: 140001004: d65f03c0 ret
// DISASM: 140001008: 90000050 adrp x16, 0x140009000
// DISASM: 14000100c: 91005210 add x16, x16, #20
// DISASM: 140001010: d61f0200 br x16

// DISASM: 140009014: 60 00 00 36 tbz w0, #0, 0x140009020 <.text+0x8020>
// DISASM: 140009018: c0 03 5f d6 ret
// DISASM: 140009014: 36000060 tbz w0, #0, 0x140009020 <.text+0x8020>
// DISASM: 140009018: d65f03c0 ret

// DISASM: 140009020: 50 00 00 90 adrp x16, 0x140011000
// DISASM: 140009024: 10 b2 00 91 add x16, x16, #44
// DISASM: 140009028: 00 02 1f d6 br x16
// DISASM: 140009020: 90000050 adrp x16, 0x140011000
// DISASM: 140009024: 9100b210 add x16, x16, #44
// DISASM: 140009028: d61f0200 br x16

// DISASM: 14001102c: c0 03 5f d6 ret
// DISASM: 14001102c: d65f03c0 ret
32 changes: 16 additions & 16 deletions lld/test/COFF/armnt-blx23t.test
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Original file line number Diff line number Diff line change
Expand Up @@ -7,25 +7,25 @@

# BEFORE: Disassembly of section .text:
# BEFORE-EMPTY:
# BEFORE: 0: 70 47 bx lr
# BEFORE: 2: 00 bf nop
# BEFORE: 4: 2d e9 00 48 push.w {r11, lr}
# BEFORE: 8: eb 46 mov r11, sp
# BEFORE: a: 20 20 movs r0, #32
# BEFORE: c: 00 f0 00 f8 bl {{.+}} @ imm = #0
# BEFORE: 10: 01 30 adds r0, #1
# BEFORE: 12: bd e8 00 88 pop.w {r11, pc}
# BEFORE: 0: 4770 bx lr
# BEFORE: 2: bf00 nop
# BEFORE: 4: e92d 4800 push.w {r11, lr}
# BEFORE: 8: 46eb mov r11, sp
# BEFORE: a: 2020 movs r0, #32
# BEFORE: c: f000 f800 bl {{.+}} @ imm = #0
# BEFORE: 10: 3001 adds r0, #1
# BEFORE: 12: e8bd 8800 pop.w {r11, pc}

# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
# AFTER: 401000: 70 47 bx lr
# AFTER: 401002: 00 bf nop
# AFTER: 401004: 2d e9 00 48 push.w {r11, lr}
# AFTER: 401008: eb 46 mov r11, sp
# AFTER: 40100a: 20 20 movs r0, #32
# AFTER: 40100c: ff f7 f8 ff bl 0x401000 <.text>
# AFTER: 401010: 01 30 adds r0, #1
# AFTER: 401012: bd e8 00 88 pop.w {r11, pc}
# AFTER: 401000: 4770 bx lr
# AFTER: 401002: bf00 nop
# AFTER: 401004: e92d 4800 push.w {r11, lr}
# AFTER: 401008: 46eb mov r11, sp
# AFTER: 40100a: 2020 movs r0, #32
# AFTER: 40100c: f7ff fff8 bl 0x401000 <.text>
# AFTER: 401010: 3001 adds r0, #1
# AFTER: 401012: e8bd 8800 pop.w {r11, pc}

--- !COFF
header:
Expand Down
16 changes: 8 additions & 8 deletions lld/test/COFF/armnt-branch24t.test
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Original file line number Diff line number Diff line change
Expand Up @@ -7,18 +7,18 @@

# BEFORE: Disassembly of section .text:
# BEFORE-EMPTY:
# BEFORE: 0: 70 47 bx lr
# BEFORE: 2: 00 bf nop
# BEFORE: 4: 20 20 movs r0, #32
# BEFORE: 6: 00 f0 00 b8 b.w {{.+}} @ imm = #0
# BEFORE: 0: 4770 bx lr
# BEFORE: 2: bf00 nop
# BEFORE: 4: 2020 movs r0, #32
# BEFORE: 6: f000 b800 b.w {{.+}} @ imm = #0

# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
# AFTER: <.text>:
# AFTER: 401000: 70 47 bx lr
# AFTER: 401002: 00 bf nop
# AFTER: 401004: 20 20 movs r0, #32
# AFTER: 401006: ff f7 fb bf b.w 0x401000 <.text>
# AFTER: 401000: 4770 bx lr
# AFTER: 401002: bf00 nop
# AFTER: 401004: 2020 movs r0, #32
# AFTER: 401006: f7ff bffb b.w 0x401000 <.text>

--- !COFF
header:
Expand Down
20 changes: 10 additions & 10 deletions lld/test/COFF/armnt-mov32t-exec.test
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,19 @@

# BEFORE: Disassembly of section .text:
# BEFORE-EMPTY:
# BEFORE: 0: 70 47 bx lr
# BEFORE: 2: 00 bf nop
# BEFORE: 4: 40 f2 00 00 movw r0, #0
# BEFORE: 8: c0 f2 00 00 movt r0, #0
# BEFORE: c: 70 47 bx lr
# BEFORE: 0: 4770 bx lr
# BEFORE: 2: bf00 nop
# BEFORE: 4: f240 0000 movw r0, #0
# BEFORE: 8: f2c0 0000 movt r0, #0
# BEFORE: c: 4770 bx lr

# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
# AFTER: 1000: 70 47 bx lr
# AFTER: 1002: 00 bf nop
# AFTER: 1004: 41 f2 01 00 movw r0, #4097
# AFTER: 1008: c0 f2 40 00 movt r0, #64
# AFTER: 100c: 70 47 bx lr
# AFTER: 1000: 4770 bx lr
# AFTER: 1002: bf00 nop
# AFTER: 1004: f241 0001 movw r0, #4097
# AFTER: 1008: f2c0 0040 movt r0, #64
# AFTER: 100c: 4770 bx lr

--- !COFF
header:
Expand Down
12 changes: 6 additions & 6 deletions lld/test/COFF/armnt-movt32t.test
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Original file line number Diff line number Diff line change
Expand Up @@ -7,15 +7,15 @@

# BEFORE: Disassembly of section .text:
# BEFORE-EMPTY:
# BEFORE: 0: 40 f2 00 00 movw r0, #0
# BEFORE: 4: c0 f2 00 00 movt r0, #0
# BEFORE: 8: 70 47 bx lr
# BEFORE: 0: f240 0000 movw r0, #0
# BEFORE: 4: f2c0 0000 movt r0, #0
# BEFORE: 8: 4770 bx lr

# AFTER: Disassembly of section .text:
# AFTER-EMPTY:
# AFTER: 0: 42 f2 00 00 movw r0, #8192
# AFTER: 4: c0 f2 40 00 movt r0, #64
# AFTER: 8: 70 47 bx lr
# AFTER: 0: f242 0000 movw r0, #8192
# AFTER: 4: f2c0 0040 movt r0, #64
# AFTER: 8: 4770 bx lr

--- !COFF
header:
Expand Down
28 changes: 14 additions & 14 deletions lld/test/COFF/delayimports-armnt.yaml
View file
Original file line number Diff line number Diff line change
Expand Up @@ -52,20 +52,20 @@
# BASEREL-NEXT: ]
#
# DISASM: 00401000 <.text>:
# DISASM: 40100c: 43 f2 08 0c movw r12, #12296
# DISASM-NEXT: c0 f2 40 0c movt r12, #64
# DISASM-NEXT: 00 f0 00 b8 b.w {{.+}} @ imm = #0
# DISASM-NEXT: 2d e9 0f 48 push.w {r0, r1, r2, r3, r11, lr}
# DISASM-NEXT: 0d f2 10 0b addw r11, sp, #16
# DISASM-NEXT: 2d ed 10 0b vpush {d0, d1, d2, d3, d4, d5, d6, d7}
# DISASM-NEXT: 61 46 mov r1, r12
# DISASM-NEXT: 42 f2 00 00 movw r0, #8192
# DISASM-NEXT: c0 f2 40 00 movt r0, #64
# DISASM-NEXT: ff f7 e7 ff bl 0x401000 <.text>
# DISASM-NEXT: 84 46 mov r12, r0
# DISASM-NEXT: bd ec 10 0b vpop {d0, d1, d2, d3, d4, d5, d6, d7}
# DISASM-NEXT: bd e8 0f 48 pop.w {r0, r1, r2, r3, r11, lr}
# DISASM-NEXT: 60 47 bx r12
# DISASM: 40100c: f243 0c08 movw r12, #12296
# DISASM-NEXT: f2c0 0c40 movt r12, #64
# DISASM-NEXT: f000 b800 b.w {{.+}} @ imm = #0
# DISASM-NEXT: e92d 480f push.w {r0, r1, r2, r3, r11, lr}
# DISASM-NEXT: f20d 0b10 addw r11, sp, #16
# DISASM-NEXT: ed2d 0b10 vpush {d0, d1, d2, d3, d4, d5, d6, d7}
# DISASM-NEXT: 4661 mov r1, r12
# DISASM-NEXT: f242 0000 movw r0, #8192
# DISASM-NEXT: f2c0 0040 movt r0, #64
# DISASM-NEXT: f7ff ffe7 bl 0x401000 <.text>
# DISASM-NEXT: 4684 mov r12, r0
# DISASM-NEXT: ecbd 0b10 vpop {d0, d1, d2, d3, d4, d5, d6, d7}
# DISASM-NEXT: e8bd 480f pop.w {r0, r1, r2, r3, r11, lr}
# DISASM-NEXT: 4760 bx r12

--- !COFF
header:
Expand Down
60 changes: 30 additions & 30 deletions lld/test/ELF/aarch64-cortex-a53-843419-address.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,10 +38,10 @@

// CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.
// CHECK: <t3_ff8_ldr>:
// CHECK-NEXT: ff8: 20 00 00 d0 adrp x0, 0x6000
// CHECK-NEXT: ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-NEXT: 1000: f9 0f 00 14 b 0x4fe4
// CHECK-NEXT: 1004: c0 03 5f d6 ret
// CHECK-NEXT: ff8: d0000020 adrp x0, 0x6000
// CHECK-NEXT: ffc: f9400021 ldr x1, [x1]
// CHECK-NEXT: 1000: 14000ff9 b 0x4fe4
// CHECK-NEXT: 1004: d65f03c0 ret
.section .text.01, "ax", %progbits
.balign 4096
.space 4096 - 8
Expand All @@ -60,10 +60,10 @@ t3_ff8_ldr:
$x.999:
// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.
// CHECK: <t3_ffc_ldrsimd>:
// CHECK-NEXT: 1ffc: 20 00 00 b0 adrp x0, 0x6000
// CHECK-NEXT: 2000: 21 00 40 bd ldr s1, [x1]
// CHECK-NEXT: 2004: fa 0b 00 14 b 0x4fec
// CHECK-NEXT: 2008: c0 03 5f d6 ret
// CHECK-NEXT: 1ffc: b0000020 adrp x0, 0x6000
// CHECK-NEXT: 2000: bd400021 ldr s1, [x1]
// CHECK-NEXT: 2004: 14000bfa b 0x4fec
// CHECK-NEXT: 2008: d65f03c0 ret
.globl t3_ffc_ldrsimd
.type t3_ffc_ldrsimd, %function
.space 4096 - 12
Expand Down Expand Up @@ -97,10 +97,10 @@ t3_ff8_ldralldata:

// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.
// CHECK: <t3_ffc_ldr>:
// CHECK-NEXT: 3ff8: 00 00 00 f0 adrp x0, 0x6000
// CHECK-NEXT: 3ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK-NEXT: 4000: fd 03 00 14 b 0x4ff4
// CHECK-NEXT: 4004: c0 03 5f d6 ret
// CHECK-NEXT: 3ff8: f0000000 adrp x0, 0x6000
// CHECK-NEXT: 3ffc: f9400021 ldr x1, [x1]
// CHECK-NEXT: 4000: 140003fd b 0x4ff4
// CHECK-NEXT: 4004: d65f03c0 ret
.space 4096 - 12
.globl t3_ffc_ldr
.type t3_ffc_ldr, %function
Expand All @@ -111,14 +111,14 @@ t3_ff8_ldralldata:
ret

// CHECK: <__CortexA53843419_1000>:
// CHECK-NEXT: 4fe4: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 4fe8: 07 f0 ff 17 b 0x1004
// CHECK-NEXT: 4fe4: f9400c00 ldr x0, [x0, #24]
// CHECK-NEXT: 4fe8: 17fff007 b 0x1004
// CHECK: <__CortexA53843419_2004>:
// CHECK-NEXT: 4fec: 02 0c 40 f9 ldr x2, [x0, #24]
// CHECK-NEXT: 4ff0: 06 f4 ff 17 b 0x2008
// CHECK-NEXT: 4fec: f9400c02 ldr x2, [x0, #24]
// CHECK-NEXT: 4ff0: 17fff406 b 0x2008
// CHECK: <__CortexA53843419_4000>:
// CHECK-NEXT: 4ff4: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 4ff8: 03 fc ff 17 b 0x4004
// CHECK-NEXT: 4ff4: f9400c00 ldr x0, [x0, #24]
// CHECK-NEXT: 4ff8: 17fffc03 b 0x4004

.section .text.02, "ax", %progbits
.space 4096 - 36
Expand All @@ -129,10 +129,10 @@ t3_ff8_ldralldata:

// CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output
// CHECK: <t3_ffc_str>:
// CHECK-NEXT: 4ffc: 00 00 00 d0 adrp x0, 0x6000
// CHECK-NEXT: 5000: 21 00 00 f9 str x1, [x1]
// CHECK-NEXT: 5004: fb 03 00 14 b 0x5ff0
// CHECK-NEXT: 5008: c0 03 5f d6 ret
// CHECK-NEXT: 4ffc: d0000000 adrp x0, 0x6000
// CHECK-NEXT: 5000: f9000021 str x1, [x1]
// CHECK-NEXT: 5004: 140003fb b 0x5ff0
// CHECK-NEXT: 5008: d65f03c0 ret

.section .newisd, "ax", %progbits
.globl t3_ffc_str
Expand All @@ -145,19 +145,19 @@ t3_ffc_str:
.space 4096 - 28

// CHECK: <__CortexA53843419_5004>:
// CHECK-NEXT: 5ff0: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 5ff4: 05 fc ff 17 b 0x5008
// CHECK-NEXT: 5ff0: f9400c00 ldr x0, [x0, #24]
// CHECK-NEXT: 5ff4: 17fffc05 b 0x5008

// Start a new OutputSection (see Linker Script) so the
// start address will be affected by any patches added to previous
// InputSectionDescription.

//CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output
// CHECK: <t3_ff8_str>:
// CHECK-NEXT: 5ff8: 00 00 00 b0 adrp x0, 0x6000
// CHECK-NEXT: 5ffc: 21 00 00 f9 str x1, [x1]
// CHECK-NEXT: 6000: 03 00 00 14 b 0x600c
// CHECK-NEXT: 6004: c0 03 5f d6 ret
// CHECK-NEXT: 5ff8: b0000000 adrp x0, 0x6000
// CHECK-NEXT: 5ffc: f9000021 str x1, [x1]
// CHECK-NEXT: 6000: 14000003 b 0x600c
// CHECK-NEXT: 6004: d65f03c0 ret

.section .newos, "ax", %progbits
.globl t3_ff8_str
Expand All @@ -173,8 +173,8 @@ _start:
ret

// CHECK: <__CortexA53843419_6000>:
// CHECK-NEXT: 600c: 00 0c 40 f9 ldr x0, [x0, #24]
// CHECK-NEXT: 6010: fd ff ff 17 b 0x6004
// CHECK-NEXT: 600c: f9400c00 ldr x0, [x0, #24]
// CHECK-NEXT: 6010: 17fffffd b 0x6004

.data
.globl dat
Expand Down
44 changes: 22 additions & 22 deletions lld/test/ELF/aarch64-cortex-a53-843419-large.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,8 @@
// required.

// CHECK1: <__AArch64AbsLongThunk_need_thunk_after_patch>:
// CHECK1-NEXT: 210000: 50 00 00 58 ldr x16, 0x210008
// CHECK1-NEXT: 210004: 00 02 1f d6 br x16
// CHECK1-NEXT: 210000: 58000050 ldr x16, 0x210008
// CHECK1-NEXT: 210004: d61f0200 br x16
// CHECK1: <$d>:
// CHECK1-NEXT: 210008: 0c 10 21 08 .word 0x0821100c

Expand All @@ -30,7 +30,7 @@ _start:
.space 4096 - 12

// CHECK2: <_start>:
// CHECK2-NEXT: 211000: 00 fc ff 97 bl 0x210000
// CHECK2-NEXT: 211000: 97fffc00 bl 0x210000

// Expect patch on pass 1
.section .text.03, "ax", %progbits
Expand All @@ -43,10 +43,10 @@ t3_ff8_ldr:
ret

// CHECK3: <t3_ff8_ldr>:
// CHECK3-NEXT: 211ff8: e0 00 04 f0 adrp x0, 0x8230000
// CHECK3-NEXT: 211ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK3-NEXT: 212000: 02 08 80 15 b 0x6214008
// CHECK3-NEXT: 212004: c0 03 5f d6 ret
// CHECK3-NEXT: 211ff8: f00400e0 adrp x0, 0x8230000
// CHECK3-NEXT: 211ffc: f9400021 ldr x1, [x1]
// CHECK3-NEXT: 212000: 15800802 b 0x6214008
// CHECK3-NEXT: 212004: d65f03c0 ret

.section .text.04, "ax", %progbits
.space 64 * 1024 * 1024
Expand All @@ -64,20 +64,20 @@ t3_ff8_str:
ret

// CHECK4: <t3_ff8_str>:
// CHECK4-NEXT: 4213ff8: e0 00 02 b0 adrp x0, 0x8230000
// CHECK4-NEXT: 4213ffc: 21 00 40 f9 ldr x1, [x1]
// CHECK4-NEXT: 4214000: 04 00 80 14 b 0x6214010
// CHECK4-NEXT: 4214004: c0 03 5f d6 ret
// CHECK4-NEXT: 4213ff8: b00200e0 adrp x0, 0x8230000
// CHECK4-NEXT: 4213ffc: f9400021 ldr x1, [x1]
// CHECK4-NEXT: 4214000: 14800004 b 0x6214010
// CHECK4-NEXT: 4214004: d65f03c0 ret

.section .text.06, "ax", %progbits
.space 32 * 1024 * 1024

// CHECK5: <__CortexA53843419_211000>:
// CHECK5-NEXT: 6214008: 00 00 40 f9 ldr x0, [x0]
// CHECK5-NEXT: 621400c: fe f7 7f 16 b 0x212004
// CHECK5-NEXT: 6214008: f9400000 ldr x0, [x0]
// CHECK5-NEXT: 621400c: 167ff7fe b 0x212004
// CHECK5: <__CortexA53843419_4213000>:
// CHECK5-NEXT: 6214010: 00 00 00 f9 str x0, [x0]
// CHECK5-NEXT: 6214014: fc ff 7f 17 b 0x4214004
// CHECK5-NEXT: 6214010: f9000000 str x0, [x0]
// CHECK5-NEXT: 6214014: 177ffffc b 0x4214004

.section .text.07, "ax", %progbits
.space (32 * 1024 * 1024) - 12300
Expand All @@ -89,7 +89,7 @@ need_thunk_after_patch:
ret

// CHECK6: <need_thunk_after_patch>:
// CHECK6-NEXT: 821100c: c0 03 5f d6 ret
// CHECK6-NEXT: 821100c: d65f03c0 ret

// Will need a patch on pass 2
.section .text.09, "ax", %progbits
Expand All @@ -103,13 +103,13 @@ t3_ffc_ldr:
ret

// CHECK7: <t3_ffc_ldr>:
// CHECK7-NEXT: 8211ffc: e0 00 00 f0 adrp x0, 0x8230000
// CHECK7-NEXT: 8212000: 21 00 40 f9 ldr x1, [x1]
// CHECK7-NEXT: 8212004: 02 00 00 14 b 0x821200c
// CHECK7-NEXT: 8212008: c0 03 5f d6 ret
// CHECK7-NEXT: 8211ffc: f00000e0 adrp x0, 0x8230000
// CHECK7-NEXT: 8212000: f9400021 ldr x1, [x1]
// CHECK7-NEXT: 8212004: 14000002 b 0x821200c
// CHECK7-NEXT: 8212008: d65f03c0 ret
// CHECK7: <__CortexA53843419_8212004>:
// CHECK7-NEXT: 821200c: 00 00 40 f9 ldr x0, [x0]
// CHECK7-NEXT: 8212010: fe ff ff 17 b 0x8212008
// CHECK7-NEXT: 821200c: f9400000 ldr x0, [x0]
// CHECK7-NEXT: 8212010: 17fffffe b 0x8212008

.section .data
.globl dat
Expand Down
394 changes: 197 additions & 197 deletions lld/test/ELF/aarch64-cortex-a53-843419-recognize.s
View file

Large diffs are not rendered by default.

12 changes: 6 additions & 6 deletions lld/test/ELF/aarch64-cortex-a53-843419-tlsrelax.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,12 +24,12 @@ _start:
ret

// CHECK: <_start>:
// CHECK-NEXT: 211ff8: 41 d0 3b d5 mrs x1, TPIDR_EL0
// CHECK-NEXT: 211ffc: 00 00 a0 d2 movz x0, #0, lsl #16
// CHECK-NEXT: 212000: 01 02 80 f2 movk x1, #16
// CHECK-NEXT: 212004: 00 00 a0 d2 movz x0, #0, lsl #16
// CHECK-NEXT: 212008: 01 02 80 f2 movk x1, #16
// CHECK-NEXT: 21200c: c0 03 5f d6 ret
// CHECK-NEXT: 211ff8: d53bd041 mrs x1, TPIDR_EL0
// CHECK-NEXT: 211ffc: d2a00000 movz x0, #0, lsl #16
// CHECK-NEXT: 212000: f2800201 movk x1, #16
// CHECK-NEXT: 212004: d2a00000 movz x0, #0, lsl #16
// CHECK-NEXT: 212008: f2800201 movk x1, #16
// CHECK-NEXT: 21200c: d65f03c0 ret

.type v,@object
.section .tbss,"awT",@nobits
Expand Down
90 changes: 45 additions & 45 deletions lld/test/ELF/aarch64-relocs.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,7 @@ msgend:
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_LO21:
# CHECK-EMPTY:
# CHECK: <_start>:
# CHECK: 0: 21 00 00 10 adr x1, #4
# CHECK: 0: 10000021 adr x1, #4
# CHECK: <msg>:
# CHECK: 4:
# #4 is the adr immediate value.
Expand All @@ -30,7 +30,7 @@ mystr:
# CHECK: Disassembly of section .R_AARCH64_ADR_PREL_PG_HI21:
# CHECK-EMPTY:
# CHECK-NEXT: <$x.2>:
# CHECK-NEXT: 210132: 01 00 00 90 adrp x1, 0x210000
# CHECK-NEXT: 210132: 90000001 adrp x1, 0x210000

.section .R_AARCH64_ADD_ABS_LO12_NC,"ax",@progbits
add x0, x0, :lo12:.L.str
Expand All @@ -44,7 +44,7 @@ mystr:
# CHECK: Disassembly of section .R_AARCH64_ADD_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK-NEXT: <$x.4>:
# CHECK-NEXT: 21013b: 00 fc 04 91 add x0, x0, #319
# CHECK-NEXT: 21013b: 9104fc00 add x0, x0, #319

.section .R_AARCH64_LDST64_ABS_LO12_NC,"ax",@progbits
ldr x28, [x27, :lo12:foo]
Expand All @@ -58,7 +58,7 @@ foo:
# CHECK: Disassembly of section .R_AARCH64_LDST64_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK-NEXT: <$x.6>:
# CHECK-NEXT: 210144: 7c a7 40 f9 ldr x28, [x27, #328]
# CHECK-NEXT: 210144: f940a77c ldr x28, [x27, #328]

.section .SUB,"ax",@progbits
nop
Expand All @@ -68,9 +68,9 @@ sub:
# CHECK: Disassembly of section .SUB:
# CHECK-EMPTY:
# CHECK-NEXT: <$x.8>:
# CHECK-NEXT: 21014c: 1f 20 03 d5 nop
# CHECK-NEXT: 21014c: d503201f nop
# CHECK: <sub>:
# CHECK-NEXT: 210150: 1f 20 03 d5 nop
# CHECK-NEXT: 210150: d503201f nop

.section .R_AARCH64_CALL26,"ax",@progbits
call26:
Expand All @@ -83,7 +83,7 @@ call26:
# CHECK: Disassembly of section .R_AARCH64_CALL26:
# CHECK-EMPTY:
# CHECK-NEXT: <call26>:
# CHECK-NEXT: 210154: ff ff ff 97 bl 0x210150
# CHECK-NEXT: 210154: 97ffffff bl 0x210150

.section .R_AARCH64_JUMP26,"ax",@progbits
jump26:
Expand All @@ -96,7 +96,7 @@ jump26:
# CHECK: Disassembly of section .R_AARCH64_JUMP26:
# CHECK-EMPTY:
# CHECK-NEXT: <jump26>:
# CHECK-NEXT: 210158: fe ff ff 17 b 0x210150
# CHECK-NEXT: 210158: 17fffffe b 0x210150

.section .R_AARCH64_LDST32_ABS_LO12_NC,"ax",@progbits
ldst32:
Expand All @@ -111,7 +111,7 @@ foo32:
# CHECK: Disassembly of section .R_AARCH64_LDST32_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK-NEXT: <ldst32>:
# CHECK-NEXT: 21015c: a4 60 41 bd ldr s4, [x5, #352]
# CHECK-NEXT: 21015c: bd4160a4 ldr s4, [x5, #352]

.section .R_AARCH64_LDST8_ABS_LO12_NC,"ax",@progbits
ldst8:
Expand All @@ -126,7 +126,7 @@ foo8:
# CHECK: Disassembly of section .R_AARCH64_LDST8_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK-NEXT: <ldst8>:
# CHECK-NEXT: 210164: ab a1 85 39 ldrsb x11, [x13, #360]
# CHECK-NEXT: 210164: 3985a1ab ldrsb x11, [x13, #360]

.section .R_AARCH64_LDST128_ABS_LO12_NC,"ax",@progbits
ldst128:
Expand All @@ -141,7 +141,7 @@ foo128:
# CHECK: Disassembly of section .R_AARCH64_LDST128_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK: <ldst128>:
# CHECK: 21016c: 74 5e c0 3d ldr q20, [x19, #368]
# CHECK: 21016c: 3dc05e74 ldr q20, [x19, #368]
#foo128:
# 210170: 66 6f 6f 00 .word

Expand All @@ -160,9 +160,9 @@ foo16:
# CHECK: Disassembly of section .R_AARCH64_LDST16_ABS_LO12_NC:
# CHECK-EMPTY:
# CHECK-NEXT: <ldst16>:
# CHECK-NEXT: 210174: 71 02 43 7d ldr h17, [x19, #384]
# CHECK-NEXT: 210178: 61 02 43 79 ldrh w1, [x19, #384]
# CHECK-NEXT: 21017c: 62 06 43 79 ldrh w2, [x19, #386]
# CHECK-NEXT: 210174: 7d430271 ldr h17, [x19, #384]
# CHECK-NEXT: 210178: 79430261 ldrh w1, [x19, #384]
# CHECK-NEXT: 21017c: 79430662 ldrh w2, [x19, #386]

.section .R_AARCH64_MOVW_UABS,"ax",@progbits
movz1:
Expand All @@ -179,14 +179,14 @@ movz1:
# CHECK: Disassembly of section .R_AARCH64_MOVW_UABS:
# CHECK-EMPTY:
# CHECK-NEXT: <movz1>:
# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
# CHECK-NEXT: 8c 01 80 f2 movk x12, #12
# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
# CHECK-NEXT: ad 01 a0 f2 movk x13, #13, lsl #16
# CHECK-NEXT: ce 01 c0 f2 movk x14, #14, lsl #32
# CHECK-NEXT: ce 01 c0 f2 movk x14, #14, lsl #32
# CHECK-NEXT: ef 01 e0 d2 mov x15, #4222124650659840
# CHECK-NEXT: f0 01 e0 f2 movk x16, #15, lsl #48
# CHECK-NEXT: f280018c movk x12, #12
# CHECK-NEXT: f280018c movk x12, #12
# CHECK-NEXT: f2a001ad movk x13, #13, lsl #16
# CHECK-NEXT: f2a001ad movk x13, #13, lsl #16
# CHECK-NEXT: f2c001ce movk x14, #14, lsl #32
# CHECK-NEXT: f2c001ce movk x14, #14, lsl #32
# CHECK-NEXT: d2e001ef mov x15, #4222124650659840
# CHECK-NEXT: f2e001f0 movk x16, #15, lsl #48

.section .R_AARCH64_MOVW_SABS,"ax",@progbits
movz x1, #:abs_g0_s:zero+1
Expand All @@ -199,15 +199,15 @@ movz1:
# CHECK: Disassembly of section .R_AARCH64_MOVW_SABS:
# CHECK-EMPTY:
# CHECK-NEXT: :
# CHECK-NEXT: 21 00 80 d2 mov x1, #1
# CHECK-NEXT: 01 00 80 92 mov x1, #-1
# CHECK-NEXT: 42 00 a0 d2 mov x2, #131072
# CHECK-NEXT: d2800021 mov x1, #1
# CHECK-NEXT: 92800001 mov x1, #-1
# CHECK-NEXT: d2a00042 mov x2, #131072
## -65537 = 0xfffffffffffeffff
# CHECK-NEXT: 22 00 a0 92 mov x2, #-65537
# CHECK-NEXT: 92a00022 mov x2, #-65537
## 12884901888 = 0x300000000
# CHECK-NEXT: 63 00 c0 d2 mov x3, #12884901888
# CHECK-NEXT: d2c00063 mov x3, #12884901888
## -8589934593 = #0xfffffffdffffffff
# CHECK-NEXT: 43 00 c0 92 mov x3, #-8589934593
# CHECK-NEXT: 92c00043 mov x3, #-8589934593

.section .R_AARCH64_MOVW_PREL,"ax",@progbits
movz x1, #:prel_g0:.+1
Expand All @@ -231,24 +231,24 @@ movz1:
# CHECK: Disassembly of section .R_AARCH64_MOVW_PREL:
# CHECK-EMPTY:
# CHECK-NEXT: :
# CHECK-NEXT: 2101bc: 21 00 80 d2 mov x1, #1
# CHECK-NEXT: 2101c0: 01 00 80 92 mov x1, #-1
# CHECK-NEXT: 2101c4: 21 00 80 f2 movk x1, #1
# CHECK-NEXT: 2101c8: e1 ff 9f f2 movk x1, #65535
# CHECK-NEXT: 2101cc: 42 00 a0 d2 mov x2, #131072
# CHECK-NEXT: 2101bc: d2800021 mov x1, #1
# CHECK-NEXT: 2101c0: 92800001 mov x1, #-1
# CHECK-NEXT: 2101c4: f2800021 movk x1, #1
# CHECK-NEXT: 2101c8: f29fffe1 movk x1, #65535
# CHECK-NEXT: 2101cc: d2a00042 mov x2, #131072
## -65537 = 0xfffffffffffeffff
# CHECK-NEXT: 2101d0: 22 00 a0 92 mov x2, #-65537
# CHECK-NEXT: 2101d4: 42 00 a0 f2 movk x2, #2, lsl #16
# CHECK-NEXT: 2101d8: c2 ff bf f2 movk x2, #65534, lsl #16
# CHECK-NEXT: 2101d0: 92a00022 mov x2, #-65537
# CHECK-NEXT: 2101d4: f2a00042 movk x2, #2, lsl #16
# CHECK-NEXT: 2101d8: f2bfffc2 movk x2, #65534, lsl #16
## 12884901888 = 0x300000000
# CHECK-NEXT: 2101dc: 63 00 c0 d2 mov x3, #12884901888
# CHECK-NEXT: 2101dc: d2c00063 mov x3, #12884901888
## -8589934593 = #0xfffffffdffffffff
# CHECK-NEXT: 2101e0: 43 00 c0 92 mov x3, #-8589934593
# CHECK-NEXT: 2101e4: 63 00 c0 f2 movk x3, #3, lsl #32
# CHECK-NEXT: 2101e8: a3 ff df f2 movk x3, #65533, lsl #32
# CHECK-NEXT: 2101ec: 63 00 c0 d2 mov x3, #12884901888
# CHECK-NEXT: 2101e0: 92c00043 mov x3, #-8589934593
# CHECK-NEXT: 2101e4: f2c00063 movk x3, #3, lsl #32
# CHECK-NEXT: 2101e8: f2dfffa3 movk x3, #65533, lsl #32
# CHECK-NEXT: 2101ec: d2c00063 mov x3, #12884901888
## 1125899906842624 = 0x4000000000000
# CHECK-NEXT: 2101f0: 84 00 e0 d2 mov x4, #1125899906842624
# CHECK-NEXT: 2101f4: 84 ff ff d2 mov x4, #-1125899906842624
# CHECK-NEXT: 2101f8: 84 00 e0 f2 movk x4, #4, lsl #48
# CHECK-NEXT: 2101fc: 84 ff ff f2 movk x4, #65532, lsl #48
# CHECK-NEXT: 2101f0: d2e00084 mov x4, #1125899906842624
# CHECK-NEXT: 2101f4: d2ffff84 mov x4, #-1125899906842624
# CHECK-NEXT: 2101f8: f2e00084 movk x4, #4, lsl #48
# CHECK-NEXT: 2101fc: f2ffff84 movk x4, #65532, lsl #48
10 changes: 5 additions & 5 deletions lld/test/ELF/arm-bl-v6-inrange.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -29,14 +29,14 @@ thumbfunc:
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
// CHECK-NEXT: <thumbfunc>:
// CHECK-NEXT: 100004: 70 47 bx lr
// CHECK-NEXT: 100004: 4770 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 500000: 00 f4 00 f8 bl 0x100004 <thumbfunc>
// CHECK-NEXT: 500004: ff f3 fe ef blx 0x900004 <armfunc>
// CHECK-NEXT: 500008: 70 47 bx lr
// CHECK-NEXT: 500000: f400 f800 bl 0x100004 <thumbfunc>
// CHECK-NEXT: 500004: f3ff effe blx 0x900004 <armfunc>
// CHECK-NEXT: 500008: 4770 bx lr

.arm
.section .callee_high, "ax", %progbits
Expand All @@ -47,4 +47,4 @@ armfunc:
// CHECK: Disassembly of section .callee2:
// CHECK-EMPTY:
// CHECK-NEXT: <armfunc>:
// CHECK-NEXT: 900004: 1e ff 2f e1 bx lr
// CHECK-NEXT: 900004: e12fff1e bx lr
10 changes: 5 additions & 5 deletions lld/test/ELF/arm-bl-v6.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,8 +28,8 @@ _start:
// CHECK-ARM1: Disassembly of section .text:
// CHECK-ARM1-EMPTY:
// CHECK-ARM1-NEXT: <_start>:
// CHECK-ARM1-NEXT: 21000: 00 00 00 fa blx 0x21008 <thumbfunc>
// CHECK-ARM1-NEXT: 21004: 1e ff 2f e1 bx lr
// CHECK-ARM1-NEXT: 21000: fa000000 blx 0x21008 <thumbfunc>
// CHECK-ARM1-NEXT: 21004: e12fff1e bx lr
.thumb
.section .text.2, "ax", %progbits
.globl thumbfunc
Expand All @@ -38,14 +38,14 @@ thumbfunc:
bl farthumbfunc

// CHECK-THUMB1: <thumbfunc>:
// CHECK-THUMB1-NEXT: 21008: 00 f2 00 e8 blx 0x22100c <__ARMv5ABSLongThunk_farthumbfunc>
// CHECK-THUMB1-NEXT: 21008: f200 e800 blx 0x22100c <__ARMv5ABSLongThunk_farthumbfunc>
/// 6 Megabytes, enough to make farthumbfunc out of range of caller
/// on a v6 Arm, but not on a v7 Arm.

.section .text.3, "ax", %progbits
.space 0x200000
// CHECK-ARM2: <__ARMv5ABSLongThunk_farthumbfunc>:
// CHECK-ARM2-NEXT: 22100c: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK-ARM2-NEXT: 22100c: e51ff004 ldr pc, [pc, #-4]
// CHECK-ARM2: <$d>:
// CHECK-ARM2-NEXT: 221010: 01 20 62 00 .word 0x00622001
.section .text.4, "ax", %progbits
Expand All @@ -62,4 +62,4 @@ thumbfunc:
farthumbfunc:
bx lr
// CHECK-THUMB2: <farthumbfunc>:
// CHECK-THUMB2-NEXT: 622000: 70 47 bx lr
// CHECK-THUMB2-NEXT: 622000: 4770 bx lr
46 changes: 23 additions & 23 deletions lld/test/ELF/arm-blx.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -75,44 +75,44 @@ callee_arm_high:
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: b4: 70 47 bx lr
// CHECK-NEXT: b4: 4770 bx lr
// CHECK: <callee_low2>:
// CHECK-NEXT: b6: 70 47 bx lr
// CHECK-NEXT: b6: 4770 bx lr

// CHECK: Disassembly of section .callee2:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_arm_low>:
// CHECK-NEXT: 100: 1e ff 2f e1 bx lr
// CHECK-NEXT: 100: e12fff1e bx lr

// CHECK: Disassembly of section .caller:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 10000: 2b c0 ff fa blx 0xb4 <callee_low>
// CHECK-NEXT: 10004: 2a c0 ff fa blx 0xb4 <callee_low>
// CHECK-NEXT: 10008: 29 c0 ff fb blx 0xb6 <callee_low2>
// CHECK-NEXT: 1000c: 28 c0 ff fb blx 0xb6 <callee_low2>
// CHECK-NEXT: 10010: 3a 00 00 fa blx 0x10100 <callee_high>
// CHECK-NEXT: 10014: 39 00 00 fa blx 0x10100 <callee_high>
// CHECK-NEXT: 10018: 38 00 00 fb blx 0x10102 <callee_high2>
// CHECK-NEXT: 1001c: 37 00 00 fb blx 0x10102 <callee_high2>
/// 0x2010024 = blx_far
// CHECK-NEXT: 10020: ff ff 7f fa blx 0x2010024
/// 0x2010028 = blx_far2
// CHECK-NEXT: 10024: ff ff 7f fa blx 0x2010028
// CHECK-NEXT: 10028: 34 c0 ff eb bl 0x100 <callee_arm_low>
// CHECK-NEXT: 1002c: 33 c0 ff eb bl 0x100 <callee_arm_low>
// CHECK-NEXT: 10030: 72 00 00 eb bl 0x10200 <callee_arm_high>
// CHECK-NEXT: 10034: 71 00 00 eb bl 0x10200 <callee_arm_high>
// CHECK-NEXT: 10038: 1e ff 2f e1 bx lr
// CHECK-NEXT: 10000: faffc02b blx 0xb4 <callee_low>
// CHECK-NEXT: 10004: faffc02a blx 0xb4 <callee_low>
// CHECK-NEXT: 10008: fbffc029 blx 0xb6 <callee_low2>
// CHECK-NEXT: 1000c: fbffc028 blx 0xb6 <callee_low2>
// CHECK-NEXT: 10010: fa00003a blx 0x10100 <callee_high>
// CHECK-NEXT: 10014: fa000039 blx 0x10100 <callee_high>
// CHECK-NEXT: 10018: fb000038 blx 0x10102 <callee_high2>
// CHECK-NEXT: 1001c: fb000037 blx 0x10102 <callee_high2>
/// 0x2010024 = blx_far
// CHECK-NEXT: 10020: fa7fffff blx 0x2010024
/// 0x2010028 = blx_far2
// CHECK-NEXT: 10024: fa7fffff blx 0x2010028
// CHECK-NEXT: 10028: ebffc034 bl 0x100 <callee_arm_low>
// CHECK-NEXT: 1002c: ebffc033 bl 0x100 <callee_arm_low>
// CHECK-NEXT: 10030: eb000072 bl 0x10200 <callee_arm_high>
// CHECK-NEXT: 10034: eb000071 bl 0x10200 <callee_arm_high>
// CHECK-NEXT: 10038: e12fff1e bx lr

// CHECK: Disassembly of section .callee3:
// CHECK-EMPTY:
// CHECK: <callee_high>:
// CHECK-NEXT: 10100: 70 47 bx lr
// CHECK-NEXT: 10100: 4770 bx lr
// CHECK: <callee_high2>:
// CHECK-NEXT: 10102: 70 47 bx lr
// CHECK-NEXT: 10102: 4770 bx lr

// CHECK: Disassembly of section .callee4:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_arm_high>:
// CHECK-NEXT: 10200: 1e ff 2f e1 bx lr
// CHECK-NEXT: 10200: e12fff1e bx lr
16 changes: 8 additions & 8 deletions lld/test/ELF/arm-branch-undef-weak-plt-thunk.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,13 +24,13 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 201e4: 00 00 00 ea b 0x201ec <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
// CHECK-NEXT: 201e8: 02 00 00 eb bl 0x201f8 <__ARMv7ABSLongThunk_bar2>
// CHECK-NEXT: 201e4: ea000000 b 0x201ec <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>
// CHECK-NEXT: 201e8: eb000002 bl 0x201f8 <__ARMv7ABSLongThunk_bar2>
// CHECK: <__ARMv7ABSLongThunk_undefined_weak_we_expect_a_plt_entry_for>:
// CHECK-NEXT: 201ec: 40 c2 00 e3 movw r12, #576
// CHECK-NEXT: 201f0: 02 c2 40 e3 movt r12, #514
// CHECK-NEXT: 201f4: 1c ff 2f e1 bx r12
// CHECK-NEXT: 201ec: e300c240 movw r12, #576
// CHECK-NEXT: 201f0: e340c202 movt r12, #514
// CHECK-NEXT: 201f4: e12fff1c bx r12
// CHECK: <__ARMv7ABSLongThunk_bar2>:
// CHECK-NEXT: 201f8: 30 c2 00 e3 movw r12, #560
// CHECK-NEXT: 201fc: 02 c2 40 e3 movt r12, #514
// CHECK-NEXT: 20200: 1c ff 2f e1 bx r12
// CHECK-NEXT: 201f8: e300c230 movw r12, #560
// CHECK-NEXT: 201fc: e340c202 movt r12, #514
// CHECK-NEXT: 20200: e12fff1c bx r12
18 changes: 9 additions & 9 deletions lld/test/ELF/arm-exidx-order.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -134,32 +134,32 @@ f3:
// CHECK-SCRIPT: Disassembly of section .text:
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: <func4>:
// CHECK-SCRIPT-NEXT: 11000: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11000: e12fff1e bx lr
// CHECK-SCRIPT: <func5>:
// CHECK-SCRIPT-NEXT: 11004: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11004: e12fff1e bx lr
// CHECK-SCRIPT: <_start>:
// CHECK-SCRIPT-NEXT: 11008: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11008: e12fff1e bx lr
// CHECK-SCRIPT: <f1>:
// CHECK-SCRIPT-NEXT: 1100c: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 1100c: e12fff1e bx lr
// CHECK-SCRIPT: <f2>:
// CHECK-SCRIPT-NEXT: 11010: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11010: e12fff1e bx lr
// CHECK-SCRIPT: <f3>:
// CHECK-SCRIPT-NEXT: 11014: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11014: e12fff1e bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func1:
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: <func1>:
// CHECK-SCRIPT-NEXT: 11018: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11018: e12fff1e bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func2:
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: <func2>:
// CHECK-SCRIPT-NEXT: 1101c: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 1101c: e12fff1e bx lr
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: Disassembly of section .func3:
// CHECK-SCRIPT-EMPTY:
// CHECK-SCRIPT-NEXT: <func3>:
// CHECK-SCRIPT-NEXT: 11020: 1e ff 2f e1 bx lr
// CHECK-SCRIPT-NEXT: 11020: e12fff1e bx lr

/// Check that the .ARM.exidx section is sorted in order as the functions
/// The offset in field 1, is 32-bit so in the binary the most significant bit
Expand Down
52 changes: 26 additions & 26 deletions lld/test/ELF/arm-force-pi-thunk.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,24 +33,24 @@ low_target2:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 94: 70 47 bx lr
// CHECK-NEXT: 94: 4770 bx lr
// CHECK: <low_target>:
// CHECK-NEXT: 96: 00 f0 03 f8 bl 0xa0 <__ThumbV7PILongThunk_high_target>
// CHECK-NEXT: 9a: 00 f0 07 f8 bl 0xac <__ThumbV7PILongThunk_high_target2>
// CHECK-NEXT: 9e: d4 d4
// CHECK-NEXT: 96: f000 f803 bl 0xa0 <__ThumbV7PILongThunk_high_target>
// CHECK-NEXT: 9a: f000 f807 bl 0xac <__ThumbV7PILongThunk_high_target2>
// CHECK-NEXT: 9e: d4d4
// CHECK: <__ThumbV7PILongThunk_high_target>:
// CHECK-NEXT: a0: 4f f6 55 7c movw r12, #65365
// CHECK-NEXT: a4: c0 f2 ff 1c movt r12, #511
// CHECK-NEXT: a8: fc 44 add r12, pc
// CHECK-NEXT: aa: 60 47 bx r12
// CHECK-NEXT: a0: f64f 7c55 movw r12, #65365
// CHECK-NEXT: a4: f2c0 1cff movt r12, #511
// CHECK-NEXT: a8: 44fc add r12, pc
// CHECK-NEXT: aa: 4760 bx r12
// CHECK: <__ThumbV7PILongThunk_high_target2>:
// CHECK-NEXT: ac: 4f f6 69 7c movw r12, #65385
// CHECK-NEXT: b0: c0 f2 ff 1c movt r12, #511
// CHECK-NEXT: b4: fc 44 add r12, pc
// CHECK-NEXT: b6: 60 47 bx r12
// CHECK-NEXT: ac: f64f 7c69 movw r12, #65385
// CHECK-NEXT: b0: f2c0 1cff movt r12, #511
// CHECK-NEXT: b4: 44fc add r12, pc
// CHECK-NEXT: b6: 4760 bx r12
// CHECK: <low_target2>:
// CHECK-NEXT: b8: ff f7 f2 ff bl 0xa0 <__ThumbV7PILongThunk_high_target>
// CHECK-NEXT: bc: ff f7 f6 ff bl 0xac <__ThumbV7PILongThunk_high_target2>
// CHECK-NEXT: b8: f7ff fff2 bl 0xa0 <__ThumbV7PILongThunk_high_target>
// CHECK-NEXT: bc: f7ff fff6 bl 0xac <__ThumbV7PILongThunk_high_target2>


.section .text_high, "ax", %progbits
Expand All @@ -72,18 +72,18 @@ high_target2:
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
// CHECK-NEXT: <high_target>:
// CHECK-NEXT: 2000000: 00 f0 02 f8 bl 0x2000008 <__ThumbV7PILongThunk_low_target>
// CHECK-NEXT: 2000004: 00 f0 06 f8 bl 0x2000014 <__ThumbV7PILongThunk_low_target2>
// CHECK-NEXT: 2000000: f000 f802 bl 0x2000008 <__ThumbV7PILongThunk_low_target>
// CHECK-NEXT: 2000004: f000 f806 bl 0x2000014 <__ThumbV7PILongThunk_low_target2>
// CHECK: <__ThumbV7PILongThunk_low_target>:
// CHECK-NEXT: 2000008: 40 f2 83 0c movw r12, #131
// CHECK-NEXT: 200000c: cf f6 00 6c movt r12, #65024
// CHECK-NEXT: 2000010: fc 44 add r12, pc
// CHECK-NEXT: 2000012: 60 47 bx r12
// CHECK-NEXT: 2000008: f240 0c83 movw r12, #131
// CHECK-NEXT: 200000c: f6cf 6c00 movt r12, #65024
// CHECK-NEXT: 2000010: 44fc add r12, pc
// CHECK-NEXT: 2000012: 4760 bx r12
// CHECK: <__ThumbV7PILongThunk_low_target2>:
// CHECK-NEXT: 2000014: 40 f2 99 0c movw r12, #153
// CHECK-NEXT: 2000018: cf f6 00 6c movt r12, #65024
// CHECK-NEXT: 200001c: fc 44 add r12, pc
// CHECK-NEXT: 200001e: 60 47 bx r12
// CHECK-NEXT: 2000014: f240 0c99 movw r12, #153
// CHECK-NEXT: 2000018: f6cf 6c00 movt r12, #65024
// CHECK-NEXT: 200001c: 44fc add r12, pc
// CHECK-NEXT: 200001e: 4760 bx r12
// CHECK: <high_target2>:
// CHECK-NEXT: 2000020: ff f7 f2 ff bl 0x2000008 <__ThumbV7PILongThunk_low_target>
// CHECK-NEXT: 2000024: ff f7 f6 ff bl 0x2000014 <__ThumbV7PILongThunk_low_target2>
// CHECK-NEXT: 2000020: f7ff fff2 bl 0x2000008 <__ThumbV7PILongThunk_low_target>
// CHECK-NEXT: 2000024: f7ff fff6 bl 0x2000014 <__ThumbV7PILongThunk_low_target2>
8 changes: 4 additions & 4 deletions lld/test/ELF/arm-got-relative.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -43,10 +43,10 @@ function:
// CODE: Disassembly of section .text:
// CODE-EMPTY:
// CODE-NEXT: <_start>:
// CODE-NEXT: 101a0: 08 30 9f e5 ldr r3, [pc, #8]
// CODE-NEXT: 101a4: 08 20 9f e5 ldr r2, [pc, #8]
// CODE-NEXT: 101a8: 03 00 8f e0 add r0, pc, r3
// CODE-NEXT: 101ac: 1e ff 2f e1 bx lr
// CODE-NEXT: 101a0: e59f3008 ldr r3, [pc, #8]
// CODE-NEXT: 101a4: e59f2008 ldr r2, [pc, #8]
// CODE-NEXT: 101a8: e08f0003 add r0, pc, r3
// CODE-NEXT: 101ac: e12fff1e bx lr
// CODE: <$d.1>:
// (_GLOBAL_OFFSET_TABLE_ = 0x220c) - (0x11a8 + 8) = 0x105c
// CODE-NEXT: 101b0: 5c 00 01 00
Expand Down
6 changes: 3 additions & 3 deletions lld/test/ELF/arm-icf-exidx.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -28,7 +28,7 @@ __aeabi_unwind_cpp_pr0:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <g>:
// CHECK-NEXT: 200ec: 1e ff 2f e1 bx lr
// CHECK-NEXT: 200ec: e12fff1e bx lr
// CHECK: <__aeabi_unwind_cpp_pr0>:
// CHECK-NEXT: 200f0: 00 f0 20 e3 nop
// CHECK-NEXT: 200f4: 1e ff 2f e1 bx lr
// CHECK-NEXT: 200f0: e320f000 nop
// CHECK-NEXT: 200f4: e12fff1e bx lr
16 changes: 8 additions & 8 deletions lld/test/ELF/arm-long-thunk-converge.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,22 +6,22 @@
// RUN: rm -f %t2

// CHECK1: <__ARMv7ABSLongThunk_bar>:
// CHECK1-NEXT: 0: 0c c0 00 e3 movw r12, #12
// CHECK1-NEXT: 4: 00 c2 40 e3 movt r12, #512
// CHECK1-NEXT: 8: 1c ff 2f e1 bx r12
// CHECK1-NEXT: 0: e300c00c movw r12, #12
// CHECK1-NEXT: 4: e340c200 movt r12, #512
// CHECK1-NEXT: 8: e12fff1c bx r12
// CHECK1: <foo>:
// CHECK1-NEXT: c: fb ff ff eb bl 0x0 <__ARMv7ABSLongThunk_bar>
// CHECK1-NEXT: c: ebfffffb bl 0x0 <__ARMv7ABSLongThunk_bar>

.section .foo,"ax",%progbits,unique,1
foo:
bl bar

// CHECK2: <__ARMv7ABSLongThunk_foo>:
// CHECK2-NEXT: 2000000: 0c c0 00 e3 movw r12, #12
// CHECK2-NEXT: 2000004: 00 c0 40 e3 movt r12, #0
// CHECK2-NEXT: 2000008: 1c ff 2f e1 bx r12
// CHECK2-NEXT: 2000000: e300c00c movw r12, #12
// CHECK2-NEXT: 2000004: e340c000 movt r12, #0
// CHECK2-NEXT: 2000008: e12fff1c bx r12
// CHECK2: <bar>:
// CHECK2-NEXT: 200000c: fb ff ff eb bl 0x2000000 <__ARMv7ABSLongThunk_foo>
// CHECK2-NEXT: 200000c: ebfffffb bl 0x2000000 <__ARMv7ABSLongThunk_foo>

.section .bar,"ax",%progbits,unique,1
bar:
Expand Down
4 changes: 2 additions & 2 deletions lld/test/ELF/arm-reloc-abs32.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,10 +13,10 @@ _start:
// S + A = 0x124
// CHECK: Disassembly of section .R_ARM_ABS32POS:
// CHECK-EMPTY:
// CHECK: 24 01 00 00
// CHECK: 00000124
.section .R_ARM_ABS32NEG, "ax",%progbits
.word foo - 0x24
// S = 0x100, A = -0x24
// CHECK: Disassembly of section .R_ARM_ABS32NEG:
// CHECK-EMPTY:
// CHECK: dc 00 00 00
// CHECK: 000000dc
2 changes: 1 addition & 1 deletion lld/test/ELF/arm-sbrel32.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,7 +33,7 @@ foo4: .space 4
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 200d4: 1e ff 2f e1 bx lr
// CHECK-NEXT: 200d4: e12fff1e bx lr
// CHECK: 200d8: 00 00 00 00 .word 0x00000000
// CHECK-NEXT: 200dc: 04 00 00 00 .word 0x00000004
// CHECK-NEXT: 200e0: 08 00 00 00 .word 0x00000008
Expand Down
24 changes: 12 additions & 12 deletions lld/test/ELF/arm-thumb-branch.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -42,26 +42,26 @@ callee_high:
// CHECK: Disassembly of section .callee1:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: b4: 70 47 bx lr
// CHECK-NEXT: b4: 4770 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 10000: f0 f7 58 f8 bl 0xb4 <callee_low>
// CHECK-NEXT: 10004: f0 f7 56 b8 b.w 0xb4 <callee_low>
// CHECK-NEXT: 10008: 30 f4 54 a8 beq.w 0xb4 <callee_low>
// CHECK-NEXT: 1000c: 00 f0 0c f8 bl 0x10028 <callee_high>
// CHECK-NEXT: 10010: 00 f0 0a b8 b.w 0x10028 <callee_high>
// CHECK-NEXT: 10014: 40 f0 08 80 bne.w 0x10028 <callee_high>
// CHECK-NEXT: 10000: f7f0 f858 bl 0xb4 <callee_low>
// CHECK-NEXT: 10004: f7f0 b856 b.w 0xb4 <callee_low>
// CHECK-NEXT: 10008: f430 a854 beq.w 0xb4 <callee_low>
// CHECK-NEXT: 1000c: f000 f80c bl 0x10028 <callee_high>
// CHECK-NEXT: 10010: f000 b80a b.w 0x10028 <callee_high>
// CHECK-NEXT: 10014: f040 8008 bne.w 0x10028 <callee_high>
/// far_uncond = 0x101001b
// CHECK-NEXT: 10018: ff f3 ff d7 bl 0x101001a
// CHECK-NEXT: 1001c: ff f3 fd 97 b.w 0x101001a
// CHECK-NEXT: 10018: f3ff d7ff bl 0x101001a
// CHECK-NEXT: 1001c: f3ff 97fd b.w 0x101001a
/// far_cond = 0x110023
// CHECK-NEXT: 10020: 3f f3 ff af bgt.w 0x110022
// CHECK-NEXT: 10024: 70 47 bx lr
// CHECK-NEXT: 10020: f33f afff bgt.w 0x110022
// CHECK-NEXT: 10024: 4770 bx lr
// CHECK-NEXT: 10026:
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .callee2:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_high>:
// CHECK-NEXT: 10028: 70 47 bx lr
// CHECK-NEXT: 10028: 4770 bx lr
34 changes: 17 additions & 17 deletions lld/test/ELF/arm-thumb-condbranch-thunk.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -36,29 +36,29 @@ _start:
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
// CHECK1-NEXT: <tfunc00>:
// CHECK1-NEXT: 80000: 70 47 bx lr
// CHECK1-NEXT: 80002: 7f f3 ff d7 bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc33>
// CHECK1-NEXT: 80000: 4770 bx lr
// CHECK1-NEXT: 80002: f37f d7ff bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc33>
// CHECK1: <__Thumbv7ABSLongThunk_tfunc05>:
// CHECK1-NEXT: 80008: 7f f2 fa bf b.w 0x300000 <tfunc05>
// CHECK1-NEXT: 80008: f27f bffa b.w 0x300000 <tfunc05>
// CHECK1: <__Thumbv7ABSLongThunk_tfunc00>:
// CHECK1-NEXT: 8000c: ff f7 f8 bf b.w 0x80000 <tfunc00>
// CHECK1-NEXT: 8000c: f7ff bff8 b.w 0x80000 <tfunc00>
FUNCTION 01
// tfunc02 is within range of tfunc02
beq.w tfunc02
// tfunc05 is out of range, and we can't reach the pre-created Thunk Section
// create a new one.
bne.w tfunc05
// CHECK2: <tfunc01>:
// CHECK2-NEXT: 100000: 70 47 bx lr
// CHECK2-NEXT: 100002: 3f f0 fd a7 beq.w 0x180000 <tfunc02>
// CHECK2-NEXT: 100006: 7f f4 ff a7 bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05>
// CHECK2-NEXT: 100000: 4770 bx lr
// CHECK2-NEXT: 100002: f03f a7fd beq.w 0x180000 <tfunc02>
// CHECK2-NEXT: 100006: f47f a7ff bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05>
FUNCTION 02
// We can reach the Thunk Section created for bne.w tfunc05
bne.w tfunc05
beq.w tfunc00
// CHECK3: 180000: 70 47 bx lr
// CHECK3-NEXT: 180002: 40 f4 01 80 bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05>
// CHECK3-NEXT: 180006: 00 f4 01 80 beq.w 0x8000c <__Thumbv7ABSLongThunk_tfunc00>
// CHECK3: 180000: 4770 bx lr
// CHECK3-NEXT: 180002: f440 8001 bne.w 0x80008 <__Thumbv7ABSLongThunk_tfunc05>
// CHECK3-NEXT: 180006: f400 8001 beq.w 0x8000c <__Thumbv7ABSLongThunk_tfunc00>
FUNCTION 03
FUNCTION 04
FUNCTION 05
Expand All @@ -67,13 +67,13 @@ _start:
FUNCTION 08
FUNCTION 09
// CHECK4: <__Thumbv7ABSLongThunk_tfunc03>:
// CHECK4-NEXT: 500004: ff f4 fc bf b.w 0x200000 <tfunc03>
// CHECK4-NEXT: 500004: f4ff bffc b.w 0x200000 <tfunc03>
FUNCTION 10
// We can't reach any Thunk Section, create a new one
beq.w tfunc03
// CHECK5: <tfunc10>:
// CHECK5-NEXT: 580000: 70 47 bx lr
// CHECK5-NEXT: 580002: 3f f4 ff a7 beq.w 0x500004 <__Thumbv7ABSLongThunk_tfunc03>
// CHECK5-NEXT: 580000: 4770 bx lr
// CHECK5-NEXT: 580002: f43f a7ff beq.w 0x500004 <__Thumbv7ABSLongThunk_tfunc03>
FUNCTION 11
FUNCTION 12
FUNCTION 13
Expand All @@ -96,13 +96,13 @@ _start:
FUNCTION 30
FUNCTION 31
// CHECK6: <__Thumbv7ABSLongThunk_tfunc33>:
// CHECK6-NEXT: 1000004: ff f0 fc bf b.w 0x1100000 <tfunc33>
// CHECK6-NEXT: 1000004: f0ff bffc b.w 0x1100000 <tfunc33>
// CHECK6: <__Thumbv7ABSLongThunk_tfunc00>:
// CHECK6-NEXT: 1000008: 7f f4 fa 97 b.w 0x80000 <tfunc00>
// CHECK6-NEXT: 1000008: f47f 97fa b.w 0x80000 <tfunc00>
FUNCTION 32
FUNCTION 33
// We should be able to reach an existing ThunkSection.
b.w tfunc00
// CHECK7: <tfunc33>:
// CHECK7-NEXT: 1100000: 70 47 bx lr
// CHECK7-NEXT: 1100002: 00 f7 01 b8 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc00>
// CHECK7-NEXT: 1100000: 4770 bx lr
// CHECK7-NEXT: 1100002: f700 b801 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc00>
28 changes: 14 additions & 14 deletions lld/test/ELF/arm-thumb-interwork-thunk-v5.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -27,32 +27,32 @@ _start:
bx lr

// CHECK: <_start>:
// CHECK-NEXT: 21000: 03 00 00 ea b 0x21014 <__ARMv5ABSLongThunk_thumb_func>
// CHECK-NEXT: 21004: 01 00 00 fa blx 0x21010 <thumb_func>
// CHECK-NEXT: 21008: 00 00 00 fa blx 0x21010 <thumb_func>
// CHECK-NEXT: 2100c: 1e ff 2f e1 bx lr
// CHECK-NEXT: 21000: ea000003 b 0x21014 <__ARMv5ABSLongThunk_thumb_func>
// CHECK-NEXT: 21004: fa000001 blx 0x21010 <thumb_func>
// CHECK-NEXT: 21008: fa000000 blx 0x21010 <thumb_func>
// CHECK-NEXT: 2100c: e12fff1e bx lr

// CHECK: <thumb_func>:
// CHECK-NEXT: 21010: 70 47 bx lr
// CHECK-NEXT: 21010: 4770 bx lr

// CHECK: <__ARMv5ABSLongThunk_thumb_func>:
// CHECK-NEXT: 21014: 04 f0 1f e5 ldr pc, [pc, #-4]
// CHECK-NEXT: 21014: e51ff004 ldr pc, [pc, #-4]
// CHECK: <$d>:
// CHECK-NEXT: 21018: 11 10 02 00 .word 0x00021011

// CHECK-PI: <_start>:
// CHECK-PI-NEXT: 11000: 03 00 00 ea b 0x11014 <__ARMV5PILongThunk_thumb_func>
// CHECK-PI-NEXT: 11004: 01 00 00 fa blx 0x11010 <thumb_func>
// CHECK-PI-NEXT: 11008: 00 00 00 fa blx 0x11010 <thumb_func>
// CHECK-PI-NEXT: 1100c: 1e ff 2f e1 bx lr
// CHECK-PI-NEXT: 11000: ea000003 b 0x11014 <__ARMV5PILongThunk_thumb_func>
// CHECK-PI-NEXT: 11004: fa000001 blx 0x11010 <thumb_func>
// CHECK-PI-NEXT: 11008: fa000000 blx 0x11010 <thumb_func>
// CHECK-PI-NEXT: 1100c: e12fff1e bx lr

// CHECK-PI: <thumb_func>:
// CHECK-PI-NEXT: 11010: 70 47 bx lr
// CHECK-PI-NEXT: 11010: 4770 bx lr

// CHECK-PI: <__ARMV5PILongThunk_thumb_func>:
// CHECK-PI-NEXT: 11014: 04 c0 9f e5 ldr r12, [pc, #4]
// CHECK-PI-NEXT: 11018: 0c c0 8f e0 add r12, pc, r12
// CHECK-PI-NEXT: 1101c: 1c ff 2f e1 bx r12
// CHECK-PI-NEXT: 11014: e59fc004 ldr r12, [pc, #4]
// CHECK-PI-NEXT: 11018: e08fc00c add r12, pc, r12
// CHECK-PI-NEXT: 1101c: e12fff1c bx r12
// CHECK-PI: <$d>:
// CHECK-PI-NEXT: 11020: f1 ff ff ff .word 0xfffffff1

Expand Down
72 changes: 36 additions & 36 deletions lld/test/ELF/arm-thumb-mix-range-thunk-os.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -61,22 +61,22 @@ _start:
b afunc32
bne afunc32
// CHECK1: <afunc00>:
// CHECK1-NEXT: 100000: 1e ff 2f e1 bx lr
// CHECK1-NEXT: 100004: fd ff 7b fa blx 0x2000000 <tfunc31>
// CHECK1-NEXT: 100008: fd ff 3b ea b 0x1000004 <__ARMv7ABSLongThunk_tfunc31>
// CHECK1-NEXT: 10000c: fc ff 3b 0a beq 0x1000004 <__ARMv7ABSLongThunk_tfunc31>
// CHECK1-NEXT: 100010: fa ff 7f eb bl 0x2100000 <afunc32>
// CHECK1-NEXT: 100014: f9 ff 7f ea b 0x2100000 <afunc32>
// CHECK1-NEXT: 100018: f8 ff 7f 1a bne 0x2100000 <afunc32>
// CHECK1-NEXT: 100000: e12fff1e bx lr
// CHECK1-NEXT: 100004: fa7bfffd blx 0x2000000 <tfunc31>
// CHECK1-NEXT: 100008: ea3bfffd b 0x1000004 <__ARMv7ABSLongThunk_tfunc31>
// CHECK1-NEXT: 10000c: 0a3bfffc beq 0x1000004 <__ARMv7ABSLongThunk_tfunc31>
// CHECK1-NEXT: 100010: eb7ffffa bl 0x2100000 <afunc32>
// CHECK1-NEXT: 100014: ea7ffff9 b 0x2100000 <afunc32>
// CHECK1-NEXT: 100018: 1a7ffff8 bne 0x2100000 <afunc32>
THUMBFUNCTION 01
// Expect Thumb bl to be in range (can use blx to change state)
bl afunc14
// In range but need thunk to change state to Thumb
b.w afunc14
// CHECK2: <tfunc01>:
// CHECK2-NEXT: 200000: 70 47 bx lr
// CHECK2-NEXT: 200002: ff f0 fe c7 blx 0xf00000 <afunc14>
// CHECK2-NEXT: 200006: 00 f2 03 90 b.w 0x1000010 <__Thumbv7ABSLongThunk_afunc14>
// CHECK2-NEXT: 200000: 4770 bx lr
// CHECK2-NEXT: 200002: f0ff c7fe blx 0xf00000 <afunc14>
// CHECK2-NEXT: 200006: f200 9003 b.w 0x1000010 <__Thumbv7ABSLongThunk_afunc14>

ARMFUNCTION 02
THUMBFUNCTION 03
Expand All @@ -92,13 +92,13 @@ _start:
THUMBFUNCTION 13
ARMFUNCTION 14
// CHECK3: <__ARMv7ABSLongThunk_tfunc31>:
// CHECK3-NEXT: 1000004: 01 c0 00 e3 movw r12, #1
// CHECK3-NEXT: 1000008: 00 c2 40 e3 movt r12, #512
// CHECK3-NEXT: 100000c: 1c ff 2f e1 bx r12
// CHECK3-NEXT: 1000004: e300c001 movw r12, #1
// CHECK3-NEXT: 1000008: e340c200 movt r12, #512
// CHECK3-NEXT: 100000c: e12fff1c bx r12
// CHECK4: <__Thumbv7ABSLongThunk_afunc14>:
// CHECK4-NEXT: 1000010: 40 f2 00 0c movw r12, #0
// CHECK4-NEXT: 1000014: c0 f2 f0 0c movt r12, #240
// CHECK4-NEXT: 1000018: 60 47 bx r12
// CHECK4-NEXT: 1000010: f240 0c00 movw r12, #0
// CHECK4-NEXT: 1000014: f2c0 0cf0 movt r12, #240
// CHECK4-NEXT: 1000018: 4760 bx r12
THUMBFUNCTION 15
ARMFUNCTION 16
THUMBFUNCTION 17
Expand All @@ -117,22 +117,22 @@ _start:
ARMFUNCTION 30
// Expect precreated Thunk Section here
// CHECK5: <__Thumbv7ABSLongThunk_afunc00>:
// CHECK5-NEXT: 1f00004: 40 f2 00 0c movw r12, #0
// CHECK5-NEXT: 1f00008: c0 f2 10 0c movt r12, #16
// CHECK5-NEXT: 1f0000c: 60 47 bx r12
// CHECK5-NEXT: 1f00004: f240 0c00 movw r12, #0
// CHECK5-NEXT: 1f00008: f2c0 0c10 movt r12, #16
// CHECK5-NEXT: 1f0000c: 4760 bx r12
THUMBFUNCTION 31
ARMFUNCTION 32
THUMBFUNCTION 33
// Out of range, can only reach closest Thunk Section
bl afunc00
// CHECK6: <tfunc33>:
// CHECK6-NEXT: 2200000: 70 47 bx lr
// CHECK6-NEXT: 2200002: ff f4 ff ff bl 0x1f00004 <__Thumbv7ABSLongThunk_afunc00>
// CHECK6-NEXT: 2200000: 4770 bx lr
// CHECK6-NEXT: 2200002: f4ff ffff bl 0x1f00004 <__Thumbv7ABSLongThunk_afunc00>
ARMFUNCTION 34
// Out of range, can reach earlier Thunk Section
// CHECK7: <afunc34>:
// CHECK7-NEXT: 2300000: 1e ff 2f e1 bx lr
// CHECK7-NEXT: 2300004: fe ff ef fa blx 0x1f00004 <__Thumbv7ABSLongThunk_afunc00>
// CHECK7-NEXT: 2300000: e12fff1e bx lr
// CHECK7-NEXT: 2300004: faeffffe blx 0x1f00004 <__Thumbv7ABSLongThunk_afunc00>
bl afunc00
THUMBFUNCTION 35
ARMFUNCTION 36
Expand All @@ -147,21 +147,21 @@ _start:
THUMBFUNCTION 45
// Expect precreated Thunk Section here
// CHECK8: <__ARMv7ABSLongThunk_tfunc35>:
// CHECK8-NEXT: 2e00004: 01 c0 00 e3 movw r12, #1
// CHECK8-NEXT: 2e00008: 40 c2 40 e3 movt r12, #576
// CHECK8-NEXT: 2e0000c: 1c ff 2f e1 bx r12
// CHECK8-NEXT: 2e00004: e300c001 movw r12, #1
// CHECK8-NEXT: 2e00008: e340c240 movt r12, #576
// CHECK8-NEXT: 2e0000c: e12fff1c bx r12
ARMFUNCTION 46
THUMBFUNCTION 47
ARMFUNCTION 48
THUMBFUNCTION 49
ARMFUNCTION 50
// Expect precreated Thunk Section here
// CHECK9: <__Thumbv7ABSLongThunk_afunc34>:
// CHECK9-NEXT: 3300004: 40 f2 00 0c movw r12, #0
// CHECK9-NEXT: 3300008: c0 f2 30 2c movt r12, #560
// CHECK9-NEXT: 330000c: 60 47 bx r12
// CHECK9-NEXT: 3300004: f240 0c00 movw r12, #0
// CHECK9-NEXT: 3300008: f2c0 2c30 movt r12, #560
// CHECK9-NEXT: 330000c: 4760 bx r12
// CHECK9: <__Thumbv7ABSLongThunk_tfunc35>:
// CHECK9-NEXT: 330000e: ff f4 f7 97 b.w 0x2400000 <tfunc35>
// CHECK9-NEXT: 330000e: f4ff 97f7 b.w 0x2400000 <tfunc35>
THUMBFUNCTION 51
ARMFUNCTION 52
THUMBFUNCTION 53
Expand All @@ -180,14 +180,14 @@ _start:
bl afunc34
b tfunc35
// CHECK10: <afunc64>:
// CHECK10-NEXT: 4100000: 1e ff 2f e1 bx lr
// CHECK10-NEXT: 4100004: fd ff 87 eb bl 0x2300000 <afunc34>
// CHECK10-NEXT: 4100008: fd ff b3 ea b 0x2e00004 <__ARMv7ABSLongThunk_tfunc35>
// CHECK10-NEXT: 4100000: e12fff1e bx lr
// CHECK10-NEXT: 4100004: eb87fffd bl 0x2300000 <afunc34>
// CHECK10-NEXT: 4100008: eab3fffd b 0x2e00004 <__ARMv7ABSLongThunk_tfunc35>
THUMBFUNCTION 65
// afunc34 and tfunc35 are both out of range
bl afunc34
bl tfunc35
// CHECK11: <tfunc65>:
// CHECK11: 4200000: 70 47 bx lr
// CHECK11-NEXT: 4200002: ff f4 ff d7 bl 0x3300004 <__Thumbv7ABSLongThunk_afunc34>
// CHECK11-NEXT: 4200006: 00 f5 02 d0 bl 0x330000e <__Thumbv7ABSLongThunk_tfunc35>
// CHECK11: 4200000: 4770 bx lr
// CHECK11-NEXT: 4200002: f4ff d7ff bl 0x3300004 <__Thumbv7ABSLongThunk_afunc34>
// CHECK11-NEXT: 4200006: f500 d002 bl 0x330000e <__Thumbv7ABSLongThunk_tfunc35>
28 changes: 14 additions & 14 deletions lld/test/ELF/arm-thumb-narrow-branch-check.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -62,33 +62,33 @@ callee_high_far = 0x180d
// CHECK: Disassembly of section .callee_low:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_low>:
// CHECK-NEXT: 1000: 70 47 bx lr
// CHECK-NEXT: 1000: 4770 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .caller:
// CHECK-EMPTY:
// CHECK-NEXT: <callers>:
/// callee_low_far = 0x809
// CHECK-NEXT: 1004: 00 e4 b 0x808
// CHECK-NEXT: 1006: fb e7 b 0x1000 <callee_low>
// CHECK-NEXT: 1008: 06 e0 b 0x1018 <callee_high>
// CHECK-NEXT: 1004: e400 b 0x808
// CHECK-NEXT: 1006: e7fb b 0x1000 <callee_low>
// CHECK-NEXT: 1008: e006 b 0x1018 <callee_high>
/// callee_high_far = 0x180d
// CHECK-NEXT: 100a: ff e3 b 0x180c
// CHECK-NEXT: 100a: e3ff b 0x180c
/// callee_low_near = 0xfff
// CHECK-NEXT: 100c: f7 d0 beq 0xffe
// CHECK-NEXT: 100e: f7 d0 beq 0x1000 <callee_low>
// CHECK-NEXT: 1010: 02 d0 beq 0x1018 <callee_high>
// CHECK-NEXT: 100c: d0f7 beq 0xffe
// CHECK-NEXT: 100e: d0f7 beq 0x1000 <callee_low>
// CHECK-NEXT: 1010: d002 beq 0x1018 <callee_high>
/// callee_high_near = 0x10ff
// CHECK-NEXT: 1012: 74 d0 beq 0x10fe
// CHECK-NEXT: 1014: 70 47 bx lr
// CHECK-NEXT: 1016: c0 46 mov r8, r8
// CHECK-NEXT: 1012: d074 beq 0x10fe
// CHECK-NEXT: 1014: 4770 bx lr
// CHECK-NEXT: 1016: 46c0 mov r8, r8
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .callee_high:
// CHECK-EMPTY:
// CHECK-NEXT: <callee_high>:
// CHECK-NEXT: 1018: 70 47 bx lr
// CHECK-NEXT: 1018: 4770 bx lr
// CHECK-EMPTY:
// CHECK-NEXT: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 101c: ff f7 f2 ff bl 0x1004 <callers>
// CHECK-NEXT: 1020: 70 47 bx lr
// CHECK-NEXT: 101c: f7ff fff2 bl 0x1004 <callers>
// CHECK-NEXT: 1020: 4770 bx lr
74 changes: 37 additions & 37 deletions lld/test/ELF/arm-thumb-plt-range-thunk-os.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -38,38 +38,38 @@ preemptible:
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
// CHECK1-NEXT: <sym1>:
// CHECK1-NEXT: 2000000: 00 f0 00 d8 bl 0x2800004 <__ThumbV7PILongThunk_elsewhere>
// CHECK1-NEXT: 2000004: 00 f0 04 d8 bl 0x2800010 <__ThumbV7PILongThunk_preemptible>
// CHECK1-NEXT: 2000008: 70 47 bx lr
// CHECK1-NEXT: 2000000: f000 d800 bl 0x2800004 <__ThumbV7PILongThunk_elsewhere>
// CHECK1-NEXT: 2000004: f000 d804 bl 0x2800010 <__ThumbV7PILongThunk_preemptible>
// CHECK1-NEXT: 2000008: 4770 bx lr
// CHECK1: <preemptible>:
// CHECK1-NEXT: 200000a: 00 f0 07 d8 bl 0x280001c <__ThumbV7PILongThunk_far_preemptible>
// CHECK1-NEXT: 200000e: 00 f0 0b d8 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
// CHECK1-NEXT: 2000012: 00 f0 09 d8 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
// CHECK1-NEXT: 2000016: 70 47 bx lr
// CHECK1-NEXT: 200000a: f000 d807 bl 0x280001c <__ThumbV7PILongThunk_far_preemptible>
// CHECK1-NEXT: 200000e: f000 d80b bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
// CHECK1-NEXT: 2000012: f000 d809 bl 0x2800028 <__ThumbV7PILongThunk_far_nonpreemptible>
// CHECK1-NEXT: 2000016: 4770 bx lr

.section .text.2, "ax", %progbits
.balign 0x0800000
bx lr
// CHECK2: <__ThumbV7PILongThunk_elsewhere>:
// CHECK2-NEXT: 2800004: 40 f2 20 0c movw r12, #32
// CHECK2-NEXT: 2800008: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 280000c: fc 44 add r12, pc
// CHECK2-NEXT: 280000e: 60 47 bx r12
// CHECK2-NEXT: 2800004: f240 0c20 movw r12, #32
// CHECK2-NEXT: 2800008: f2c0 1c80 movt r12, #384
// CHECK2-NEXT: 280000c: 44fc add r12, pc
// CHECK2-NEXT: 280000e: 4760 bx r12
// CHECK2: <__ThumbV7PILongThunk_preemptible>:
// CHECK2-NEXT: 2800010: 40 f2 24 0c movw r12, #36
// CHECK2-NEXT: 2800014: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 2800018: fc 44 add r12, pc
// CHECK2-NEXT: 280001a: 60 47 bx r12
// CHECK2-NEXT: 2800010: f240 0c24 movw r12, #36
// CHECK2-NEXT: 2800014: f2c0 1c80 movt r12, #384
// CHECK2-NEXT: 2800018: 44fc add r12, pc
// CHECK2-NEXT: 280001a: 4760 bx r12
// CHECK2: <__ThumbV7PILongThunk_far_preemptible>:
// CHECK2-NEXT: 280001c: 40 f2 28 0c movw r12, #40
// CHECK2-NEXT: 2800020: c0 f2 80 1c movt r12, #384
// CHECK2-NEXT: 2800024: fc 44 add r12, pc
// CHECK2-NEXT: 2800026: 60 47 bx r12
// CHECK2-NEXT: 280001c: f240 0c28 movw r12, #40
// CHECK2-NEXT: 2800020: f2c0 1c80 movt r12, #384
// CHECK2-NEXT: 2800024: 44fc add r12, pc
// CHECK2-NEXT: 2800026: 4760 bx r12
// CHECK2: <__ThumbV7PILongThunk_far_nonpreemptible>:
// CHECK2-NEXT: 2800028: 4f f6 cd 7c movw r12, #65485
// CHECK2-NEXT: 280002c: c0 f2 7f 1c movt r12, #383
// CHECK2-NEXT: 2800030: fc 44 add r12, pc
// CHECK2-NEXT: 2800032: 60 47 bx r12
// CHECK2-NEXT: 2800028: f64f 7ccd movw r12, #65485
// CHECK2-NEXT: 280002c: f2c0 1c7f movt r12, #383
// CHECK2-NEXT: 2800030: 44fc add r12, pc
// CHECK2-NEXT: 2800032: 4760 bx r12

.section .text.3, "ax", %progbits
.balign 0x2000000
Expand All @@ -83,35 +83,35 @@ far_nonpreemptible_alias:
bl elsewhere

// CHECK3: <far_preemptible>:
// CHECK3: 4000000: 00 f0 16 e8 blx 0x4000030
// CHECK3: 4000000: f000 e816 blx 0x4000030

// CHECK4: Disassembly of section .plt:
// CHECK4-EMPTY:
// CHECK4-NEXT: <$a>:
// CHECK4-NEXT: 4000010: 04 e0 2d e5 str lr, [sp, #-4]!
// CHECK4-NEXT: 4000014: 00 e6 8f e2 add lr, pc, #0, #12
// CHECK4-NEXT: 4000018: 20 ea 8e e2 add lr, lr, #32
// CHECK4-NEXT: 400001c: a4 f0 be e5 ldr pc, [lr, #164]!
// CHECK4-NEXT: 4000010: e52de004 str lr, [sp, #-4]!
// CHECK4-NEXT: 4000014: e28fe600 add lr, pc, #0, #12
// CHECK4-NEXT: 4000018: e28eea20 add lr, lr, #32
// CHECK4-NEXT: 400001c: e5bef0a4 ldr pc, [lr, #164]!
// CHECK4: <$d>:
// CHECK4-NEXT: 4000020: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 4000024: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 4000028: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4-NEXT: 400002c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000030: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000034: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000038: 8c f0 bc e5 ldr pc, [r12, #140]!
// CHECK4-NEXT: 4000030: e28fc600 add r12, pc, #0, #12
// CHECK4-NEXT: 4000034: e28cca20 add r12, r12, #32
// CHECK4-NEXT: 4000038: e5bcf08c ldr pc, [r12, #140]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400003c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000040: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000044: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000048: 80 f0 bc e5 ldr pc, [r12, #128]!
// CHECK4-NEXT: 4000040: e28fc600 add r12, pc, #0, #12
// CHECK4-NEXT: 4000044: e28cca20 add r12, r12, #32
// CHECK4-NEXT: 4000048: e5bcf080 ldr pc, [r12, #128]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400004c: d4 d4 d4 d4 .word 0xd4d4d4d4
// CHECK4: <$a>:
// CHECK4-NEXT: 4000050: 00 c6 8f e2 add r12, pc, #0, #12
// CHECK4-NEXT: 4000054: 20 ca 8c e2 add r12, r12, #32
// CHECK4-NEXT: 4000058: 74 f0 bc e5 ldr pc, [r12, #116]!
// CHECK4-NEXT: 4000050: e28fc600 add r12, pc, #0, #12
// CHECK4-NEXT: 4000054: e28cca20 add r12, r12, #32
// CHECK4-NEXT: 4000058: e5bcf074 ldr pc, [r12, #116]!
// CHECK4: <$d>:
// CHECK4-NEXT: 400005c: d4 d4 d4 d4 .word 0xd4d4d4d4
54 changes: 27 additions & 27 deletions lld/test/ELF/arm-thumb-plt-reloc.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,44 +25,44 @@ _start:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <func1>:
// CHECK-NEXT: 200b4: 70 47 bx lr
// CHECK-NEXT: 200b4: 4770 bx lr
// CHECK: <func2>:
// CHECK-NEXT: 200b6: 70 47 bx lr
// CHECK-NEXT: 200b6: 4770 bx lr
// CHECK: <func3>:
// CHECK-NEXT: 200b8: 70 47 bx lr
// CHECK-NEXT: 200ba: d4 d4
// CHECK-NEXT: 200b8: 4770 bx lr
// CHECK-NEXT: 200ba: d4d4
// CHECK: <_start>:
// CHECK-NEXT: 200bc: ff f7 fa ff bl 0x200b4 <func1>
// CHECK-NEXT: 200c0: ff f7 f9 ff bl 0x200b6 <func2>
// CHECK-NEXT: 200c4: ff f7 f8 ff bl 0x200b8 <func3>
// CHECK-NEXT: 200bc: f7ff fffa bl 0x200b4 <func1>
// CHECK-NEXT: 200c0: f7ff fff9 bl 0x200b6 <func2>
// CHECK-NEXT: 200c4: f7ff fff8 bl 0x200b8 <func3>

// Expect PLT entries as symbols can be preempted
// .text is Thumb and .plt is ARM, llvm-objdump can currently only disassemble
// as ARM or Thumb. Work around by disassembling twice.
// DSO: Disassembly of section .text:
// DSO-EMPTY:
// DSO-NEXT: <func1>:
// DSO-NEXT: 10214: 70 47 bx lr
// DSO-NEXT: 10214: 4770 bx lr
// DSO: <func2>:
// DSO-NEXT: 10216: 70 47 bx lr
// DSO-NEXT: 10216: 4770 bx lr
// DSO: <func3>:
// DSO-NEXT: 10218: 70 47 bx lr
// DSO-NEXT: 1021a: d4 d4
// DSO-NEXT: 10218: 4770 bx lr
// DSO-NEXT: 1021a: d4d4
// DSO: <_start>:
// 0x10250 = PLT func1
// DSO-NEXT: 1021c: 00 f0 18 e8 blx 0x10250
// DSO-NEXT: 1021c: f000 e818 blx 0x10250
// 0x10260 = PLT func2
// DSO-NEXT: 10220: 00 f0 1e e8 blx 0x10260
// DSO-NEXT: 10220: f000 e81e blx 0x10260
// 0x10270 = PLT func3
// DSO-NEXT: 10224: 00 f0 24 e8 blx 0x10270
// DSO-NEXT: 10224: f000 e824 blx 0x10270
// DSO: Disassembly of section .plt:
// DSO-EMPTY:
// DSO-NEXT: <$a>:
// DSO-NEXT: 10230: 04 e0 2d e5 str lr, [sp, #-4]!
// DSO-NEXT: 10230: e52de004 str lr, [sp, #-4]!
// (0x10234 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 164 = 0x302e0 = .got.plt[2]
// DSO-NEXT: 10234: 00 e6 8f e2 add lr, pc, #0, #12
// DSO-NEXT: 10238: 20 ea 8e e2 add lr, lr, #32, #20
// DSO-NEXT: 1023c: a4 f0 be e5 ldr pc, [lr, #164]!
// DSO-NEXT: 10234: e28fe600 add lr, pc, #0, #12
// DSO-NEXT: 10238: e28eea20 add lr, lr, #32, #20
// DSO-NEXT: 1023c: e5bef0a4 ldr pc, [lr, #164]!
// DSO: <$d>:

// DSO-NEXT: 10240: d4 d4 d4 d4 .word 0xd4d4d4d4
Expand All @@ -71,23 +71,23 @@ _start:
// DSO-NEXT: 1024c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
// (0x10250 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 140 = 0x302e4
// DSO-NEXT: 10250: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 10254: 20 ca 8c e2 add r12, r12, #32, #20
// DSO-NEXT: 10258: 8c f0 bc e5 ldr pc, [r12, #140]!
// DSO-NEXT: 10250: e28fc600 add r12, pc, #0, #12
// DSO-NEXT: 10254: e28cca20 add r12, r12, #32, #20
// DSO-NEXT: 10258: e5bcf08c ldr pc, [r12, #140]!
// DSO: <$d>:
// DSO-NEXT: 1025c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
// (0x10260 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 128 = 0x302e8
// DSO-NEXT: 10260: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 10264: 20 ca 8c e2 add r12, r12, #32, #20
// DSO-NEXT: 10268: 80 f0 bc e5 ldr pc, [r12, #128]!
// DSO-NEXT: 10260: e28fc600 add r12, pc, #0, #12
// DSO-NEXT: 10264: e28cca20 add r12, r12, #32, #20
// DSO-NEXT: 10268: e5bcf080 ldr pc, [r12, #128]!
// DSO: <$d>:
// DSO-NEXT: 1026c: d4 d4 d4 d4 .word 0xd4d4d4d4
// DSO: <$a>:
// (0x10270 + 8) + (0 RoR 12) + (32 RoR 20 = 0x20000) + 116 = 0x302ec
// DSO-NEXT: 10270: 00 c6 8f e2 add r12, pc, #0, #12
// DSO-NEXT: 10274: 20 ca 8c e2 add r12, r12, #32, #20
// DSO-NEXT: 10278: 74 f0 bc e5 ldr pc, [r12, #116]!
// DSO-NEXT: 10270: e28fc600 add r12, pc, #0, #12
// DSO-NEXT: 10274: e28cca20 add r12, r12, #32, #20
// DSO-NEXT: 10278: e5bcf074 ldr pc, [r12, #116]!
// DSO: <$d>:
// DSO-NEXT: 1027c: d4 d4 d4 d4 .word 0xd4d4d4d4

Expand Down
62 changes: 31 additions & 31 deletions lld/test/ELF/arm-thumb-range-thunk-os.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -45,23 +45,23 @@ _start:
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 100000: ff f0 fe ff bl 0x200000 <tfunc00>
// CHECK1-NEXT: 100004: ff f3 fc d7 bl 0x1100000 <tfunc15>
// CHECK1-NEXT: 100008: ff f2 fc d7 bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc16>
// CHECK1-NEXT: 100000: f0ff fffe bl 0x200000 <tfunc00>
// CHECK1-NEXT: 100004: f3ff d7fc bl 0x1100000 <tfunc15>
// CHECK1-NEXT: 100008: f2ff d7fc bl 0x1000004 <__Thumbv7ABSLongThunk_tfunc16>

FUNCTION 00
// CHECK2: <tfunc00>:
// CHECK2-NEXT: 200000: 70 47 bx lr
// CHECK2-NEXT: 200000: 4770 bx lr
FUNCTION 01
// CHECK3: <tfunc01>:
// CHECK3-NEXT: 300000: 70 47 bx lr
// CHECK3-NEXT: 300000: 4770 bx lr
FUNCTION 02
// tfunc28 is > 16Mb away, expect a Range Thunk to be generated, to go into
// the first of the pre-created ThunkSections.
b.w tfunc28
// CHECK4: <tfunc02>:
// CHECK4-NEXT: 400000: 70 47 bx lr
// CHECK4-NEXT: 400002: 00 f0 01 90 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc28>
// CHECK4-NEXT: 400000: 4770 bx lr
// CHECK4-NEXT: 400002: f000 9001 b.w 0x1000008 <__Thumbv7ABSLongThunk_tfunc28>
FUNCTION 03
FUNCTION 04
FUNCTION 05
Expand All @@ -76,19 +76,19 @@ _start:
FUNCTION 14
// Expect precreated ThunkSection here
// CHECK5: <__Thumbv7ABSLongThunk_tfunc16>:
// CHECK5-NEXT: 1000004: ff f1 fc bf b.w 0x1200000 <tfunc16>
// CHECK5-NEXT: 1000004: f1ff bffc b.w 0x1200000 <tfunc16>
// CHECK5: <__Thumbv7ABSLongThunk_tfunc28>:
// CHECK5-NEXT: 1000008: ff f1 fa 97 b.w 0x1e00000 <tfunc28>
// CHECK5-NEXT: 1000008: f1ff 97fa b.w 0x1e00000 <tfunc28>
// CHECK5: <__Thumbv7ABSLongThunk_tfunc32>:
// CHECK5-NEXT: 100000c: 40 f2 01 0c movw r12, #1
// CHECK5-NEXT: 1000010: c0 f2 20 2c movt r12, #544
// CHECK5-NEXT: 1000014: 60 47 bx r12
// CHECK5-NEXT: 100000c: f240 0c01 movw r12, #1
// CHECK5-NEXT: 1000010: f2c0 2c20 movt r12, #544
// CHECK5-NEXT: 1000014: 4760 bx r12
// CHECK5: <__Thumbv7ABSLongThunk_tfunc33>:
// CHECK5-NEXT: 1000016: 40 f2 01 0c movw r12, #1
// CHECK5-NEXT: 100001a: c0 f2 30 2c movt r12, #560
// CHECK5-NEXT: 100001e: 60 47 bx r12
// CHECK5-NEXT: 1000016: f240 0c01 movw r12, #1
// CHECK5-NEXT: 100001a: f2c0 2c30 movt r12, #560
// CHECK5-NEXT: 100001e: 4760 bx r12
// CHECK5: <__Thumbv7ABSLongThunk_tfunc02>:
// CHECK5-NEXT: 1000020: ff f7 ee 97 b.w 0x400000 <tfunc02>
// CHECK5-NEXT: 1000020: f7ff 97ee b.w 0x400000 <tfunc02>
FUNCTION 15
// tfunc00 and tfunc01 are < 16Mb away, expect no range extension thunks
bl tfunc00
Expand All @@ -98,19 +98,19 @@ _start:
bl tfunc32
bl tfunc33
// CHECK6: <tfunc15>:
// CHECK6-NEXT: 1100000: 70 47 bx lr
// CHECK6-NEXT: 1100002: ff f4 fd d7 bl 0x200000 <tfunc00>
// CHECK6-NEXT: 1100006: ff f5 fb d7 bl 0x300000 <tfunc01>
// CHECK6-NEXT: 110000a: ff f6 ff ff bl 0x100000c <__Thumbv7ABSLongThunk_tfunc32>
// CHECK6-NEXT: 110000e: 00 f7 02 f8 bl 0x1000016 <__Thumbv7ABSLongThunk_tfunc33>
// CHECK6-NEXT: 1100000: 4770 bx lr
// CHECK6-NEXT: 1100002: f4ff d7fd bl 0x200000 <tfunc00>
// CHECK6-NEXT: 1100006: f5ff d7fb bl 0x300000 <tfunc01>
// CHECK6-NEXT: 110000a: f6ff ffff bl 0x100000c <__Thumbv7ABSLongThunk_tfunc32>
// CHECK6-NEXT: 110000e: f700 f802 bl 0x1000016 <__Thumbv7ABSLongThunk_tfunc33>
FUNCTION 16
FUNCTION 17
FUNCTION 18
// Expect another precreated thunk section here
// CHECK7: <__Thumbv7ABSLongThunk_tfunc15>:
// CHECK7-NEXT: 1400004: ff f4 fc bf b.w 0x1100000 <tfunc15>
// CHECK7-NEXT: 1400004: f4ff bffc b.w 0x1100000 <tfunc15>
// CHECK7: <__Thumbv7ABSLongThunk_tfunc16>:
// CHECK7-NEXT: 1400008: ff f5 fa bf b.w 0x1200000 <tfunc16>
// CHECK7-NEXT: 1400008: f5ff bffa b.w 0x1200000 <tfunc16>
FUNCTION 19
FUNCTION 20
FUNCTION 21
Expand All @@ -124,8 +124,8 @@ _start:
// tfunc02 is > 16Mb away, expect range extension thunks in precreated thunk
// section
// CHECK8: <tfunc28>:
// CHECK8-NEXT: 1e00000: 70 47 bx lr
// CHECK8-NEXT: 1e00002: 00 f6 0d 90 b.w 0x1000020 <__Thumbv7ABSLongThunk_tfunc02>
// CHECK8-NEXT: 1e00000: 4770 bx lr
// CHECK8-NEXT: 1e00002: f600 900d b.w 0x1000020 <__Thumbv7ABSLongThunk_tfunc02>

b.w tfunc02
FUNCTION 29
Expand All @@ -137,14 +137,14 @@ _start:
bl tfunc15
bl tfunc16
// CHECK9: <tfunc32>:
// CHECK9: 2200000: 70 47 bx lr
// CHECK9-NEXT: 2200002: ff f5 ff d7 bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15>
// CHECK9-NEXT: 2200006: ff f5 ff d7 bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16>
// CHECK9: 2200000: 4770 bx lr
// CHECK9-NEXT: 2200002: f5ff d7ff bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15>
// CHECK9-NEXT: 2200006: f5ff d7ff bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16>

FUNCTION 33
bl tfunc15
bl tfunc16
// CHECK10: <tfunc33>:
// CHECK10: 2300000: 70 47 bx lr
// CHECK10-NEXT: 2300002: ff f4 ff d7 bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15>
// CHECK10-NEXT: 2300006: ff f4 ff d7 bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16>
// CHECK10: 2300000: 4770 bx lr
// CHECK10-NEXT: 2300002: f4ff d7ff bl 0x1400004 <__Thumbv7ABSLongThunk_tfunc15>
// CHECK10-NEXT: 2300006: f4ff d7ff bl 0x1400008 <__Thumbv7ABSLongThunk_tfunc16>
12 changes: 6 additions & 6 deletions lld/test/ELF/arm-thumb-thunk-empty-pass.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,13 +18,13 @@ foo:
// CHECK: Disassembly of section .text:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 200b4: ff f7 fe ff bl 0x200b4 <_start>
// CHECK-NEXT: 200b4: f7ff fffe bl 0x200b4 <_start>
// CHECK: <__Thumbv7ABSLongThunk__start>:
// CHECK-NEXT: 200b8: ff f7 fc bf b.w 0x200b4 <_start>
// CHECK-NEXT: 200b8: f7ff bffc b.w 0x200b4 <_start>

// CHECK: <__Thumbv7ABSLongThunk__start>:
// CHECK: 10200bc: 40 f2 b5 0c movw r12, #181
// CHECK-NEXT: 10200c0: c0 f2 02 0c movt r12, #2
// CHECK-NEXT: 10200c4: 60 47 bx r12
// CHECK: 10200bc: f240 0cb5 movw r12, #181
// CHECK-NEXT: 10200c0: f2c0 0c02 movt r12, #2
// CHECK-NEXT: 10200c4: 4760 bx r12
// CHECK: <foo>:
// CHECK-NEXT: 10200c6: ff f7 f9 ff bl 0x10200bc <__Thumbv7ABSLongThunk__start>
// CHECK-NEXT: 10200c6: f7ff fff9 bl 0x10200bc <__Thumbv7ABSLongThunk__start>
28 changes: 14 additions & 14 deletions lld/test/ELF/arm-thumb-thunk-v6m.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,33 +33,33 @@ far:
// CHECK: Disassembly of section .text_low:
// CHECK-EMPTY:
// CHECK-NEXT: <_start>:
// CHECK-NEXT: 94: 00 f0 00 f8 bl 0x98 <__Thumbv6MABSLongThunk_far>
// CHECK-NEXT: 94: f000 f800 bl 0x98 <__Thumbv6MABSLongThunk_far>
// CHECK: <__Thumbv6MABSLongThunk_far>:
// CHECK-NEXT: 98: 03 b4 push {r0, r1}
// CHECK-NEXT: 9a: 01 48 ldr r0, [pc, #4]
// CHECK-NEXT: 9c: 01 90 str r0, [sp, #4]
// CHECK-NEXT: 9e: 01 bd pop {r0, pc}
// CHECK-NEXT: 98: b403 push {r0, r1}
// CHECK-NEXT: 9a: 4801 ldr r0, [pc, #4]
// CHECK-NEXT: 9c: 9001 str r0, [sp, #4]
// CHECK-NEXT: 9e: bd01 pop {r0, pc}
// CHECK: a0: 01 00 00 02 .word 0x02000001
// CHECK: Disassembly of section .text_high:
// CHECK-EMPTY:
// CHECK-NEXT: <far>:
// CHECK-NEXT: 2000000: 70 47 bx lr
// CHECK-NEXT: 2000000: 4770 bx lr

// CHECK-PI: Disassembly of section .text_low:
// CHECK-PI-EMPTY:
// CHECK-PI-NEXT: <_start>:
// CHECK-PI-NEXT: 130: 00 f0 00 f8 bl 0x134 <__Thumbv6MPILongThunk_far>
// CHECK-PI-NEXT: 130: f000 f800 bl 0x134 <__Thumbv6MPILongThunk_far>
// CHECK-PI: <__Thumbv6MPILongThunk_far>:
// CHECK-PI-NEXT: 134: 01 b4 push {r0}
// CHECK-PI-NEXT: 136: 02 48 ldr r0, [pc, #8]
// CHECK-PI-NEXT: 138: 84 46 mov r12, r0
// CHECK-PI-NEXT: 13a: 01 bc pop {r0}
// CHECK-PI-NEXT: 134: b401 push {r0}
// CHECK-PI-NEXT: 136: 4802 ldr r0, [pc, #8]
// CHECK-PI-NEXT: 138: 4684 mov r12, r0
// CHECK-PI-NEXT: 13a: bc01 pop {r0}
// pc = pc (0x13c + 4) + r12 (1fffec1) = 0x2000001 = .far
// CHECK-PI-NEXT: 13c: e7 44 add pc, r12
// CHECK-PI-NEXT: 13e: c0 46 mov r8, r8
// CHECK-PI-NEXT: 13c: 44e7 add pc, r12
// CHECK-PI-NEXT: 13e: 46c0 mov r8, r8
// CHECK-PI: 140: c1 fe ff 01 .word 0x01fffec1

// CHECK-PI: Disassembly of section .text_high:
// CHECK-PI-EMPTY:
// CHECK-PI-NEXT: <far>:
// CHECK-PI-NEXT: 2000000: 70 47 bx lr
// CHECK-PI-NEXT: 2000000: 4770 bx lr
4 changes: 2 additions & 2 deletions lld/test/ELF/arm-thumb-undefined-weak-narrow.test
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@
# CHECK: Disassembly of section .text:
# CHECK-EMPTY:
# CHECK-NEXT: <_start>:
# CHECK-NEXT: ff e7 b 0x200b6 <_start+0x2> @ imm = #-2
# CHECK-NEXT: fe d0 beq 0x200b6 <_start+0x2> @ imm = #-4
# CHECK-NEXT: e7ff b 0x200b6 <_start+0x2> @ imm = #-2
# CHECK-NEXT: d0fe beq 0x200b6 <_start+0x2> @ imm = #-4

# Test the R_ARM_THM_JUMP11 (102) and R_ARM_THM_JUMP8 (103) relocations to an
# undefined weak reference. It should resolve to the next instruction, which
Expand Down
8 changes: 4 additions & 4 deletions lld/test/ELF/arm-thunk-edgecase.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,9 +30,9 @@ thumbfunc:
b.w armfunc

// ARM-TO-THUMB: <__ARMV7PILongThunk_thumbfunc>:
// ARM-TO-THUMB-NEXT: 1004: fd cf 0f e3 movw r12, #65533
// ARM-TO-THUMB-NEXT: 1008: 00 c0 40 e3 movt r12, #0
// ARM-TO-THUMB-NEXT: 1004: e30fcffd movw r12, #65533
// ARM-TO-THUMB-NEXT: 1008: e340c000 movt r12, #0

// THUMB-TO-ARM: <__ThumbV7PILongThunk_armfunc>:
// THUMB-TO-ARM-NEXT: 1004: 4f f6 fc 7c movw r12, #65532
// THUMB-TO-ARM-NEXT: 1008: c0 f2 00 0c movt r12, #0
// THUMB-TO-ARM-NEXT: 1004: f64f 7cfc movw r12, #65532
// THUMB-TO-ARM-NEXT: 1008: f2c0 0c00 movt r12, #0
42 changes: 21 additions & 21 deletions lld/test/ELF/arm-thunk-linkerscript-dotexpr.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,21 +30,21 @@ low_target2:
// CHECK1: Disassembly of section .text_low:
// CHECK1-EMPTY:
// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 94: 70 47 bx lr
// CHECK1-NEXT: 94: 4770 bx lr
// CHECK1: <low_target>:
// CHECK1-NEXT: 96: 00 f0 03 f8 bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
// CHECK1-NEXT: 9a: 00 f0 06 f8 bl 0xaa <__Thumbv7ABSLongThunk_high_target2>
// CHECK1-NEXT: 96: f000 f803 bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
// CHECK1-NEXT: 9a: f000 f806 bl 0xaa <__Thumbv7ABSLongThunk_high_target2>
// CHECK1: <__Thumbv7ABSLongThunk_high_target>:
// CHECK1-NEXT: a0: 40 f2 bd 0c movw r12, #189
// CHECK1-NEXT: a4: c0 f2 00 2c movt r12, #512
// CHECK1-NEXT: a8: 60 47 bx r12
// CHECK1-NEXT: a0: f240 0cbd movw r12, #189
// CHECK1-NEXT: a4: f2c0 2c00 movt r12, #512
// CHECK1-NEXT: a8: 4760 bx r12
// CHECK1: <__Thumbv7ABSLongThunk_high_target2>:
// CHECK1-NEXT: aa: 40 f2 d9 0c movw r12, #217
// CHECK1-NEXT: ae: c0 f2 00 2c movt r12, #512
// CHECK1-NEXT: b2: 60 47 bx r12
// CHECK1-NEXT: aa: f240 0cd9 movw r12, #217
// CHECK1-NEXT: ae: f2c0 2c00 movt r12, #512
// CHECK1-NEXT: b2: 4760 bx r12
// CHECK1: <low_target2>:
// CHECK1-NEXT: b4: ff f7 f4 ff bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
// CHECK1-NEXT: b8: ff f7 f7 ff bl 0xaa <__Thumbv7ABSLongThunk_high_target2>
// CHECK1-NEXT: b4: f7ff fff4 bl 0xa0 <__Thumbv7ABSLongThunk_high_target>
// CHECK1-NEXT: b8: f7ff fff7 bl 0xaa <__Thumbv7ABSLongThunk_high_target2>

.section .text_high, "ax", %progbits
.thumb
Expand All @@ -63,16 +63,16 @@ high_target2:
bl low_target2

// CHECK2: <high_target>:
// CHECK2-NEXT: 20000bc: 00 f0 02 f8 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
// CHECK2-NEXT: 20000c0: 00 f0 05 f8 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
// CHECK2-NEXT: 20000bc: f000 f802 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
// CHECK2-NEXT: 20000c0: f000 f805 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
// CHECK2: <__Thumbv7ABSLongThunk_low_target>:
// CHECK2-NEXT: 20000c4: 40 f2 97 0c movw r12, #151
// CHECK2-NEXT: 20000c8: c0 f2 00 0c movt r12, #0
// CHECK2-NEXT: 20000cc: 60 47 bx r12
// CHECK2-NEXT: 20000c4: f240 0c97 movw r12, #151
// CHECK2-NEXT: 20000c8: f2c0 0c00 movt r12, #0
// CHECK2-NEXT: 20000cc: 4760 bx r12
// CHECK2: <__Thumbv7ABSLongThunk_low_target2>:
// CHECK2-NEXT: 20000ce: 40 f2 b5 0c movw r12, #181
// CHECK2-NEXT: 20000d2: c0 f2 00 0c movt r12, #0
// CHECK2-NEXT: 20000d6: 60 47 bx r12
// CHECK2-NEXT: 20000ce: f240 0cb5 movw r12, #181
// CHECK2-NEXT: 20000d2: f2c0 0c00 movt r12, #0
// CHECK2-NEXT: 20000d6: 4760 bx r12
// CHECK2: <high_target2>:
// CHECK2-NEXT: 20000d8: ff f7 f4 ff bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
// CHECK2-NEXT: 20000dc: ff f7 f7 ff bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
// CHECK2-NEXT: 20000d8: f7ff fff4 bl 0x20000c4 <__Thumbv7ABSLongThunk_low_target>
// CHECK2-NEXT: 20000dc: f7ff fff7 bl 0x20000ce <__Thumbv7ABSLongThunk_low_target2>
56 changes: 28 additions & 28 deletions lld/test/ELF/arm-thunk-linkerscript-large.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -55,12 +55,12 @@ _start:
// CHECK1: Disassembly of section .text:
// CHECK1-EMPTY:
// CHECK1-NEXT: <_start>:
// CHECK1-NEXT: 100000: ff f0 fe ff bl 0x200000 <tfuncl00>
// CHECK1-NEXT: 100004: 00 f0 00 f8 bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31>
// CHECK1-NEXT: 100000: f0ff fffe bl 0x200000 <tfuncl00>
// CHECK1-NEXT: 100004: f000 f800 bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31>
// CHECK1: <__Thumbv7ABSLongThunk_tfunch31>:
// CHECK1-NEXT: 100008: 40 f2 01 0c movw r12, #1
// CHECK1-NEXT: 10000c: c0 f2 10 4c movt r12, #1040
// CHECK1-NEXT: 100010: 60 47 bx r12
// CHECK1-NEXT: 100008: f240 0c01 movw r12, #1
// CHECK1-NEXT: 10000c: f2c0 4c10 movt r12, #1040
// CHECK1-NEXT: 100010: 4760 bx r12
FUNCTIONL 00
// Create a range extension thunk in .textl
bl tfuncl24
Expand All @@ -69,9 +69,9 @@ _start:
// CHECK2: Disassembly of section .textl:
// CHECK2-EMPTY:
// CHECK2-NEXT: <tfuncl00>:
// CHECK2-NEXT: 200000: 70 47 bx lr
// CHECK2-NEXT: 200002: ff f0 ff df bl 0xb00004 <__Thumbv7ABSLongThunk_tfuncl24>
// CHECK2-NEXT: 200006: ff f6 ff ff bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31>
// CHECK2-NEXT: 200000: 4770 bx lr
// CHECK2-NEXT: 200002: f0ff dfff bl 0xb00004 <__Thumbv7ABSLongThunk_tfuncl24>
// CHECK2-NEXT: 200006: f6ff ffff bl 0x100008 <__Thumbv7ABSLongThunk_tfunch31>
FUNCTIONL 01
FUNCTIONL 02
FUNCTIONL 03
Expand All @@ -82,7 +82,7 @@ _start:
FUNCTIONL 08
FUNCTIONL 09
// CHECK3: <__Thumbv7ABSLongThunk_tfuncl24>:
// CHECK3-NEXT: b00004: ff f2 fc 97 b.w 0x1a00000 <tfuncl24>
// CHECK3-NEXT: b00004: f2ff 97fc b.w 0x1a00000 <tfuncl24>
FUNCTIONL 10
FUNCTIONL 11
FUNCTIONL 12
Expand Down Expand Up @@ -110,13 +110,13 @@ _start:
bl tfuncl24
// Shouldn't need a thunk
bl tfunch00
// CHECK4: 2100002: 00 f0 05 f8 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK4-NEXT: 2100006: ff f4 fb f7 bl 0x1a00000 <tfuncl24>
// CHECK4-NEXT: 210000a: ff f0 f9 ff bl 0x2200000 <tfunch00>
// CHECK4: 2100002: f000 f805 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK4-NEXT: 2100006: f4ff f7fb bl 0x1a00000 <tfuncl24>
// CHECK4-NEXT: 210000a: f0ff fff9 bl 0x2200000 <tfunch00>
// CHECK4: <__Thumbv7ABSLongThunk_tfuncl00>:
// CHECK4-NEXT: 2100010: 40 f2 01 0c movw r12, #1
// CHECK4-NEXT: 2100014: c0 f2 20 0c movt r12, #32
// CHECK4-NEXT: 2100018: 60 47 bx r12
// CHECK4-NEXT: 2100010: f240 0c01 movw r12, #1
// CHECK4-NEXT: 2100014: f2c0 0c20 movt r12, #32
// CHECK4-NEXT: 2100018: 4760 bx r12
FUNCTIONH 00
// Can reuse existing thunks in .textl
bl tfuncl00
Expand All @@ -126,10 +126,10 @@ _start:
// CHECK5: Disassembly of section .texth:
// CHECK5-EMPTY:
// CHECK5-NEXT: <tfunch00>:
// CHECK5-NEXT: 2200000: 70 47 bx lr
// CHECK5-NEXT: 2200002: 00 f7 05 f8 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK5-NEXT: 2200006: ff f7 fb df bl 0x1a00000 <tfuncl24>
// CHECK5-NEXT: 220000a: ff f6 f9 ff bl 0x2100000 <tfuncl31>
// CHECK5-NEXT: 2200000: 4770 bx lr
// CHECK5-NEXT: 2200002: f700 f805 bl 0x2100010 <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK5-NEXT: 2200006: f7ff dffb bl 0x1a00000 <tfuncl24>
// CHECK5-NEXT: 220000a: f6ff fff9 bl 0x2100000 <tfuncl31>
FUNCTIONH 01
FUNCTIONH 02
FUNCTIONH 03
Expand Down Expand Up @@ -165,14 +165,14 @@ _start:
bl tfuncl00
bl tfunch00
// CHECK6: <tfunch31>:
// CHECK6-NEXT: 4100000: 70 47 bx lr
// CHECK6-NEXT: 4100002: 00 f0 03 f8 bl 0x410000c <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK6-NEXT: 4100006: 00 f0 06 f8 bl 0x4100016 <__Thumbv7ABSLongThunk_tfunch00>
// CHECK6-NEXT: 4100000: 4770 bx lr
// CHECK6-NEXT: 4100002: f000 f803 bl 0x410000c <__Thumbv7ABSLongThunk_tfuncl00>
// CHECK6-NEXT: 4100006: f000 f806 bl 0x4100016 <__Thumbv7ABSLongThunk_tfunch00>
// CHECK6: <__Thumbv7ABSLongThunk_tfuncl00>:
// CHECK6-NEXT: 410000c: 40 f2 01 0c movw r12, #1
// CHECK6-NEXT: 4100010: c0 f2 20 0c movt r12, #32
// CHECK6-NEXT: 4100014: 60 47 bx r12
// CHECK6-NEXT: 410000c: f240 0c01 movw r12, #1
// CHECK6-NEXT: 4100010: f2c0 0c20 movt r12, #32
// CHECK6-NEXT: 4100014: 4760 bx r12
// CHECK6: <__Thumbv7ABSLongThunk_tfunch00>:
// CHECK6-NEXT: 4100016: 40 f2 01 0c movw r12, #1
// CHECK6-NEXT: 410001a: c0 f2 20 2c movt r12, #544
// CHECK6-NEXT: 410001e: 60 47 bx r12
// CHECK6-NEXT: 4100016: f240 0c01 movw r12, #1
// CHECK6-NEXT: 410001a: f2c0 2c20 movt r12, #544
// CHECK6-NEXT: 410001e: 4760 bx r12
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