32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-and-06.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3,62 +3,62 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check AND of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lang %r2, %r4, 0(%r3)
; CHECK: br %r14
%res = atomicrmw and i64 *%src, i64 %b seq_cst
%res = atomicrmw and ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check AND of -2, which needs a temporary.
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lghi [[TMP:%r[0-5]]], -2
; CHECK: lang %r2, [[TMP]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw and i64 *%src, i64 -2 seq_cst
%res = atomicrmw and ptr %src, i64 -2 seq_cst
ret i64 %res
}

; Check the high end of the LANG range.
define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f3(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f3:
; CHECK: lang %r2, %r4, 524280(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65535
%res = atomicrmw and i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65535
%res = atomicrmw and ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword up, which needs separate address logic.
define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f4(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f4:
; CHECK: agfi %r3, 524288
; CHECK: lang %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65536
%res = atomicrmw and i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65536
%res = atomicrmw and ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the low end of the LANG range.
define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f5(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f5:
; CHECK: lang %r2, %r4, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65536
%res = atomicrmw and i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65536
%res = atomicrmw and ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword down, which needs separate address logic.
define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f6(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f6:
; CHECK: agfi %r3, -524296
; CHECK: lang %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65537
%res = atomicrmw and i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65537
%res = atomicrmw and ptr %ptr, i64 %b seq_cst
ret i64 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-minmax-01.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used, and that the low bits are set to 1. This sequence is
; independent of the other loop prologue instructions.
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -43,12 +43,12 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw min i8 *%src, i8 %b seq_cst
%res = atomicrmw min ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check signed maximum.
define i8 @f2(i8 *%src, i8 %b) {
define i8 @f2(ptr %src, i8 %b) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -79,12 +79,12 @@ define i8 @f2(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw max i8 *%src, i8 %b seq_cst
%res = atomicrmw max ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check unsigned minimum.
define i8 @f3(i8 *%src, i8 %b) {
define i8 @f3(ptr %src, i8 %b) {
; CHECK-LABEL: f3:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -115,12 +115,12 @@ define i8 @f3(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw umin i8 *%src, i8 %b seq_cst
%res = atomicrmw umin ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check unsigned maximum.
define i8 @f4(i8 *%src, i8 %b) {
define i8 @f4(ptr %src, i8 %b) {
; CHECK-LABEL: f4:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -151,13 +151,13 @@ define i8 @f4(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw umax i8 *%src, i8 %b seq_cst
%res = atomicrmw umax ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check the lowest useful signed minimum value. We need to load 0x81000000
; into the source register.
define i8 @f5(i8 *%src) {
define i8 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: llilh [[SRC2:%r[0-9]+]], 33024
; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
Expand All @@ -168,13 +168,13 @@ define i8 @f5(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw min i8 *%src, i8 -127 seq_cst
%res = atomicrmw min ptr %src, i8 -127 seq_cst
ret i8 %res
}

; Check the highest useful signed maximum value. We need to load 0x7e000000
; into the source register.
define i8 @f6(i8 *%src) {
define i8 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: llilh [[SRC2:%r[0-9]+]], 32256
; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
Expand All @@ -185,13 +185,13 @@ define i8 @f6(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw max i8 *%src, i8 126 seq_cst
%res = atomicrmw max ptr %src, i8 126 seq_cst
ret i8 %res
}

; Check the lowest useful unsigned minimum value. We need to load 0x01000000
; into the source register.
define i8 @f7(i8 *%src) {
define i8 @f7(ptr %src) {
; CHECK-LABEL: f7:
; CHECK: llilh [[SRC2:%r[0-9]+]], 256
; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]],
Expand All @@ -202,13 +202,13 @@ define i8 @f7(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f7:
; CHECK-SHIFT2: br %r14
%res = atomicrmw umin i8 *%src, i8 1 seq_cst
%res = atomicrmw umin ptr %src, i8 1 seq_cst
ret i8 %res
}

; Check the highest useful unsigned maximum value. We need to load 0xfe000000
; into the source register.
define i8 @f8(i8 *%src) {
define i8 @f8(ptr %src) {
; CHECK-LABEL: f8:
; CHECK: llilh [[SRC2:%r[0-9]+]], 65024
; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]],
Expand All @@ -219,6 +219,6 @@ define i8 @f8(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f8:
; CHECK-SHIFT2: br %r14
%res = atomicrmw umax i8 *%src, i8 254 seq_cst
%res = atomicrmw umax ptr %src, i8 254 seq_cst
ret i8 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-minmax-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used, and that the low bits are set to 1. This sequence is
; independent of the other loop prologue instructions.
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -43,12 +43,12 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw min i16 *%src, i16 %b seq_cst
%res = atomicrmw min ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check signed maximum.
define i16 @f2(i16 *%src, i16 %b) {
define i16 @f2(ptr %src, i16 %b) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -79,12 +79,12 @@ define i16 @f2(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw max i16 *%src, i16 %b seq_cst
%res = atomicrmw max ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check unsigned minimum.
define i16 @f3(i16 *%src, i16 %b) {
define i16 @f3(ptr %src, i16 %b) {
; CHECK-LABEL: f3:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -115,12 +115,12 @@ define i16 @f3(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw umin i16 *%src, i16 %b seq_cst
%res = atomicrmw umin ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check unsigned maximum.
define i16 @f4(i16 *%src, i16 %b) {
define i16 @f4(ptr %src, i16 %b) {
; CHECK-LABEL: f4:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -151,13 +151,13 @@ define i16 @f4(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw umax i16 *%src, i16 %b seq_cst
%res = atomicrmw umax ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check the lowest useful signed minimum value. We need to load 0x80010000
; into the source register.
define i16 @f5(i16 *%src) {
define i16 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: llilh [[SRC2:%r[0-9]+]], 32769
; CHECK: crjle [[ROT:%r[0-9]+]], [[SRC2]]
Expand All @@ -168,13 +168,13 @@ define i16 @f5(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw min i16 *%src, i16 -32767 seq_cst
%res = atomicrmw min ptr %src, i16 -32767 seq_cst
ret i16 %res
}

; Check the highest useful signed maximum value. We need to load 0x7ffe0000
; into the source register.
define i16 @f6(i16 *%src) {
define i16 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: llilh [[SRC2:%r[0-9]+]], 32766
; CHECK: crjhe [[ROT:%r[0-9]+]], [[SRC2]]
Expand All @@ -185,13 +185,13 @@ define i16 @f6(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw max i16 *%src, i16 32766 seq_cst
%res = atomicrmw max ptr %src, i16 32766 seq_cst
ret i16 %res
}

; Check the lowest useful unsigned maximum value. We need to load 0x00010000
; into the source register.
define i16 @f7(i16 *%src) {
define i16 @f7(ptr %src) {
; CHECK-LABEL: f7:
; CHECK: llilh [[SRC2:%r[0-9]+]], 1
; CHECK: clrjle [[ROT:%r[0-9]+]], [[SRC2]],
Expand All @@ -202,13 +202,13 @@ define i16 @f7(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f7:
; CHECK-SHIFT2: br %r14
%res = atomicrmw umin i16 *%src, i16 1 seq_cst
%res = atomicrmw umin ptr %src, i16 1 seq_cst
ret i16 %res
}

; Check the highest useful unsigned maximum value. We need to load 0xfffe0000
; into the source register.
define i16 @f8(i16 *%src) {
define i16 @f8(ptr %src) {
; CHECK-LABEL: f8:
; CHECK: llilh [[SRC2:%r[0-9]+]], 65534
; CHECK: clrjhe [[ROT:%r[0-9]+]], [[SRC2]],
Expand All @@ -219,6 +219,6 @@ define i16 @f8(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f8:
; CHECK-SHIFT2: br %r14
%res = atomicrmw umax i16 *%src, i16 65534 seq_cst
%res = atomicrmw umax ptr %src, i16 65534 seq_cst
ret i16 %res
}
66 changes: 33 additions & 33 deletions llvm/test/CodeGen/SystemZ/atomicrmw-minmax-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check signed minium.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -16,12 +16,12 @@ define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: crjle %r2, %r4, [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw min i32 *%src, i32 %b seq_cst
%res = atomicrmw min ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check signed maximum.
define i32 @f2(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f2(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -33,12 +33,12 @@ define i32 @f2(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: crjhe %r2, %r4, [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw max i32 *%src, i32 %b seq_cst
%res = atomicrmw max ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check unsigned minimum.
define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f3(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f3:
; CHECK: l %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -50,12 +50,12 @@ define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: clrjle %r2, %r4, [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw umin i32 *%src, i32 %b seq_cst
%res = atomicrmw umin ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check unsigned maximum.
define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f4(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f4:
; CHECK: l %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -67,86 +67,86 @@ define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: clrjhe %r2, %r4, [[KEEP:\..*]]
; CHECK: lr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw umax i32 *%src, i32 %b seq_cst
%res = atomicrmw umax ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the aligned CS range.
define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f5(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f5:
; CHECK: l %r2, 4092(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 4092(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 1023
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 1023
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which requires CSY.
define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f6(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f6:
; CHECK: ly %r2, 4096(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, 4096(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 1024
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 1024
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the aligned CSY range.
define i32 @f7(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f7(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f7:
; CHECK: ly %r2, 524284(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, 524284(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 131071
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 131071
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which needs separate address logic.
define i32 @f8(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f8(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f8:
; CHECK: agfi %r3, 524288
; CHECK: l %r2, 0(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 131072
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 131072
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the negative aligned CSY range.
define i32 @f9(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f9(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f9:
; CHECK: ly %r2, -4(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, -4(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 -1
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -1
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the low end of the CSY range.
define i32 @f10(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f10(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f10:
; CHECK: ly %r2, -524288(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, -524288(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 -131072
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -131072
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word down, which needs separate address logic.
define i32 @f11(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f11(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f11:
; CHECK: agfi %r3, -524292
; CHECK: l %r2, 0(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%ptr = getelementptr i32, i32 *%src, i64 -131073
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -131073
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

Expand All @@ -158,13 +158,13 @@ define i32 @f12(i32 %dummy, i64 %base, i64 %index, i32 %b) {
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%add = add i64 %base, %index
%ptr = inttoptr i64 %add to i32 *
%res = atomicrmw min i32 *%ptr, i32 %b seq_cst
%ptr = inttoptr i64 %add to ptr
%res = atomicrmw min ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check that constants are handled.
define i32 @f13(i32 %dummy, i32 *%ptr) {
define i32 @f13(i32 %dummy, ptr %ptr) {
; CHECK-LABEL: f13:
; CHECK: lhi [[LIMIT:%r[0-9]+]], 42
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -176,6 +176,6 @@ define i32 @f13(i32 %dummy, i32 *%ptr) {
; CHECK: crjle %r2, [[LIMIT]], [[KEEP:\..*]]
; CHECK: lhi [[NEW]], 42
; CHECK: j [[BB1]]
%res = atomicrmw min i32 *%ptr, i32 42 seq_cst
%res = atomicrmw min ptr %ptr, i32 42 seq_cst
ret i32 %res
}
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/SystemZ/atomicrmw-minmax-04.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check signed minium.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -16,12 +16,12 @@ define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: cgrjle %r2, %r4, [[KEEP:\..*]]
; CHECK: lgr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw min i64 *%src, i64 %b seq_cst
%res = atomicrmw min ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check signed maximum.
define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f2(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f2:
; CHECK: lg %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -33,12 +33,12 @@ define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: cgrjhe %r2, %r4, [[KEEP:\..*]]
; CHECK: lgr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw max i64 *%src, i64 %b seq_cst
%res = atomicrmw max ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check unsigned minimum.
define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f3(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f3:
; CHECK: lg %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -50,12 +50,12 @@ define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: clgrjle %r2, %r4, [[KEEP:\..*]]
; CHECK: lgr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw umin i64 *%src, i64 %b seq_cst
%res = atomicrmw umin ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check unsigned maximum.
define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f4(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f4:
; CHECK: lg %r2, 0(%r3)
; CHECK: j [[LOOP:\.[^:]*]]
Expand All @@ -67,53 +67,53 @@ define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: clgrjhe %r2, %r4, [[KEEP:\..*]]
; CHECK: lgr [[NEW]], %r4
; CHECK: j [[BB1]]
%res = atomicrmw umax i64 *%src, i64 %b seq_cst
%res = atomicrmw umax ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check the high end of the aligned CSG range.
define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f5(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f5:
; CHECK: lg %r2, 524280(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
; CHECK: ber %r14
%ptr = getelementptr i64, i64 *%src, i64 65535
%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65535
%res = atomicrmw min ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword up, which requires separate address logic.
define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f6(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f6:
; CHECK: agfi %r3, 524288
; CHECK: lg %r2, 0(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%ptr = getelementptr i64, i64 *%src, i64 65536
%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65536
%res = atomicrmw min ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the low end of the CSG range.
define i64 @f7(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f7(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f7:
; CHECK: lg %r2, -524288(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
; CHECK: ber %r14
%ptr = getelementptr i64, i64 *%src, i64 -65536
%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65536
%res = atomicrmw min ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword down, which requires separate address logic.
define i64 @f8(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f8(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f8:
; CHECK: agfi %r3, -524296
; CHECK: lg %r2, 0(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%ptr = getelementptr i64, i64 *%src, i64 -65537
%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65537
%res = atomicrmw min ptr %ptr, i64 %b seq_cst
ret i64 %res
}

Expand All @@ -125,13 +125,13 @@ define i64 @f9(i64 %dummy, i64 %base, i64 %index, i64 %b) {
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: ber %r14
%add = add i64 %base, %index
%ptr = inttoptr i64 %add to i64 *
%res = atomicrmw min i64 *%ptr, i64 %b seq_cst
%ptr = inttoptr i64 %add to ptr
%res = atomicrmw min ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check that constants are handled.
define i64 @f10(i64 %dummy, i64 *%ptr) {
define i64 @f10(i64 %dummy, ptr %ptr) {
; CHECK-LABEL: f10:
; CHECK-DAG: lghi [[LIMIT:%r[0-9]+]], 42
; CHECK-DAG: lg %r2, 0(%r3)
Expand All @@ -144,6 +144,6 @@ define i64 @f10(i64 %dummy, i64 *%ptr) {
; CHECK: cgrjle %r2, [[LIMIT]], [[KEEP:\..*]]
; CHECK: lghi [[NEW]], 42
; CHECK: j [[BB1]]
%res = atomicrmw min i64 *%ptr, i64 42 seq_cst
%res = atomicrmw min ptr %ptr, i64 42 seq_cst
ret i64 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-nand-01.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used, and that the low bits are set to 1. This sequence is
; independent of the other loop prologue instructions.
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -43,12 +43,12 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 %b seq_cst
%res = atomicrmw nand ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check the minimum signed value. We AND the rotated word with 0x80ffffff.
define i8 @f2(i8 *%src) {
define i8 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -73,12 +73,12 @@ define i8 @f2(i8 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 -128 seq_cst
%res = atomicrmw nand ptr %src, i8 -128 seq_cst
ret i8 %res
}

; Check NANDs of -2 (-1 isn't useful). We AND the rotated word with 0xfeffffff.
define i8 @f3(i8 *%src) {
define i8 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: nilh [[ROT]], 65279
; CHECK: xilf [[ROT]], 4278190080
Expand All @@ -88,12 +88,12 @@ define i8 @f3(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 -2 seq_cst
%res = atomicrmw nand ptr %src, i8 -2 seq_cst
ret i8 %res
}

; Check NANDs of 1. We AND the rotated word with 0x01ffffff.
define i8 @f4(i8 *%src) {
define i8 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: nilh [[ROT]], 511
; CHECK: xilf [[ROT]], 4278190080
Expand All @@ -103,12 +103,12 @@ define i8 @f4(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 1 seq_cst
%res = atomicrmw nand ptr %src, i8 1 seq_cst
ret i8 %res
}

; Check the maximum signed value. We AND the rotated word with 0x7fffffff.
define i8 @f5(i8 *%src) {
define i8 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: nilh [[ROT]], 32767
; CHECK: xilf [[ROT]], 4278190080
Expand All @@ -118,13 +118,13 @@ define i8 @f5(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 127 seq_cst
%res = atomicrmw nand ptr %src, i8 127 seq_cst
ret i8 %res
}

; Check NANDs of a large unsigned value. We AND the rotated word with
; 0xfdffffff.
define i8 @f6(i8 *%src) {
define i8 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: nilh [[ROT]], 65023
; CHECK: xilf [[ROT]], 4278190080
Expand All @@ -134,6 +134,6 @@ define i8 @f6(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i8 *%src, i8 253 seq_cst
%res = atomicrmw nand ptr %src, i8 253 seq_cst
ret i8 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-nand-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used, and that the low bits are set to 1. This sequence is
; independent of the other loop prologue instructions.
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -43,12 +43,12 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 %b seq_cst
%res = atomicrmw nand ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check the minimum signed value. We AND the rotated word with 0x8000ffff.
define i16 @f2(i16 *%src) {
define i16 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -73,12 +73,12 @@ define i16 @f2(i16 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 -32768 seq_cst
%res = atomicrmw nand ptr %src, i16 -32768 seq_cst
ret i16 %res
}

; Check NANDs of -2 (-1 isn't useful). We AND the rotated word with 0xfffeffff.
define i16 @f3(i16 *%src) {
define i16 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: nilh [[ROT]], 65534
; CHECK: xilf [[ROT]], 4294901760
Expand All @@ -88,12 +88,12 @@ define i16 @f3(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 -2 seq_cst
%res = atomicrmw nand ptr %src, i16 -2 seq_cst
ret i16 %res
}

; Check ANDs of 1. We AND the rotated word with 0x0001ffff.
define i16 @f4(i16 *%src) {
define i16 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: nilh [[ROT]], 1
; CHECK: xilf [[ROT]], 4294901760
Expand All @@ -103,12 +103,12 @@ define i16 @f4(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 1 seq_cst
%res = atomicrmw nand ptr %src, i16 1 seq_cst
ret i16 %res
}

; Check the maximum signed value. We AND the rotated word with 0x7fffffff.
define i16 @f5(i16 *%src) {
define i16 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: nilh [[ROT]], 32767
; CHECK: xilf [[ROT]], 4294901760
Expand All @@ -118,13 +118,13 @@ define i16 @f5(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 32767 seq_cst
%res = atomicrmw nand ptr %src, i16 32767 seq_cst
ret i16 %res
}

; Check NANDs of a large unsigned value. We AND the rotated word with
; 0xfffdffff.
define i16 @f6(i16 *%src) {
define i16 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: nilh [[ROT]], 65533
; CHECK: xilf [[ROT]], 4294901760
Expand All @@ -134,6 +134,6 @@ define i16 @f6(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw nand i16 *%src, i16 65533 seq_cst
%res = atomicrmw nand ptr %src, i16 65533 seq_cst
ret i16 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-nand-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check NANDs of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -13,12 +13,12 @@ define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 %b seq_cst
%res = atomicrmw nand ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check NANDs of 1.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -28,66 +28,66 @@ define i32 @f2(i32 %dummy, i32 *%src) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 1 seq_cst
%res = atomicrmw nand ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check NANDs of the low end of the NILH range.
define i32 @f3(i32 %dummy, i32 *%src) {
define i32 @f3(i32 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: nilh %r0, 0
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 65535 seq_cst
%res = atomicrmw nand ptr %src, i32 65535 seq_cst
ret i32 %res
}

; Check the next value up, which must use NILF.
define i32 @f4(i32 %dummy, i32 *%src) {
define i32 @f4(i32 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: nilf %r0, 65536
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 65536 seq_cst
%res = atomicrmw nand ptr %src, i32 65536 seq_cst
ret i32 %res
}

; Check the largest useful NILL value.
define i32 @f5(i32 %dummy, i32 *%src) {
define i32 @f5(i32 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: nill %r0, 65534
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 -2 seq_cst
%res = atomicrmw nand ptr %src, i32 -2 seq_cst
ret i32 %res
}

; Check the low end of the NILL range.
define i32 @f6(i32 %dummy, i32 *%src) {
define i32 @f6(i32 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: nill %r0, 0
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 -65536 seq_cst
%res = atomicrmw nand ptr %src, i32 -65536 seq_cst
ret i32 %res
}

; Check the largest useful NILH value, which is one less than the above.
define i32 @f7(i32 %dummy, i32 *%src) {
define i32 @f7(i32 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: nilh %r0, 65534
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 -65537 seq_cst
%res = atomicrmw nand ptr %src, i32 -65537 seq_cst
ret i32 %res
}

; Check the highest useful NILF value, which is one less than the above.
define i32 @f8(i32 %dummy, i32 *%src) {
define i32 @f8(i32 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: nilf %r0, 4294901758
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw nand i32 *%src, i32 -65538 seq_cst
%res = atomicrmw nand ptr %src, i32 -65538 seq_cst
ret i32 %res
}
68 changes: 34 additions & 34 deletions llvm/test/CodeGen/SystemZ/atomicrmw-nand-04.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check NANDs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -14,22 +14,22 @@ define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 %b seq_cst
%res = atomicrmw nand ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check NANDs of 1, which are done using a register. (We could use RISBG
; instead, but that isn't implemented yet.)
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: ngr
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 1 seq_cst
%res = atomicrmw nand ptr %src, i64 1 seq_cst
ret i64 %res
}

; Check the equivalent of NIHF with 1, which can use RISBG instead.
define i64 @f3(i64 %dummy, i64 *%src) {
define i64 @f3(i64 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -39,12 +39,12 @@ define i64 @f3(i64 %dummy, i64 *%src) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 8589934591 seq_cst
%res = atomicrmw nand ptr %src, i64 8589934591 seq_cst
ret i64 %res
}

; Check the lowest NIHF value outside the range of RISBG.
define i64 @f4(i64 %dummy, i64 *%src) {
define i64 @f4(i64 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -55,123 +55,123 @@ define i64 @f4(i64 %dummy, i64 *%src) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 12884901887 seq_cst
%res = atomicrmw nand ptr %src, i64 12884901887 seq_cst
ret i64 %res
}

; Check the next value up, which must use a register.
define i64 @f5(i64 %dummy, i64 *%src) {
define i64 @f5(i64 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: ngr
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 12884901888 seq_cst
%res = atomicrmw nand ptr %src, i64 12884901888 seq_cst
ret i64 %res
}

; Check the lowest NIHH value outside the range of RISBG.
define i64 @f6(i64 %dummy, i64 *%src) {
define i64 @f6(i64 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: nihh {{%r[0-5]}}, 2
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 844424930131967 seq_cst
%res = atomicrmw nand ptr %src, i64 844424930131967 seq_cst
ret i64 %res
}

; Check the next value up, which must use a register.
define i64 @f7(i64 %dummy, i64 *%src) {
define i64 @f7(i64 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: ngr
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 281474976710656 seq_cst
%res = atomicrmw nand ptr %src, i64 281474976710656 seq_cst
ret i64 %res
}

; Check the highest NILL value outside the range of RISBG.
define i64 @f8(i64 %dummy, i64 *%src) {
define i64 @f8(i64 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: nill {{%r[0-5]}}, 65530
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -6 seq_cst
%res = atomicrmw nand ptr %src, i64 -6 seq_cst
ret i64 %res
}

; Check the lowest NILL value outside the range of RISBG.
define i64 @f9(i64 %dummy, i64 *%src) {
define i64 @f9(i64 %dummy, ptr %src) {
; CHECK-LABEL: f9:
; CHECK: nill {{%r[0-5]}}, 2
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -65534 seq_cst
%res = atomicrmw nand ptr %src, i64 -65534 seq_cst
ret i64 %res
}

; Check the highest useful NILF value.
define i64 @f10(i64 %dummy, i64 *%src) {
define i64 @f10(i64 %dummy, ptr %src) {
; CHECK-LABEL: f10:
; CHECK: nilf {{%r[0-5]}}, 4294901758
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -65538 seq_cst
%res = atomicrmw nand ptr %src, i64 -65538 seq_cst
ret i64 %res
}

; Check the highest NILH value outside the range of RISBG.
define i64 @f11(i64 %dummy, i64 *%src) {
define i64 @f11(i64 %dummy, ptr %src) {
; CHECK-LABEL: f11:
; CHECK: nilh {{%r[0-5]}}, 65530
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -327681 seq_cst
%res = atomicrmw nand ptr %src, i64 -327681 seq_cst
ret i64 %res
}

; Check the lowest NILH value outside the range of RISBG.
define i64 @f12(i64 %dummy, i64 *%src) {
define i64 @f12(i64 %dummy, ptr %src) {
; CHECK-LABEL: f12:
; CHECK: nilh {{%r[0-5]}}, 2
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -4294770689 seq_cst
%res = atomicrmw nand ptr %src, i64 -4294770689 seq_cst
ret i64 %res
}

; Check the lowest NILF value outside the range of RISBG.
define i64 @f13(i64 %dummy, i64 *%src) {
define i64 @f13(i64 %dummy, ptr %src) {
; CHECK-LABEL: f13:
; CHECK: nilf {{%r[0-5]}}, 2
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -4294967294 seq_cst
%res = atomicrmw nand ptr %src, i64 -4294967294 seq_cst
ret i64 %res
}

; Check the highest NIHL value outside the range of RISBG.
define i64 @f14(i64 %dummy, i64 *%src) {
define i64 @f14(i64 %dummy, ptr %src) {
; CHECK-LABEL: f14:
; CHECK: nihl {{%r[0-5]}}, 65530
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -21474836481 seq_cst
%res = atomicrmw nand ptr %src, i64 -21474836481 seq_cst
ret i64 %res
}

; Check the lowest NIHL value outside the range of RISBG.
define i64 @f15(i64 %dummy, i64 *%src) {
define i64 @f15(i64 %dummy, ptr %src) {
; CHECK-LABEL: f15:
; CHECK: nihl {{%r[0-5]}}, 2
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -281462091808769 seq_cst
%res = atomicrmw nand ptr %src, i64 -281462091808769 seq_cst
ret i64 %res
}

; Check the highest NIHH value outside the range of RISBG.
define i64 @f16(i64 %dummy, i64 *%src) {
define i64 @f16(i64 %dummy, ptr %src) {
; CHECK-LABEL: f16:
; CHECK: nihh {{%r[0-5]}}, 65530
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -1407374883553281 seq_cst
%res = atomicrmw nand ptr %src, i64 -1407374883553281 seq_cst
ret i64 %res
}

; Check the highest useful NIHF value.
define i64 @f17(i64 %dummy, i64 *%src) {
define i64 @f17(i64 %dummy, ptr %src) {
; CHECK-LABEL: f17:
; CHECK: nihf {{%r[0-5]}}, 4294901758
; CHECK: br %r14
%res = atomicrmw nand i64 *%src, i64 -281479271677953 seq_cst
%res = atomicrmw nand ptr %src, i64 -281479271677953 seq_cst
ret i64 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-01.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 %b seq_cst
%res = atomicrmw or ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check the minimum signed value. We OR the rotated word with 0x80000000.
define i8 @f2(i8 *%src) {
define i8 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i8 @f2(i8 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 -128 seq_cst
%res = atomicrmw or ptr %src, i8 -128 seq_cst
ret i8 %res
}

; Check ORs of -2 (-1 isn't useful). We OR the rotated word with 0xfe000000.
define i8 @f3(i8 *%src) {
define i8 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: oilh [[ROT]], 65024
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i8 @f3(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 -2 seq_cst
%res = atomicrmw or ptr %src, i8 -2 seq_cst
ret i8 %res
}

; Check ORs of 1. We OR the rotated word with 0x01000000.
define i8 @f4(i8 *%src) {
define i8 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: oilh [[ROT]], 256
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i8 @f4(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 1 seq_cst
%res = atomicrmw or ptr %src, i8 1 seq_cst
ret i8 %res
}

; Check the maximum signed value. We OR the rotated word with 0x7f000000.
define i8 @f5(i8 *%src) {
define i8 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: oilh [[ROT]], 32512
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i8 @f5(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 127 seq_cst
%res = atomicrmw or ptr %src, i8 127 seq_cst
ret i8 %res
}

; Check ORs of a large unsigned value. We OR the rotated word with
; 0xfd000000.
define i8 @f6(i8 *%src) {
define i8 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: oilh [[ROT]], 64768
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i8 @f6(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i8 *%src, i8 253 seq_cst
%res = atomicrmw or ptr %src, i8 253 seq_cst
ret i8 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 %b seq_cst
%res = atomicrmw or ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check the minimum signed value. We OR the rotated word with 0x80000000.
define i16 @f2(i16 *%src) {
define i16 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i16 @f2(i16 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 -32768 seq_cst
%res = atomicrmw or ptr %src, i16 -32768 seq_cst
ret i16 %res
}

; Check ORs of -2 (-1 isn't useful). We OR the rotated word with 0xfffe0000.
define i16 @f3(i16 *%src) {
define i16 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: oilh [[ROT]], 65534
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i16 @f3(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 -2 seq_cst
%res = atomicrmw or ptr %src, i16 -2 seq_cst
ret i16 %res
}

; Check ORs of 1. We OR the rotated word with 0x00010000.
define i16 @f4(i16 *%src) {
define i16 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: oilh [[ROT]], 1
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i16 @f4(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 1 seq_cst
%res = atomicrmw or ptr %src, i16 1 seq_cst
ret i16 %res
}

; Check the maximum signed value. We OR the rotated word with 0x7fff0000.
define i16 @f5(i16 *%src) {
define i16 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: oilh [[ROT]], 32767
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i16 @f5(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 32767 seq_cst
%res = atomicrmw or ptr %src, i16 32767 seq_cst
ret i16 %res
}

; Check ORs of a large unsigned value. We OR the rotated word with
; 0xfffd0000.
define i16 @f6(i16 *%src) {
define i16 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: oilh [[ROT]], 65533
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i16 @f6(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw or i16 *%src, i16 65533 seq_cst
%res = atomicrmw or ptr %src, i16 65533 seq_cst
ret i16 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check ORs of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -12,12 +12,12 @@ define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 %b seq_cst
%res = atomicrmw or ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check the lowest useful OILL value.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -26,60 +26,60 @@ define i32 @f2(i32 %dummy, i32 *%src) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 1 seq_cst
%res = atomicrmw or ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check the high end of the OILL range.
define i32 @f3(i32 %dummy, i32 *%src) {
define i32 @f3(i32 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: oill %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 65535 seq_cst
%res = atomicrmw or ptr %src, i32 65535 seq_cst
ret i32 %res
}

; Check the lowest useful OILH value, which is the next value up.
define i32 @f4(i32 %dummy, i32 *%src) {
define i32 @f4(i32 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: oilh %r0, 1
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 65536 seq_cst
%res = atomicrmw or ptr %src, i32 65536 seq_cst
ret i32 %res
}

; Check the lowest useful OILF value, which is the next value up.
define i32 @f5(i32 %dummy, i32 *%src) {
define i32 @f5(i32 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: oilf %r0, 65537
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 65537 seq_cst
%res = atomicrmw or ptr %src, i32 65537 seq_cst
ret i32 %res
}

; Check the high end of the OILH range.
define i32 @f6(i32 %dummy, i32 *%src) {
define i32 @f6(i32 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: oilh %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 -65536 seq_cst
%res = atomicrmw or ptr %src, i32 -65536 seq_cst
ret i32 %res
}

; Check the next value up, which must use OILF.
define i32 @f7(i32 %dummy, i32 *%src) {
define i32 @f7(i32 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: oilf %r0, 4294901761
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 -65535 seq_cst
%res = atomicrmw or ptr %src, i32 -65535 seq_cst
ret i32 %res
}

; Check the largest useful OILF value.
define i32 @f8(i32 %dummy, i32 *%src) {
define i32 @f8(i32 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: oilf %r0, 4294967294
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 -2 seq_cst
%res = atomicrmw or ptr %src, i32 -2 seq_cst
ret i32 %res
}
64 changes: 32 additions & 32 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-04.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check ORs of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -12,12 +12,12 @@ define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 %b seq_cst
%res = atomicrmw or ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check the lowest useful OILL value.
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -26,133 +26,133 @@ define i64 @f2(i64 %dummy, i64 *%src) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 1 seq_cst
%res = atomicrmw or ptr %src, i64 1 seq_cst
ret i64 %res
}

; Check the high end of the OILL range.
define i64 @f3(i64 %dummy, i64 *%src) {
define i64 @f3(i64 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: oill %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 65535 seq_cst
%res = atomicrmw or ptr %src, i64 65535 seq_cst
ret i64 %res
}

; Check the lowest useful OILH value, which is the next value up.
define i64 @f4(i64 %dummy, i64 *%src) {
define i64 @f4(i64 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: oilh %r0, 1
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 65536 seq_cst
%res = atomicrmw or ptr %src, i64 65536 seq_cst
ret i64 %res
}

; Check the lowest useful OILF value, which is the next value up again.
define i64 @f5(i64 %dummy, i64 *%src) {
define i64 @f5(i64 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: oilf %r0, 65537
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 65537 seq_cst
%res = atomicrmw or ptr %src, i64 65537 seq_cst
ret i64 %res
}

; Check the high end of the OILH range.
define i64 @f6(i64 %dummy, i64 *%src) {
define i64 @f6(i64 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: oilh %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 4294901760 seq_cst
%res = atomicrmw or ptr %src, i64 4294901760 seq_cst
ret i64 %res
}

; Check the next value up, which must use OILF.
define i64 @f7(i64 %dummy, i64 *%src) {
define i64 @f7(i64 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: oilf %r0, 4294901761
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 4294901761 seq_cst
%res = atomicrmw or ptr %src, i64 4294901761 seq_cst
ret i64 %res
}

; Check the high end of the OILF range.
define i64 @f8(i64 %dummy, i64 *%src) {
define i64 @f8(i64 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: oilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 4294967295 seq_cst
%res = atomicrmw or ptr %src, i64 4294967295 seq_cst
ret i64 %res
}

; Check the lowest useful OIHL value, which is one greater than above.
define i64 @f9(i64 %dummy, i64 *%src) {
define i64 @f9(i64 %dummy, ptr %src) {
; CHECK-LABEL: f9:
; CHECK: oihl %r0, 1
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 4294967296 seq_cst
%res = atomicrmw or ptr %src, i64 4294967296 seq_cst
ret i64 %res
}

; Check the next value up, which must use a register. (We could use
; combinations of OIH* and OIL* instead, but that isn't implemented.)
define i64 @f10(i64 %dummy, i64 *%src) {
define i64 @f10(i64 %dummy, ptr %src) {
; CHECK-LABEL: f10:
; CHECK: ogr
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 4294967297 seq_cst
%res = atomicrmw or ptr %src, i64 4294967297 seq_cst
ret i64 %res
}

; Check the high end of the OIHL range.
define i64 @f11(i64 %dummy, i64 *%src) {
define i64 @f11(i64 %dummy, ptr %src) {
; CHECK-LABEL: f11:
; CHECK: oihl %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 281470681743360 seq_cst
%res = atomicrmw or ptr %src, i64 281470681743360 seq_cst
ret i64 %res
}

; Check the lowest useful OIHH value, which is 1<<32 greater than above.
define i64 @f12(i64 %dummy, i64 *%src) {
define i64 @f12(i64 %dummy, ptr %src) {
; CHECK-LABEL: f12:
; CHECK: oihh %r0, 1
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 281474976710656 seq_cst
%res = atomicrmw or ptr %src, i64 281474976710656 seq_cst
ret i64 %res
}

; Check the lowest useful OIHF value, which is 1<<32 greater again.
define i64 @f13(i64 %dummy, i64 *%src) {
define i64 @f13(i64 %dummy, ptr %src) {
; CHECK-LABEL: f13:
; CHECK: oihf %r0, 65537
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 281479271677952 seq_cst
%res = atomicrmw or ptr %src, i64 281479271677952 seq_cst
ret i64 %res
}

; Check the high end of the OIHH range.
define i64 @f14(i64 %dummy, i64 *%src) {
define i64 @f14(i64 %dummy, ptr %src) {
; CHECK-LABEL: f14:
; CHECK: oihh %r0, 65535
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 18446462598732840960 seq_cst
%res = atomicrmw or ptr %src, i64 18446462598732840960 seq_cst
ret i64 %res
}

; Check the next value up, which must use a register.
define i64 @f15(i64 %dummy, i64 *%src) {
define i64 @f15(i64 %dummy, ptr %src) {
; CHECK-LABEL: f15:
; CHECK: ogr
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 18446462598732840961 seq_cst
%res = atomicrmw or ptr %src, i64 18446462598732840961 seq_cst
ret i64 %res
}

; Check the high end of the OIHF range.
define i64 @f16(i64 %dummy, i64 *%src) {
define i64 @f16(i64 %dummy, ptr %src) {
; CHECK-LABEL: f16:
; CHECK: oihf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 -4294967296 seq_cst
%res = atomicrmw or ptr %src, i64 -4294967296 seq_cst
ret i64 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-05.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,62 +3,62 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check OR of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: lao %r2, %r4, 0(%r3)
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 %b seq_cst
%res = atomicrmw or ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check OR of 1, which needs a temporary.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lhi [[TMP:%r[0-5]]], 1
; CHECK: lao %r2, [[TMP]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw or i32 *%src, i32 1 seq_cst
%res = atomicrmw or ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check the high end of the LAO range.
define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f3(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f3:
; CHECK: lao %r2, %r4, 524284(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 131071
%res = atomicrmw or i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 131071
%res = atomicrmw or ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which needs separate address logic.
define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f4(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f4:
; CHECK: agfi %r3, 524288
; CHECK: lao %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 131072
%res = atomicrmw or i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 131072
%res = atomicrmw or ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the low end of the LAO range.
define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f5(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f5:
; CHECK: lao %r2, %r4, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 -131072
%res = atomicrmw or i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 -131072
%res = atomicrmw or ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word down, which needs separate address logic.
define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f6(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f6:
; CHECK: agfi %r3, -524292
; CHECK: lao %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 -131073
%res = atomicrmw or i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 -131073
%res = atomicrmw or ptr %ptr, i32 %b seq_cst
ret i32 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-or-06.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,62 +3,62 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check OR of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: laog %r2, %r4, 0(%r3)
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 %b seq_cst
%res = atomicrmw or ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check OR of 1, which needs a temporary.
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lghi [[TMP:%r[0-5]]], 1
; CHECK: laog %r2, [[TMP]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw or i64 *%src, i64 1 seq_cst
%res = atomicrmw or ptr %src, i64 1 seq_cst
ret i64 %res
}

; Check the high end of the LAOG range.
define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f3(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f3:
; CHECK: laog %r2, %r4, 524280(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65535
%res = atomicrmw or i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65535
%res = atomicrmw or ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword up, which needs separate address logic.
define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f4(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f4:
; CHECK: agfi %r3, 524288
; CHECK: laog %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65536
%res = atomicrmw or i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65536
%res = atomicrmw or ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the low end of the LAOG range.
define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f5(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f5:
; CHECK: laog %r2, %r4, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65536
%res = atomicrmw or i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65536
%res = atomicrmw or ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword down, which needs separate address logic.
define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f6(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f6:
; CHECK: agfi %r3, -524296
; CHECK: laog %r2, %r4, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65537
%res = atomicrmw or i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65537
%res = atomicrmw or ptr %ptr, i64 %b seq_cst
ret i64 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-01.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 %b seq_cst
%res = atomicrmw sub ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check the minimum signed value. We add 0x80000000 to the rotated word.
define i8 @f2(i8 *%src) {
define i8 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i8 @f2(i8 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 -128 seq_cst
%res = atomicrmw sub ptr %src, i8 -128 seq_cst
ret i8 %res
}

; Check subtraction of -1. We add 0x01000000 to the rotated word.
define i8 @f3(i8 *%src) {
define i8 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: afi [[ROT]], 16777216
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i8 @f3(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 -1 seq_cst
%res = atomicrmw sub ptr %src, i8 -1 seq_cst
ret i8 %res
}

; Check subtraction of -1. We add 0xff000000 to the rotated word.
define i8 @f4(i8 *%src) {
define i8 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: afi [[ROT]], -16777216
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i8 @f4(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 1 seq_cst
%res = atomicrmw sub ptr %src, i8 1 seq_cst
ret i8 %res
}

; Check the maximum signed value. We add 0x81000000 to the rotated word.
define i8 @f5(i8 *%src) {
define i8 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: afi [[ROT]], -2130706432
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i8 @f5(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 127 seq_cst
%res = atomicrmw sub ptr %src, i8 127 seq_cst
ret i8 %res
}

; Check subtraction of a large unsigned value. We add 0x02000000 to the
; rotated word.
define i8 @f6(i8 *%src) {
define i8 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: afi [[ROT]], 33554432
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i8 @f6(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i8 *%src, i8 254 seq_cst
%res = atomicrmw sub ptr %src, i8 254 seq_cst
ret i8 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 %b seq_cst
%res = atomicrmw sub ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check the minimum signed value. We add 0x80000000 to the rotated word.
define i16 @f2(i16 *%src) {
define i16 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i16 @f2(i16 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 -32768 seq_cst
%res = atomicrmw sub ptr %src, i16 -32768 seq_cst
ret i16 %res
}

; Check subtraction of -1. We add 0x00010000 to the rotated word.
define i16 @f3(i16 *%src) {
define i16 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: afi [[ROT]], 65536
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i16 @f3(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 -1 seq_cst
%res = atomicrmw sub ptr %src, i16 -1 seq_cst
ret i16 %res
}

; Check subtraction of 1. We add 0xffff0000 to the rotated word.
define i16 @f4(i16 *%src) {
define i16 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: afi [[ROT]], -65536
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i16 @f4(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 1 seq_cst
%res = atomicrmw sub ptr %src, i16 1 seq_cst
ret i16 %res
}

; Check the maximum signed value. We add 0x80010000 to the rotated word.
define i16 @f5(i16 *%src) {
define i16 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: afi [[ROT]], -2147418112
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i16 @f5(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 32767 seq_cst
%res = atomicrmw sub ptr %src, i16 32767 seq_cst
ret i16 %res
}

; Check subtraction of a large unsigned value. We add 0x00020000 to the
; rotated word.
define i16 @f6(i16 *%src) {
define i16 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: afi [[ROT]], 131072
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i16 @f6(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw sub i16 *%src, i16 65534 seq_cst
%res = atomicrmw sub ptr %src, i16 65534 seq_cst
ret i16 %res
}
36 changes: 18 additions & 18 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check subtraction of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -12,12 +12,12 @@ define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 %b seq_cst
%res = atomicrmw sub ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check subtraction of 1, which can use AHI.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -26,69 +26,69 @@ define i32 @f2(i32 %dummy, i32 *%src) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 1 seq_cst
%res = atomicrmw sub ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check the low end of the AHI range.
define i32 @f3(i32 %dummy, i32 *%src) {
define i32 @f3(i32 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: ahi %r0, -32768
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 32768 seq_cst
%res = atomicrmw sub ptr %src, i32 32768 seq_cst
ret i32 %res
}

; Check the next value down, which must use AFI.
define i32 @f4(i32 %dummy, i32 *%src) {
define i32 @f4(i32 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: afi %r0, -32769
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 32769 seq_cst
%res = atomicrmw sub ptr %src, i32 32769 seq_cst
ret i32 %res
}

; Check the low end of the AFI range.
define i32 @f5(i32 %dummy, i32 *%src) {
define i32 @f5(i32 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: afi %r0, -2147483648
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 2147483648 seq_cst
%res = atomicrmw sub ptr %src, i32 2147483648 seq_cst
ret i32 %res
}

; Check the next value up, which gets treated as a positive operand.
define i32 @f6(i32 %dummy, i32 *%src) {
define i32 @f6(i32 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: afi %r0, 2147483647
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 2147483649 seq_cst
%res = atomicrmw sub ptr %src, i32 2147483649 seq_cst
ret i32 %res
}

; Check subtraction of -1, which can use AHI.
define i32 @f7(i32 %dummy, i32 *%src) {
define i32 @f7(i32 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: ahi %r0, 1
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 -1 seq_cst
%res = atomicrmw sub ptr %src, i32 -1 seq_cst
ret i32 %res
}

; Check the high end of the AHI range.
define i32 @f8(i32 %dummy, i32 *%src) {
define i32 @f8(i32 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: ahi %r0, 32767
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 -32767 seq_cst
%res = atomicrmw sub ptr %src, i32 -32767 seq_cst
ret i32 %res
}

; Check the next value down, which must use AFI instead.
define i32 @f9(i32 %dummy, i32 *%src) {
define i32 @f9(i32 %dummy, ptr %src) {
; CHECK-LABEL: f9:
; CHECK: afi %r0, 32768
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 -32768 seq_cst
%res = atomicrmw sub ptr %src, i32 -32768 seq_cst
ret i32 %res
}
44 changes: 22 additions & 22 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-04.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check subtraction of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -12,12 +12,12 @@ define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 %b seq_cst
%res = atomicrmw sub ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check subtraction of 1, which can use AGHI.
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
Expand All @@ -26,87 +26,87 @@ define i64 @f2(i64 %dummy, i64 *%src) {
; CHECK: csg %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 1 seq_cst
%res = atomicrmw sub ptr %src, i64 1 seq_cst
ret i64 %res
}

; Check the low end of the AGHI range.
define i64 @f3(i64 %dummy, i64 *%src) {
define i64 @f3(i64 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: aghi %r0, -32768
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 32768 seq_cst
%res = atomicrmw sub ptr %src, i64 32768 seq_cst
ret i64 %res
}

; Check the next value up, which must use AGFI.
define i64 @f4(i64 %dummy, i64 *%src) {
define i64 @f4(i64 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: agfi %r0, -32769
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 32769 seq_cst
%res = atomicrmw sub ptr %src, i64 32769 seq_cst
ret i64 %res
}

; Check the low end of the AGFI range.
define i64 @f5(i64 %dummy, i64 *%src) {
define i64 @f5(i64 %dummy, ptr %src) {
; CHECK-LABEL: f5:
; CHECK: agfi %r0, -2147483648
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 2147483648 seq_cst
%res = atomicrmw sub ptr %src, i64 2147483648 seq_cst
ret i64 %res
}

; Check the next value up, which must use a register operation.
define i64 @f6(i64 %dummy, i64 *%src) {
define i64 @f6(i64 %dummy, ptr %src) {
; CHECK-LABEL: f6:
; CHECK: sgr
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 2147483649 seq_cst
%res = atomicrmw sub ptr %src, i64 2147483649 seq_cst
ret i64 %res
}

; Check subtraction of -1, which can use AGHI.
define i64 @f7(i64 %dummy, i64 *%src) {
define i64 @f7(i64 %dummy, ptr %src) {
; CHECK-LABEL: f7:
; CHECK: aghi %r0, 1
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 -1 seq_cst
%res = atomicrmw sub ptr %src, i64 -1 seq_cst
ret i64 %res
}

; Check the high end of the AGHI range.
define i64 @f8(i64 %dummy, i64 *%src) {
define i64 @f8(i64 %dummy, ptr %src) {
; CHECK-LABEL: f8:
; CHECK: aghi %r0, 32767
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 -32767 seq_cst
%res = atomicrmw sub ptr %src, i64 -32767 seq_cst
ret i64 %res
}

; Check the next value down, which must use AGFI instead.
define i64 @f9(i64 %dummy, i64 *%src) {
define i64 @f9(i64 %dummy, ptr %src) {
; CHECK-LABEL: f9:
; CHECK: agfi %r0, 32768
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 -32768 seq_cst
%res = atomicrmw sub ptr %src, i64 -32768 seq_cst
ret i64 %res
}

; Check the high end of the AGFI range.
define i64 @f10(i64 %dummy, i64 *%src) {
define i64 @f10(i64 %dummy, ptr %src) {
; CHECK-LABEL: f10:
; CHECK: agfi %r0, 2147483647
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 -2147483647 seq_cst
%res = atomicrmw sub ptr %src, i64 -2147483647 seq_cst
ret i64 %res
}

; Check the next value down, which must use a register operation.
define i64 @f11(i64 %dummy, i64 *%src) {
define i64 @f11(i64 %dummy, ptr %src) {
; CHECK-LABEL: f11:
; CHECK: sgr
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 -2147483648 seq_cst
%res = atomicrmw sub ptr %src, i64 -2147483648 seq_cst
ret i64 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-05.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,67 +3,67 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check addition of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: lcr [[NEG:%r[0-5]]], %r4
; CHECK: laa %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 %b seq_cst
%res = atomicrmw sub ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check addition of 1, which needs a temporary.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lhi [[TMP:%r[0-5]]], -1
; CHECK: laa %r2, [[TMP]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw sub i32 *%src, i32 1 seq_cst
%res = atomicrmw sub ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check the high end of the LAA range.
define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f3(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f3:
; CHECK: lcr [[NEG:%r[0-5]]], %r4
; CHECK: laa %r2, [[NEG]], 524284(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 131071
%res = atomicrmw sub i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 131071
%res = atomicrmw sub ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which needs separate address logic.
define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f4(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f4:
; CHECK-DAG: lcr [[NEG:%r[0-5]]], %r4
; CHECK-DAG: agfi %r3, 524288
; CHECK: laa %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 131072
%res = atomicrmw sub i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 131072
%res = atomicrmw sub ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the low end of the LAA range.
define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f5(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f5:
; CHECK: lcr [[NEG:%r[0-5]]], %r4
; CHECK: laa %r2, [[NEG]], -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 -131072
%res = atomicrmw sub i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 -131072
%res = atomicrmw sub ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word down, which needs separate address logic.
define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f6(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f6:
; CHECK-DAG: lcr [[NEG:%r[0-5]]], %r4
; CHECK-DAG: agfi %r3, -524292
; CHECK: laa %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i32 -131073
%res = atomicrmw sub i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i32 -131073
%res = atomicrmw sub ptr %ptr, i32 %b seq_cst
ret i32 %res
}
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/SystemZ/atomicrmw-sub-06.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,67 +3,67 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s

; Check addition of a variable.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lcgr [[NEG:%r[0-5]]], %r4
; CHECK: laag %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 %b seq_cst
%res = atomicrmw sub ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check addition of 1, which needs a temporary.
define i64 @f2(i64 %dummy, i64 *%src) {
define i64 @f2(i64 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lghi [[TMP:%r[0-5]]], -1
; CHECK: laag %r2, [[TMP]], 0(%r3)
; CHECK: br %r14
%res = atomicrmw sub i64 *%src, i64 1 seq_cst
%res = atomicrmw sub ptr %src, i64 1 seq_cst
ret i64 %res
}

; Check the high end of the LAAG range.
define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f3(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f3:
; CHECK: lcgr [[NEG:%r[0-5]]], %r4
; CHECK: laag %r2, [[NEG]], 524280(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65535
%res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65535
%res = atomicrmw sub ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword up, which needs separate address logic.
define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f4(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f4:
; CHECK-DAG: lcgr [[NEG:%r[0-5]]], %r4
; CHECK-DAG: agfi %r3, 524288
; CHECK: laag %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65536
%res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65536
%res = atomicrmw sub ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the low end of the LAAG range.
define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f5(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f5:
; CHECK: lcgr [[NEG:%r[0-5]]], %r4
; CHECK: laag %r2, [[NEG]], -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65536
%res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65536
%res = atomicrmw sub ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword down, which needs separate address logic.
define i64 @f6(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f6(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f6:
; CHECK-DAG: lcgr [[NEG:%r[0-5]]], %r4
; CHECK-DAG: agfi %r3, -524296
; CHECK: laag %r2, [[NEG]], 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65537
%res = atomicrmw sub i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65537
%res = atomicrmw sub ptr %ptr, i64 %b seq_cst
ret i64 %res
}
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xchg-01.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
; being used in the RISBG (in contrast to things like atomic addition,
; which shift %r3 left so that %b is at the high end of the word).
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -36,20 +36,20 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
; CHECK-SHIFT: rll
; CHECK-SHIFT: br %r14
%res = atomicrmw xchg i8 *%src, i8 %b seq_cst
%res = atomicrmw xchg ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check exchange with a constant. We should force the constant into
; a register and use the sequence above.
define i8 @f2(i8 *%src) {
define i8 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lhi [[VALUE:%r[0-9]+]], 88
; CHECK: risbg {{%r[0-9]+}}, [[VALUE]], 32, 39, 24
; CHECK: br %r14
;
; CHECK-SHIFT-LABEL: f2:
; CHECK-SHIFT: br %r14
%res = atomicrmw xchg i8 *%src, i8 88 seq_cst
%res = atomicrmw xchg ptr %src, i8 88 seq_cst
ret i8 %res
}
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xchg-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
; tested in CHECK. CHECK-SHIFT also checks that %r3 is not modified before
; being used in the RISBG (in contrast to things like atomic addition,
; which shift %r3 left so that %b is at the high end of the word).
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -36,20 +36,20 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT: rll {{%r[0-9]+}}, {{%r[0-9]+}}, 0([[NEGSHIFT]])
; CHECK-SHIFT: rll
; CHECK-SHIFT: br %r14
%res = atomicrmw xchg i16 *%src, i16 %b seq_cst
%res = atomicrmw xchg ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check exchange with a constant. We should force the constant into
; a register and use the sequence above.
define i16 @f2(i16 *%src) {
define i16 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: lhi [[VALUE:%r[0-9]+]], -25536
; CHECK: risbg {{%r[0-9]+}}, [[VALUE]], 32, 47, 16
; CHECK: br %r14
;
; CHECK-SHIFT-LABEL: f2:
; CHECK-SHIFT: br %r14
%res = atomicrmw xchg i16 *%src, i16 40000 seq_cst
%res = atomicrmw xchg ptr %src, i16 40000 seq_cst
ret i16 %res
}
54 changes: 27 additions & 27 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xchg-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,93 +3,93 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

; Check register exchange.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: cs %r2, %r4, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xchg i32 *%src, i32 %b seq_cst
%res = atomicrmw xchg ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the aligned CS range.
define i32 @f2(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f2(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 4092(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 4092(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 1023
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 1023
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which requires CSY.
define i32 @f3(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f3(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f3:
; CHECK: ly %r2, 4096(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, 4096(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 1024
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 1024
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the aligned CSY range.
define i32 @f4(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f4(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f4:
; CHECK: ly %r2, 524284(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, 524284(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 131071
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 131071
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word up, which needs separate address logic.
define i32 @f5(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f5(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f5:
; CHECK: agfi %r3, 524288
; CHECK: l %r2, 0(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 131072
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 131072
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the high end of the negative aligned CSY range.
define i32 @f6(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f6(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f6:
; CHECK: ly %r2, -4(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, -4(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 -1
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -1
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the low end of the CSY range.
define i32 @f7(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f7(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f7:
; CHECK: ly %r2, -524288(%r3)
; CHECK: csy %r2, {{%r[0-9]+}}, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 -131072
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -131072
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check the next word down, which needs separate address logic.
define i32 @f8(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f8(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f8:
; CHECK: agfi %r3, -524292
; CHECK: l %r2, 0(%r3)
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i32, i32 *%src, i64 -131073
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = getelementptr i32, ptr %src, i64 -131073
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

Expand All @@ -101,22 +101,22 @@ define i32 @f9(i32 %dummy, i64 %base, i64 %index, i32 %b) {
; CHECK: cs %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%add = add i64 %base, %index
%ptr = inttoptr i64 %add to i32 *
%res = atomicrmw xchg i32 *%ptr, i32 %b seq_cst
%ptr = inttoptr i64 %add to ptr
%res = atomicrmw xchg ptr %ptr, i32 %b seq_cst
ret i32 %res
}

; Check exchange of a constant. We should force it into a register and
; use the sequence above.
define i32 @f10(i32 %dummy, i32 *%src) {
define i32 @f10(i32 %dummy, ptr %src) {
; CHECK-LABEL: f10:
; CHECK-DAG: llill [[VALUE:%r[0-9+]]], 40000
; CHECK-DAG: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: cs %r2, [[VALUE]], 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xchg i32 *%src, i32 40000 seq_cst
%res = atomicrmw xchg ptr %src, i32 40000 seq_cst
ret i32 %res
}

36 changes: 18 additions & 18 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xchg-04.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,60 +3,60 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s

; Check register exchange.
define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f1(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f1:
; CHECK: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: csg %r2, %r4, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xchg i64 *%src, i64 %b seq_cst
%res = atomicrmw xchg ptr %src, i64 %b seq_cst
ret i64 %res
}

; Check the high end of the aligned CSG range.
define i64 @f2(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f2(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f2:
; CHECK: lg %r2, 524280(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 524280(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65535
%res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65535
%res = atomicrmw xchg ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword up, which requires separate address logic.
define i64 @f3(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f3(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f3:
; CHECK: agfi %r3, 524288
; CHECK: lg %r2, 0(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 65536
%res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 65536
%res = atomicrmw xchg ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the low end of the CSG range.
define i64 @f4(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f4(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f4:
; CHECK: lg %r2, -524288(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, -524288(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65536
%res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65536
%res = atomicrmw xchg ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check the next doubleword down, which requires separate address logic.
define i64 @f5(i64 %dummy, i64 *%src, i64 %b) {
define i64 @f5(i64 %dummy, ptr %src, i64 %b) {
; CHECK-LABEL: f5:
; CHECK: agfi %r3, -524296
; CHECK: lg %r2, 0(%r3)
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%ptr = getelementptr i64, i64 *%src, i64 -65537
%res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst
%ptr = getelementptr i64, ptr %src, i64 -65537
%res = atomicrmw xchg ptr %ptr, i64 %b seq_cst
ret i64 %res
}

Expand All @@ -68,21 +68,21 @@ define i64 @f6(i64 %dummy, i64 %base, i64 %index, i64 %b) {
; CHECK: csg %r2, {{%r[0-9]+}}, 0(%r3)
; CHECK: br %r14
%add = add i64 %base, %index
%ptr = inttoptr i64 %add to i64 *
%res = atomicrmw xchg i64 *%ptr, i64 %b seq_cst
%ptr = inttoptr i64 %add to ptr
%res = atomicrmw xchg ptr %ptr, i64 %b seq_cst
ret i64 %res
}

; Check exchange of a constant. We should force it into a register and
; use the sequence above.
define i64 @f7(i64 %dummy, i64 *%ptr) {
define i64 @f7(i64 %dummy, ptr %ptr) {
; CHECK-LABEL: f7:
; CHECK-DAG: llilf [[VALUE:%r[0-9+]]], 3000000000
; CHECK-DAG: lg %r2, 0(%r3)
; CHECK: [[LABEL:\.[^:]*]]:
; CHECK: csg %r2, [[VALUE]], 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xchg i64 *%ptr, i64 3000000000 seq_cst
%res = atomicrmw xchg ptr %ptr, i64 3000000000 seq_cst
ret i64 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xor-01.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i8 @f1(i8 *%src, i8 %b) {
define i8 @f1(ptr %src, i8 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i8 @f1(i8 *%src, i8 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 %b seq_cst
%res = atomicrmw xor ptr %src, i8 %b seq_cst
ret i8 %res
}

; Check the minimum signed value. We XOR the rotated word with 0x80000000.
define i8 @f2(i8 *%src) {
define i8 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i8 @f2(i8 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 -128 seq_cst
%res = atomicrmw xor ptr %src, i8 -128 seq_cst
ret i8 %res
}

; Check XORs of -1. We XOR the rotated word with 0xff000000.
define i8 @f3(i8 *%src) {
define i8 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: xilf [[ROT]], 4278190080
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i8 @f3(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 -1 seq_cst
%res = atomicrmw xor ptr %src, i8 -1 seq_cst
ret i8 %res
}

; Check XORs of 1. We XOR the rotated word with 0x01000000.
define i8 @f4(i8 *%src) {
define i8 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: xilf [[ROT]], 16777216
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i8 @f4(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 1 seq_cst
%res = atomicrmw xor ptr %src, i8 1 seq_cst
ret i8 %res
}

; Check the maximum signed value. We XOR the rotated word with 0x7f000000.
define i8 @f5(i8 *%src) {
define i8 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: xilf [[ROT]], 2130706432
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i8 @f5(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 127 seq_cst
%res = atomicrmw xor ptr %src, i8 127 seq_cst
ret i8 %res
}

; Check XORs of a large unsigned value. We XOR the rotated word with
; 0xfd000000.
define i8 @f6(i8 *%src) {
define i8 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: xilf [[ROT]], 4244635648
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i8 @f6(i8 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i8 *%src, i8 253 seq_cst
%res = atomicrmw xor ptr %src, i8 253 seq_cst
ret i8 %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xor-02.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
; - CHECK-SHIFT2 makes sure that %b is shifted into the high part of the word
; before being used. This shift is independent of the other loop prologue
; instructions.
define i16 @f1(i16 *%src, i16 %b) {
define i16 @f1(ptr %src, i16 %b) {
; CHECK-LABEL: f1:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand Down Expand Up @@ -41,12 +41,12 @@ define i16 @f1(i16 *%src, i16 %b) {
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: rll
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 %b seq_cst
%res = atomicrmw xor ptr %src, i16 %b seq_cst
ret i16 %res
}

; Check the minimum signed value. We XOR the rotated word with 0x80000000.
define i16 @f2(i16 *%src) {
define i16 @f2(ptr %src) {
; CHECK-LABEL: f2:
; CHECK: risbg [[RISBG:%r[1-9]+]], %r2, 0, 189, 0{{$}}
; CHECK-DAG: sll %r2, 3
Expand All @@ -70,12 +70,12 @@ define i16 @f2(i16 *%src) {
;
; CHECK-SHIFT2-LABEL: f2:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 -32768 seq_cst
%res = atomicrmw xor ptr %src, i16 -32768 seq_cst
ret i16 %res
}

; Check XORs of -1. We XOR the rotated word with 0xffff0000.
define i16 @f3(i16 *%src) {
define i16 @f3(ptr %src) {
; CHECK-LABEL: f3:
; CHECK: xilf [[ROT]], 4294901760
; CHECK: br %r14
Expand All @@ -84,12 +84,12 @@ define i16 @f3(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f3:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 -1 seq_cst
%res = atomicrmw xor ptr %src, i16 -1 seq_cst
ret i16 %res
}

; Check XORs of 1. We XOR the rotated word with 0x00010000.
define i16 @f4(i16 *%src) {
define i16 @f4(ptr %src) {
; CHECK-LABEL: f4:
; CHECK: xilf [[ROT]], 65536
; CHECK: br %r14
Expand All @@ -98,12 +98,12 @@ define i16 @f4(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f4:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 1 seq_cst
%res = atomicrmw xor ptr %src, i16 1 seq_cst
ret i16 %res
}

; Check the maximum signed value. We XOR the rotated word with 0x7fff0000.
define i16 @f5(i16 *%src) {
define i16 @f5(ptr %src) {
; CHECK-LABEL: f5:
; CHECK: xilf [[ROT]], 2147418112
; CHECK: br %r14
Expand All @@ -112,13 +112,13 @@ define i16 @f5(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f5:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 32767 seq_cst
%res = atomicrmw xor ptr %src, i16 32767 seq_cst
ret i16 %res
}

; Check XORs of a large unsigned value. We XOR the rotated word with
; 0xfffd0000.
define i16 @f6(i16 *%src) {
define i16 @f6(ptr %src) {
; CHECK-LABEL: f6:
; CHECK: xilf [[ROT]], 4294770688
; CHECK: br %r14
Expand All @@ -127,6 +127,6 @@ define i16 @f6(i16 *%src) {
; CHECK-SHIFT1: br %r14
; CHECK-SHIFT2-LABEL: f6:
; CHECK-SHIFT2: br %r14
%res = atomicrmw xor i16 *%src, i16 65533 seq_cst
%res = atomicrmw xor ptr %src, i16 65533 seq_cst
ret i16 %res
}
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/SystemZ/atomicrmw-xor-03.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s

; Check XORs of a variable.
define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
define i32 @f1(i32 %dummy, ptr %src, i32 %b) {
; CHECK-LABEL: f1:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -12,12 +12,12 @@ define i32 @f1(i32 %dummy, i32 *%src, i32 %b) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xor i32 *%src, i32 %b seq_cst
%res = atomicrmw xor ptr %src, i32 %b seq_cst
ret i32 %res
}

; Check the lowest useful constant.
define i32 @f2(i32 %dummy, i32 *%src) {
define i32 @f2(i32 %dummy, ptr %src) {
; CHECK-LABEL: f2:
; CHECK: l %r2, 0(%r3)
; CHECK: [[LABEL:\.[^ ]*]]:
Expand All @@ -26,24 +26,24 @@ define i32 @f2(i32 %dummy, i32 *%src) {
; CHECK: cs %r2, %r0, 0(%r3)
; CHECK: jl [[LABEL]]
; CHECK: br %r14
%res = atomicrmw xor i32 *%src, i32 1 seq_cst
%res = atomicrmw xor ptr %src, i32 1 seq_cst
ret i32 %res
}

; Check an arbitrary constant.
define i32 @f3(i32 %dummy, i32 *%src) {
define i32 @f3(i32 %dummy, ptr %src) {
; CHECK-LABEL: f3:
; CHECK: xilf %r0, 3000000000
; CHECK: br %r14
%res = atomicrmw xor i32 *%src, i32 3000000000 seq_cst
%res = atomicrmw xor ptr %src, i32 3000000000 seq_cst
ret i32 %res
}

; Check bitwise negation.
define i32 @f4(i32 %dummy, i32 *%src) {
define i32 @f4(i32 %dummy, ptr %src) {
; CHECK-LABEL: f4:
; CHECK: xilf %r0, 4294967295
; CHECK: br %r14
%res = atomicrmw xor i32 *%src, i32 -1 seq_cst
%res = atomicrmw xor ptr %src, i32 -1 seq_cst
ret i32 %res
}
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