240 changes: 120 additions & 120 deletions llvm/test/CodeGen/AArch64/aarch64-smull.ll
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30 changes: 15 additions & 15 deletions llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -116,7 +116,7 @@ entry:

; The split bitmask immediates should be hoisted outside loop because they are
; loop invariant.
define void @test8(i64 %a, i64* noalias %src, i64* noalias %dst, i64 %n) {
define void @test8(i64 %a, ptr noalias %src, ptr noalias %dst, i64 %n) {
; CHECK-LABEL: test8:
; CHECK: // %bb.0: // %loop.ph
; CHECK-NEXT: and x9, x0, #0x3ffc00
Expand Down Expand Up @@ -150,10 +150,10 @@ loop:
br i1 %cmp, label %if.then, label %if.else

if.then:
%src.arrayidx = getelementptr inbounds i64, i64* %src, i64 %iv
%val = load i64, i64* %src.arrayidx
%dst.arrayidx = getelementptr inbounds i64, i64* %dst, i64 %iv
store i64 %val, i64* %dst.arrayidx
%src.arrayidx = getelementptr inbounds i64, ptr %src, i64 %iv
%val = load i64, ptr %src.arrayidx
%dst.arrayidx = getelementptr inbounds i64, ptr %dst, i64 %iv
store i64 %val, ptr %dst.arrayidx
br label %for.inc

if.else:
Expand All @@ -169,7 +169,7 @@ exit:
}

; This constant should not be split because the `and` is not loop invariant.
define i32 @test9(i32* nocapture %x, i32* nocapture readonly %y, i32 %n) {
define i32 @test9(ptr nocapture %x, ptr nocapture readonly %y, i32 %n) {
; CHECK-LABEL: test9:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: cmp w2, #1
Expand Down Expand Up @@ -201,11 +201,11 @@ for.cond.cleanup: ; preds = %for.body, %entry

for.body: ; preds = %for.body.preheader, %for.body
%indvars.iv = phi i64 [ 0, %for.body.preheader ], [ %indvars.iv.next, %for.body ]
%arrayidx = getelementptr inbounds i32, i32* %y, i64 %indvars.iv
%0 = load i32, i32* %arrayidx, align 4
%arrayidx = getelementptr inbounds i32, ptr %y, i64 %indvars.iv
%0 = load i32, ptr %arrayidx, align 4
%and = and i32 %0, 2098176
%arrayidx2 = getelementptr inbounds i32, i32* %x, i64 %indvars.iv
store i32 %and, i32* %arrayidx2, align 4
%arrayidx2 = getelementptr inbounds i32, ptr %x, i64 %indvars.iv
store i32 %and, ptr %arrayidx2, align 4
%indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
%exitcond.not = icmp eq i64 %indvars.iv.next, %wide.trip.count
br i1 %exitcond.not, label %for.cond.cleanup, label %for.body
Expand All @@ -222,7 +222,7 @@ for.body: ; preds = %for.body.preheader,
;
; In this case, the constant should not be split because it causes more
; instructions.
define void @test10(i32* nocapture %x, i32* nocapture readonly %y, i32* nocapture %z) {
define void @test10(ptr nocapture %x, ptr nocapture readonly %y, ptr nocapture %z) {
; CHECK-LABEL: test10:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: ldr w8, [x1]
Expand All @@ -235,12 +235,12 @@ define void @test10(i32* nocapture %x, i32* nocapture readonly %y, i32* nocaptur
; CHECK-NEXT: str w8, [x2]
; CHECK-NEXT: ret
entry:
%0 = load i32, i32* %y, align 4
%0 = load i32, ptr %y, align 4
%and = and i32 %0, 2098176
store i32 %and, i32* %x, align 4
%1 = load i32, i32* %y, align 4
store i32 %and, ptr %x, align 4
%1 = load i32, ptr %y, align 4
%or = or i32 %1, 2098176
store i32 %or, i32* %z, align 4
store i32 %or, ptr %z, align 4
ret void
}

Expand Down
205 changes: 102 additions & 103 deletions llvm/test/CodeGen/AArch64/aarch64-stp-cluster.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,16 +10,16 @@
; CHECK:SU(3): STRXui %1:gpr64, %0:gpr64common, 2
; CHECK:SU(2): STRXui %1:gpr64, %0:gpr64common, 3
; CHECK:SU(5): STRXui %1:gpr64, %0:gpr64common, 4
define i64 @stp_i64_scale(i64* nocapture %P, i64 %v) {
define i64 @stp_i64_scale(ptr nocapture %P, i64 %v) {
entry:
%arrayidx = getelementptr inbounds i64, i64* %P, i64 3
store i64 %v, i64* %arrayidx
%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 2
store i64 %v, i64* %arrayidx1
%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 1
store i64 %v, i64* %arrayidx2
%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 4
store i64 %v, i64* %arrayidx3
%arrayidx = getelementptr inbounds i64, ptr %P, i64 3
store i64 %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds i64, ptr %P, i64 2
store i64 %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds i64, ptr %P, i64 1
store i64 %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds i64, ptr %P, i64 4
store i64 %v, ptr %arrayidx3
ret i64 %v
}

Expand All @@ -31,16 +31,16 @@ entry:
; CHECK:SU(3): STRWui %1:gpr32, %0:gpr64common, 2
; CHECK:SU(2): STRWui %1:gpr32, %0:gpr64common, 3
; CHECK:SU(5): STRWui %1:gpr32, %0:gpr64common, 4
define i32 @stp_i32_scale(i32* nocapture %P, i32 %v) {
define i32 @stp_i32_scale(ptr nocapture %P, i32 %v) {
entry:
%arrayidx = getelementptr inbounds i32, i32* %P, i32 3
store i32 %v, i32* %arrayidx
%arrayidx1 = getelementptr inbounds i32, i32* %P, i32 2
store i32 %v, i32* %arrayidx1
%arrayidx2 = getelementptr inbounds i32, i32* %P, i32 1
store i32 %v, i32* %arrayidx2
%arrayidx3 = getelementptr inbounds i32, i32* %P, i32 4
store i32 %v, i32* %arrayidx3
%arrayidx = getelementptr inbounds i32, ptr %P, i32 3
store i32 %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds i32, ptr %P, i32 2
store i32 %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds i32, ptr %P, i32 1
store i32 %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds i32, ptr %P, i32 4
store i32 %v, ptr %arrayidx3
ret i32 %v
}

Expand All @@ -52,16 +52,16 @@ entry:
; CHECK:SU(3): STURXi %1:gpr64, %0:gpr64common, -8
; CHECK:SU(4): STURXi %1:gpr64, %0:gpr64common, -16
; CHECK:SU(5): STURXi %1:gpr64, %0:gpr64common, -32
define void @stp_i64_unscale(i64* nocapture %P, i64 %v) #0 {
define void @stp_i64_unscale(ptr nocapture %P, i64 %v) #0 {
entry:
%arrayidx = getelementptr inbounds i64, i64* %P, i64 -3
store i64 %v, i64* %arrayidx
%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 -1
store i64 %v, i64* %arrayidx1
%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 -2
store i64 %v, i64* %arrayidx2
%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 -4
store i64 %v, i64* %arrayidx3
%arrayidx = getelementptr inbounds i64, ptr %P, i64 -3
store i64 %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds i64, ptr %P, i64 -1
store i64 %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds i64, ptr %P, i64 -2
store i64 %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds i64, ptr %P, i64 -4
store i64 %v, ptr %arrayidx3
ret void
}

Expand All @@ -73,16 +73,16 @@ entry:
; CHECK:SU(3): STURWi %1:gpr32, %0:gpr64common, -4
; CHECK:SU(4): STURWi %1:gpr32, %0:gpr64common, -8
; CHECK:SU(5): STURWi %1:gpr32, %0:gpr64common, -16
define void @stp_i32_unscale(i32* nocapture %P, i32 %v) #0 {
define void @stp_i32_unscale(ptr nocapture %P, i32 %v) #0 {
entry:
%arrayidx = getelementptr inbounds i32, i32* %P, i32 -3
store i32 %v, i32* %arrayidx
%arrayidx1 = getelementptr inbounds i32, i32* %P, i32 -1
store i32 %v, i32* %arrayidx1
%arrayidx2 = getelementptr inbounds i32, i32* %P, i32 -2
store i32 %v, i32* %arrayidx2
%arrayidx3 = getelementptr inbounds i32, i32* %P, i32 -4
store i32 %v, i32* %arrayidx3
%arrayidx = getelementptr inbounds i32, ptr %P, i32 -3
store i32 %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds i32, ptr %P, i32 -1
store i32 %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds i32, ptr %P, i32 -2
store i32 %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds i32, ptr %P, i32 -4
store i32 %v, ptr %arrayidx3
ret void
}

Expand All @@ -94,16 +94,16 @@ entry:
; CHECK:SU(4): STRDui %1:fpr64, %0:gpr64common, 2
; CHECK:SU(2): STRDui %1:fpr64, %0:gpr64common, 3
; CHECK:SU(5): STRDui %1:fpr64, %0:gpr64common, 4
define void @stp_double(double* nocapture %P, double %v) {
define void @stp_double(ptr nocapture %P, double %v) {
entry:
%arrayidx = getelementptr inbounds double, double* %P, i64 3
store double %v, double* %arrayidx
%arrayidx1 = getelementptr inbounds double, double* %P, i64 1
store double %v, double* %arrayidx1
%arrayidx2 = getelementptr inbounds double, double* %P, i64 2
store double %v, double* %arrayidx2
%arrayidx3 = getelementptr inbounds double, double* %P, i64 4
store double %v, double* %arrayidx3
%arrayidx = getelementptr inbounds double, ptr %P, i64 3
store double %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds double, ptr %P, i64 1
store double %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds double, ptr %P, i64 2
store double %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds double, ptr %P, i64 4
store double %v, ptr %arrayidx3
ret void
}

Expand All @@ -115,16 +115,16 @@ entry:
; CHECK:SU(4): STRSui %1:fpr32, %0:gpr64common, 2
; CHECK:SU(2): STRSui %1:fpr32, %0:gpr64common, 3
; CHECK:SU(5): STRSui %1:fpr32, %0:gpr64common, 4
define void @stp_float(float* nocapture %P, float %v) {
define void @stp_float(ptr nocapture %P, float %v) {
entry:
%arrayidx = getelementptr inbounds float, float* %P, i64 3
store float %v, float* %arrayidx
%arrayidx1 = getelementptr inbounds float, float* %P, i64 1
store float %v, float* %arrayidx1
%arrayidx2 = getelementptr inbounds float, float* %P, i64 2
store float %v, float* %arrayidx2
%arrayidx3 = getelementptr inbounds float, float* %P, i64 4
store float %v, float* %arrayidx3
%arrayidx = getelementptr inbounds float, ptr %P, i64 3
store float %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds float, ptr %P, i64 1
store float %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds float, ptr %P, i64 2
store float %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds float, ptr %P, i64 4
store float %v, ptr %arrayidx3
ret void
}

Expand All @@ -135,16 +135,16 @@ entry:
; CHECK:SU(3): STRXui %1:gpr64, %0:gpr64common, 2 :: (volatile
; CHECK:SU(4): STRXui %1:gpr64, %0:gpr64common, 1 :: (volatile
; CHECK:SU(5): STRXui %1:gpr64, %0:gpr64common, 4 :: (volatile
define i64 @stp_volatile(i64* nocapture %P, i64 %v) {
define i64 @stp_volatile(ptr nocapture %P, i64 %v) {
entry:
%arrayidx = getelementptr inbounds i64, i64* %P, i64 3
store volatile i64 %v, i64* %arrayidx
%arrayidx1 = getelementptr inbounds i64, i64* %P, i64 2
store volatile i64 %v, i64* %arrayidx1
%arrayidx2 = getelementptr inbounds i64, i64* %P, i64 1
store volatile i64 %v, i64* %arrayidx2
%arrayidx3 = getelementptr inbounds i64, i64* %P, i64 4
store volatile i64 %v, i64* %arrayidx3
%arrayidx = getelementptr inbounds i64, ptr %P, i64 3
store volatile i64 %v, ptr %arrayidx
%arrayidx1 = getelementptr inbounds i64, ptr %P, i64 2
store volatile i64 %v, ptr %arrayidx1
%arrayidx2 = getelementptr inbounds i64, ptr %P, i64 1
store volatile i64 %v, ptr %arrayidx2
%arrayidx3 = getelementptr inbounds i64, ptr %P, i64 4
store volatile i64 %v, ptr %arrayidx3
ret i64 %v
}

Expand All @@ -156,43 +156,43 @@ entry:
; CHECK:SU(10): STRXui %12:gpr64, %0:gpr64common, 1 ::
; CHECK:SU(15): STRXui %17:gpr64, %0:gpr64common, 2 ::
; CHECK:SU(20): STRXui %22:gpr64, %0:gpr64common, 3 ::
define void @stp_i64_with_ld(i64* noalias nocapture %a, i64* noalias nocapture readnone %b, i64* noalias nocapture readnone %c) {
define void @stp_i64_with_ld(ptr noalias nocapture %a, ptr noalias nocapture readnone %b, ptr noalias nocapture readnone %c) {
entry:
%arrayidx = getelementptr inbounds i64, i64* %a, i64 8
%0 = load i64, i64* %arrayidx, align 8
%arrayidx3 = getelementptr inbounds i64, i64* %a, i64 16
%1 = load i64, i64* %arrayidx3, align 8
%arrayidx = getelementptr inbounds i64, ptr %a, i64 8
%0 = load i64, ptr %arrayidx, align 8
%arrayidx3 = getelementptr inbounds i64, ptr %a, i64 16
%1 = load i64, ptr %arrayidx3, align 8
%mul = mul nsw i64 %1, %0
%2 = load i64, i64* %a, align 8
%2 = load i64, ptr %a, align 8
%add6 = add nsw i64 %2, %mul
store i64 %add6, i64* %a, align 8
%arrayidx.1 = getelementptr inbounds i64, i64* %a, i64 9
%3 = load i64, i64* %arrayidx.1, align 8
%arrayidx3.1 = getelementptr inbounds i64, i64* %a, i64 17
%4 = load i64, i64* %arrayidx3.1, align 8
store i64 %add6, ptr %a, align 8
%arrayidx.1 = getelementptr inbounds i64, ptr %a, i64 9
%3 = load i64, ptr %arrayidx.1, align 8
%arrayidx3.1 = getelementptr inbounds i64, ptr %a, i64 17
%4 = load i64, ptr %arrayidx3.1, align 8
%mul.1 = mul nsw i64 %4, %3
%arrayidx5.1 = getelementptr inbounds i64, i64* %a, i64 1
%5 = load i64, i64* %arrayidx5.1, align 8
%arrayidx5.1 = getelementptr inbounds i64, ptr %a, i64 1
%5 = load i64, ptr %arrayidx5.1, align 8
%add6.1 = add nsw i64 %5, %mul.1
store i64 %add6.1, i64* %arrayidx5.1, align 8
%arrayidx.2 = getelementptr inbounds i64, i64* %a, i64 10
%6 = load i64, i64* %arrayidx.2, align 8
%arrayidx3.2 = getelementptr inbounds i64, i64* %a, i64 18
%7 = load i64, i64* %arrayidx3.2, align 8
store i64 %add6.1, ptr %arrayidx5.1, align 8
%arrayidx.2 = getelementptr inbounds i64, ptr %a, i64 10
%6 = load i64, ptr %arrayidx.2, align 8
%arrayidx3.2 = getelementptr inbounds i64, ptr %a, i64 18
%7 = load i64, ptr %arrayidx3.2, align 8
%mul.2 = mul nsw i64 %7, %6
%arrayidx5.2 = getelementptr inbounds i64, i64* %a, i64 2
%8 = load i64, i64* %arrayidx5.2, align 8
%arrayidx5.2 = getelementptr inbounds i64, ptr %a, i64 2
%8 = load i64, ptr %arrayidx5.2, align 8
%add6.2 = add nsw i64 %8, %mul.2
store i64 %add6.2, i64* %arrayidx5.2, align 8
%arrayidx.3 = getelementptr inbounds i64, i64* %a, i64 11
%9 = load i64, i64* %arrayidx.3, align 8
%arrayidx3.3 = getelementptr inbounds i64, i64* %a, i64 19
%10 = load i64, i64* %arrayidx3.3, align 8
store i64 %add6.2, ptr %arrayidx5.2, align 8
%arrayidx.3 = getelementptr inbounds i64, ptr %a, i64 11
%9 = load i64, ptr %arrayidx.3, align 8
%arrayidx3.3 = getelementptr inbounds i64, ptr %a, i64 19
%10 = load i64, ptr %arrayidx3.3, align 8
%mul.3 = mul nsw i64 %10, %9
%arrayidx5.3 = getelementptr inbounds i64, i64* %a, i64 3
%11 = load i64, i64* %arrayidx5.3, align 8
%arrayidx5.3 = getelementptr inbounds i64, ptr %a, i64 3
%11 = load i64, ptr %arrayidx5.3, align 8
%add6.3 = add nsw i64 %11, %mul.3
store i64 %add6.3, i64* %arrayidx5.3, align 8
store i64 %add6.3, ptr %arrayidx5.3, align 8
ret void
}

Expand All @@ -206,12 +206,12 @@ entry:
; CHECK:SU(3): STRWui %1:gpr32, %0:gpr64common, 0
; CHECK:SU(4): %3:gpr32common = nsw ADDWri %2:gpr32common, 5, 0
; CHECK:SU(5): STRWui %3:gpr32common, %0:gpr64common, 1
define void @stp_missing_preds_edges(i32* %p, i32 %m, i32 %n) {
define void @stp_missing_preds_edges(ptr %p, i32 %m, i32 %n) {
entry:
store i32 %m, i32* %p, align 4
store i32 %m, ptr %p, align 4
%add = add nsw i32 %n, 5
%arrayidx1 = getelementptr inbounds i32, i32* %p, i64 1
store i32 %add, i32* %arrayidx1, align 4
%arrayidx1 = getelementptr inbounds i32, ptr %p, i64 1
store i32 %add, ptr %arrayidx1, align 4
ret void
}

Expand All @@ -232,14 +232,13 @@ entry:
; CHECK-FAST-NOT: Cluster ld/st
; CHECK-FAST:SU(3): STRWui %2:gpr32, %0:gpr64common, 0 ::
; CHECK-FAST:SU(4): %3:gpr32 = LDRWui %1:gpr64common, 0 ::
define i32 @cluster_with_different_preds(i32* %p, i32* %q) {
define i32 @cluster_with_different_preds(ptr %p, ptr %q) {
entry:
store i32 3, i32* %p, align 4
%0 = load i32, i32* %q, align 4
%add.ptr = getelementptr inbounds i32, i32* %q, i64 1
%1 = bitcast i32* %add.ptr to i8*
store i8 5, i8* %1, align 1
%2 = load i32, i32* %add.ptr, align 4
%add = add nsw i32 %2, %0
store i32 3, ptr %p, align 4
%0 = load i32, ptr %q, align 4
%add.ptr = getelementptr inbounds i32, ptr %q, i64 1
store i8 5, ptr %add.ptr, align 1
%1 = load i32, ptr %add.ptr, align 4
%add = add nsw i32 %1, %0
ret i32 %add
}
27 changes: 13 additions & 14 deletions llvm/test/CodeGen/AArch64/aarch64-tail-dup-size.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,14 +6,14 @@
; RUN: llc -mtriple=aarch64-none-linux -tail-dup-placement-threshold=4 < %s | FileCheck %s --check-prefix=CHECK-O2
; RUN: llc -mtriple=aarch64-none-linux -tail-dup-placement-threshold=6 < %s | FileCheck %s --check-prefix=CHECK-O3

%a = type { %a*, i32, %b }
%a = type { ptr, i32, %b }
%b = type { %c }
%c = type { i32, i32, [31 x i8] }

@global_ptr = dso_local local_unnamed_addr global %a* null, align 8
@global_ptr = dso_local local_unnamed_addr global ptr null, align 8
@global_int = dso_local local_unnamed_addr global i32 0, align 4

define dso_local void @testcase(%a** nocapture %arg){
define dso_local void @testcase(ptr nocapture %arg){
; CHECK-O2-LABEL: testcase:
; CHECK-O2: // %bb.0: // %entry
; CHECK-O2-NEXT: adrp x8, global_ptr
Expand Down Expand Up @@ -55,23 +55,22 @@ define dso_local void @testcase(%a** nocapture %arg){
; CHECK-O3-NEXT: ldr w1, [x9, :lo12:global_int]
; CHECK-O3-NEXT: b externalfunc
entry:
%0 = load %a*, %a** @global_ptr, align 8
%cmp.not = icmp eq %a* %0, null
%0 = load ptr, ptr @global_ptr, align 8
%cmp.not = icmp eq ptr %0, null
br i1 %cmp.not, label %if.end, label %if.then

if.then: ; preds = %entry
%1 = getelementptr inbounds %a, %a* %0, i64 0, i32 0
%2 = load %a*, %a** %1, align 8
store %a* %2, %a** %arg, align 8
%.pre = load %a*, %a** @global_ptr, align 8
%1 = load ptr, ptr %0, align 8
store ptr %1, ptr %arg, align 8
%.pre = load ptr, ptr @global_ptr, align 8
br label %if.end

if.end: ; preds = %if.then, %entry
%3 = phi %a* [ %.pre, %if.then ], [ null, %entry ]
%4 = load i32, i32* @global_int, align 4
%5 = getelementptr inbounds %a, %a* %3, i64 0, i32 2, i32 0, i32 1
tail call void @externalfunc(i32 10, i32 %4, i32* nonnull %5)
%2 = phi ptr [ %.pre, %if.then ], [ null, %entry ]
%3 = load i32, ptr @global_int, align 4
%4 = getelementptr inbounds %a, ptr %2, i64 0, i32 2, i32 0, i32 1
tail call void @externalfunc(i32 10, i32 %3, ptr nonnull %4)
ret void
}

declare dso_local void @externalfunc(i32, i32, i32*)
declare dso_local void @externalfunc(i32, i32, ptr)
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/aarch64-tbz.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -31,16 +31,16 @@ if.end3: ; preds = %if.then2, %entry
; CHECK-NOT: and x{{[0-9]+}}, x[[REG1]], #0x08
; CHECK-NOT: cbz x{{[0-9]+}}, .LBB1_3

define void @test2(i64 %A, i64* readonly %B) #0 {
define void @test2(i64 %A, ptr readonly %B) #0 {
entry:
%tobool = icmp eq i64* %B, null
%tobool = icmp eq ptr %B, null
%and = and i64 %A, 8
%tobool1 = icmp eq i64 %and, 0
%or.cond = or i1 %tobool, %tobool1
br i1 %or.cond, label %if.end3, label %if.then2

if.then2: ; preds = %entry
%0 = load i64, i64* %B, align 4
%0 = load i64, ptr %B, align 4
tail call void @foo(i64 %A, i64 %0)
br label %if.end3

Expand Down
44 changes: 22 additions & 22 deletions llvm/test/CodeGen/AArch64/aarch64-tryBitfieldInsertOpFromOr-crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,34 +3,34 @@ target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "aarch64--linux-gnu"

; Function Attrs: noreturn nounwind
define void @foo(i32* %d) {
define void @foo(ptr %d) {
entry:
%0 = ptrtoint i32* %d to i64
%0 = ptrtoint ptr %d to i64
%1 = and i64 %0, -36028797018963969
%2 = inttoptr i64 %1 to i32*
%arrayidx5 = getelementptr inbounds i32, i32* %2, i64 1
%arrayidx6 = getelementptr inbounds i32, i32* %2, i64 2
%arrayidx7 = getelementptr inbounds i32, i32* %2, i64 3
%2 = inttoptr i64 %1 to ptr
%arrayidx5 = getelementptr inbounds i32, ptr %2, i64 1
%arrayidx6 = getelementptr inbounds i32, ptr %2, i64 2
%arrayidx7 = getelementptr inbounds i32, ptr %2, i64 3
br label %for.cond

for.cond: ; preds = %for.cond, %entry
%B.0 = phi i32* [ %d, %entry ], [ %12, %for.cond ]
%3 = ptrtoint i32* %B.0 to i64
%B.0 = phi ptr [ %d, %entry ], [ %12, %for.cond ]
%3 = ptrtoint ptr %B.0 to i64
%4 = and i64 %3, -36028797018963969
%5 = inttoptr i64 %4 to i32*
%6 = load i32, i32* %5, align 4
%arrayidx1 = getelementptr inbounds i32, i32* %5, i64 1
%7 = load i32, i32* %arrayidx1, align 4
%arrayidx2 = getelementptr inbounds i32, i32* %5, i64 2
%8 = load i32, i32* %arrayidx2, align 4
%arrayidx3 = getelementptr inbounds i32, i32* %5, i64 3
%9 = load i32, i32* %arrayidx3, align 4
store i32 %6, i32* %2, align 4
store i32 %7, i32* %arrayidx5, align 4
store i32 %8, i32* %arrayidx6, align 4
store i32 %9, i32* %arrayidx7, align 4
%10 = ptrtoint i32* %arrayidx1 to i64
%5 = inttoptr i64 %4 to ptr
%6 = load i32, ptr %5, align 4
%arrayidx1 = getelementptr inbounds i32, ptr %5, i64 1
%7 = load i32, ptr %arrayidx1, align 4
%arrayidx2 = getelementptr inbounds i32, ptr %5, i64 2
%8 = load i32, ptr %arrayidx2, align 4
%arrayidx3 = getelementptr inbounds i32, ptr %5, i64 3
%9 = load i32, ptr %arrayidx3, align 4
store i32 %6, ptr %2, align 4
store i32 %7, ptr %arrayidx5, align 4
store i32 %8, ptr %arrayidx6, align 4
store i32 %9, ptr %arrayidx7, align 4
%10 = ptrtoint ptr %arrayidx1 to i64
%11 = or i64 %10, 36028797018963968
%12 = inttoptr i64 %11 to i32*
%12 = inttoptr i64 %11 to ptr
br label %for.cond
}
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/AArch64/aarch64-unroll-and-jam.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@

target datalayout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"

define void @unj(i32 %I, i32 %argj, i32* noalias nocapture %A, i32* noalias nocapture readonly %B) #0 {
define void @unj(i32 %I, i32 %argj, ptr noalias nocapture %A, ptr noalias nocapture readonly %B) #0 {
; CHECK-LABEL: @unj(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[ARGJ:%.*]], 0
Expand All @@ -21,23 +21,23 @@ define void @unj(i32 %I, i32 %argj, i32* noalias nocapture %A, i32* noalias noca
; CHECK-NEXT: [[SUM_2:%.*]] = phi i32 [ 0, [[FOR_OUTER]] ], [ [[ADD_2:%.*]], [[FOR_INNER]] ]
; CHECK-NEXT: [[J_3:%.*]] = phi i32 [ 0, [[FOR_OUTER]] ], [ [[INC_3:%.*]], [[FOR_INNER]] ]
; CHECK-NEXT: [[SUM_3:%.*]] = phi i32 [ 0, [[FOR_OUTER]] ], [ [[ADD_3:%.*]], [[FOR_INNER]] ]
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i32 [[J]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[B:%.*]], i32 [[J]]
; CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
; CHECK-NEXT: [[SUB:%.*]] = add i32 [[SUM]], 10
; CHECK-NEXT: [[ADD]] = sub i32 [[SUB]], [[TMP0]]
; CHECK-NEXT: [[INC]] = add nuw i32 [[J]], 1
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[J_1]]
; CHECK-NEXT: [[TMP1:%.*]] = load i32, i32* [[ARRAYIDX_1]], align 4
; CHECK-NEXT: [[ARRAYIDX_1:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_1]]
; CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[ARRAYIDX_1]], align 4
; CHECK-NEXT: [[SUB_1:%.*]] = add i32 [[SUM_1]], 10
; CHECK-NEXT: [[ADD_1]] = sub i32 [[SUB_1]], [[TMP1]]
; CHECK-NEXT: [[INC_1]] = add nuw i32 [[J_1]], 1
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[J_2]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32, i32* [[ARRAYIDX_2]], align 4
; CHECK-NEXT: [[ARRAYIDX_2:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_2]]
; CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[ARRAYIDX_2]], align 4
; CHECK-NEXT: [[SUB_2:%.*]] = add i32 [[SUM_2]], 10
; CHECK-NEXT: [[ADD_2]] = sub i32 [[SUB_2]], [[TMP2]]
; CHECK-NEXT: [[INC_2]] = add nuw i32 [[J_2]], 1
; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, i32* [[B]], i32 [[J_3]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, i32* [[ARRAYIDX_3]], align 4
; CHECK-NEXT: [[ARRAYIDX_3:%.*]] = getelementptr inbounds i32, ptr [[B]], i32 [[J_3]]
; CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[ARRAYIDX_3]], align 4
; CHECK-NEXT: [[SUB_3:%.*]] = add i32 [[SUM_3]], 10
; CHECK-NEXT: [[ADD_3]] = sub i32 [[SUB_3]], [[TMP3]]
; CHECK-NEXT: [[INC_3]] = add nuw i32 [[J_3]], 1
Expand All @@ -48,13 +48,13 @@ define void @unj(i32 %I, i32 %argj, i32* noalias nocapture %A, i32* noalias noca
; CHECK-NEXT: [[ADD_LCSSA_1:%.*]] = phi i32 [ [[ADD_1]], [[FOR_INNER]] ]
; CHECK-NEXT: [[ADD_LCSSA_2:%.*]] = phi i32 [ [[ADD_2]], [[FOR_INNER]] ]
; CHECK-NEXT: [[ADD_LCSSA_3:%.*]] = phi i32 [ [[ADD_3]], [[FOR_INNER]] ]
; CHECK-NEXT: store i32 [[ADD_LCSSA]], i32* [[A:%.*]], align 4
; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 1
; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], i32* [[ARRAYIDX6_1]], align 4
; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 2
; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], i32* [[ARRAYIDX6_2]], align 4
; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, i32* [[A]], i32 3
; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], i32* [[ARRAYIDX6_3]], align 4
; CHECK-NEXT: store i32 [[ADD_LCSSA]], ptr [[A:%.*]], align 4
; CHECK-NEXT: [[ARRAYIDX6_1:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 1
; CHECK-NEXT: store i32 [[ADD_LCSSA_1]], ptr [[ARRAYIDX6_1]], align 4
; CHECK-NEXT: [[ARRAYIDX6_2:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 2
; CHECK-NEXT: store i32 [[ADD_LCSSA_2]], ptr [[ARRAYIDX6_2]], align 4
; CHECK-NEXT: [[ARRAYIDX6_3:%.*]] = getelementptr inbounds i32, ptr [[A]], i32 3
; CHECK-NEXT: store i32 [[ADD_LCSSA_3]], ptr [[ARRAYIDX6_3]], align 4
; CHECK-NEXT: br label [[FOR_END_LOOPEXIT:%.*]]
; CHECK: for.end.loopexit:
; CHECK-NEXT: br label [[FOR_END]]
Expand All @@ -75,17 +75,17 @@ for.outer:
for.inner:
%j = phi i32 [ 0, %for.outer ], [ %inc, %for.inner ]
%sum = phi i32 [ 0, %for.outer ], [ %add, %for.inner ]
%arrayidx = getelementptr inbounds i32, i32* %B, i32 %j
%0 = load i32, i32* %arrayidx, align 4
%arrayidx = getelementptr inbounds i32, ptr %B, i32 %j
%0 = load i32, ptr %arrayidx, align 4
%sub = add i32 %sum, 10
%add = sub i32 %sub, %0
%inc = add nuw i32 %j, 1
%exitcond = icmp eq i32 %inc, %argj
br i1 %exitcond, label %for.latch, label %for.inner

for.latch:
%arrayidx6 = getelementptr inbounds i32, i32* %A, i32 %i
store i32 %add, i32* %arrayidx6, align 4
%arrayidx6 = getelementptr inbounds i32, ptr %A, i32 %i
store i32 %add, ptr %arrayidx6, align 4
%add8 = add nuw nsw i32 %i, 1
%exitcond23 = icmp eq i32 %add8, 4
br i1 %exitcond23, label %for.end, label %for.outer
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/aarch64-vcvtfp2fxs-combine.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,9 +12,9 @@ define void @fun1() local_unnamed_addr {
entry:
%mul = fmul <4 x double> zeroinitializer, <double 6.553600e+04, double 6.553600e+04, double 6.553600e+04, double 6.553600e+04>
%toi = fptosi <4 x double> %mul to <4 x i64>
%ptr = getelementptr inbounds %struct.a, %struct.a* undef, i64 0, i32 2
%ptr = getelementptr inbounds %struct.a, ptr undef, i64 0, i32 2
%elem = extractelement <4 x i64> %toi, i32 1
store i64 %elem, i64* %ptr, align 8
store i64 %elem, ptr %ptr, align 8
call void @llvm.trap()
unreachable
}
Expand Down
19 changes: 9 additions & 10 deletions llvm/test/CodeGen/AArch64/aarch64-vectorcombine-invalid-extract-index-crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@
;

target triple = "aarch64-unknown-linux-gnu"
define void @test_crash(i8* %dst_ptr) {
define void @test_crash(ptr %dst_ptr) {
entry:
%vec_load = load <4 x i16>, <4 x i16>* undef, align 8
%vec_load = load <4 x i16>, ptr undef, align 8
%0 = sext <4 x i16> %vec_load to <4 x i32>
%add71vec = add nsw <4 x i32> %0, <i32 32, i32 32, i32 32, i32 32>
%add104vec = add nsw <4 x i32> %add71vec, zeroinitializer
Expand All @@ -16,13 +16,12 @@ entry:
%1 = trunc <4 x i32> %vec to <4 x i16>
%2 = shufflevector <4 x i16> %1, <4 x i16> undef, <2 x i32> <i32 1, i32 2>
%3 = sext <2 x i16> %2 to <2 x i32>
%4 = bitcast i8* %dst_ptr to <4 x i8>*
%5 = shufflevector <2 x i32> %3, <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%6 = shufflevector <4 x i32> undef, <4 x i32> %5, <4 x i32> <i32 0, i32 4, i32 5, i32 undef>
%7 = insertelement <4 x i32> %6, i32 undef, i64 3
%8 = add nsw <4 x i32> %7, zeroinitializer
%9 = select <4 x i1> zeroinitializer, <4 x i32> %8, <4 x i32> undef
%10 = trunc <4 x i32> %9 to <4 x i8>
store <4 x i8> %10, <4 x i8>* %4, align 1
%4 = shufflevector <2 x i32> %3, <2 x i32> poison, <4 x i32> <i32 0, i32 1, i32 undef, i32 undef>
%5 = shufflevector <4 x i32> undef, <4 x i32> %4, <4 x i32> <i32 0, i32 4, i32 5, i32 undef>
%6 = insertelement <4 x i32> %5, i32 undef, i64 3
%7 = add nsw <4 x i32> %6, zeroinitializer
%8 = select <4 x i1> zeroinitializer, <4 x i32> %7, <4 x i32> undef
%9 = trunc <4 x i32> %8 to <4 x i8>
store <4 x i8> %9, ptr %dst_ptr, align 1
ret void
}
28 changes: 13 additions & 15 deletions llvm/test/CodeGen/AArch64/aarch64-vuzp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,8 +8,8 @@ define i32 @fun1() {
entry:
%vtbl1.i.1 = tail call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> <i8 0, i8 16, i8 19, i8 4, i8 -65, i8 -65, i8 -71, i8 -71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> undef)
%vuzp.i212.1 = shufflevector <16 x i8> %vtbl1.i.1, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 14>
%scevgep = getelementptr <8 x i8>, <8 x i8>* undef, i64 1
store <8 x i8> %vuzp.i212.1, <8 x i8>* %scevgep, align 1
%scevgep = getelementptr <8 x i8>, ptr undef, i64 1
store <8 x i8> %vuzp.i212.1, ptr %scevgep, align 1
ret i32 undef
}

Expand All @@ -19,8 +19,8 @@ define i32 @fun2() {
entry:
%vtbl1.i.1 = tail call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> <i8 0, i8 16, i8 19, i8 4, i8 -65, i8 -65, i8 -71, i8 -71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> undef)
%vuzp.i212.1 = shufflevector <16 x i8> %vtbl1.i.1, <16 x i8> undef, <8 x i32> <i32 1, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
%scevgep = getelementptr <8 x i8>, <8 x i8>* undef, i64 1
store <8 x i8> %vuzp.i212.1, <8 x i8>* %scevgep, align 1
%scevgep = getelementptr <8 x i8>, ptr undef, i64 1
store <8 x i8> %vuzp.i212.1, ptr %scevgep, align 1
ret i32 undef
}

Expand All @@ -30,8 +30,8 @@ define i32 @fun3() {
entry:
%vtbl1.i.1 = tail call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> <i8 0, i8 16, i8 19, i8 4, i8 -65, i8 -65, i8 -71, i8 -71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> undef)
%vuzp.i212.1 = shufflevector <16 x i8> %vtbl1.i.1, <16 x i8> undef, <8 x i32> <i32 0, i32 2, i32 4, i32 6, i32 8, i32 10, i32 12, i32 15>
%scevgep = getelementptr <8 x i8>, <8 x i8>* undef, i64 1
store <8 x i8> %vuzp.i212.1, <8 x i8>* %scevgep, align 1
%scevgep = getelementptr <8 x i8>, ptr undef, i64 1
store <8 x i8> %vuzp.i212.1, ptr %scevgep, align 1
ret i32 undef
}

Expand All @@ -41,30 +41,28 @@ define i32 @fun4() {
entry:
%vtbl1.i.1 = tail call <16 x i8> @llvm.aarch64.neon.tbl1.v16i8(<16 x i8> <i8 0, i8 16, i8 19, i8 4, i8 -65, i8 -65, i8 -71, i8 -71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, <16 x i8> undef)
%vuzp.i212.1 = shufflevector <16 x i8> %vtbl1.i.1, <16 x i8> undef, <8 x i32> <i32 3, i32 3, i32 5, i32 7, i32 9, i32 11, i32 13, i32 15>
%scevgep = getelementptr <8 x i8>, <8 x i8>* undef, i64 1
store <8 x i8> %vuzp.i212.1, <8 x i8>* %scevgep, align 1
%scevgep = getelementptr <8 x i8>, ptr undef, i64 1
store <8 x i8> %vuzp.i212.1, ptr %scevgep, align 1
ret i32 undef
}

; CHECK-LABEL: pr36582:
; Check that this does not ICE.
define void @pr36582(i8* %p1, i32* %p2) {
define void @pr36582(ptr %p1, ptr %p2) {
entry:
%x = bitcast i8* %p1 to <8 x i8>*
%wide.vec = load <8 x i8>, <8 x i8>* %x, align 1
%wide.vec = load <8 x i8>, ptr %p1, align 1
%strided.vec = shufflevector <8 x i8> %wide.vec, <8 x i8> undef, <4 x i32> <i32 0, i32 2, i32 4, i32 6>
%y = zext <4 x i8> %strided.vec to <4 x i32>
%z = bitcast i32* %p2 to <4 x i32>*
store <4 x i32> %y, <4 x i32>* %z, align 4
store <4 x i32> %y, ptr %p2, align 4
ret void
}

; Check that this pattern is recognized as a VZIP and
; that the vector blend transform does not scramble the pattern.
; CHECK-LABEL: vzipNoBlend:
; CHECK: zip1
define <8 x i8> @vzipNoBlend(<8 x i8>* %A, <8 x i16>* %B) nounwind {
%t = load <8 x i8>, <8 x i8>* %A
define <8 x i8> @vzipNoBlend(ptr %A, ptr %B) nounwind {
%t = load <8 x i8>, ptr %A
%vzip = shufflevector <8 x i8> %t, <8 x i8> <i8 0, i8 0, i8 0, i8 0, i8 undef, i8 undef, i8 undef, i8 undef>, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11>
ret <8 x i8> %vzip
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AArch64/aarch64_f16_be.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@ define void @test_bitcast_v8f16_to_v4f32(<8 x half> %a) {

%x = alloca <4 x float>, align 16
%y = bitcast <8 x half> %a to <4 x float>
store <4 x float> %y, <4 x float>* %x, align 16
store <4 x float> %y, ptr %x, align 16
ret void
}

Expand All @@ -23,7 +23,7 @@ define void @test_bitcast_v8f16_to_v2f64(<8 x half> %a) {

%x = alloca <2 x double>, align 16
%y = bitcast <8 x half> %a to <2 x double>
store <2 x double> %y, <2 x double>* %x, align 16
store <2 x double> %y, ptr %x, align 16
ret void
}

Expand All @@ -36,7 +36,7 @@ define void @test_bitcast_v8f16_to_fp128(<8 x half> %a) {

%x = alloca fp128, align 16
%y = bitcast <8 x half> %a to fp128
store fp128 %y, fp128* %x, align 16
store fp128 %y, ptr %x, align 16
ret void
}

Expand All @@ -49,7 +49,7 @@ define void @test_bitcast_v4f16_to_v2f32(<4 x half> %a) {

%x = alloca <2 x float>, align 8
%y = bitcast <4 x half> %a to <2 x float>
store <2 x float> %y, <2 x float>* %x, align 8
store <2 x float> %y, ptr %x, align 8
ret void
}

Expand All @@ -62,6 +62,6 @@ define void @test_bitcast_v4f16_to_v1f64(<4 x half> %a) {

%x = alloca <1 x double>, align 8
%y = bitcast <4 x half> %a to <1 x double>
store <1 x double> %y, <1 x double>* %x, align 8
store <1 x double> %y, ptr %x, align 8
ret void
}
48 changes: 22 additions & 26 deletions llvm/test/CodeGen/AArch64/aarch64_win64cc_vararg.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,20 +18,19 @@ define win64cc void @pass_va(i32 %count, ...) nounwind {
; CHECK-NEXT: add sp, sp, #96
; CHECK-NEXT: ret
entry:
%ap = alloca i8*, align 8
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)
%ap2 = load i8*, i8** %ap, align 8
call void @other_func(i8* %ap2)
%ap = alloca ptr, align 8
call void @llvm.va_start(ptr %ap)
%ap2 = load ptr, ptr %ap, align 8
call void @other_func(ptr %ap2)
ret void
}

declare void @other_func(i8*) local_unnamed_addr
declare void @other_func(ptr) local_unnamed_addr

declare void @llvm.va_start(i8*) nounwind
declare void @llvm.va_copy(i8*, i8*) nounwind
declare void @llvm.va_start(ptr) nounwind
declare void @llvm.va_copy(ptr, ptr) nounwind

define win64cc i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
define win64cc ptr @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, i64 %a8, ...) nounwind {
; CHECK-LABEL: f9:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x18, [sp, #-16]! // 8-byte Folded Spill
Expand All @@ -41,14 +40,13 @@ define win64cc i8* @f9(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64
; CHECK-NEXT: ldr x18, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%ap = alloca i8*, align 8
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)
%ap2 = load i8*, i8** %ap, align 8
ret i8* %ap2
%ap = alloca ptr, align 8
call void @llvm.va_start(ptr %ap)
%ap2 = load ptr, ptr %ap, align 8
ret ptr %ap2
}

define win64cc i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
define win64cc ptr @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, i64 %a7, ...) nounwind {
; CHECK-LABEL: f8:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x18, [sp, #-16]! // 8-byte Folded Spill
Expand All @@ -58,14 +56,13 @@ define win64cc i8* @f8(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64
; CHECK-NEXT: ldr x18, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%ap = alloca i8*, align 8
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)
%ap2 = load i8*, i8** %ap, align 8
ret i8* %ap2
%ap = alloca ptr, align 8
call void @llvm.va_start(ptr %ap)
%ap2 = load ptr, ptr %ap, align 8
ret ptr %ap2
}

define win64cc i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
define win64cc ptr @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64 %a6, ...) nounwind {
; CHECK-LABEL: f7:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x18, [sp, #-32]! // 8-byte Folded Spill
Expand All @@ -76,9 +73,8 @@ define win64cc i8* @f7(i64 %a0, i64 %a1, i64 %a2, i64 %a3, i64 %a4, i64 %a5, i64
; CHECK-NEXT: ldr x18, [sp], #32 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
%ap = alloca i8*, align 8
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)
%ap2 = load i8*, i8** %ap, align 8
ret i8* %ap2
%ap = alloca ptr, align 8
call void @llvm.va_start(ptr %ap)
%ap2 = load ptr, ptr %ap, align 8
ret ptr %ap2
}
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/addcarry-crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
; RUN: llc < %s | FileCheck %s
target triple = "arm64-apple-ios7.0"

define i64 @foo(i64* nocapture readonly %ptr, i64 %a, i64 %b, i64 %c) local_unnamed_addr #0 {
define i64 @foo(ptr nocapture readonly %ptr, i64 %a, i64 %b, i64 %c) local_unnamed_addr #0 {
; CHECK-LABEL: foo:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: ldr w8, [x0, #4]
Expand All @@ -13,7 +13,7 @@ define i64 @foo(i64* nocapture readonly %ptr, i64 %a, i64 %b, i64 %c) local_unna
; CHECK-NEXT: ret
entry:
%0 = lshr i64 %a, 32
%1 = load i64, i64* %ptr, align 8
%1 = load i64, ptr %ptr, align 8
%2 = lshr i64 %1, 32
%3 = mul nuw i64 %2, %0
%4 = add i64 %c, %b
Expand Down
33 changes: 16 additions & 17 deletions llvm/test/CodeGen/AArch64/addr-of-ret-addr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,22 +2,22 @@

; Test generated from C code:
; #include <stdarg.h>
; void *foo() {
; ptr foo() {
; return _AddressOfReturnAddress();
; }
; int bar(int x(va_list, void*), ...) {
; int bar(int x(va_list, ptr), ...) {
; va_list y;
; va_start(y, x);
; return x(y, _AddressOfReturnAddress()) + 1;
; }

declare void @llvm.va_start(i8*)
declare i8* @llvm.addressofreturnaddress()
declare void @llvm.va_start(ptr)
declare ptr @llvm.addressofreturnaddress()

define dso_local i8* @"foo"() {
define dso_local ptr @"foo"() {
entry:
%0 = call i8* @llvm.addressofreturnaddress()
ret i8* %0
%0 = call ptr @llvm.addressofreturnaddress()
ret ptr %0

; CHECK-LABEL: foo
; CHECK: stp x29, x30, [sp, #-16]!
Expand All @@ -26,17 +26,16 @@ entry:
; CHECK: ldp x29, x30, [sp], #16
}

define dso_local i32 @"bar"(i32 (i8*, i8*)* %x, ...) {
define dso_local i32 @"bar"(ptr %x, ...) {
entry:
%x.addr = alloca i32 (i8*, i8*)*, align 8
%y = alloca i8*, align 8
store i32 (i8*, i8*)* %x, i32 (i8*, i8*)** %x.addr, align 8
%y1 = bitcast i8** %y to i8*
call void @llvm.va_start(i8* %y1)
%0 = load i32 (i8*, i8*)*, i32 (i8*, i8*)** %x.addr, align 8
%1 = call i8* @llvm.addressofreturnaddress()
%2 = load i8*, i8** %y, align 8
%call = call i32 %0(i8* %2, i8* %1)
%x.addr = alloca ptr, align 8
%y = alloca ptr, align 8
store ptr %x, ptr %x.addr, align 8
call void @llvm.va_start(ptr %y)
%0 = load ptr, ptr %x.addr, align 8
%1 = call ptr @llvm.addressofreturnaddress()
%2 = load ptr, ptr %y, align 8
%call = call i32 %0(ptr %2, ptr %1)
%add = add nsw i32 %call, 1
ret i32 %add

Expand Down
92 changes: 46 additions & 46 deletions llvm/test/CodeGen/AArch64/addsub-shifted.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,66 +9,66 @@
define void @test_lsl_arith(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) {
; CHECK-LABEL: test_lsl_arith:

%rhs1 = load volatile i32, i32* @var32
%rhs1 = load volatile i32, ptr @var32
%shift1 = shl i32 %rhs1, 18
%val1 = add i32 %lhs32, %shift1
store volatile i32 %val1, i32* @var32
store volatile i32 %val1, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsl #18

%rhs2 = load volatile i32, i32* @var32
%rhs2 = load volatile i32, ptr @var32
%shift2 = shl i32 %rhs2, 31
%val2 = add i32 %shift2, %lhs32
store volatile i32 %val2, i32* @var32
store volatile i32 %val2, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsl #31

%rhs3 = load volatile i32, i32* @var32
%rhs3 = load volatile i32, ptr @var32
%shift3 = shl i32 %rhs3, 5
%val3 = sub i32 %lhs32, %shift3
store volatile i32 %val3, i32* @var32
store volatile i32 %val3, ptr @var32
; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsl #5

; Subtraction is not commutative!
%rhs4 = load volatile i32, i32* @var32
%rhs4 = load volatile i32, ptr @var32
%shift4 = shl i32 %rhs4, 19
%val4 = sub i32 %shift4, %lhs32
store volatile i32 %val4, i32* @var32
store volatile i32 %val4, ptr @var32
; CHECK-NOT: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsl #19

%lhs4a = load volatile i32, i32* @var32
%lhs4a = load volatile i32, ptr @var32
%shift4a = shl i32 %lhs4a, 15
%val4a = sub i32 0, %shift4a
store volatile i32 %val4a, i32* @var32
store volatile i32 %val4a, ptr @var32
; CHECK: neg {{w[0-9]+}}, {{w[0-9]+}}, lsl #15

%rhs5 = load volatile i64, i64* @var64
%rhs5 = load volatile i64, ptr @var64
%shift5 = shl i64 %rhs5, 18
%val5 = add i64 %lhs64, %shift5
store volatile i64 %val5, i64* @var64
store volatile i64 %val5, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsl #18

%rhs6 = load volatile i64, i64* @var64
%rhs6 = load volatile i64, ptr @var64
%shift6 = shl i64 %rhs6, 31
%val6 = add i64 %shift6, %lhs64
store volatile i64 %val6, i64* @var64
store volatile i64 %val6, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsl #31

%rhs7 = load volatile i64, i64* @var64
%rhs7 = load volatile i64, ptr @var64
%shift7 = shl i64 %rhs7, 5
%val7 = sub i64 %lhs64, %shift7
store volatile i64 %val7, i64* @var64
store volatile i64 %val7, ptr @var64
; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsl #5

; Subtraction is not commutative!
%rhs8 = load volatile i64, i64* @var64
%rhs8 = load volatile i64, ptr @var64
%shift8 = shl i64 %rhs8, 19
%val8 = sub i64 %shift8, %lhs64
store volatile i64 %val8, i64* @var64
store volatile i64 %val8, ptr @var64
; CHECK-NOT: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsl #19

%lhs8a = load volatile i64, i64* @var64
%lhs8a = load volatile i64, ptr @var64
%shift8a = shl i64 %lhs8a, 60
%val8a = sub i64 0, %shift8a
store volatile i64 %val8a, i64* @var64
store volatile i64 %val8a, ptr @var64
; CHECK: neg {{x[0-9]+}}, {{x[0-9]+}}, lsl #60

ret void
Expand All @@ -80,54 +80,54 @@ define void @test_lsr_arith(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) {

%shift1 = lshr i32 %rhs32, 18
%val1 = add i32 %lhs32, %shift1
store volatile i32 %val1, i32* @var32
store volatile i32 %val1, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsr #18

%shift2 = lshr i32 %rhs32, 31
%val2 = add i32 %shift2, %lhs32
store volatile i32 %val2, i32* @var32
store volatile i32 %val2, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsr #31

%shift3 = lshr i32 %rhs32, 5
%val3 = sub i32 %lhs32, %shift3
store volatile i32 %val3, i32* @var32
store volatile i32 %val3, ptr @var32
; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsr #5

; Subtraction is not commutative!
%shift4 = lshr i32 %rhs32, 19
%val4 = sub i32 %shift4, %lhs32
store volatile i32 %val4, i32* @var32
store volatile i32 %val4, ptr @var32
; CHECK-NOT: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, lsr #19

%shift4a = lshr i32 %lhs32, 15
%val4a = sub i32 0, %shift4a
store volatile i32 %val4a, i32* @var32
store volatile i32 %val4a, ptr @var32
; CHECK: neg {{w[0-9]+}}, {{w[0-9]+}}, lsr #15

%shift5 = lshr i64 %rhs64, 18
%val5 = add i64 %lhs64, %shift5
store volatile i64 %val5, i64* @var64
store volatile i64 %val5, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsr #18

%shift6 = lshr i64 %rhs64, 31
%val6 = add i64 %shift6, %lhs64
store volatile i64 %val6, i64* @var64
store volatile i64 %val6, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsr #31

%shift7 = lshr i64 %rhs64, 5
%val7 = sub i64 %lhs64, %shift7
store volatile i64 %val7, i64* @var64
store volatile i64 %val7, ptr @var64
; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsr #5

; Subtraction is not commutative!
%shift8 = lshr i64 %rhs64, 19
%val8 = sub i64 %shift8, %lhs64
store volatile i64 %val8, i64* @var64
store volatile i64 %val8, ptr @var64
; CHECK-NOT: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, lsr #19

%shift8a = lshr i64 %lhs64, 45
%val8a = sub i64 0, %shift8a
store volatile i64 %val8a, i64* @var64
store volatile i64 %val8a, ptr @var64
; CHECK: neg {{x[0-9]+}}, {{x[0-9]+}}, lsr #45

ret void
Expand All @@ -139,54 +139,54 @@ define void @test_asr_arith(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64) {

%shift1 = ashr i32 %rhs32, 18
%val1 = add i32 %lhs32, %shift1
store volatile i32 %val1, i32* @var32
store volatile i32 %val1, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #18

%shift2 = ashr i32 %rhs32, 31
%val2 = add i32 %shift2, %lhs32
store volatile i32 %val2, i32* @var32
store volatile i32 %val2, ptr @var32
; CHECK: add {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #31

%shift3 = ashr i32 %rhs32, 5
%val3 = sub i32 %lhs32, %shift3
store volatile i32 %val3, i32* @var32
store volatile i32 %val3, ptr @var32
; CHECK: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #5

; Subtraction is not commutative!
%shift4 = ashr i32 %rhs32, 19
%val4 = sub i32 %shift4, %lhs32
store volatile i32 %val4, i32* @var32
store volatile i32 %val4, ptr @var32
; CHECK-NOT: sub {{w[0-9]+}}, {{w[0-9]+}}, {{w[0-9]+}}, asr #19

%shift4a = ashr i32 %lhs32, 15
%val4a = sub i32 0, %shift4a
store volatile i32 %val4a, i32* @var32
store volatile i32 %val4a, ptr @var32
; CHECK: neg {{w[0-9]+}}, {{w[0-9]+}}, asr #15

%shift5 = ashr i64 %rhs64, 18
%val5 = add i64 %lhs64, %shift5
store volatile i64 %val5, i64* @var64
store volatile i64 %val5, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #18

%shift6 = ashr i64 %rhs64, 31
%val6 = add i64 %shift6, %lhs64
store volatile i64 %val6, i64* @var64
store volatile i64 %val6, ptr @var64
; CHECK: add {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #31

%shift7 = ashr i64 %rhs64, 5
%val7 = sub i64 %lhs64, %shift7
store volatile i64 %val7, i64* @var64
store volatile i64 %val7, ptr @var64
; CHECK: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #5

; Subtraction is not commutative!
%shift8 = ashr i64 %rhs64, 19
%val8 = sub i64 %shift8, %lhs64
store volatile i64 %val8, i64* @var64
store volatile i64 %val8, ptr @var64
; CHECK-NOT: sub {{x[0-9]+}}, {{x[0-9]+}}, {{x[0-9]+}}, asr #19

%shift8a = ashr i64 %lhs64, 45
%val8a = sub i64 0, %shift8a
store volatile i64 %val8a, i64* @var64
store volatile i64 %val8a, ptr @var64
; CHECK: neg {{x[0-9]+}}, {{x[0-9]+}}, asr #45

ret void
Expand All @@ -202,42 +202,42 @@ define void @test_cmp(i32 %lhs32, i32 %rhs32, i64 %lhs64, i64 %rhs64, i32 %v) {
; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}, lsl #13

t2:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
%shift2 = lshr i32 %rhs32, 20
%tst2 = icmp ne i32 %lhs32, %shift2
br i1 %tst2, label %t3, label %end
; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}, lsr #20

t3:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
%shift3 = ashr i32 %rhs32, 9
%tst3 = icmp ne i32 %lhs32, %shift3
br i1 %tst3, label %t4, label %end
; CHECK: cmp {{w[0-9]+}}, {{w[0-9]+}}, asr #9

t4:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
%shift4 = shl i64 %rhs64, 43
%tst4 = icmp uge i64 %lhs64, %shift4
br i1 %tst4, label %t5, label %end
; CHECK: cmp {{x[0-9]+}}, {{x[0-9]+}}, lsl #43

t5:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
%shift5 = lshr i64 %rhs64, 20
%tst5 = icmp ne i64 %lhs64, %shift5
br i1 %tst5, label %t6, label %end
; CHECK: cmp {{x[0-9]+}}, {{x[0-9]+}}, lsr #20

t6:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
%shift6 = ashr i64 %rhs64, 59
%tst6 = icmp ne i64 %lhs64, %shift6
br i1 %tst6, label %t7, label %end
; CHECK: cmp {{x[0-9]+}}, {{x[0-9]+}}, asr #59

t7:
store volatile i32 %v, i32* @var32
store volatile i32 %v, ptr @var32
br label %end

end:
Expand Down
78 changes: 39 additions & 39 deletions llvm/test/CodeGen/AArch64/addsub.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,13 +25,13 @@ define void @add_small() {
; CHECK-NEXT: str x11, [x9]
; CHECK-NEXT: ret

%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
%newval32 = add i32 %val32, 4095
store i32 %newval32, i32* @var_i32
store i32 %newval32, ptr @var_i32

%val64 = load i64, i64* @var_i64
%val64 = load i64, ptr @var_i64
%newval64 = add i64 %val64, 52
store i64 %newval64, i64* @var_i64
store i64 %newval64, ptr @var_i64

ret void
}
Expand All @@ -45,7 +45,7 @@ define void @add_small() {
; whereas this can be achieved with:
; wA = ldrb
; xC = add xA, #12 ; <- xA implicitly zero extend wA.
define void @add_small_imm(i8* %p, i64* %q, i32 %b, i32* %addr) {
define void @add_small_imm(ptr %p, ptr %q, i32 %b, ptr %addr) {
; CHECK-LABEL: add_small_imm:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: ldrb w8, [x0]
Expand All @@ -56,15 +56,15 @@ define void @add_small_imm(i8* %p, i64* %q, i32 %b, i32* %addr) {
; CHECK-NEXT: ret
entry:

%t = load i8, i8* %p
%t = load i8, ptr %p
%promoted = zext i8 %t to i64
%zextt = zext i8 %t to i32
%add = add nuw i32 %zextt, %b

%add2 = add nuw i64 %promoted, 12
store i32 %add, i32* %addr
store i32 %add, ptr %addr

store i64 %add2, i64* %q
store i64 %add2, ptr %q
ret void
}

Expand All @@ -84,13 +84,13 @@ define void @add_med() {
; CHECK-NEXT: str x11, [x9]
; CHECK-NEXT: ret

%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
%newval32 = add i32 %val32, 14610432 ; =0xdef000
store i32 %newval32, i32* @var_i32
store i32 %newval32, ptr @var_i32

%val64 = load i64, i64* @var_i64
%val64 = load i64, ptr @var_i64
%newval64 = add i64 %val64, 16773120 ; =0xfff000
store i64 %newval64, i64* @var_i64
store i64 %newval64, ptr @var_i64

ret void
}
Expand All @@ -111,13 +111,13 @@ define void @sub_small() {
; CHECK-NEXT: str x11, [x9]
; CHECK-NEXT: ret

%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
%newval32 = sub i32 %val32, 4095
store i32 %newval32, i32* @var_i32
store i32 %newval32, ptr @var_i32

%val64 = load i64, i64* @var_i64
%val64 = load i64, ptr @var_i64
%newval64 = sub i64 %val64, 52
store i64 %newval64, i64* @var_i64
store i64 %newval64, ptr @var_i64

ret void
}
Expand All @@ -138,13 +138,13 @@ define void @sub_med() {
; CHECK-NEXT: str x11, [x9]
; CHECK-NEXT: ret

%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
%newval32 = sub i32 %val32, 14610432 ; =0xdef000
store i32 %newval32, i32* @var_i32
store i32 %newval32, ptr @var_i32

%val64 = load i64, i64* @var_i64
%val64 = load i64, ptr @var_i64
%newval64 = sub i64 %val64, 16773120 ; =0xfff000
store i64 %newval64, i64* @var_i64
store i64 %newval64, ptr @var_i64

ret void
}
Expand Down Expand Up @@ -309,39 +309,39 @@ define void @testing() {
; CHECK-NEXT: str w9, [x8]
; CHECK-NEXT: .LBB16_6: // %common.ret
; CHECK-NEXT: ret
%val = load i32, i32* @var_i32
%val2 = load i32, i32* @var2_i32
%val = load i32, ptr @var_i32
%val2 = load i32, ptr @var2_i32

%cmp_pos_small = icmp ne i32 %val, 4095
br i1 %cmp_pos_small, label %ret, label %test2

test2:
%newval2 = add i32 %val, 1
store i32 %newval2, i32* @var_i32
store i32 %newval2, ptr @var_i32
%cmp_pos_big = icmp ult i32 %val2, 14610432
br i1 %cmp_pos_big, label %ret, label %test3

test3:
%newval3 = add i32 %val, 2
store i32 %newval3, i32* @var_i32
store i32 %newval3, ptr @var_i32
%cmp_pos_slt = icmp slt i32 %val, 123
br i1 %cmp_pos_slt, label %ret, label %test4

test4:
%newval4 = add i32 %val, 3
store i32 %newval4, i32* @var_i32
store i32 %newval4, ptr @var_i32
%cmp_pos_sgt = icmp sgt i32 %val2, 321
br i1 %cmp_pos_sgt, label %ret, label %test5

test5:
%newval5 = add i32 %val, 4
store i32 %newval5, i32* @var_i32
store i32 %newval5, ptr @var_i32
%cmp_neg_uge = icmp sgt i32 %val2, -444
br i1 %cmp_neg_uge, label %ret, label %test6

test6:
%newval6 = add i32 %val, 5
store i32 %newval6, i32* @var_i32
store i32 %newval6, ptr @var_i32
ret void

ret:
Expand All @@ -350,7 +350,7 @@ ret:

declare {i32, i1} @llvm.sadd.with.overflow.i32(i32 %a, i32 %b)

define i1 @sadd_add(i32 %a, i32 %b, i32* %p) {
define i1 @sadd_add(i32 %a, i32 %b, ptr %p) {
; CHECK-LABEL: sadd_add:
; CHECK: // %bb.0:
; CHECK-NEXT: mvn w8, w0
Expand All @@ -364,13 +364,13 @@ define i1 @sadd_add(i32 %a, i32 %b, i32* %p) {
%e0 = extractvalue {i32, i1} %a0, 0
%e1 = extractvalue {i32, i1} %a0, 1
%res = add i32 %e0, 1
store i32 %res, i32* %p
store i32 %res, ptr %p
ret i1 %e1
}

declare {i8, i1} @llvm.uadd.with.overflow.i8(i8 %a, i8 %b)

define i1 @uadd_add(i8 %a, i8 %b, i8* %p) {
define i1 @uadd_add(i8 %a, i8 %b, ptr %p) {
; CHECK-LABEL: uadd_add:
; CHECK: // %bb.0:
; CHECK-NEXT: mov w8, #255
Expand All @@ -385,7 +385,7 @@ define i1 @uadd_add(i8 %a, i8 %b, i8* %p) {
%e0 = extractvalue {i8, i1} %a0, 0
%e1 = extractvalue {i8, i1} %a0, 1
%res = add i8 %e0, 1
store i8 %res, i8* %p
store i8 %res, ptr %p
ret i1 %e1
}

Expand Down Expand Up @@ -636,7 +636,7 @@ define dso_local i32 @neigh_periodic_work_tbl_1() {
; CHECK-NEXT: .LBB35_2: // %if.end
; CHECK-NEXT: ret
entry:
br i1 icmp slt (i64 add (i64 ptrtoint (i32 ()* @neigh_periodic_work_tbl_1 to i64), i64 75000), i64 0), label %for.cond, label %if.end
br i1 icmp slt (i64 add (i64 ptrtoint (ptr @neigh_periodic_work_tbl_1 to i64), i64 75000), i64 0), label %for.cond, label %if.end
for.cond: ; preds = %entry, %for.cond
br label %for.cond
if.end: ; preds = %entry
Expand Down Expand Up @@ -676,19 +676,19 @@ define dso_local i32 @_extract_crng_crng() {
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 icmp slt (i32 ()* @_extract_crng_crng, i32 ()* null), label %if.then, label %lor.lhs.false
br i1 icmp slt (ptr @_extract_crng_crng, ptr null), label %if.then, label %lor.lhs.false
lor.lhs.false: ; preds = %entry
%0 = load i32, i32* @jiffies, align 4
%0 = load i32, ptr @jiffies, align 4
%idx.ext = sext i32 %0 to i64
%idx.neg = sub nsw i64 0, %idx.ext
%add.ptr = getelementptr i8, i8* getelementptr (i8, i8* bitcast (i32 ()* @_extract_crng_crng to i8*), i64 75000), i64 %idx.neg
%cmp = icmp slt i8* %add.ptr, null
%add.ptr = getelementptr i8, ptr getelementptr (i8, ptr @_extract_crng_crng, i64 75000), i64 %idx.neg
%cmp = icmp slt ptr %add.ptr, null
br i1 %cmp, label %if.then, label %if.end
if.then: ; preds = %lor.lhs.false, %entry
%1 = load i32, i32* @primary_crng, align 4
%1 = load i32, ptr @primary_crng, align 4
%tobool.not = icmp eq i32 %1, 0
%cond = select i1 %tobool.not, i32* null, i32* @input_pool
%call = tail call i32 bitcast (i32 (...)* @crng_reseed to i32 (i32*)*)(i32* noundef %cond)
%cond = select i1 %tobool.not, ptr null, ptr @input_pool
%call = tail call i32 @crng_reseed(ptr noundef %cond)
br label %if.end
if.end: ; preds = %if.then, %lor.lhs.false
ret i32 undef
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/AArch64/alloca.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@
; RUN: llc -mtriple=arm64-apple-ios -disable-post-ra -verify-machineinstrs -o - %s | FileCheck %s --check-prefix=CHECK-MACHO
; RUN: llc -mtriple=aarch64-none-linux-gnu -disable-post-ra -mattr=-fp-armv8 -verify-machineinstrs < %s | FileCheck --check-prefix=CHECK-NOFP-ARM64 %s

declare void @use_addr(i8*)
declare void @use_addr(ptr)

define void @test_simple_alloca(i64 %n) {
; CHECK-LABEL: test_simple_alloca:
Expand All @@ -19,7 +19,7 @@ define void @test_simple_alloca(i64 %n) {
; CHECK: sub [[NEWSP:x[0-9]+]], [[TMP]], [[SPDELTA]]
; CHECK: mov sp, [[NEWSP]]

call void @use_addr(i8* %buf)
call void @use_addr(ptr %buf)
; CHECK: bl use_addr

ret void
Expand All @@ -28,7 +28,7 @@ define void @test_simple_alloca(i64 %n) {
; CHECK: ret
}

declare void @use_addr_loc(i8*, i64*)
declare void @use_addr_loc(ptr, ptr)

define i64 @test_alloca_with_local(i64 %n) {
; CHECK-LABEL: test_alloca_with_local:
Expand All @@ -49,10 +49,10 @@ define i64 @test_alloca_with_local(i64 %n) {

; CHECK: sub {{x[0-9]+}}, x29, #[[LOC_FROM_FP:[0-9]+]]

call void @use_addr_loc(i8* %buf, i64* %loc)
call void @use_addr_loc(ptr %buf, ptr %loc)
; CHECK: bl use_addr

%val = load i64, i64* %loc
%val = load i64, ptr %loc

; CHECK: ldur x0, [x29, #-[[LOC_FROM_FP]]]

Expand Down Expand Up @@ -99,7 +99,7 @@ define void @test_variadic_alloca(i64 %n, ...) {

%addr = alloca i8, i64 %n

call void @use_addr(i8* %addr)
call void @use_addr(ptr %addr)
; CHECK: bl use_addr

ret void
Expand Down Expand Up @@ -132,7 +132,7 @@ define void @test_alloca_large_frame(i64 %n) {
%addr1 = alloca i8, i64 %n
%addr2 = alloca i64, i64 1000000

call void @use_addr_loc(i8* %addr1, i64* %addr2)
call void @use_addr_loc(ptr %addr1, ptr %addr2)

ret void

Expand All @@ -145,13 +145,13 @@ define void @test_alloca_large_frame(i64 %n) {
; CHECK-MACHO: ldp x20, x19, [sp], #32
}

declare i8* @llvm.stacksave()
declare void @llvm.stackrestore(i8*)
declare ptr @llvm.stacksave()
declare void @llvm.stackrestore(ptr)

define void @test_scoped_alloca(i64 %n) {
; CHECK-LABEL: test_scoped_alloca:

%sp = call i8* @llvm.stacksave()
%sp = call ptr @llvm.stacksave()
; CHECK: mov x29, sp
; CHECK: mov [[SAVED_SP:x[0-9]+]], sp
; CHECK: mov [[OLDSP:x[0-9]+]], sp
Expand All @@ -161,10 +161,10 @@ define void @test_scoped_alloca(i64 %n) {
; CHECK-DAG: sub [[NEWSP:x[0-9]+]], [[OLDSP]], [[SPDELTA]]
; CHECK: mov sp, [[NEWSP]]

call void @use_addr(i8* %addr)
call void @use_addr(ptr %addr)
; CHECK: bl use_addr

call void @llvm.stackrestore(i8* %sp)
call void @llvm.stackrestore(ptr %sp)
; CHECK: mov sp, [[SAVED_SP]]

ret void
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/analyzecmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
target triple = "arm64--linux-gnueabi"

define void @test(i64 %a, i64* %ptr1, i64* %ptr2) #0 align 2 {
define void @test(i64 %a, ptr %ptr1, ptr %ptr2) #0 align 2 {
entry:
%conv = and i64 %a, 4294967295
%add = add nsw i64 %conv, -1
Expand All @@ -24,8 +24,8 @@ if.then:
exit:
%__n = phi i64 [ %add3, %if.then ], [ %div, %entry ]
%__n.0 = phi i64 [ %add2, %if.then ], [ %rem, %entry ]
store i64 %__n, i64* %ptr1
store i64 %__n.0, i64* %ptr2
store i64 %__n, ptr %ptr1
store i64 %__n.0, ptr %ptr2
ret void
}

Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AArch64/and-mask-removal.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -47,16 +47,16 @@ define void @new_position(i32 %pos) {
; CHECK-GI-NEXT: ret
entry:
%idxprom = sext i32 %pos to i64
%arrayidx = getelementptr inbounds [400 x i8], [400 x i8]* @board, i64 0, i64 %idxprom
%tmp = load i8, i8* %arrayidx, align 1
%arrayidx = getelementptr inbounds [400 x i8], ptr @board, i64 0, i64 %idxprom
%tmp = load i8, ptr %arrayidx, align 1
%.off = add i8 %tmp, -1
%switch = icmp ult i8 %.off, 2
br i1 %switch, label %if.then, label %if.end

if.then: ; preds = %entry
%tmp1 = load i32, i32* @next_string, align 4
%arrayidx8 = getelementptr inbounds [400 x i32], [400 x i32]* @string_number, i64 0, i64 %idxprom
store i32 %tmp1, i32* %arrayidx8, align 4
%tmp1 = load i32, ptr @next_string, align 4
%arrayidx8 = getelementptr inbounds [400 x i32], ptr @string_number, i64 0, i64 %idxprom
store i32 %tmp1, ptr %arrayidx8, align 4
br label %if.end

if.end: ; preds = %if.then, %entry
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/AArch64/and-sink.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -24,7 +24,7 @@ bb0:
; CHECK-CGP-NEXT: store
; CHECK-CGP-NEXT: br
%cmp = icmp eq i32 %and, 0
store i32 0, i32* @A
store i32 0, ptr @A
br i1 %cmp, label %bb1, label %bb2
bb1:
ret i32 1
Expand All @@ -45,22 +45,22 @@ define dso_local i32 @and_sink2(i32 %a, i1 %c, i1 %c2) {
; CHECK-CGP-LABEL: @and_sink2(
; CHECK-CGP-NOT: and i32
%and = and i32 %a, 4
store i32 0, i32* @A
store i32 0, ptr @A
br i1 %c, label %bb0, label %bb3
bb0:
; CHECK-CGP-LABEL: bb0:
; CHECK-CGP-NOT: and i32
; CHECK-CGP-NOT: icmp
%cmp = icmp eq i32 %and, 0
store i32 0, i32* @B
store i32 0, ptr @B
br i1 %c2, label %bb1, label %bb3
bb1:
; CHECK-CGP-LABEL: bb1:
; CHECK-CGP: and i32
; CHECK-CGP-NEXT: icmp eq i32
; CHECK-CGP-NEXT: store
; CHECK-CGP-NEXT: br
store i32 0, i32* @C
store i32 0, ptr @C
br i1 %cmp, label %bb2, label %bb0
bb2:
ret i32 1
Expand All @@ -84,7 +84,7 @@ bb0:
; CHECK-CGP-LABEL: bb0:
; CHECK-CGP-NOT: and i32
%cmp = icmp eq i32 %and, 0
store i32 0, i32* @A
store i32 0, ptr @A
br i1 %cmp, label %bb0, label %bb2
bb2:
ret i32 0
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/AArch64/andorbrcompare.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

declare void @dummy()

define i32 @and_eq_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_eq_ne_ult(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_eq_ne_ult:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -46,14 +46,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_ne_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_ne_ult_ule(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_ne_ult_ule:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -95,14 +95,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_ult_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_ult_ule_ugt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_ult_ule_ugt:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -144,14 +144,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_ule_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_ule_ugt_uge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_ule_ugt_uge:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -193,14 +193,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_ugt_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_ugt_uge_slt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_ugt_uge_slt:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -242,14 +242,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_uge_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_uge_slt_sle(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_uge_slt_sle:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -291,14 +291,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_slt_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_slt_sle_sgt(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_slt_sle_sgt:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -340,14 +340,14 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
ret i32 0
}

define i32 @and_sle_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, i32* %p) {
define i32 @and_sle_sgt_sge(i32 %s0, i32 %s1, i32 %s2, i32 %s3, i32 %s4, i32 %s5, ptr %p) {
; SDISEL-LABEL: and_sle_sgt_sge:
; SDISEL: // %bb.0: // %entry
; SDISEL-NEXT: cmp w2, w3
Expand Down Expand Up @@ -389,7 +389,7 @@ entry:
br i1 %o, label %if, label %else

if:
store i32 1, i32* %p
store i32 1, ptr %p
ret i32 1

else:
Expand Down
18 changes: 9 additions & 9 deletions llvm/test/CodeGen/AArch64/argument-blocks-array-of-struct.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -394,7 +394,7 @@ define void @caller_in_block() {
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%1 = call %T_IN_BLOCK @return_in_block()
store %T_IN_BLOCK %1, %T_IN_BLOCK* @in_block_store
store %T_IN_BLOCK %1, ptr @in_block_store
ret void
}

Expand All @@ -410,7 +410,7 @@ define void @callee_in_block(%T_IN_BLOCK %a) {
; CHECK-NEXT: str d1, [x8, #8]
; CHECK-NEXT: str d0, [x8]
; CHECK-NEXT: ret
store %T_IN_BLOCK %a, %T_IN_BLOCK* @in_block_store
store %T_IN_BLOCK %a, ptr @in_block_store
ret void
}

Expand All @@ -428,7 +428,7 @@ define void @argument_in_block() {
; CHECK-NEXT: bl callee_in_block
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%1 = load %T_IN_BLOCK, %T_IN_BLOCK* @in_block_store
%1 = load %T_IN_BLOCK, ptr @in_block_store
call void @callee_in_block(%T_IN_BLOCK %1)
ret void
}
Expand Down Expand Up @@ -471,7 +471,7 @@ define void @caller_in_memory() {
; CHECK-NEXT: add sp, sp, #96
; CHECK-NEXT: ret
%1 = call %T_IN_MEMORY @return_in_memory()
store %T_IN_MEMORY %1, %T_IN_MEMORY* @in_memory_store
store %T_IN_MEMORY %1, ptr @in_memory_store
ret void
}

Expand All @@ -488,7 +488,7 @@ define void @callee_in_memory(%T_IN_MEMORY %a) {
; CHECK-NEXT: stp q1, q2, [x8, #32]
; CHECK-NEXT: stp q0, q3, [x8]
; CHECK-NEXT: ret
store %T_IN_MEMORY %a, %T_IN_MEMORY* @in_memory_store
store %T_IN_MEMORY %a, ptr @in_memory_store
ret void
}

Expand All @@ -511,7 +511,7 @@ define void @argument_in_memory() {
; CHECK-NEXT: ldr x30, [sp, #80] // 8-byte Folded Reload
; CHECK-NEXT: add sp, sp, #96
; CHECK-NEXT: ret
%1 = load %T_IN_MEMORY, %T_IN_MEMORY* @in_memory_store
%1 = load %T_IN_MEMORY, ptr @in_memory_store
call void @callee_in_memory(%T_IN_MEMORY %1)
ret void
}
Expand Down Expand Up @@ -547,7 +547,7 @@ define void @caller_no_block() {
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%1 = call %T_NO_BLOCK @return_no_block()
store %T_NO_BLOCK %1, %T_NO_BLOCK* @no_block_store
store %T_NO_BLOCK %1, ptr @no_block_store
ret void
}

Expand All @@ -561,7 +561,7 @@ define void @callee_no_block(%T_NO_BLOCK %a) {
; CHECK-NEXT: str w0, [x8, #8]
; CHECK-NEXT: str d0, [x8]
; CHECK-NEXT: ret
store %T_NO_BLOCK %a, %T_NO_BLOCK* @no_block_store
store %T_NO_BLOCK %a, ptr @no_block_store
ret void
}

Expand All @@ -580,7 +580,7 @@ define void @argument_no_block() {
; CHECK-NEXT: bl callee_no_block
; CHECK-NEXT: ldr x30, [sp], #16 // 8-byte Folded Reload
; CHECK-NEXT: ret
%1 = load %T_NO_BLOCK, %T_NO_BLOCK* @no_block_store
%1 = load %T_NO_BLOCK, ptr @no_block_store
call void @callee_no_block(%T_NO_BLOCK %1)
ret void
}
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-2011-03-09-CPSRSpill.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,7 +21,7 @@ _ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71: ; preds = %bb.i69,
%1 = fdiv float %0, undef
%2 = fcmp ult float %1, 0xBF847AE140000000
%storemerge9 = select i1 %2, float %1, float 0.000000e+00
store float %storemerge9, float* undef, align 4
store float %storemerge9, ptr undef, align 4
br i1 undef, label %bb42, label %bb47

bb42: ; preds = %_ZN12gjkepa2_impl3EPA6appendERNS0_5sListEPNS0_5sFaceE.exit71
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,8 +14,8 @@ if.then24: ; preds = %entry
unreachable

if.else295: ; preds = %entry
call void @llvm.dbg.declare(metadata i32* %do_tab_convert, metadata !14, metadata !16), !dbg !17
store i32 0, i32* %do_tab_convert, align 4, !dbg !18
call void @llvm.dbg.declare(metadata ptr %do_tab_convert, metadata !14, metadata !16), !dbg !17
store i32 0, ptr %do_tab_convert, align 4, !dbg !18
unreachable
}

Expand Down
5 changes: 2 additions & 3 deletions llvm/test/CodeGen/AArch64/arm64-2011-03-21-Unaligned-Frame-Index.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,8 +5,7 @@ define void @foo(i64 %val) {
; instruction that can handle that.
; CHECK: stur x0, [sp, #20]
%a = alloca [49 x i32], align 4
%p32 = getelementptr inbounds [49 x i32], [49 x i32]* %a, i64 0, i64 2
%p = bitcast i32* %p32 to i64*
store i64 %val, i64* %p, align 8
%p32 = getelementptr inbounds [49 x i32], ptr %a, i64 0, i64 2
store i64 %val, ptr %p32, align 8
ret void
}
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/arm64-2011-04-21-CPSRBug.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,10 +5,10 @@

define hidden void @t() nounwind {
entry:
%cmp = icmp eq i32* null, undef
%cmp = icmp eq ptr null, undef
%frombool = zext i1 %cmp to i8
store i8 %frombool, i8* undef, align 1
%tmp4 = load i8, i8* undef, align 1
store i8 %frombool, ptr undef, align 1
%tmp4 = load i8, ptr undef, align 1
%tobool = trunc i8 %tmp4 to i1
br i1 %tobool, label %land.lhs.true, label %if.end

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/arm64-2011-10-18-LdStOptBug.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -18,9 +18,9 @@ for.body:
%indvars.iv = phi i64 [ 0, %entry ], [ %indvars.iv.next, %for.body ]
%0 = shl nsw i64 %indvars.iv, 12
%add = add nsw i64 %0, 34628173824
%1 = inttoptr i64 %add to i32*
%2 = load volatile i32, i32* %1, align 4096
store volatile i32 %2, i32* @test_data, align 4
%1 = inttoptr i64 %add to ptr
%2 = load volatile i32, ptr %1, align 4096
store volatile i32 %2, ptr @test_data, align 4
%indvars.iv.next = add i64 %indvars.iv, 1
%lftr.wideiv = trunc i64 %indvars.iv.next to i32
%exitcond = icmp eq i32 %lftr.wideiv, 200
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/arm64-2012-01-11-ComparisonDAGCrash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ lor.lhs.false:
br i1 undef, label %return, label %if.end

if.end:
%tmp.i = load i64, i64* undef, align 8
%tmp.i = load i64, ptr undef, align 8
%and.i.i.i = and i64 %tmp.i, -16
br i1 %IsArrow, label %if.else_crit_edge, label %if.end32

Expand All @@ -26,7 +26,7 @@ if.end32:
%.pn.v = select i1 %0, i320 128, i320 64
%.pn = shl i320 %1, %.pn.v
%ins346392 = or i320 %.pn, 0
store i320 %ins346392, i320* undef, align 8
store i320 %ins346392, ptr undef, align 8
br i1 undef, label %sw.bb.i.i, label %exit

sw.bb.i.i:
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/AArch64/arm64-2012-05-07-MemcpyAlignBug.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,9 +13,9 @@
; CHECK-NEXT: str [[VAL]], [x0, #8]
; CHECK-NEXT: str [[VAL2]], [x0]

define void @foo(i8* %a) {
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %a, i8* align 4 bitcast ([3 x i32]* @b to i8*), i64 12, i1 false)
define void @foo(ptr %a) {
call void @llvm.memcpy.p0.p0.i64(ptr align 4 %a, ptr align 4 @b, i64 12, i1 false)
ret void
}

declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/AArch64/arm64-2012-05-09-LOADgot-bug.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@
; RUN: llc -mtriple=arm64-linux-gnu -relocation-model=pic < %s | FileCheck %s --check-prefix=CHECK-LINUX
; <rdar://problem/11392109>

define hidden void @t(i64* %addr) optsize ssp {
define hidden void @t(ptr %addr) optsize ssp {
entry:
store i64 zext (i32 ptrtoint (i64 (i32)* @x to i32) to i64), i64* %addr, align 8
store i64 zext (i32 ptrtoint (ptr @x to i32) to i64), ptr %addr, align 8
; CHECK: adrp x{{[0-9]+}}, _x@GOTPAGE
; CHECK: ldr x{{[0-9]+}}, [x{{[0-9]+}}, _x@GOTPAGEOFF]
; CHECK-NEXT: and x{{[0-9]+}}, x{{[0-9]+}}, #0xffffffff
Expand Down
25 changes: 10 additions & 15 deletions llvm/test/CodeGen/AArch64/arm64-2012-05-22-LdStOptBug.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -11,27 +11,22 @@

@"OBJC_IVAR_$_UIScreen._bounds" = external hidden global i64, section "__DATA, __objc_ivar", align 8

define hidden %struct.CGRect @t(%0* nocapture %self, i8* nocapture %_cmd) nounwind readonly optsize ssp {
define hidden %struct.CGRect @t(ptr nocapture %self, ptr nocapture %_cmd) nounwind readonly optsize ssp {
entry:
; CHECK-LABEL: t:
; CHECK: ldp d{{[0-9]+}}, d{{[0-9]+}}
%ivar = load i64, i64* @"OBJC_IVAR_$_UIScreen._bounds", align 8, !invariant.load !4
%0 = bitcast %0* %self to i8*
%add.ptr = getelementptr inbounds i8, i8* %0, i64 %ivar
%add.ptr10.0 = bitcast i8* %add.ptr to double*
%tmp11 = load double, double* %add.ptr10.0, align 8
%ivar = load i64, ptr @"OBJC_IVAR_$_UIScreen._bounds", align 8, !invariant.load !4
%add.ptr = getelementptr inbounds i8, ptr %self, i64 %ivar
%tmp11 = load double, ptr %add.ptr, align 8
%add.ptr.sum = add i64 %ivar, 8
%add.ptr10.1 = getelementptr inbounds i8, i8* %0, i64 %add.ptr.sum
%1 = bitcast i8* %add.ptr10.1 to double*
%tmp12 = load double, double* %1, align 8
%add.ptr10.1 = getelementptr inbounds i8, ptr %self, i64 %add.ptr.sum
%tmp12 = load double, ptr %add.ptr10.1, align 8
%add.ptr.sum17 = add i64 %ivar, 16
%add.ptr4.1 = getelementptr inbounds i8, i8* %0, i64 %add.ptr.sum17
%add.ptr4.1.0 = bitcast i8* %add.ptr4.1 to double*
%tmp = load double, double* %add.ptr4.1.0, align 8
%add.ptr4.1 = getelementptr inbounds i8, ptr %self, i64 %add.ptr.sum17
%tmp = load double, ptr %add.ptr4.1, align 8
%add.ptr4.1.sum = add i64 %ivar, 24
%add.ptr4.1.1 = getelementptr inbounds i8, i8* %0, i64 %add.ptr4.1.sum
%2 = bitcast i8* %add.ptr4.1.1 to double*
%tmp5 = load double, double* %2, align 8
%add.ptr4.1.1 = getelementptr inbounds i8, ptr %self, i64 %add.ptr4.1.sum
%tmp5 = load double, ptr %add.ptr4.1.1, align 8
%insert14 = insertvalue %struct.CGPoint undef, double %tmp11, 0
%insert16 = insertvalue %struct.CGPoint %insert14, double %tmp12, 1
%insert = insertvalue %struct.CGRect undef, %struct.CGPoint %insert16, 0
Expand Down
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/AArch64/arm64-2012-06-06-FPToUI.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,48 +12,48 @@ define void @testDouble(double %d) ssp {
; CHECK: fcvtzu w{{[0-9]+}}, d{{[0-9]+}}
entry:
%d.addr = alloca double, align 8
store double %d, double* %d.addr, align 8
%0 = load double, double* %d.addr, align 8
%1 = load double, double* %d.addr, align 8
store double %d, ptr %d.addr, align 8
%0 = load double, ptr %d.addr, align 8
%1 = load double, ptr %d.addr, align 8
%conv = fptoui double %1 to i64
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), double %0, i64 %conv)
%2 = load double, double* %d.addr, align 8
%3 = load double, double* %d.addr, align 8
%call = call i32 (ptr, ...) @printf(ptr @.str, double %0, i64 %conv)
%2 = load double, ptr %d.addr, align 8
%3 = load double, ptr %d.addr, align 8
%conv1 = fptoui double %3 to i32
%call2 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str1, i32 0, i32 0), double %2, i32 %conv1)
%call2 = call i32 (ptr, ...) @printf(ptr @.str1, double %2, i32 %conv1)
ret void
}

declare i32 @printf(i8*, ...)
declare i32 @printf(ptr, ...)

define void @testFloat(float %f) ssp {
; CHECK-LABEL: testFloat:
; CHECK: fcvtzu x{{[0-9]+}}, s{{[0-9]+}}
; CHECK: fcvtzu w{{[0-9]+}}, s{{[0-9]+}}
entry:
%f.addr = alloca float, align 4
store float %f, float* %f.addr, align 4
%0 = load float, float* %f.addr, align 4
store float %f, ptr %f.addr, align 4
%0 = load float, ptr %f.addr, align 4
%conv = fpext float %0 to double
%1 = load float, float* %f.addr, align 4
%1 = load float, ptr %f.addr, align 4
%conv1 = fptoui float %1 to i64
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([8 x i8], [8 x i8]* @.str2, i32 0, i32 0), double %conv, i64 %conv1)
%2 = load float, float* %f.addr, align 4
%call = call i32 (ptr, ...) @printf(ptr @.str2, double %conv, i64 %conv1)
%2 = load float, ptr %f.addr, align 4
%conv2 = fpext float %2 to double
%3 = load float, float* %f.addr, align 4
%3 = load float, ptr %f.addr, align 4
%conv3 = fptoui float %3 to i32
%call4 = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str3, i32 0, i32 0), double %conv2, i32 %conv3)
%call4 = call i32 (ptr, ...) @printf(ptr @.str3, double %conv2, i32 %conv3)
ret void
}

define i32 @main(i32 %argc, i8** %argv) ssp {
define i32 @main(i32 %argc, ptr %argv) ssp {
entry:
%retval = alloca i32, align 4
%argc.addr = alloca i32, align 4
%argv.addr = alloca i8**, align 8
store i32 0, i32* %retval
store i32 %argc, i32* %argc.addr, align 4
store i8** %argv, i8*** %argv.addr, align 8
%argv.addr = alloca ptr, align 8
store i32 0, ptr %retval
store i32 %argc, ptr %argc.addr, align 4
store ptr %argv, ptr %argv.addr, align 8
call void @testDouble(double 1.159198e+01)
call void @testFloat(float 0x40272F1800000000)
ret i32 0
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/AArch64/arm64-2012-07-11-InstrEmitterBug.ll
View file
Original file line number Diff line number Diff line change
@@ -1,21 +1,21 @@
; RUN: llc < %s -mtriple=arm64-apple-ios
; rdar://11849816

@shlib_path_substitutions = external hidden unnamed_addr global i8**, align 8
@shlib_path_substitutions = external hidden unnamed_addr global ptr, align 8

declare i64 @llvm.objectsize.i64(i8*, i1) nounwind readnone
declare i64 @llvm.objectsize.i64(ptr, i1) nounwind readnone

declare noalias i8* @xmalloc(i64) optsize
declare noalias ptr @xmalloc(i64) optsize

declare i64 @strlen(i8* nocapture) nounwind readonly optsize
declare i64 @strlen(ptr nocapture) nounwind readonly optsize

declare i8* @__strcpy_chk(i8*, i8*, i64) nounwind optsize
declare ptr @__strcpy_chk(ptr, ptr, i64) nounwind optsize

declare i8* @__strcat_chk(i8*, i8*, i64) nounwind optsize
declare ptr @__strcat_chk(ptr, ptr, i64) nounwind optsize

declare noalias i8* @xstrdup(i8*) optsize
declare noalias ptr @xstrdup(ptr) optsize

define i8* @dyld_fix_path(i8* %path) nounwind optsize ssp {
define ptr @dyld_fix_path(ptr %path) nounwind optsize ssp {
entry:
br i1 undef, label %if.end56, label %for.cond

Expand All @@ -29,28 +29,28 @@ for.cond10: ; preds = %for.cond
br i1 undef, label %if.end56, label %for.body14

for.body14: ; preds = %for.cond10
%call22 = tail call i64 @strlen(i8* undef) nounwind optsize
%call22 = tail call i64 @strlen(ptr undef) nounwind optsize
%sext = shl i64 %call22, 32
%conv30 = ashr exact i64 %sext, 32
%add29 = sub i64 0, %conv30
%sub = add i64 %add29, 0
%add31 = shl i64 %sub, 32
%sext59 = add i64 %add31, 4294967296
%conv33 = ashr exact i64 %sext59, 32
%call34 = tail call noalias i8* @xmalloc(i64 %conv33) nounwind optsize
%call34 = tail call noalias ptr @xmalloc(i64 %conv33) nounwind optsize
br i1 undef, label %cond.false45, label %cond.true43

cond.true43: ; preds = %for.body14
unreachable

cond.false45: ; preds = %for.body14
%add.ptr = getelementptr inbounds i8, i8* %path, i64 %conv30
%add.ptr = getelementptr inbounds i8, ptr %path, i64 %conv30
unreachable

if.end56: ; preds = %for.cond10, %entry
ret i8* null
ret ptr null
}

declare i32 @strncmp(i8* nocapture, i8* nocapture, i64) nounwind readonly optsize
declare i32 @strncmp(ptr nocapture, ptr nocapture, i64) nounwind readonly optsize

declare i8* @strcpy(i8*, i8* nocapture) nounwind
declare ptr @strcpy(ptr, ptr nocapture) nounwind
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-2013-01-23-frem-crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ entry:
br i1 undef, label %CF, label %CF77

CF: ; preds = %CF, %CF76
store float %B26, float* undef
store float %B26, ptr undef
br i1 undef, label %CF, label %CF77

CF77: ; preds = %CF
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-2013-01-23-sext-crash.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -32,6 +32,6 @@ CF83: ; preds = %CF
define void @_Z12my_example2bv() nounwind noinline ssp {
entry:
%0 = fptosi <2 x double> undef to <2 x i32>
store <2 x i32> %0, <2 x i32>* undef, align 8
store <2 x i32> %0, ptr undef, align 8
ret void
}
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/arm64-2013-02-12-shufv8i8.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
;CHECK-LABEL: Shuff:
;CHECK: tbl.8b
;CHECK: ret
define <8 x i8 > @Shuff(<8 x i8> %in, <8 x i8>* %out) nounwind ssp {
define <8 x i8 > @Shuff(<8 x i8> %in, ptr %out) nounwind ssp {
%value = shufflevector <8 x i8> %in, <8 x i8> zeroinitializer, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 4, i32 5, i32 6, i32 7>
ret <8 x i8> %value
}
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/AArch64/arm64-aapcs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@

; CHECK-LABEL: @test_i128_align
define dso_local i128 @test_i128_align(i32, i128 %arg, i32 %after) {
store i32 %after, i32* @var, align 4
store i32 %after, ptr @var, align 4
; CHECK-DAG: str w4, [{{x[0-9]+}}, :lo12:var]

ret i128 %arg
Expand All @@ -14,7 +14,7 @@ define dso_local i128 @test_i128_align(i32, i128 %arg, i32 %after) {

; CHECK-LABEL: @test_i64x2_align
define [2 x i64] @test_i64x2_align(i32, [2 x i64] %arg, i32 %after) {
store i32 %after, i32* @var, align 4
store i32 %after, ptr @var, align 4
; CHECK-DAG: str w3, [{{x[0-9]+}}, :lo12:var]

ret [2 x i64] %arg
Expand All @@ -35,22 +35,22 @@ define dso_local void @test_stack_slots([8 x i64], i1 %bool, i8 %char, i16 %shor
; CHECK-DAG: ldrb w[[ext5:[0-9]+]], [sp]

%ext_bool = zext i1 %bool to i64
store volatile i64 %ext_bool, i64* @var64, align 8
store volatile i64 %ext_bool, ptr @var64, align 8
; CHECK: str x[[ext5]], [{{x[0-9]+}}, :lo12:var64]

%ext_char = zext i8 %char to i64
store volatile i64 %ext_char, i64* @var64, align 8
store volatile i64 %ext_char, ptr @var64, align 8
; CHECK: str x[[ext3]], [{{x[0-9]+}}, :lo12:var64]

%ext_short = zext i16 %short to i64
store volatile i64 %ext_short, i64* @var64, align 8
store volatile i64 %ext_short, ptr @var64, align 8
; CHECK: str x[[ext2]], [{{x[0-9]+}}, :lo12:var64]

%ext_int = zext i32 %int to i64
store volatile i64 %ext_int, i64* @var64, align 8
store volatile i64 %ext_int, ptr @var64, align 8
; CHECK: str x[[ext1]], [{{x[0-9]+}}, :lo12:var64]

store volatile i64 %long, i64* @var64, align 8
store volatile i64 %long, ptr @var64, align 8
; CHECK: str x[[ext4]], [{{x[0-9]+}}, :lo12:var64]

ret void
Expand All @@ -61,22 +61,22 @@ define dso_local void @test_stack_slots([8 x i64], i1 %bool, i8 %char, i16 %shor

define dso_local void @test_extension(i1 %bool, i8 %char, i16 %short, i32 %int) {
%ext_bool = zext i1 %bool to i64
store volatile i64 %ext_bool, i64* @var64
store volatile i64 %ext_bool, ptr @var64
; CHECK: and [[EXT:x[0-9]+]], x0, #0x1
; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]

%ext_char = sext i8 %char to i64
store volatile i64 %ext_char, i64* @var64
store volatile i64 %ext_char, ptr @var64
; CHECK: sxtb [[EXT:x[0-9]+]], w1
; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]

%ext_short = zext i16 %short to i64
store volatile i64 %ext_short, i64* @var64
store volatile i64 %ext_short, ptr @var64
; CHECK: and [[EXT:x[0-9]+]], x2, #0xffff
; CHECK: str [[EXT]], [{{x[0-9]+}}, :lo12:var64]

%ext_int = zext i32 %int to i64
store volatile i64 %ext_int, i64* @var64
store volatile i64 %ext_int, ptr @var64
; CHECK: mov w[[EXT:[0-9]+]], w3
; CHECK: str x[[EXT]], [{{x[0-9]+}}, :lo12:var64]

Expand Down
164 changes: 78 additions & 86 deletions llvm/test/CodeGen/AArch64/arm64-abi-varargs.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,7 @@
; rdar://13625505
; Here we have 9 fixed integer arguments the 9th argument in on stack, the
; varargs start right after at 8-byte alignment.
define void @fn9(i32* %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, ...) nounwind noinline ssp {
define void @fn9(ptr %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7, i32 %a8, i32 %a9, ...) nounwind noinline ssp {
; CHECK-LABEL: fn9:
; CHECK: ; %bb.0:
; CHECK-NEXT: sub sp, sp, #64
Expand Down Expand Up @@ -34,31 +34,30 @@ define void @fn9(i32* %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7,
%7 = alloca i32, align 4
%8 = alloca i32, align 4
%9 = alloca i32, align 4
%args = alloca i8*, align 8
%args = alloca ptr, align 8
%a10 = alloca i32, align 4
%a11 = alloca i32, align 4
%a12 = alloca i32, align 4
store i32 %a2, i32* %2, align 4
store i32 %a3, i32* %3, align 4
store i32 %a4, i32* %4, align 4
store i32 %a5, i32* %5, align 4
store i32 %a6, i32* %6, align 4
store i32 %a7, i32* %7, align 4
store i32 %a8, i32* %8, align 4
store i32 %a9, i32* %9, align 4
store i32 %a9, i32* %a1
%10 = bitcast i8** %args to i8*
call void @llvm.va_start(i8* %10)
%11 = va_arg i8** %args, i32
store i32 %11, i32* %a10, align 4
%12 = va_arg i8** %args, i32
store i32 %12, i32* %a11, align 4
%13 = va_arg i8** %args, i32
store i32 %13, i32* %a12, align 4
store i32 %a2, ptr %2, align 4
store i32 %a3, ptr %3, align 4
store i32 %a4, ptr %4, align 4
store i32 %a5, ptr %5, align 4
store i32 %a6, ptr %6, align 4
store i32 %a7, ptr %7, align 4
store i32 %a8, ptr %8, align 4
store i32 %a9, ptr %9, align 4
store i32 %a9, ptr %a1
call void @llvm.va_start(ptr %args)
%10 = va_arg ptr %args, i32
store i32 %10, ptr %a10, align 4
%11 = va_arg ptr %args, i32
store i32 %11, ptr %a11, align 4
%12 = va_arg ptr %args, i32
store i32 %12, ptr %a12, align 4
ret void
}

declare void @llvm.va_start(i8*) nounwind
declare void @llvm.va_start(ptr) nounwind

define i32 @main() nounwind ssp {
; CHECK-LABEL: main:
Expand Down Expand Up @@ -111,37 +110,37 @@ define i32 @main() nounwind ssp {
%a10 = alloca i32, align 4
%a11 = alloca i32, align 4
%a12 = alloca i32, align 4
store i32 1, i32* %a1, align 4
store i32 2, i32* %a2, align 4
store i32 3, i32* %a3, align 4
store i32 4, i32* %a4, align 4
store i32 5, i32* %a5, align 4
store i32 6, i32* %a6, align 4
store i32 7, i32* %a7, align 4
store i32 8, i32* %a8, align 4
store i32 9, i32* %a9, align 4
store i32 10, i32* %a10, align 4
store i32 11, i32* %a11, align 4
store i32 12, i32* %a12, align 4
%1 = load i32, i32* %a1, align 4
%2 = load i32, i32* %a2, align 4
%3 = load i32, i32* %a3, align 4
%4 = load i32, i32* %a4, align 4
%5 = load i32, i32* %a5, align 4
%6 = load i32, i32* %a6, align 4
%7 = load i32, i32* %a7, align 4
%8 = load i32, i32* %a8, align 4
%9 = load i32, i32* %a9, align 4
%10 = load i32, i32* %a10, align 4
%11 = load i32, i32* %a11, align 4
%12 = load i32, i32* %a12, align 4
call void (i32*, i32, i32, i32, i32, i32, i32, i32, i32, ...) @fn9(i32* %a1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12)
store i32 1, ptr %a1, align 4
store i32 2, ptr %a2, align 4
store i32 3, ptr %a3, align 4
store i32 4, ptr %a4, align 4
store i32 5, ptr %a5, align 4
store i32 6, ptr %a6, align 4
store i32 7, ptr %a7, align 4
store i32 8, ptr %a8, align 4
store i32 9, ptr %a9, align 4
store i32 10, ptr %a10, align 4
store i32 11, ptr %a11, align 4
store i32 12, ptr %a12, align 4
%1 = load i32, ptr %a1, align 4
%2 = load i32, ptr %a2, align 4
%3 = load i32, ptr %a3, align 4
%4 = load i32, ptr %a4, align 4
%5 = load i32, ptr %a5, align 4
%6 = load i32, ptr %a6, align 4
%7 = load i32, ptr %a7, align 4
%8 = load i32, ptr %a8, align 4
%9 = load i32, ptr %a9, align 4
%10 = load i32, ptr %a10, align 4
%11 = load i32, ptr %a11, align 4
%12 = load i32, ptr %a12, align 4
call void (ptr, i32, i32, i32, i32, i32, i32, i32, i32, ...) @fn9(ptr %a1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12)
ret i32 0
}

;rdar://13668483
@.str = private unnamed_addr constant [4 x i8] c"fmt\00", align 1
define void @foo(i8* %fmt, ...) nounwind {
define void @foo(ptr %fmt, ...) nounwind {
; CHECK-LABEL: foo:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: sub sp, sp, #48
Expand All @@ -156,17 +155,16 @@ define void @foo(i8* %fmt, ...) nounwind {
; CHECK-NEXT: str q0, [sp], #48
; CHECK-NEXT: ret
entry:
%fmt.addr = alloca i8*, align 8
%args = alloca i8*, align 8
%fmt.addr = alloca ptr, align 8
%args = alloca ptr, align 8
%vc = alloca i32, align 4
%vv = alloca <4 x i32>, align 16
store i8* %fmt, i8** %fmt.addr, align 8
%args1 = bitcast i8** %args to i8*
call void @llvm.va_start(i8* %args1)
%0 = va_arg i8** %args, i32
store i32 %0, i32* %vc, align 4
%1 = va_arg i8** %args, <4 x i32>
store <4 x i32> %1, <4 x i32>* %vv, align 16
store ptr %fmt, ptr %fmt.addr, align 8
call void @llvm.va_start(ptr %args)
%0 = va_arg ptr %args, i32
store i32 %0, ptr %vc, align 4
%1 = va_arg ptr %args, <4 x i32>
store <4 x i32> %1, ptr %vv, align 16
ret void
}

Expand All @@ -191,19 +189,19 @@ define void @bar(i32 %x, <4 x i32> %y) nounwind {
entry:
%x.addr = alloca i32, align 4
%y.addr = alloca <4 x i32>, align 16
store i32 %x, i32* %x.addr, align 4
store <4 x i32> %y, <4 x i32>* %y.addr, align 16
%0 = load i32, i32* %x.addr, align 4
%1 = load <4 x i32>, <4 x i32>* %y.addr, align 16
call void (i8*, ...) @foo(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %0, <4 x i32> %1)
store i32 %x, ptr %x.addr, align 4
store <4 x i32> %y, ptr %y.addr, align 16
%0 = load i32, ptr %x.addr, align 4
%1 = load <4 x i32>, ptr %y.addr, align 16
call void (ptr, ...) @foo(ptr @.str, i32 %0, <4 x i32> %1)
ret void
}

; rdar://13668927
; When passing 16-byte aligned small structs as vararg, make sure the caller
; side is 16-byte aligned on stack.
%struct.s41 = type { i32, i16, i32, i16 }
define void @foo2(i8* %fmt, ...) nounwind {
define void @foo2(ptr %fmt, ...) nounwind {
; CHECK-LABEL: foo2:
; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: sub sp, sp, #48
Expand All @@ -218,29 +216,25 @@ define void @foo2(i8* %fmt, ...) nounwind {
; CHECK-NEXT: str q0, [sp], #48
; CHECK-NEXT: ret
entry:
%fmt.addr = alloca i8*, align 8
%args = alloca i8*, align 8
%fmt.addr = alloca ptr, align 8
%args = alloca ptr, align 8
%vc = alloca i32, align 4
%vs = alloca %struct.s41, align 16
store i8* %fmt, i8** %fmt.addr, align 8
%args1 = bitcast i8** %args to i8*
call void @llvm.va_start(i8* %args1)
%0 = va_arg i8** %args, i32
store i32 %0, i32* %vc, align 4
%ap.cur = load i8*, i8** %args
%1 = getelementptr i8, i8* %ap.cur, i32 15
%2 = ptrtoint i8* %1 to i64
store ptr %fmt, ptr %fmt.addr, align 8
call void @llvm.va_start(ptr %args)
%0 = va_arg ptr %args, i32
store i32 %0, ptr %vc, align 4
%ap.cur = load ptr, ptr %args
%1 = getelementptr i8, ptr %ap.cur, i32 15
%2 = ptrtoint ptr %1 to i64
%3 = and i64 %2, -16
%ap.align = inttoptr i64 %3 to i8*
%ap.next = getelementptr i8, i8* %ap.align, i32 16
store i8* %ap.next, i8** %args
%4 = bitcast i8* %ap.align to %struct.s41*
%5 = bitcast %struct.s41* %vs to i8*
%6 = bitcast %struct.s41* %4 to i8*
call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 16 %5, i8* align 16 %6, i64 16, i1 false)
%ap.align = inttoptr i64 %3 to ptr
%ap.next = getelementptr i8, ptr %ap.align, i32 16
store ptr %ap.next, ptr %args
call void @llvm.memcpy.p0.p0.i64(ptr align 16 %vs, ptr align 16 %ap.align, i64 16, i1 false)
ret void
}
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture, i8* nocapture, i64, i1) nounwind
declare void @llvm.memcpy.p0.p0.i64(ptr nocapture, ptr nocapture, i64, i1) nounwind

define void @bar2(i32 %x, i128 %s41.coerce) nounwind {
; CHECK-LABEL: bar2:
Expand All @@ -264,12 +258,10 @@ define void @bar2(i32 %x, i128 %s41.coerce) nounwind {
entry:
%x.addr = alloca i32, align 4
%s41 = alloca %struct.s41, align 16
store i32 %x, i32* %x.addr, align 4
%0 = bitcast %struct.s41* %s41 to i128*
store i128 %s41.coerce, i128* %0, align 1
%1 = load i32, i32* %x.addr, align 4
%2 = bitcast %struct.s41* %s41 to i128*
%3 = load i128, i128* %2, align 1
call void (i8*, ...) @foo2(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i32 %1, i128 %3)
store i32 %x, ptr %x.addr, align 4
store i128 %s41.coerce, ptr %s41, align 1
%0 = load i32, ptr %x.addr, align 4
%1 = load i128, ptr %s41, align 1
call void (ptr, ...) @foo2(ptr @.str, i32 %0, i128 %1)
ret void
}
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/AArch64/arm64-abi.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -75,15 +75,15 @@ declare double @ext([2 x float])
; rdar://12656141
; 16-byte vector should be aligned at 16-byte when passing on stack.
; A double argument will be passed on stack, so vecotr should be at sp+16.
define double @fixed_4i(<4 x i32>* nocapture %in) nounwind {
define double @fixed_4i(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: fixed_4i
; CHECK: str [[REG_1:q[0-9]+]], [sp, #16]
; FAST-LABEL: fixed_4i
; FAST: sub sp, sp
; FAST: mov x[[ADDR:[0-9]+]], sp
; FAST: str [[REG_1:q[0-9]+]], [x[[ADDR]], #16]
%0 = load <4 x i32>, <4 x i32>* %in, align 16
%0 = load <4 x i32>, ptr %in, align 16
%call = tail call double @args_vec_4i(double 3.000000e+00, <4 x i32> %0, <4 x i32> %0, <4 x i32> %0, <4 x i32> %0, <4 x i32> %0, <4 x i32> %0, <4 x i32> %0, double 3.000000e+00, <4 x i32> %0, i8 signext 3)
ret double %call
}
Expand All @@ -104,7 +104,7 @@ entry:
%conv1 = fpext float %add to double
%add2 = fadd double %conv1, %d7
%add3 = fadd double %add2, %d8
store double %add3, double* @g_d, align 8
store double %add3, ptr @g_d, align 8
ret void
}

Expand All @@ -123,21 +123,21 @@ entry:
%add3 = fadd double %conv2, %conv1
%conv4 = sitofp i32 %i9 to double
%add5 = fadd double %conv4, %add3
store double %add5, double* @g_d, align 8
store double %add5, ptr @g_d, align 8
ret void
}

; rdar://12648441
; Check alignment on stack for v64, f64, i64, f32, i32.
define double @test3(<2 x i32>* nocapture %in) nounwind {
define double @test3(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: test3
; CHECK: str [[REG_1:d[0-9]+]], [sp, #8]
; FAST-LABEL: test3
; FAST: sub sp, sp, #{{[0-9]+}}
; FAST: mov x[[ADDR:[0-9]+]], sp
; FAST: str [[REG_1:d[0-9]+]], [x[[ADDR]], #8]
%0 = load <2 x i32>, <2 x i32>* %in, align 8
%0 = load <2 x i32>, ptr %in, align 8
%call = tail call double @args_vec_2i(double 3.000000e+00, <2 x i32> %0,
<2 x i32> %0, <2 x i32> %0, <2 x i32> %0, <2 x i32> %0, <2 x i32> %0,
<2 x i32> %0, float 3.000000e+00, <2 x i32> %0, i8 signext 3)
Expand All @@ -146,13 +146,13 @@ entry:
declare double @args_vec_2i(double, <2 x i32>, <2 x i32>, <2 x i32>, <2 x i32>,
<2 x i32>, <2 x i32>, <2 x i32>, float, <2 x i32>, i8 signext)

define double @test4(double* nocapture %in) nounwind {
define double @test4(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: test4
; CHECK: str [[REG_1:d[0-9]+]], [sp, #8]
; CHECK: str [[REG_2:w[0-9]+]], [sp]
; CHECK: mov w0, #3
%0 = load double, double* %in, align 8
%0 = load double, ptr %in, align 8
%call = tail call double @args_f64(double 3.000000e+00, double %0, double %0,
double %0, double %0, double %0, double %0, double %0,
float 3.000000e+00, double %0, i8 signext 3)
Expand All @@ -161,27 +161,27 @@ entry:
declare double @args_f64(double, double, double, double, double, double, double,
double, float, double, i8 signext)

define i64 @test5(i64* nocapture %in) nounwind {
define i64 @test5(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: test5
; CHECK: strb [[REG_3:w[0-9]+]], [sp, #16]
; CHECK: str [[REG_1:x[0-9]+]], [sp, #8]
; CHECK: str [[REG_2:w[0-9]+]], [sp]
%0 = load i64, i64* %in, align 8
%0 = load i64, ptr %in, align 8
%call = tail call i64 @args_i64(i64 3, i64 %0, i64 %0, i64 %0, i64 %0, i64 %0,
i64 %0, i64 %0, i32 3, i64 %0, i8 signext 3)
ret i64 %call
}
declare i64 @args_i64(i64, i64, i64, i64, i64, i64, i64, i64, i32, i64,
i8 signext)

define i32 @test6(float* nocapture %in) nounwind {
define i32 @test6(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: test6
; CHECK: strb [[REG_2:w[0-9]+]], [sp, #8]
; CHECK: str [[REG_1:s[0-9]+]], [sp, #4]
; CHECK: strh [[REG_3:w[0-9]+]], [sp]
%0 = load float, float* %in, align 4
%0 = load float, ptr %in, align 4
%call = tail call i32 @args_f32(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6,
i32 7, i32 8, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0,
float 6.0, float 7.0, float 8.0, i16 signext 3, float %0,
Expand All @@ -192,21 +192,21 @@ declare i32 @args_f32(i32, i32, i32, i32, i32, i32, i32, i32,
float, float, float, float, float, float, float, float,
i16 signext, float, i8 signext)

define i32 @test7(i32* nocapture %in) nounwind {
define i32 @test7(ptr nocapture %in) nounwind {
entry:
; CHECK-LABEL: test7
; CHECK: strb [[REG_2:w[0-9]+]], [sp, #8]
; CHECK: str [[REG_1:w[0-9]+]], [sp, #4]
; CHECK: strh [[REG_3:w[0-9]+]], [sp]
%0 = load i32, i32* %in, align 4
%0 = load i32, ptr %in, align 4
%call = tail call i32 @args_i32(i32 3, i32 %0, i32 %0, i32 %0, i32 %0, i32 %0,
i32 %0, i32 %0, i16 signext 3, i32 %0, i8 signext 4)
ret i32 %call
}
declare i32 @args_i32(i32, i32, i32, i32, i32, i32, i32, i32, i16 signext, i32,
i8 signext)

define i32 @test8(i32 %argc, i8** nocapture %argv) nounwind {
define i32 @test8(i32 %argc, ptr nocapture %argv) nounwind {
entry:
; CHECK-LABEL: test8
; CHECK: str w8, [sp]
Expand Down
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