243 changes: 226 additions & 17 deletions llvm/test/Transforms/InstCombine/sign-test-and-or.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ declare void @foo()

define i1 @test1(i32 %a, i32 %b) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: [[TMP1:%.*]] = or i32 %a, %b
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TMP2]]
;
Expand All @@ -15,9 +15,21 @@ define i1 @test1(i32 %a, i32 %b) {
ret i1 %or.cond
}

define i1 @test1_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test1_logical(
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = icmp slt i32 %a, 0
%2 = icmp slt i32 %b, 0
%or.cond = select i1 %1, i1 true, i1 %2
ret i1 %or.cond
}

define i1 @test2(i32 %a, i32 %b) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, %b
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
; CHECK-NEXT: ret i1 [[TMP2]]
;
Expand All @@ -27,9 +39,21 @@ define i1 @test2(i32 %a, i32 %b) {
ret i1 %or.cond
}

define i1 @test2_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test2_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = icmp sgt i32 %a, -1
%2 = icmp sgt i32 %b, -1
%or.cond = select i1 %1, i1 true, i1 %2
ret i1 %or.cond
}

define i1 @test3(i32 %a, i32 %b) {
; CHECK-LABEL: @test3(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, %b
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TMP2]]
;
Expand All @@ -39,9 +63,21 @@ define i1 @test3(i32 %a, i32 %b) {
ret i1 %or.cond
}

define i1 @test3_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test3_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[TMP1]], 0
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = icmp slt i32 %a, 0
%2 = icmp slt i32 %b, 0
%or.cond = select i1 %1, i1 %2, i1 false
ret i1 %or.cond
}

define i1 @test4(i32 %a, i32 %b) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: [[TMP1:%.*]] = or i32 %a, %b
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
; CHECK-NEXT: ret i1 [[TMP2]]
;
Expand All @@ -51,11 +87,28 @@ define i1 @test4(i32 %a, i32 %b) {
ret i1 %or.cond
}

define i1 @test4_logical(i32 %a, i32 %b) {
; CHECK-LABEL: @test4_logical(
; CHECK-NEXT: [[TMP1:%.*]] = or i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP2:%.*]] = icmp sgt i32 [[TMP1]], -1
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = icmp sgt i32 %a, -1
%2 = icmp sgt i32 %b, -1
%or.cond = select i1 %1, i1 %2, i1 false
ret i1 %or.cond
}

define void @test5(i32 %a) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -2013265920
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label %if.then, label %if.end
; CHECK-NEXT: br i1 [[TMP2]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0:#.*]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%and = and i32 %a, 134217728
%1 = icmp eq i32 %and, 0
Expand All @@ -64,6 +117,32 @@ define void @test5(i32 %a) {
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void

if.end:
ret void
}

define void @test5_logical(i32 %a) {
; CHECK-LABEL: @test5_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%and = and i32 %a, 134217728
%1 = icmp eq i32 %and, 0
%2 = icmp sgt i32 %a, -1
%or.cond = select i1 %1, i1 %2, i1 false
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void
Expand All @@ -74,9 +153,14 @@ if.end:

define void @test6(i32 %a) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -2013265920
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label %if.then, label %if.end
; CHECK-NEXT: br i1 [[TMP2]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%1 = icmp sgt i32 %a, -1
%and = and i32 %a, 134217728
Expand All @@ -85,6 +169,32 @@ define void @test6(i32 %a) {
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void

if.end:
ret void
}

define void @test6_logical(i32 %a) {
; CHECK-LABEL: @test6_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%1 = icmp sgt i32 %a, -1
%and = and i32 %a, 134217728
%2 = icmp eq i32 %and, 0
%or.cond = select i1 %1, i1 %2, i1 false
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void
Expand All @@ -95,9 +205,14 @@ if.end:

define void @test7(i32 %a) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label %if.end, label %if.then
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%and = and i32 %a, 134217728
%1 = icmp ne i32 %and, 0
Expand All @@ -106,6 +221,32 @@ define void @test7(i32 %a) {
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void

if.end:
ret void
}

define void @test7_logical(i32 %a) {
; CHECK-LABEL: @test7_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo() [[ATTR0]]
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%and = and i32 %a, 134217728
%1 = icmp ne i32 %and, 0
%2 = icmp slt i32 %a, 0
%or.cond = select i1 %1, i1 true, i1 %2
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo() nounwind
ret void
Expand All @@ -116,9 +257,14 @@ if.end:

define void @test8(i32 %a) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -2013265920
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[TMP2]], label %if.end, label %if.then
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo()
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%1 = icmp slt i32 %a, 0
%and = and i32 %a, 134217728
Expand All @@ -127,6 +273,32 @@ define void @test8(i32 %a) {
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo()
ret void

if.end:
ret void
}

define void @test8_logical(i32 %a) {
; CHECK-LABEL: @test8_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -2013265920
; CHECK-NEXT: [[DOTNOT:%.*]] = icmp eq i32 [[TMP1]], 0
; CHECK-NEXT: br i1 [[DOTNOT]], label [[IF_END:%.*]], label [[IF_THEN:%.*]]
; CHECK: if.then:
; CHECK-NEXT: tail call void @foo()
; CHECK-NEXT: ret void
; CHECK: if.end:
; CHECK-NEXT: ret void
;
%1 = icmp slt i32 %a, 0
%and = and i32 %a, 134217728
%2 = icmp ne i32 %and, 0
%or.cond = select i1 %1, i1 true, i1 %2
br i1 %or.cond, label %if.then, label %if.end


if.then:
tail call void @foo()
ret void
Expand All @@ -137,7 +309,7 @@ if.end:

define i1 @test9(i32 %a) {
; CHECK-LABEL: @test9(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 %a, -1073741824
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -1073741824
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1073741824
; CHECK-NEXT: ret i1 [[TMP2]]
;
Expand All @@ -148,9 +320,22 @@ define i1 @test9(i32 %a) {
ret i1 %or.cond
}

define i1 @test9_logical(i32 %a) {
; CHECK-LABEL: @test9_logical(
; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[A:%.*]], -1073741824
; CHECK-NEXT: [[TMP2:%.*]] = icmp eq i32 [[TMP1]], 1073741824
; CHECK-NEXT: ret i1 [[TMP2]]
;
%1 = and i32 %a, 1073741824
%2 = icmp ne i32 %1, 0
%3 = icmp sgt i32 %a, -1
%or.cond = select i1 %2, i1 %3, i1 false
ret i1 %or.cond
}

define i1 @test10(i32 %a) {
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 %a, 2
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 2
; CHECK-NEXT: ret i1 [[TMP1]]
;
%1 = and i32 %a, 2
Expand All @@ -160,9 +345,21 @@ define i1 @test10(i32 %a) {
ret i1 %or.cond
}

define i1 @test10_logical(i32 %a) {
; CHECK-LABEL: @test10_logical(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ult i32 [[A:%.*]], 2
; CHECK-NEXT: ret i1 [[TMP1]]
;
%1 = and i32 %a, 2
%2 = icmp eq i32 %1, 0
%3 = icmp ult i32 %a, 4
%or.cond = select i1 %2, i1 %3, i1 false
ret i1 %or.cond
}

define i1 @test11(i32 %a) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 %a, 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 1
; CHECK-NEXT: ret i1 [[TMP1]]
;
%1 = and i32 %a, 2
Expand All @@ -171,3 +368,15 @@ define i1 @test11(i32 %a) {
%or.cond = or i1 %2, %3
ret i1 %or.cond
}

define i1 @test11_logical(i32 %a) {
; CHECK-LABEL: @test11_logical(
; CHECK-NEXT: [[TMP1:%.*]] = icmp ugt i32 [[A:%.*]], 1
; CHECK-NEXT: ret i1 [[TMP1]]
;
%1 = and i32 %a, 2
%2 = icmp ne i32 %1, 0
%3 = icmp ugt i32 %a, 3
%or.cond = select i1 %2, i1 true, i1 %3
ret i1 %or.cond
}
416 changes: 416 additions & 0 deletions llvm/test/Transforms/InstCombine/signed-truncation-check.ll
View file

Large diffs are not rendered by default.

169 changes: 169 additions & 0 deletions llvm/test/Transforms/InstCombine/umul-sign-check.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -30,6 +30,25 @@ define i1 @test1(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test1_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test1_logical(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: store i64 [[MUL]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;

%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
store i64 %mul, i64* %ptr, align 8
ret i1 %overflow.1
}

define i1 @test1_or_ops_swapped(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test1_or_ops_swapped(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
Expand All @@ -50,6 +69,26 @@ define i1 @test1_or_ops_swapped(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test1_or_ops_swapped_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test1_or_ops_swapped_logical(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: store i64 [[MUL]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;


%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %cmp, i1 true, i1 %overflow
store i64 %mul, i64* %ptr, align 8
ret i1 %overflow.1
}

define i1 @test2(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
Expand All @@ -71,6 +110,27 @@ define i1 @test2(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test2_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test2_logical(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;

%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
%neg = sub i64 0, %mul
store i64 %neg, i64* %ptr, align 8
ret i1 %overflow.1
}

declare void @use(i1)

define i1 @test3_multiple_overflow_users(i64 %a, i64 %b, i64* %ptr) {
Expand All @@ -92,6 +152,25 @@ define i1 @test3_multiple_overflow_users(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test3_multiple_overflow_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_overflow_users_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: call void @use(i1 [[OVERFLOW]])
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
call void @use(i1 %overflow)
ret i1 %overflow.1
}

; Do not simplify if %overflow and %mul have multiple uses.
define i1 @test3_multiple_overflow_and_mul_users(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_overflow_and_mul_users(
Expand All @@ -116,6 +195,29 @@ define i1 @test3_multiple_overflow_and_mul_users(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test3_multiple_overflow_and_mul_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_overflow_and_mul_users_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp ne i64 [[MUL]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = or i1 [[OVERFLOW]], [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use(i1 [[OVERFLOW]])
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
%neg = sub i64 0, %mul
store i64 %neg, i64* %ptr, align 8
call void @use(i1 %overflow)
ret i1 %overflow.1
}


declare void @use.2({ i64, i1 })
define i1 @test3_multiple_res_users(i64 %a, i64 %b, i64* %ptr) {
Expand All @@ -141,6 +243,29 @@ define i1 @test3_multiple_res_users(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test3_multiple_res_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_res_users_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use.2({ i64, i1 } [[RES]])
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
%neg = sub i64 0, %mul
store i64 %neg, i64* %ptr, align 8
call void @use.2({ i64, i1 } %res)
ret i1 %overflow.1
}

declare void @use.3(i64)

; Simplify if %mul has multiple uses.
Expand All @@ -167,6 +292,29 @@ define i1 @test3_multiple_mul_users(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test3_multiple_mul_users_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test3_multiple_mul_users_logical(
; CHECK-NEXT: [[MUL:%.*]] = mul i64 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[TMP1:%.*]] = icmp ne i64 [[A]], 0
; CHECK-NEXT: [[TMP2:%.*]] = icmp ne i64 [[B]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = and i1 [[TMP1]], [[TMP2]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: call void @use.3(i64 [[MUL]])
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;

%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp ne i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
%neg = sub i64 0, %mul
store i64 %neg, i64* %ptr, align 8
call void @use.3(i64 %mul)
ret i1 %overflow.1
}



define i1 @test4_no_icmp_ne(i64 %a, i64 %b, i64* %ptr) {
Expand All @@ -190,4 +338,25 @@ define i1 @test4_no_icmp_ne(i64 %a, i64 %b, i64* %ptr) {
ret i1 %overflow.1
}

define i1 @test4_no_icmp_ne_logical(i64 %a, i64 %b, i64* %ptr) {
; CHECK-LABEL: @test4_no_icmp_ne_logical(
; CHECK-NEXT: [[RES:%.*]] = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 [[A:%.*]], i64 [[B:%.*]])
; CHECK-NEXT: [[OVERFLOW:%.*]] = extractvalue { i64, i1 } [[RES]], 1
; CHECK-NEXT: [[MUL:%.*]] = extractvalue { i64, i1 } [[RES]], 0
; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i64 [[MUL]], 0
; CHECK-NEXT: [[OVERFLOW_1:%.*]] = or i1 [[OVERFLOW]], [[CMP]]
; CHECK-NEXT: [[NEG:%.*]] = sub i64 0, [[MUL]]
; CHECK-NEXT: store i64 [[NEG]], i64* [[PTR:%.*]], align 8
; CHECK-NEXT: ret i1 [[OVERFLOW_1]]
;
%res = tail call { i64, i1 } @llvm.umul.with.overflow.i64(i64 %a, i64 %b)
%overflow = extractvalue { i64, i1 } %res, 1
%mul = extractvalue { i64, i1 } %res, 0
%cmp = icmp sgt i64 %mul, 0
%overflow.1 = select i1 %overflow, i1 true, i1 %cmp
%neg = sub i64 0, %mul
store i64 %neg, i64* %ptr, align 8
ret i1 %overflow.1
}

attributes #0 = { nounwind readnone speculatable willreturn }
138 changes: 132 additions & 6 deletions llvm/test/Transforms/InstCombine/usub-overflow-known-by-implied-cond.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,8 +6,8 @@ declare { i32, i1 } @llvm.usub.with.overflow.i32(i32, i32)

define i32 @test1(i32 %a, i32 %b) {
; CHECK-LABEL: @test1(
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: br i1 false, label [[BB2:%.*]], label [[BB3]]
; CHECK: bb2:
Expand All @@ -33,8 +33,8 @@ bb3:

define i32 @test2(i32 %a, i32 %b) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[COND:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp ult i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: br i1 false, label [[BB3]], label [[BB2:%.*]]
; CHECK: bb2:
Expand Down Expand Up @@ -203,8 +203,8 @@ bb3:

define i32 @test8(i32 %a, i32 %b) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: [[COND:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK-NEXT: [[COND_NOT:%.*]] = icmp eq i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: br i1 [[COND_NOT]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: [[C1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 1
Expand Down Expand Up @@ -261,6 +261,36 @@ bb3:
ret i32 0
}

define i32 @test9_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test9_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
; CHECK-NEXT: br i1 [[AND]], label [[BB1:%.*]], label [[BB3:%.*]]
; CHECK: bb1:
; CHECK-NEXT: br i1 false, label [[BB3]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[SUB1:%.*]] = sub nuw i32 [[A]], [[B]]
; CHECK-NEXT: ret i32 [[SUB1]]
; CHECK: bb3:
; CHECK-NEXT: ret i32 0
;
%cond = icmp ugt i32 %a, %b
%and = select i1 %cond, i1 %cond2, i1 false
br i1 %and, label %bb1, label %bb3

bb1:
%sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
%r1 = extractvalue { i32, i1 } %sub1, 0
%c1 = extractvalue { i32, i1 } %sub1, 1
br i1 %c1, label %bb3, label %bb2

bb2:
ret i32 %r1

bb3:
ret i32 0
}

define i32 @test10(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test10(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
Expand Down Expand Up @@ -293,6 +323,38 @@ bb3:
ret i32 0
}

define i32 @test10_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test10_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[COND]], [[COND2:%.*]]
; CHECK-NEXT: br i1 [[AND]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: [[C1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 1
; CHECK-NEXT: br i1 [[C1]], label [[BB3]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[R1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 0
; CHECK-NEXT: ret i32 [[R1]]
; CHECK: bb3:
; CHECK-NEXT: ret i32 0
;
%cond = icmp ugt i32 %a, %b
%and = select i1 %cond, i1 %cond2, i1 false
br i1 %and, label %bb3, label %bb1

bb1:
%sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
%r1 = extractvalue { i32, i1 } %sub1, 0
%c1 = extractvalue { i32, i1 } %sub1, 1
br i1 %c1, label %bb3, label %bb2

bb2:
ret i32 %r1

bb3:
ret i32 0
}

define i32 @test11(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test11(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
Expand Down Expand Up @@ -325,6 +387,38 @@ bb3:
ret i32 0
}

define i32 @test11_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test11_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
; CHECK-NEXT: br i1 [[OR]], label [[BB1:%.*]], label [[BB3:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: [[C1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 1
; CHECK-NEXT: br i1 [[C1]], label [[BB3]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[R1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 0
; CHECK-NEXT: ret i32 [[R1]]
; CHECK: bb3:
; CHECK-NEXT: ret i32 0
;
%cond = icmp ugt i32 %a, %b
%or = select i1 %cond, i1 true, i1 %cond2
br i1 %or, label %bb1, label %bb3

bb1:
%sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
%r1 = extractvalue { i32, i1 } %sub1, 0
%c1 = extractvalue { i32, i1 } %sub1, 1
br i1 %c1, label %bb3, label %bb2

bb2:
ret i32 %r1

bb3:
ret i32 0
}

define i32 @test12(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test12(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
Expand Down Expand Up @@ -356,3 +450,35 @@ bb2:
bb3:
ret i32 0
}

define i32 @test12_logical(i32 %a, i32 %b, i1 %cond2) {
; CHECK-LABEL: @test12_logical(
; CHECK-NEXT: [[COND:%.*]] = icmp ugt i32 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[OR:%.*]] = or i1 [[COND]], [[COND2:%.*]]
; CHECK-NEXT: br i1 [[OR]], label [[BB3:%.*]], label [[BB1:%.*]]
; CHECK: bb1:
; CHECK-NEXT: [[SUB1:%.*]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A]], i32 [[B]])
; CHECK-NEXT: [[C1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 1
; CHECK-NEXT: br i1 [[C1]], label [[BB3]], label [[BB2:%.*]]
; CHECK: bb2:
; CHECK-NEXT: [[R1:%.*]] = extractvalue { i32, i1 } [[SUB1]], 0
; CHECK-NEXT: ret i32 [[R1]]
; CHECK: bb3:
; CHECK-NEXT: ret i32 0
;
%cond = icmp ugt i32 %a, %b
%or = select i1 %cond, i1 true, i1 %cond2
br i1 %or, label %bb3, label %bb1

bb1:
%sub1 = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 %a, i32 %b)
%r1 = extractvalue { i32, i1 } %sub1, 0
%c1 = extractvalue { i32, i1 } %sub1, 1
br i1 %c1, label %bb3, label %bb2

bb2:
ret i32 %r1

bb3:
ret i32 0
}
143 changes: 143 additions & 0 deletions llvm/test/Transforms/InstCombine/widenable-conditions.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -17,6 +17,19 @@ define i1 @test1(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test1_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test1_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%lhs = select i1 %b, i1 %wc, i1 false
%and = select i1 %lhs, i1 %a, i1 false
ret i1 %and
}

; Negative test - profitability of dropping WC from first use unclear
define i1 @test1b(i1 %a, i1 %b) {
; CHECK-LABEL: @test1b(
Expand All @@ -33,6 +46,21 @@ define i1 @test1b(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test1b_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test1b_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
; CHECK-NEXT: call void @use(i1 [[LHS]])
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%lhs = select i1 %b, i1 %wc, i1 false
call void @use(i1 %lhs)
%and = select i1 %lhs, i1 %a, i1 false
ret i1 %and
}

; multiple uses of A, B, WC doesn't change result
define i1 @test1c(i1 %a, i1 %b) {
; CHECK-LABEL: @test1c(
Expand All @@ -53,6 +81,25 @@ define i1 @test1c(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test1c_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test1c_logical(
; CHECK-NEXT: call void @use(i1 [[A:%.*]])
; CHECK-NEXT: call void @use(i1 [[B:%.*]])
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC]])
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A]]
; CHECK-NEXT: ret i1 [[AND]]
;
call void @use(i1 %a)
call void @use(i1 %b)
%wc = call i1 @llvm.experimental.widenable.condition()
call void @use(i1 %wc)
%lhs = select i1 %b, i1 %wc, i1 false
%and = select i1 %lhs, i1 %a, i1 false
ret i1 %and
}

define i1 @test2(i1 %a, i1 %b) {
; CHECK-LABEL: @test2(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -66,6 +113,19 @@ define i1 @test2(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test2_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test2_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[WC]], [[B:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[A:%.*]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%lhs = select i1 %wc, i1 %b, i1 false
%and = select i1 %lhs, i1 %a, i1 false
ret i1 %and
}

; To test the rhs side, an instruction on lhs to prevent complexity
; canonicalization reducing to above.
define i1 @test3(i1 %a, i1 %b, i1 %c) {
Expand All @@ -83,6 +143,21 @@ define i1 @test3(i1 %a, i1 %b, i1 %c) {
ret i1 %and
}

define i1 @test3_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @test3_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%lhs = select i1 %a, i1 %b, i1 false
%rhs = select i1 %c, i1 %wc, i1 false
%and = select i1 %lhs, i1 %rhs, i1 false
ret i1 %and
}

define i1 @test4(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @test4(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -98,6 +173,21 @@ define i1 @test4(i1 %a, i1 %b, i1 %c) {
ret i1 %and
}

define i1 @test4_logical(i1 %a, i1 %b, i1 %c) {
; CHECK-LABEL: @test4_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[LHS:%.*]] = and i1 [[A:%.*]], [[B:%.*]]
; CHECK-NEXT: [[RHS:%.*]] = and i1 [[WC]], [[C:%.*]]
; CHECK-NEXT: [[AND:%.*]] = and i1 [[LHS]], [[RHS]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%lhs = select i1 %a, i1 %b, i1 false
%rhs = select i1 %wc, i1 %c, i1 false
%and = select i1 %lhs, i1 %rhs, i1 false
ret i1 %and
}

define i1 @test5(i1 %a, i1 %b) {
; CHECK-LABEL: @test5(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -108,6 +198,16 @@ define i1 @test5(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test5_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test5_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: ret i1 [[WC]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%and = select i1 %wc, i1 %wc, i1 false
ret i1 %and
}

define i1 @test6(i1 %a, i1 %b) {
; CHECK-LABEL: @test6(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -121,6 +221,19 @@ define i1 @test6(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test6_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test6_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%wc2 = call i1 @llvm.experimental.widenable.condition()
%and = select i1 %wc, i1 %wc2, i1 false
ret i1 %and
}

define i1 @test7(i1 %a, i1 %b) {
; CHECK-LABEL: @test7(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -136,6 +249,21 @@ define i1 @test7(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test7_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test7_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC]])
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
call void @use(i1 %wc)
%wc2 = call i1 @llvm.experimental.widenable.condition()
%and = select i1 %wc, i1 %wc2, i1 false
ret i1 %and
}

define i1 @test8(i1 %a, i1 %b) {
; CHECK-LABEL: @test8(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
Expand All @@ -151,6 +279,21 @@ define i1 @test8(i1 %a, i1 %b) {
ret i1 %and
}

define i1 @test8_logical(i1 %a, i1 %b) {
; CHECK-LABEL: @test8_logical(
; CHECK-NEXT: [[WC:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: [[WC2:%.*]] = call i1 @llvm.experimental.widenable.condition()
; CHECK-NEXT: call void @use(i1 [[WC2]])
; CHECK-NEXT: [[AND:%.*]] = and i1 [[WC]], [[WC2]]
; CHECK-NEXT: ret i1 [[AND]]
;
%wc = call i1 @llvm.experimental.widenable.condition()
%wc2 = call i1 @llvm.experimental.widenable.condition()
call void @use(i1 %wc2)
%and = select i1 %wc, i1 %wc2, i1 false
ret i1 %and
}


declare void @use(i1)
declare i1 @llvm.experimental.widenable.condition()
50 changes: 50 additions & 0 deletions llvm/test/Transforms/InstCombine/zext-or-icmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,6 +20,23 @@ define i8 @zext_or_icmp_icmp(i8 %a, i8 %b) {
ret i8 %zext
}

define i8 @zext_or_icmp_icmp_logical(i8 %a, i8 %b) {
; CHECK-LABEL: @zext_or_icmp_icmp_logical(
; CHECK-NEXT: [[MASK:%.*]] = and i8 [[A:%.*]], 1
; CHECK-NEXT: [[TOBOOL2:%.*]] = icmp eq i8 [[B:%.*]], 0
; CHECK-NEXT: [[TOBOOL22:%.*]] = zext i1 [[TOBOOL2]] to i8
; CHECK-NEXT: [[TMP1:%.*]] = xor i8 [[MASK]], 1
; CHECK-NEXT: [[ZEXT3:%.*]] = or i8 [[TMP1]], [[TOBOOL22]]
; CHECK-NEXT: ret i8 [[ZEXT3]]
;
%mask = and i8 %a, 1
%toBool1 = icmp eq i8 %mask, 0
%toBool2 = icmp eq i8 %b, 0
%bothCond = select i1 %toBool1, i1 true, i1 %toBool2
%zext = zext i1 %bothCond to i8
ret i8 %zext
}

; Here, widening the or from i1 to i32 and removing one of the icmps would
; widen an undef value (created by the out-of-range shift), increasing the
; range of valid values for the return, so we can't do it.
Expand Down Expand Up @@ -56,3 +73,36 @@ block2:
%conv2 = zext i1 %cmp1 to i32
ret i32 %conv2
}

define i32 @dont_widen_undef_logical() {
; CHECK-LABEL: @dont_widen_undef_logical(
; CHECK-NEXT: entry:
; CHECK-NEXT: br label [[BLOCK2:%.*]]
; CHECK: block1:
; CHECK-NEXT: br label [[BLOCK2]]
; CHECK: block2:
; CHECK-NEXT: [[CMP_I:%.*]] = phi i1 [ false, [[BLOCK1:%.*]] ], [ true, [[ENTRY:%.*]] ]
; CHECK-NEXT: [[M_011:%.*]] = phi i32 [ 0, [[BLOCK1]] ], [ 33, [[ENTRY]] ]
; CHECK-NEXT: [[M_1_OP:%.*]] = lshr i32 1, [[M_011]]
; CHECK-NEXT: [[SEXT_MASK:%.*]] = and i32 [[M_1_OP]], 65535
; CHECK-NEXT: [[CMP115:%.*]] = icmp ne i32 [[SEXT_MASK]], 0
; CHECK-NEXT: [[CMP1:%.*]] = or i1 [[CMP_I]], [[CMP115]]
; CHECK-NEXT: [[CONV2:%.*]] = zext i1 [[CMP1]] to i32
; CHECK-NEXT: ret i32 [[CONV2]]
;
entry:
br label %block2

block1:
br label %block2

block2:
%m.011 = phi i32 [ 33, %entry ], [ 0, %block1 ]
%cmp.i = icmp ugt i32 %m.011, 1
%m.1.op = lshr i32 1, %m.011
%sext.mask = and i32 %m.1.op, 65535
%cmp115 = icmp ne i32 %sext.mask, 0
%cmp1 = select i1 %cmp.i, i1 true, i1 %cmp115
%conv2 = zext i1 %cmp1 to i32
ret i32 %conv2
}