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@@ -0,0 +1,175 @@ |
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; NOTE: Assertions have been autogenerated by utils/update_test_checks.py |
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; RUN: opt < %s -aa-pipeline=basic-aa -passes=loop-interchange -cache-line-size=64 -verify-dom-info -verify-loop-info -verify-scev -verify-loop-lcssa -S | FileCheck %s |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128" |
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target triple = "aarch64-unknown-linux-gnu" |
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;; Test to make sure DA outputs the correction direction |
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;; vector [< =] hence the loopnest is interchanged. |
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;; |
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;; void test1(unsigned a[restrict N1][N2], |
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;; unsigned b[restrict N1][N2], |
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;; unsigned c[restrict N1][N2]) { |
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;; for (unsigned long i2 = 1; i2 < N2-1; i2++) { |
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;; for (unsigned long i1 = 1; i1 < N1-1; i1++) { |
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;; a[i1][i2+1] = b[i1][i2]; |
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;; c[i1][i2] = a[i1][i2]; |
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;; } |
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;; } |
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;; } |
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define void @test1(ptr noalias noundef %a, ptr noalias noundef %b, ptr noalias noundef %c) { |
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; CHECK-LABEL: @test1( |
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; CHECK-NEXT: entry: |
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; CHECK-NEXT: br label [[LOOP2_HEADER_PREHEADER:%.*]] |
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; CHECK: loop1.header.preheader: |
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; CHECK-NEXT: br label [[LOOP1_HEADER:%.*]] |
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; CHECK: loop1.header: |
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; CHECK-NEXT: [[I2:%.*]] = phi i64 [ [[I2_INC:%.*]], [[LOOP1_LATCH:%.*]] ], [ 1, [[LOOP1_HEADER_PREHEADER:%.*]] ] |
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; CHECK-NEXT: [[I2_ST:%.*]] = add i64 [[I2]], 1 |
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; CHECK-NEXT: [[I2_LD:%.*]] = add i64 [[I2]], 0 |
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; CHECK-NEXT: br label [[LOOP2_HEADER_SPLIT1:%.*]] |
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; CHECK: loop2.header.preheader: |
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; CHECK-NEXT: br label [[LOOP2_HEADER:%.*]] |
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; CHECK: loop2.header: |
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; CHECK-NEXT: [[I1:%.*]] = phi i64 [ [[TMP0:%.*]], [[LOOP2_HEADER_SPLIT:%.*]] ], [ 1, [[LOOP2_HEADER_PREHEADER]] ] |
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; CHECK-NEXT: br label [[LOOP1_HEADER_PREHEADER]] |
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; CHECK: loop2.header.split1: |
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; CHECK-NEXT: [[I1_ST:%.*]] = add i64 [[I1]], 0 |
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; CHECK-NEXT: [[I1_LD:%.*]] = add i64 [[I1]], 0 |
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; CHECK-NEXT: [[A_ST:%.*]] = getelementptr inbounds [64 x i32], ptr [[A:%.*]], i64 [[I1_ST]], i64 [[I2_ST]] |
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; CHECK-NEXT: [[A_LD:%.*]] = getelementptr inbounds [64 x i32], ptr [[A]], i64 [[I1_LD]], i64 [[I2_LD]] |
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; CHECK-NEXT: [[B_LD:%.*]] = getelementptr inbounds [64 x i32], ptr [[B:%.*]], i64 [[I1]], i64 [[I2]] |
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; CHECK-NEXT: [[C_ST:%.*]] = getelementptr inbounds [64 x i32], ptr [[C:%.*]], i64 [[I1]], i64 [[I2]] |
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; CHECK-NEXT: [[B_VAL:%.*]] = load i32, ptr [[B_LD]], align 4 |
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; CHECK-NEXT: store i32 [[B_VAL]], ptr [[A_ST]], align 4 |
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; CHECK-NEXT: [[A_VAL:%.*]] = load i32, ptr [[A_LD]], align 4 |
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; CHECK-NEXT: store i32 [[A_VAL]], ptr [[C_ST]], align 4 |
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; CHECK-NEXT: [[I1_INC:%.*]] = add nuw nsw i64 [[I1]], 1 |
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; CHECK-NEXT: [[LOOP2_EXITCOND_NOT:%.*]] = icmp eq i64 [[I1_INC]], 63 |
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; CHECK-NEXT: br label [[LOOP1_LATCH]] |
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; CHECK: loop2.header.split: |
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; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[I1]], 1 |
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 63 |
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; CHECK-NEXT: br i1 [[TMP1]], label [[EXIT:%.*]], label [[LOOP2_HEADER]] |
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; CHECK: loop1.latch: |
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; CHECK-NEXT: [[I2_INC]] = add nuw nsw i64 [[I2]], 1 |
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; CHECK-NEXT: [[LOOP1_EXITCOND_NOT:%.*]] = icmp eq i64 [[I2_INC]], 63 |
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; CHECK-NEXT: br i1 [[LOOP1_EXITCOND_NOT]], label [[LOOP2_HEADER_SPLIT]], label [[LOOP1_HEADER]] |
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; CHECK: exit: |
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; CHECK-NEXT: ret void |
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; |
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entry: |
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br label %loop1.header |
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loop1.header: |
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%i2 = phi i64 [ 1, %entry ], [ %i2.inc, %loop1.latch ] |
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%i2.st = add i64 %i2, 1 |
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%i2.ld = add i64 %i2, 0 |
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br label %loop2.header |
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loop2.header: |
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%i1 = phi i64 [ 1, %loop1.header ], [ %i1.inc, %loop2.header ] |
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%i1.st = add i64 %i1, 0 |
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%i1.ld = add i64 %i1, 0 |
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%a.st = getelementptr inbounds [64 x i32], ptr %a, i64 %i1.st, i64 %i2.st |
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%a.ld = getelementptr inbounds [64 x i32], ptr %a, i64 %i1.ld, i64 %i2.ld |
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%b.ld = getelementptr inbounds [64 x i32], ptr %b, i64 %i1, i64 %i2 |
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%c.st = getelementptr inbounds [64 x i32], ptr %c, i64 %i1, i64 %i2 |
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%b.val = load i32, ptr %b.ld, align 4 |
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store i32 %b.val, ptr %a.st, align 4 ; (X) store to a[i1][i2+1] |
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%a.val = load i32, ptr %a.ld, align 4 ; (Y) load from a[i1][i2] |
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store i32 %a.val, ptr %c.st, align 4 |
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%i1.inc = add nuw nsw i64 %i1, 1 |
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%loop2.exitcond.not = icmp eq i64 %i1.inc, 63 |
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br i1 %loop2.exitcond.not, label %loop1.latch, label %loop2.header |
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loop1.latch: |
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%i2.inc = add nuw nsw i64 %i2, 1 |
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%loop1.exitcond.not = icmp eq i64 %i2.inc, 63 |
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br i1 %loop1.exitcond.not, label %exit, label %loop1.header |
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exit: |
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ret void |
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} |
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;; Semantically equivalent to test1() with only the difference |
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;; of the order of a load and a store at (X) and (Y). |
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;; |
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;; Test to make sure DA outputs the correction direction |
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;; vector [< =] hence the loopnest is interchanged. |
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define void @test2(ptr noalias noundef %a, ptr noalias noundef %b, ptr noalias noundef %c) { |
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; CHECK-LABEL: @test2( |
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; CHECK-NEXT: entry: |
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; CHECK-NEXT: br label [[LOOP2_HEADER_PREHEADER:%.*]] |
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; CHECK: loop1.header.preheader: |
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; CHECK-NEXT: br label [[LOOP1_HEADER:%.*]] |
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; CHECK: loop1.header: |
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; CHECK-NEXT: [[I2:%.*]] = phi i64 [ [[I2_INC:%.*]], [[LOOP1_LATCH:%.*]] ], [ 1, [[LOOP1_HEADER_PREHEADER:%.*]] ] |
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; CHECK-NEXT: [[I2_ST:%.*]] = add i64 [[I2]], 1 |
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; CHECK-NEXT: [[I2_LD:%.*]] = add i64 [[I2]], 0 |
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; CHECK-NEXT: br label [[LOOP2_HEADER_SPLIT1:%.*]] |
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; CHECK: loop2.header.preheader: |
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; CHECK-NEXT: br label [[LOOP2_HEADER:%.*]] |
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; CHECK: loop2.header: |
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; CHECK-NEXT: [[I1:%.*]] = phi i64 [ [[TMP0:%.*]], [[LOOP2_HEADER_SPLIT:%.*]] ], [ 1, [[LOOP2_HEADER_PREHEADER]] ] |
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; CHECK-NEXT: br label [[LOOP1_HEADER_PREHEADER]] |
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; CHECK: loop2.header.split1: |
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; CHECK-NEXT: [[I1_ST:%.*]] = add i64 [[I1]], 0 |
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; CHECK-NEXT: [[I1_LD:%.*]] = add i64 [[I1]], 0 |
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; CHECK-NEXT: [[A_ST:%.*]] = getelementptr inbounds [64 x i32], ptr [[A:%.*]], i64 [[I1_ST]], i64 [[I2_ST]] |
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; CHECK-NEXT: [[A_LD:%.*]] = getelementptr inbounds [64 x i32], ptr [[A]], i64 [[I1_LD]], i64 [[I2_LD]] |
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; CHECK-NEXT: [[B_LD:%.*]] = getelementptr inbounds [64 x i32], ptr [[B:%.*]], i64 [[I1]], i64 [[I2]] |
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; CHECK-NEXT: [[C_ST:%.*]] = getelementptr inbounds [64 x i32], ptr [[C:%.*]], i64 [[I1]], i64 [[I2]] |
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; CHECK-NEXT: [[B_VAL:%.*]] = load i32, ptr [[B_LD]], align 4 |
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; CHECK-NEXT: [[A_VAL:%.*]] = load i32, ptr [[A_LD]], align 4 |
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; CHECK-NEXT: store i32 [[B_VAL]], ptr [[A_ST]], align 4 |
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; CHECK-NEXT: store i32 [[A_VAL]], ptr [[C_ST]], align 4 |
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; CHECK-NEXT: [[I1_INC:%.*]] = add nuw nsw i64 [[I1]], 1 |
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; CHECK-NEXT: [[LOOP2_EXITCOND_NOT:%.*]] = icmp eq i64 [[I1_INC]], 63 |
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; CHECK-NEXT: br label [[LOOP1_LATCH]] |
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; CHECK: loop2.header.split: |
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; CHECK-NEXT: [[TMP0]] = add nuw nsw i64 [[I1]], 1 |
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; CHECK-NEXT: [[TMP1:%.*]] = icmp eq i64 [[TMP0]], 63 |
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; CHECK-NEXT: br i1 [[TMP1]], label [[EXIT:%.*]], label [[LOOP2_HEADER]] |
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; CHECK: loop1.latch: |
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; CHECK-NEXT: [[I2_INC]] = add nuw nsw i64 [[I2]], 1 |
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; CHECK-NEXT: [[LOOP1_EXITCOND_NOT:%.*]] = icmp eq i64 [[I2_INC]], 63 |
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; CHECK-NEXT: br i1 [[LOOP1_EXITCOND_NOT]], label [[LOOP2_HEADER_SPLIT]], label [[LOOP1_HEADER]] |
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; CHECK: exit: |
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; CHECK-NEXT: ret void |
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; |
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entry: |
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br label %loop1.header |
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loop1.header: |
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%i2 = phi i64 [ 1, %entry ], [ %i2.inc, %loop1.latch ] |
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%i2.st = add i64 %i2, 1 |
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%i2.ld = add i64 %i2, 0 |
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br label %loop2.header |
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loop2.header: |
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%i1 = phi i64 [ 1, %loop1.header ], [ %i1.inc, %loop2.header ] |
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%i1.st = add i64 %i1, 0 |
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%i1.ld = add i64 %i1, 0 |
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%a.st = getelementptr inbounds [64 x i32], ptr %a, i64 %i1.st, i64 %i2.st |
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%a.ld = getelementptr inbounds [64 x i32], ptr %a, i64 %i1.ld, i64 %i2.ld |
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%b.ld = getelementptr inbounds [64 x i32], ptr %b, i64 %i1, i64 %i2 |
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%c.st = getelementptr inbounds [64 x i32], ptr %c, i64 %i1, i64 %i2 |
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%b.val = load i32, ptr %b.ld, align 4 |
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%a.val = load i32, ptr %a.ld, align 4 ; (Y) load from a[i1][i2] |
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store i32 %b.val, ptr %a.st, align 4 ; (X) store to a[i1][i2+1] |
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store i32 %a.val, ptr %c.st, align 4 |
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%i1.inc = add nuw nsw i64 %i1, 1 |
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%loop2.exitcond.not = icmp eq i64 %i1.inc, 63 |
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br i1 %loop2.exitcond.not, label %loop1.latch, label %loop2.header |
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loop1.latch: |
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%i2.inc = add nuw nsw i64 %i2, 1 |
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%loop1.exitcond.not = icmp eq i64 %i2.inc, 63 |
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br i1 %loop1.exitcond.not, label %exit, label %loop1.header |
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exit: |
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ret void |
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} |