12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/fsub.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @fsub_v8f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fsub_v8f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvfsub.s $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvfsub.s $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @fsub_v4f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fsub_v4f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvfsub.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvfsub.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
144 changes: 72 additions & 72 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/icmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,9 @@ define void @v32i8_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v32i8_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <32 x i8>, ptr %a0
Expand Down Expand Up @@ -49,9 +49,9 @@ define void @v16i16_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v16i16_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -79,9 +79,9 @@ define void @v8i32_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v8i32_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i32>, ptr %a0
Expand Down Expand Up @@ -109,9 +109,9 @@ define void @v4i64_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v4i64_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand Down Expand Up @@ -140,9 +140,9 @@ define void @v32i8_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v32i8_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <32 x i8>, ptr %a0
Expand Down Expand Up @@ -170,9 +170,9 @@ define void @v16i16_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v16i16_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -200,9 +200,9 @@ define void @v8i32_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v8i32_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i32>, ptr %a0
Expand Down Expand Up @@ -230,9 +230,9 @@ define void @v4i64_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v4i64_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand Down Expand Up @@ -261,9 +261,9 @@ define void @v32i8_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v32i8_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.bu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <32 x i8>, ptr %a0
Expand Down Expand Up @@ -291,9 +291,9 @@ define void @v16i16_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v16i16_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.hu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -321,9 +321,9 @@ define void @v8i32_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v8i32_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.wu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i32>, ptr %a0
Expand Down Expand Up @@ -351,9 +351,9 @@ define void @v4i64_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v4i64_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsle.du $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsle.du $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand Down Expand Up @@ -382,9 +382,9 @@ define void @v32i8_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v32i8_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <32 x i8>, ptr %a0
Expand Down Expand Up @@ -412,9 +412,9 @@ define void @v16i16_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v16i16_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -442,9 +442,9 @@ define void @v8i32_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v8i32_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i32>, ptr %a0
Expand Down Expand Up @@ -472,9 +472,9 @@ define void @v4i64_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v4i64_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand Down Expand Up @@ -503,9 +503,9 @@ define void @v32i8_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v32i8_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.bu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <32 x i8>, ptr %a0
Expand Down Expand Up @@ -533,9 +533,9 @@ define void @v16i16_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v16i16_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.hu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -563,9 +563,9 @@ define void @v8i32_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v8i32_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.wu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i32>, ptr %a0
Expand Down Expand Up @@ -593,9 +593,9 @@ define void @v4i64_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v4i64_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvslt.du $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvslt.du $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand All @@ -610,9 +610,9 @@ define void @v4i64_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v32i8_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v32i8_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvxori.b $xr0, $xr0, 255
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
Expand All @@ -627,9 +627,9 @@ define void @v32i8_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v16i16_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i16_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvrepli.b $xr1, -1
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
Expand All @@ -645,9 +645,9 @@ define void @v16i16_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v8i32_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i32_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvrepli.b $xr1, -1
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
Expand All @@ -663,9 +663,9 @@ define void @v8i32_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4i64_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i64_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvseq.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvseq.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvrepli.b $xr1, -1
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/insertelement.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -88,10 +88,10 @@ define void @insert_4xi64(ptr %src, ptr %dst, i64 %in) nounwind {
define void @insert_8xfloat(ptr %src, ptr %dst, float %in) nounwind {
; CHECK-LABEL: insert_8xfloat:
; CHECK: # %bb.0:
; CHECK-NEXT: movfr2gr.s $a2, $fa0
; CHECK-NEXT: xvld $xr0, $a0, 0
; CHECK-NEXT: xvinsgr2vr.w $xr0, $a2, 1
; CHECK-NEXT: xvst $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a0, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.w $xr1, $a0, 1
; CHECK-NEXT: xvst $xr1, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <8 x float>, ptr %src
%v_new = insertelement <8 x float> %v, float %in, i32 1
Expand All @@ -102,10 +102,10 @@ define void @insert_8xfloat(ptr %src, ptr %dst, float %in) nounwind {
define void @insert_4xdouble(ptr %src, ptr %dst, double %in) nounwind {
; CHECK-LABEL: insert_4xdouble:
; CHECK: # %bb.0:
; CHECK-NEXT: movfr2gr.d $a2, $fa0
; CHECK-NEXT: xvld $xr0, $a0, 0
; CHECK-NEXT: xvinsgr2vr.d $xr0, $a2, 1
; CHECK-NEXT: xvst $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a0, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: xvinsgr2vr.d $xr1, $a0, 1
; CHECK-NEXT: xvst $xr1, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <4 x double>, ptr %src
%v_new = insertelement <4 x double> %v, double %in, i32 1
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/lshr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @lshr_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsrl.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsrl.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @lshr_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsrl.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsrl.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @lshr_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsrl.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsrl.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @lshr_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsrl.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsrl.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/mul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @mul_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmul.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmul.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @mul_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmul.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @mul_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmul.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmul.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @mul_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmul.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmul.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/or.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @or_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @or_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @or_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @or_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sdiv.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @sdiv_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @sdiv_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @sdiv_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @sdiv_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/shl.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @shl_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsll.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsll.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @shl_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsll.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsll.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @shl_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsll.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsll.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @shl_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsll.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsll.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/sub.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @sub_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsub.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsub.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @sub_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsub.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsub.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @sub_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsub.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsub.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @sub_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvsub.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvsub.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/udiv.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @udiv_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.bu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @udiv_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.hu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @udiv_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.wu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @udiv_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvdiv.du $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvdiv.du $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/ir-instruction/xor.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @xor_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvxor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @xor_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvxor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @xor_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvxor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @xor_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvxor.v $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/LoongArch/lasx/mulh.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @mulhs_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.b $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.b $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -24,9 +24,9 @@ entry:
define void @mulhu_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v32i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.bu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.bu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -44,9 +44,9 @@ entry:
define void @mulhs_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.h $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.h $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -64,9 +64,9 @@ entry:
define void @mulhu_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v16i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.hu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.hu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -84,9 +84,9 @@ entry:
define void @mulhs_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.w $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.w $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -104,9 +104,9 @@ entry:
define void @mulhu_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v8i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.wu $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.wu $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -124,9 +124,9 @@ entry:
define void @mulhs_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.d $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.d $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -144,9 +144,9 @@ entry:
define void @mulhu_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v4i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a2, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvmuh.du $xr0, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: xvmuh.du $xr0, $xr0, $xr1
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/LoongArch/lasx/vselect.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -34,11 +34,11 @@ define void @select_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @select_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: select_v16i16:
; CHECK: # %bb.0:
; CHECK-NEXT: lu12i.w $a3, -16
; CHECK-NEXT: xvreplgr2vr.w $xr0, $a3
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvld $xr2, $a2, 0
; CHECK-NEXT: xvbitsel.v $xr0, $xr2, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: lu12i.w $a1, -16
; CHECK-NEXT: xvreplgr2vr.w $xr2, $a1
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i16>, ptr %a0
Expand Down Expand Up @@ -69,12 +69,12 @@ define void @select_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @select_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: select_v4i64:
; CHECK: # %bb.0:
; CHECK-NEXT: pcalau12i $a3, %pc_hi20(.LCPI4_0)
; CHECK-NEXT: addi.d $a3, $a3, %pc_lo12(.LCPI4_0)
; CHECK-NEXT: xvld $xr0, $a3, 0
; CHECK-NEXT: xvld $xr1, $a1, 0
; CHECK-NEXT: xvld $xr2, $a2, 0
; CHECK-NEXT: xvbitsel.v $xr0, $xr2, $xr1, $xr0
; CHECK-NEXT: xvld $xr0, $a1, 0
; CHECK-NEXT: xvld $xr1, $a2, 0
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI4_0)
; CHECK-NEXT: addi.d $a1, $a1, %pc_lo12(.LCPI4_0)
; CHECK-NEXT: xvld $xr2, $a1, 0
; CHECK-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2
; CHECK-NEXT: xvst $xr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i64>, ptr %a0
Expand Down
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/LoongArch/lsx/build-vector.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -230,31 +230,31 @@ entry:
define void @buildvector_v16i8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) nounwind {
; CHECK-LABEL: buildvector_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld.b $t0, $sp, 64
; CHECK-NEXT: ld.b $t1, $sp, 56
; CHECK-NEXT: ld.b $t2, $sp, 48
; CHECK-NEXT: ld.b $t3, $sp, 40
; CHECK-NEXT: ld.b $t4, $sp, 32
; CHECK-NEXT: ld.b $t5, $sp, 24
; CHECK-NEXT: ld.b $t6, $sp, 16
; CHECK-NEXT: ld.b $t7, $sp, 8
; CHECK-NEXT: ld.b $t8, $sp, 0
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0
; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1
; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2
; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3
; CHECK-NEXT: vinsgr2vr.b $vr0, $a5, 4
; CHECK-NEXT: vinsgr2vr.b $vr0, $a6, 5
; CHECK-NEXT: vinsgr2vr.b $vr0, $a7, 6
; CHECK-NEXT: ld.b $a1, $sp, 0
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 7
; CHECK-NEXT: ld.b $a1, $sp, 8
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 8
; CHECK-NEXT: ld.b $a1, $sp, 16
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 9
; CHECK-NEXT: ld.b $a1, $sp, 24
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 10
; CHECK-NEXT: ld.b $a1, $sp, 32
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 11
; CHECK-NEXT: ld.b $a1, $sp, 40
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 12
; CHECK-NEXT: ld.b $a1, $sp, 48
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 13
; CHECK-NEXT: ld.b $a1, $sp, 56
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 14
; CHECK-NEXT: ld.b $a1, $sp, 64
; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 15
; CHECK-NEXT: vinsgr2vr.b $vr0, $t8, 7
; CHECK-NEXT: vinsgr2vr.b $vr0, $t7, 8
; CHECK-NEXT: vinsgr2vr.b $vr0, $t6, 9
; CHECK-NEXT: vinsgr2vr.b $vr0, $t5, 10
; CHECK-NEXT: vinsgr2vr.b $vr0, $t4, 11
; CHECK-NEXT: vinsgr2vr.b $vr0, $t3, 12
; CHECK-NEXT: vinsgr2vr.b $vr0, $t2, 13
; CHECK-NEXT: vinsgr2vr.b $vr0, $t1, 14
; CHECK-NEXT: vinsgr2vr.b $vr0, $t0, 15
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -281,15 +281,15 @@ entry:
define void @buildvector_v8i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {
; CHECK-LABEL: buildvector_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ld.h $t0, $sp, 0
; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 0
; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 1
; CHECK-NEXT: vinsgr2vr.h $vr0, $a3, 2
; CHECK-NEXT: vinsgr2vr.h $vr0, $a4, 3
; CHECK-NEXT: vinsgr2vr.h $vr0, $a5, 4
; CHECK-NEXT: vinsgr2vr.h $vr0, $a6, 5
; CHECK-NEXT: vinsgr2vr.h $vr0, $a7, 6
; CHECK-NEXT: ld.h $a1, $sp, 0
; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 7
; CHECK-NEXT: vinsgr2vr.h $vr0, $t0, 7
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
448 changes: 224 additions & 224 deletions llvm/test/CodeGen/LoongArch/lsx/fma-v2f64.ll
View file

Large diffs are not rendered by default.

448 changes: 224 additions & 224 deletions llvm/test/CodeGen/LoongArch/lsx/fma-v4f32.ll
View file

Large diffs are not rendered by default.

24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/add.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @add_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: add_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vadd.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vadd.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @add_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: add_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vadd.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vadd.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @add_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: add_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vadd.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vadd.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @add_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: add_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vadd.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vadd.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/and.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @and_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: and_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vand.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @and_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: and_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vand.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @and_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: and_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vand.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @and_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: and_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vand.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vand.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/ashr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @ashr_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: ashr_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsra.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsra.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @ashr_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: ashr_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsra.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsra.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @ashr_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: ashr_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsra.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsra.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @ashr_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: ashr_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsra.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsra.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/extractelement.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -82,9 +82,9 @@ define void @extract_2xdouble(ptr %src, ptr %dst) nounwind {
define void @extract_16xi8_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_16xi8_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.b $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.b $vr0, $vr0, $a0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: srai.w $a0, $a0, 24
; CHECK-NEXT: st.b $a0, $a1, 0
Expand All @@ -98,9 +98,9 @@ define void @extract_16xi8_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_8xi16_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_8xi16_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.h $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.h $vr0, $vr0, $a0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: srai.w $a0, $a0, 16
; CHECK-NEXT: st.h $a0, $a1, 0
Expand All @@ -114,9 +114,9 @@ define void @extract_8xi16_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_4xi32_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_4xi32_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.w $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.w $vr0, $vr0, $a0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: st.w $a0, $a1, 0
; CHECK-NEXT: ret
Expand All @@ -129,9 +129,9 @@ define void @extract_4xi32_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_2xi64_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_2xi64_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.d $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.d $vr0, $vr0, $a0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: st.d $a0, $a1, 0
; CHECK-NEXT: ret
Expand All @@ -144,9 +144,9 @@ define void @extract_2xi64_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_4xfloat_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_4xfloat_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.w $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.w $vr0, $vr0, $a0
; CHECK-NEXT: fst.s $fa0, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <4 x float>, ptr %src
Expand All @@ -158,9 +158,9 @@ define void @extract_4xfloat_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
define void @extract_2xdouble_idx(ptr %src, ptr %dst, i32 %idx) nounwind {
; CHECK-LABEL: extract_2xdouble_idx:
; CHECK: # %bb.0:
; CHECK-NEXT: bstrpick.d $a2, $a2, 31, 0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vreplve.d $vr0, $vr0, $a2
; CHECK-NEXT: bstrpick.d $a0, $a2, 31, 0
; CHECK-NEXT: vreplve.d $vr0, $vr0, $a0
; CHECK-NEXT: fst.d $fa0, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <2 x double>, ptr %src
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fadd.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @fadd_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fadd_v4f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfadd.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfadd.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @fadd_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fadd_v2f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfadd.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfadd.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
168 changes: 84 additions & 84 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fcmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -35,9 +35,9 @@ define void @v2f64_fcmp_false(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_oeq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_oeq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.ceq.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.ceq.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -51,9 +51,9 @@ define void @v4f32_fcmp_oeq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_oeq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_oeq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.ceq.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.ceq.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -68,9 +68,9 @@ define void @v2f64_fcmp_oeq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ueq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ueq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cueq.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cueq.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -84,9 +84,9 @@ define void @v4f32_fcmp_ueq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ueq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ueq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cueq.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cueq.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -101,9 +101,9 @@ define void @v2f64_fcmp_ueq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.ceq.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.ceq.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -117,9 +117,9 @@ define void @v4f32_fcmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.ceq.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.ceq.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -134,9 +134,9 @@ define void @v2f64_fcmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ole(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ole:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cle.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cle.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -150,9 +150,9 @@ define void @v4f32_fcmp_ole(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ole(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ole:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cle.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cle.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -167,9 +167,9 @@ define void @v2f64_fcmp_ole(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cule.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cule.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -183,9 +183,9 @@ define void @v4f32_fcmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cule.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cule.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -200,9 +200,9 @@ define void @v2f64_fcmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_le(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_le:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cle.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cle.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -216,9 +216,9 @@ define void @v4f32_fcmp_le(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_le(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_le:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cle.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cle.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -233,9 +233,9 @@ define void @v2f64_fcmp_le(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_olt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_olt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.clt.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.clt.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -249,9 +249,9 @@ define void @v4f32_fcmp_olt(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_olt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_olt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.clt.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.clt.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -266,9 +266,9 @@ define void @v2f64_fcmp_olt(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cult.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cult.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -282,9 +282,9 @@ define void @v4f32_fcmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cult.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cult.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -299,9 +299,9 @@ define void @v2f64_fcmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_lt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_lt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.clt.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.clt.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -315,9 +315,9 @@ define void @v4f32_fcmp_lt(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_lt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_lt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.clt.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.clt.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -332,9 +332,9 @@ define void @v2f64_fcmp_lt(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_one(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_one:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cne.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cne.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -348,9 +348,9 @@ define void @v4f32_fcmp_one(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_one(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_one:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cne.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cne.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -365,9 +365,9 @@ define void @v2f64_fcmp_one(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_une(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_une:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cune.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cune.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -381,9 +381,9 @@ define void @v4f32_fcmp_une(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_une(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_une:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cune.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cune.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -398,9 +398,9 @@ define void @v2f64_fcmp_une(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cne.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cne.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -414,9 +414,9 @@ define void @v4f32_fcmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cne.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cne.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -431,9 +431,9 @@ define void @v2f64_fcmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_ord(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_ord:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cor.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cor.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -447,9 +447,9 @@ define void @v4f32_fcmp_ord(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_ord(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_ord:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cor.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cor.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand All @@ -464,9 +464,9 @@ define void @v2f64_fcmp_ord(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4f32_fcmp_uno(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4f32_fcmp_uno:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cun.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cun.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x float>, ptr %a0
Expand All @@ -480,9 +480,9 @@ define void @v4f32_fcmp_uno(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2f64_fcmp_uno(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2f64_fcmp_uno:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfcmp.cun.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfcmp.cun.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x double>, ptr %a0
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fdiv.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @fdiv_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fdiv_v4f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfdiv.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfdiv.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @fdiv_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fdiv_v2f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfdiv.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfdiv.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fmul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @fmul_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fmul_v4f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfmul.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfmul.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @fmul_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fmul_v2f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfmul.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfmul.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/fsub.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @fsub_v4f32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fsub_v4f32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfsub.s $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfsub.s $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @fsub_v2f64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: fsub_v2f64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vfsub.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vfsub.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
144 changes: 72 additions & 72 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/icmp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -19,9 +19,9 @@ define void @v16i8_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v16i8_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i8>, ptr %a0
Expand Down Expand Up @@ -49,9 +49,9 @@ define void @v8i16_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v8i16_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -79,9 +79,9 @@ define void @v4i32_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v4i32_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i32>, ptr %a0
Expand Down Expand Up @@ -109,9 +109,9 @@ define void @v2i64_icmp_eq_imm(ptr %res, ptr %a0) nounwind {
define void @v2i64_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_eq:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand Down Expand Up @@ -140,9 +140,9 @@ define void @v16i8_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v16i8_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i8>, ptr %a0
Expand Down Expand Up @@ -170,9 +170,9 @@ define void @v8i16_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v8i16_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -200,9 +200,9 @@ define void @v4i32_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v4i32_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i32>, ptr %a0
Expand Down Expand Up @@ -230,9 +230,9 @@ define void @v2i64_icmp_sle_imm(ptr %res, ptr %a0) nounwind {
define void @v2i64_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_sle:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand Down Expand Up @@ -261,9 +261,9 @@ define void @v16i8_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v16i8_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.bu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i8>, ptr %a0
Expand Down Expand Up @@ -291,9 +291,9 @@ define void @v8i16_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v8i16_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.hu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -321,9 +321,9 @@ define void @v4i32_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v4i32_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.wu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i32>, ptr %a0
Expand Down Expand Up @@ -351,9 +351,9 @@ define void @v2i64_icmp_ule_imm(ptr %res, ptr %a0) nounwind {
define void @v2i64_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_ule:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsle.du $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsle.du $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand Down Expand Up @@ -382,9 +382,9 @@ define void @v16i8_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v16i8_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i8>, ptr %a0
Expand Down Expand Up @@ -412,9 +412,9 @@ define void @v8i16_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v8i16_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -442,9 +442,9 @@ define void @v4i32_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v4i32_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i32>, ptr %a0
Expand Down Expand Up @@ -472,9 +472,9 @@ define void @v2i64_icmp_slt_imm(ptr %res, ptr %a0) nounwind {
define void @v2i64_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_slt:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand Down Expand Up @@ -503,9 +503,9 @@ define void @v16i8_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v16i8_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.bu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <16 x i8>, ptr %a0
Expand Down Expand Up @@ -533,9 +533,9 @@ define void @v8i16_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v8i16_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.hu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -563,9 +563,9 @@ define void @v4i32_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v4i32_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.wu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <4 x i32>, ptr %a0
Expand Down Expand Up @@ -593,9 +593,9 @@ define void @v2i64_icmp_ult_imm(ptr %res, ptr %a0) nounwind {
define void @v2i64_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_ult:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vslt.du $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vslt.du $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand All @@ -610,9 +610,9 @@ define void @v2i64_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v16i8_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v16i8_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.b $vr0, $vr0, $vr1
; CHECK-NEXT: vxori.b $vr0, $vr0, 255
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
Expand All @@ -627,9 +627,9 @@ define void @v16i8_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v8i16_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v8i16_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.h $vr0, $vr0, $vr1
; CHECK-NEXT: vrepli.b $vr1, -1
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
Expand All @@ -645,9 +645,9 @@ define void @v8i16_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v4i32_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v4i32_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.w $vr0, $vr0, $vr1
; CHECK-NEXT: vrepli.b $vr1, -1
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
Expand All @@ -663,9 +663,9 @@ define void @v4i32_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @v2i64_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: v2i64_icmp_ne:
; CHECK: # %bb.0:
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vseq.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vseq.d $vr0, $vr0, $vr1
; CHECK-NEXT: vrepli.b $vr1, -1
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/insertelement.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -56,10 +56,10 @@ define void @insert_2xi64(ptr %src, ptr %dst, i64 %ins) nounwind {
define void @insert_4xfloat(ptr %src, ptr %dst, float %ins) nounwind {
; CHECK-LABEL: insert_4xfloat:
; CHECK: # %bb.0:
; CHECK-NEXT: movfr2gr.s $a2, $fa0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vinsgr2vr.w $vr0, $a2, 1
; CHECK-NEXT: vst $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a0, 0
; CHECK-NEXT: movfr2gr.s $a0, $fa0
; CHECK-NEXT: vinsgr2vr.w $vr1, $a0, 1
; CHECK-NEXT: vst $vr1, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <4 x float>, ptr %src
%v_new = insertelement <4 x float> %v, float %ins, i32 1
Expand All @@ -70,10 +70,10 @@ define void @insert_4xfloat(ptr %src, ptr %dst, float %ins) nounwind {
define void @insert_2xdouble(ptr %src, ptr %dst, double %ins) nounwind {
; CHECK-LABEL: insert_2xdouble:
; CHECK: # %bb.0:
; CHECK-NEXT: movfr2gr.d $a2, $fa0
; CHECK-NEXT: vld $vr0, $a0, 0
; CHECK-NEXT: vinsgr2vr.d $vr0, $a2, 1
; CHECK-NEXT: vst $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a0, 0
; CHECK-NEXT: movfr2gr.d $a0, $fa0
; CHECK-NEXT: vinsgr2vr.d $vr1, $a0, 1
; CHECK-NEXT: vst $vr1, $a1, 0
; CHECK-NEXT: ret
%v = load volatile <2 x double>, ptr %src
%v_new = insertelement <2 x double> %v, double %ins, i32 1
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/lshr.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @lshr_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsrl.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsrl.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @lshr_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsrl.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsrl.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @lshr_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsrl.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsrl.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @lshr_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: lshr_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsrl.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsrl.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/mul.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @mul_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmul.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmul.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @mul_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmul.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmul.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @mul_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmul.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmul.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @mul_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mul_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmul.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmul.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/or.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @or_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @or_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @or_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @or_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: or_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sdiv.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @sdiv_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @sdiv_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @sdiv_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @sdiv_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sdiv_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/shl.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @shl_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsll.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsll.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @shl_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsll.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsll.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @shl_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsll.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsll.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @shl_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: shl_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsll.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsll.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/sub.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @sub_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsub.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsub.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @sub_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsub.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsub.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @sub_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsub.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsub.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @sub_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: sub_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vsub.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vsub.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/udiv.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @udiv_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.bu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @udiv_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.hu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @udiv_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.wu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @udiv_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: udiv_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vdiv.du $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vdiv.du $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/ir-instruction/xor.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @xor_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vxor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -20,9 +20,9 @@ entry:
define void @xor_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vxor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -36,9 +36,9 @@ entry:
define void @xor_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vxor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -52,9 +52,9 @@ entry:
define void @xor_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: xor_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vxor.v $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vxor.v $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
48 changes: 24 additions & 24 deletions llvm/test/CodeGen/LoongArch/lsx/mulh.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,9 @@
define void @mulhs_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.b $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.b $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -24,9 +24,9 @@ entry:
define void @mulhu_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v16i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.bu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.bu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -44,9 +44,9 @@ entry:
define void @mulhs_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.h $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.h $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -64,9 +64,9 @@ entry:
define void @mulhu_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v8i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.hu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.hu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -84,9 +84,9 @@ entry:
define void @mulhs_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.w $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.w $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -104,9 +104,9 @@ entry:
define void @mulhu_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v4i32:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.wu $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.wu $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -124,9 +124,9 @@ entry:
define void @mulhs_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhs_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.d $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.d $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand All @@ -144,9 +144,9 @@ entry:
define void @mulhu_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: mulhu_v2i64:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a2, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vmuh.du $vr0, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: vmuh.du $vr0, $vr0, $vr1
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
entry:
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/LoongArch/lsx/vselect.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -34,11 +34,11 @@ define void @select_v16i8(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @select_v8i16(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: select_v8i16:
; CHECK: # %bb.0:
; CHECK-NEXT: lu12i.w $a3, -16
; CHECK-NEXT: vreplgr2vr.w $vr0, $a3
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vld $vr2, $a2, 0
; CHECK-NEXT: vbitsel.v $vr0, $vr2, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: lu12i.w $a1, -16
; CHECK-NEXT: vreplgr2vr.w $vr2, $a1
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <8 x i16>, ptr %a0
Expand Down Expand Up @@ -69,12 +69,12 @@ define void @select_v4i32(ptr %res, ptr %a0, ptr %a1) nounwind {
define void @select_v2i64(ptr %res, ptr %a0, ptr %a1) nounwind {
; CHECK-LABEL: select_v2i64:
; CHECK: # %bb.0:
; CHECK-NEXT: pcalau12i $a3, %pc_hi20(.LCPI4_0)
; CHECK-NEXT: addi.d $a3, $a3, %pc_lo12(.LCPI4_0)
; CHECK-NEXT: vld $vr0, $a3, 0
; CHECK-NEXT: vld $vr1, $a1, 0
; CHECK-NEXT: vld $vr2, $a2, 0
; CHECK-NEXT: vbitsel.v $vr0, $vr2, $vr1, $vr0
; CHECK-NEXT: vld $vr0, $a1, 0
; CHECK-NEXT: vld $vr1, $a2, 0
; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI4_0)
; CHECK-NEXT: addi.d $a1, $a1, %pc_lo12(.LCPI4_0)
; CHECK-NEXT: vld $vr2, $a1, 0
; CHECK-NEXT: vbitsel.v $vr0, $vr1, $vr0, $vr2
; CHECK-NEXT: vst $vr0, $a0, 0
; CHECK-NEXT: ret
%v0 = load <2 x i64>, ptr %a0
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/LoongArch/preferred-alignments.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -8,21 +8,21 @@ define signext i32 @sum(ptr noalias nocapture noundef readonly %0, i32 noundef s
; LA464-NEXT: ori $a2, $zero, 1
; LA464-NEXT: blt $a1, $a2, .LBB0_4
; LA464-NEXT: # %bb.1:
; LA464-NEXT: bstrpick.d $a2, $a1, 31, 0
; LA464-NEXT: move $a1, $zero
; LA464-NEXT: move $a2, $zero
; LA464-NEXT: bstrpick.d $a1, $a1, 31, 0
; LA464-NEXT: .p2align 4, , 16
; LA464-NEXT: .LBB0_2: # =>This Inner Loop Header: Depth=1
; LA464-NEXT: ld.w $a3, $a0, 0
; LA464-NEXT: add.d $a1, $a3, $a1
; LA464-NEXT: add.d $a2, $a3, $a2
; LA464-NEXT: addi.d $a1, $a1, -1
; LA464-NEXT: addi.d $a0, $a0, 4
; LA464-NEXT: addi.d $a2, $a2, -1
; LA464-NEXT: bnez $a2, .LBB0_2
; LA464-NEXT: bnez $a1, .LBB0_2
; LA464-NEXT: # %bb.3:
; LA464-NEXT: addi.w $a0, $a1, 0
; LA464-NEXT: addi.w $a0, $a2, 0
; LA464-NEXT: ret
; LA464-NEXT: .LBB0_4:
; LA464-NEXT: move $a1, $zero
; LA464-NEXT: addi.w $a0, $a1, 0
; LA464-NEXT: move $a2, $zero
; LA464-NEXT: addi.w $a0, $a2, 0
; LA464-NEXT: ret
%3 = icmp sgt i32 %1, 0
br i1 %3, label %4, label %6
Expand Down
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