50 changes: 50 additions & 0 deletions llvm/test/CodeGen/RISCV/calling-conv-ilp32e.ll
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10 changes: 10 additions & 0 deletions llvm/test/CodeGen/RISCV/frame-info.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ define void @trivial() {
; RV32-WITHFP-NEXT: .cfi_offset s0, -8
; RV32-WITHFP-NEXT: addi s0, sp, 16
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-NEXT: .cfi_def_cfa sp, 16
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: .cfi_restore ra
Expand All @@ -54,6 +55,7 @@ define void @trivial() {
; RV64-WITHFP-NEXT: .cfi_offset s0, -16
; RV64-WITHFP-NEXT: addi s0, sp, 16
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-NEXT: .cfi_def_cfa sp, 16
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: .cfi_restore ra
Expand All @@ -80,6 +82,7 @@ define void @trivial() {
; RV32-WITHFP-DISABLESW-NEXT: .cfi_offset s0, -8
; RV32-WITHFP-DISABLESW-NEXT: addi s0, sp, 16
; RV32-WITHFP-DISABLESW-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV32-WITHFP-DISABLESW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand All @@ -98,6 +101,7 @@ define void @trivial() {
; RV64-WITHFP-DISABLESW-NEXT: .cfi_offset s0, -16
; RV64-WITHFP-DISABLESW-NEXT: addi s0, sp, 16
; RV64-WITHFP-DISABLESW-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV64-WITHFP-DISABLESW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -375,6 +379,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV32-WITHFP-NEXT: addi s0, sp, 16
; RV32-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV32-WITHFP-NEXT: call callee2
; RV32-WITHFP-NEXT: .cfi_def_cfa sp, 16
; RV32-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-NEXT: .cfi_restore ra
Expand All @@ -399,6 +404,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV64-WITHFP-NEXT: addi s0, sp, 16
; RV64-WITHFP-NEXT: .cfi_def_cfa s0, 0
; RV64-WITHFP-NEXT: call callee2
; RV64-WITHFP-NEXT: .cfi_def_cfa sp, 16
; RV64-WITHFP-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -469,6 +475,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV32-WITHFP-DISABLESW-NEXT: andi a0, a0, 1
; RV32-WITHFP-DISABLESW-NEXT: beqz a0, .LBB2_2
; RV32-WITHFP-DISABLESW-NEXT: # %bb.1: # %blue_pill
; RV32-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV32-WITHFP-DISABLESW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand All @@ -479,6 +486,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV32-WITHFP-DISABLESW-NEXT: .LBB2_2: # %red_pill
; RV32-WITHFP-DISABLESW-NEXT: .cfi_restore_state
; RV32-WITHFP-DISABLESW-NEXT: call callee2
; RV32-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV32-WITHFP-DISABLESW-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand All @@ -501,6 +509,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV64-WITHFP-DISABLESW-NEXT: andi a0, a0, 1
; RV64-WITHFP-DISABLESW-NEXT: beqz a0, .LBB2_2
; RV64-WITHFP-DISABLESW-NEXT: # %bb.1: # %blue_pill
; RV64-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV64-WITHFP-DISABLESW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand All @@ -511,6 +520,7 @@ define void @branch_and_tail_call(i1 %a) {
; RV64-WITHFP-DISABLESW-NEXT: .LBB2_2: # %red_pill
; RV64-WITHFP-DISABLESW-NEXT: .cfi_restore_state
; RV64-WITHFP-DISABLESW-NEXT: call callee2
; RV64-WITHFP-DISABLESW-NEXT: .cfi_def_cfa sp, 16
; RV64-WITHFP-DISABLESW-NEXT: ld ra, 8(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: ld s0, 0(sp) # 8-byte Folded Reload
; RV64-WITHFP-DISABLESW-NEXT: .cfi_restore ra
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/RISCV/large-stack.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,7 @@ define void @test() {
; RV32I-WITHFP-NEXT: lui a0, 74565
; RV32I-WITHFP-NEXT: addi a0, a0, -352
; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -117,7 +117,7 @@ define void @test_emergency_spill_slot(i32 %a) {
; RV32I-WITHFP-NEXT: lui a0, 97
; RV32I-WITHFP-NEXT: addi a0, a0, 688
; RV32I-WITHFP-NEXT: add sp, sp, a0
; RV32I-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; RV32I-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; RV32I-WITHFP-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-WITHFP-NEXT: lw s1, 2020(sp) # 4-byte Folded Reload
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/RISCV/local-stack-slot-allocation.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -133,7 +133,7 @@ define void @frame_pointer() "frame-pointer"="all" {
; RV32I-NEXT: lbu a0, -1960(s0)
; RV32I-NEXT: sb a0, -1960(s0)
; RV32I-NEXT: addi sp, sp, 480
; RV32I-NEXT: .cfi_def_cfa_offset 2032
; RV32I-NEXT: .cfi_def_cfa sp, 2032
; RV32I-NEXT: lw ra, 2028(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 2024(sp) # 4-byte Folded Reload
; RV32I-NEXT: .cfi_restore ra
Expand All @@ -157,7 +157,7 @@ define void @frame_pointer() "frame-pointer"="all" {
; RV64I-NEXT: lbu a1, 0(a0)
; RV64I-NEXT: sb a1, 0(a0)
; RV64I-NEXT: addi sp, sp, 496
; RV64I-NEXT: .cfi_def_cfa_offset 2032
; RV64I-NEXT: .cfi_def_cfa sp, 2032
; RV64I-NEXT: ld ra, 2024(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 2016(sp) # 8-byte Folded Reload
; RV64I-NEXT: .cfi_restore ra
Expand Down
6 changes: 6 additions & 0 deletions llvm/test/CodeGen/RISCV/push-pop-popret.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3369,6 +3369,7 @@ define i32 @use_fp(i32 %x) {
; RV32IZCMP-NEXT: mv a0, s0
; RV32IZCMP-NEXT: call bar
; RV32IZCMP-NEXT: mv a0, s1
; RV32IZCMP-NEXT: .cfi_def_cfa sp, 32
; RV32IZCMP-NEXT: cm.pop {ra, s0-s1}, 32
; RV32IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV32IZCMP-NEXT: .cfi_restore ra
Expand All @@ -3390,6 +3391,7 @@ define i32 @use_fp(i32 %x) {
; RV64IZCMP-NEXT: mv a0, s0
; RV64IZCMP-NEXT: call bar
; RV64IZCMP-NEXT: mv a0, s1
; RV64IZCMP-NEXT: .cfi_def_cfa sp, 48
; RV64IZCMP-NEXT: cm.pop {ra, s0-s1}, 48
; RV64IZCMP-NEXT: .cfi_def_cfa_offset 0
; RV64IZCMP-NEXT: .cfi_restore ra
Expand All @@ -3411,6 +3413,7 @@ define i32 @use_fp(i32 %x) {
; RV32IZCMP-SR-NEXT: mv a0, s0
; RV32IZCMP-SR-NEXT: call bar
; RV32IZCMP-SR-NEXT: mv a0, s1
; RV32IZCMP-SR-NEXT: .cfi_def_cfa sp, 32
; RV32IZCMP-SR-NEXT: cm.pop {ra, s0-s1}, 32
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 0
; RV32IZCMP-SR-NEXT: .cfi_restore ra
Expand All @@ -3432,6 +3435,7 @@ define i32 @use_fp(i32 %x) {
; RV64IZCMP-SR-NEXT: mv a0, s0
; RV64IZCMP-SR-NEXT: call bar
; RV64IZCMP-SR-NEXT: mv a0, s1
; RV64IZCMP-SR-NEXT: .cfi_def_cfa sp, 48
; RV64IZCMP-SR-NEXT: cm.pop {ra, s0-s1}, 48
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 0
; RV64IZCMP-SR-NEXT: .cfi_restore ra
Expand All @@ -3456,6 +3460,7 @@ define i32 @use_fp(i32 %x) {
; RV32I-NEXT: mv a0, s0
; RV32I-NEXT: call bar
; RV32I-NEXT: mv a0, s1
; RV32I-NEXT: .cfi_def_cfa sp, 16
; RV32I-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; RV32I-NEXT: lw s1, 4(sp) # 4-byte Folded Reload
Expand Down Expand Up @@ -3483,6 +3488,7 @@ define i32 @use_fp(i32 %x) {
; RV64I-NEXT: mv a0, s0
; RV64I-NEXT: call bar
; RV64I-NEXT: mv a0, s1
; RV64I-NEXT: .cfi_def_cfa sp, 32
; RV64I-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; RV64I-NEXT: ld s1, 8(sp) # 8-byte Folded Reload
Expand Down
2 changes: 2 additions & 0 deletions llvm/test/CodeGen/RISCV/vararg-ilp32e.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,7 @@ define i32 @caller(i32 %a) {
; ILP32E-WITHFP-NEXT: li a1, 0
; ILP32E-WITHFP-NEXT: call va_double
; ILP32E-WITHFP-NEXT: mv a0, s1
; ILP32E-WITHFP-NEXT: .cfi_def_cfa sp, 12
; ILP32E-WITHFP-NEXT: lw ra, 8(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: lw s0, 4(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: lw s1, 0(sp) # 4-byte Folded Reload
Expand Down Expand Up @@ -127,6 +128,7 @@ define void @va_double(i32 %n, ...) {
; ILP32E-WITHFP-NEXT: call __eqdf2
; ILP32E-WITHFP-NEXT: bnez a0, .LBB1_2
; ILP32E-WITHFP-NEXT: # %bb.1: # %if.end
; ILP32E-WITHFP-NEXT: .cfi_def_cfa sp, 36
; ILP32E-WITHFP-NEXT: lw ra, 8(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: lw s0, 4(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: .cfi_restore ra
Expand Down
12 changes: 8 additions & 4 deletions llvm/test/CodeGen/RISCV/vararg.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,7 @@ define i32 @va1(ptr %fmt, ...) {
; ILP32-ILP32F-WITHFP-NEXT: sw a4, 16(s0)
; ILP32-ILP32F-WITHFP-NEXT: addi a1, s0, 8
; ILP32-ILP32F-WITHFP-NEXT: sw a1, -12(s0)
; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa sp, 48
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 12(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 8(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -148,6 +149,7 @@ define i32 @va1(ptr %fmt, ...) {
; ILP32E-WITHFP-NEXT: sw a4, 16(s0)
; ILP32E-WITHFP-NEXT: addi a1, s0, 8
; ILP32E-WITHFP-NEXT: sw a1, -12(s0)
; ILP32E-WITHFP-NEXT: .cfi_def_cfa sp, 36
; ILP32E-WITHFP-NEXT: lw ra, 8(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: lw s0, 4(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -194,6 +196,7 @@ define i32 @va1(ptr %fmt, ...) {
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a2, 16(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a3, 24(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: sd a4, 32(s0)
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa sp, 96
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 24(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 16(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -236,6 +239,7 @@ define i32 @va1(ptr %fmt, ...) {
; LP64E-WITHFP-NEXT: sd a2, 16(s0)
; LP64E-WITHFP-NEXT: sd a3, 24(s0)
; LP64E-WITHFP-NEXT: sd a4, 32(s0)
; LP64E-WITHFP-NEXT: .cfi_def_cfa sp, 72
; LP64E-WITHFP-NEXT: ld ra, 16(sp) # 8-byte Folded Reload
; LP64E-WITHFP-NEXT: ld s0, 8(sp) # 8-byte Folded Reload
; LP64E-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -2868,7 +2872,7 @@ define i32 @va_large_stack(ptr %fmt, ...) {
; ILP32-ILP32F-WITHFP-NEXT: lui a1, 24414
; ILP32-ILP32F-WITHFP-NEXT: addi a1, a1, -1728
; ILP32-ILP32F-WITHFP-NEXT: add sp, sp, a1
; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; ILP32-ILP32F-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; ILP32-ILP32F-WITHFP-NEXT: lw ra, 1996(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: lw s0, 1992(sp) # 4-byte Folded Reload
; ILP32-ILP32F-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -2973,7 +2977,7 @@ define i32 @va_large_stack(ptr %fmt, ...) {
; ILP32E-WITHFP-NEXT: lui a1, 24414
; ILP32E-WITHFP-NEXT: addi a1, a1, -1748
; ILP32E-WITHFP-NEXT: add sp, sp, a1
; ILP32E-WITHFP-NEXT: .cfi_def_cfa_offset 2044
; ILP32E-WITHFP-NEXT: .cfi_def_cfa sp, 2044
; ILP32E-WITHFP-NEXT: lw ra, 2016(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: lw s0, 2012(sp) # 4-byte Folded Reload
; ILP32E-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -3050,7 +3054,7 @@ define i32 @va_large_stack(ptr %fmt, ...) {
; LP64-LP64F-LP64D-WITHFP-NEXT: lui a1, 24414
; LP64-LP64F-LP64D-WITHFP-NEXT: addiw a1, a1, -1680
; LP64-LP64F-LP64D-WITHFP-NEXT: add sp, sp, a1
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa_offset 2032
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_def_cfa sp, 2032
; LP64-LP64F-LP64D-WITHFP-NEXT: ld ra, 1960(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: ld s0, 1952(sp) # 8-byte Folded Reload
; LP64-LP64F-LP64D-WITHFP-NEXT: .cfi_restore ra
Expand Down Expand Up @@ -3119,7 +3123,7 @@ define i32 @va_large_stack(ptr %fmt, ...) {
; LP64E-WITHFP-NEXT: lui a1, 24414
; LP64E-WITHFP-NEXT: addiw a1, a1, -1704
; LP64E-WITHFP-NEXT: add sp, sp, a1
; LP64E-WITHFP-NEXT: .cfi_def_cfa_offset 2040
; LP64E-WITHFP-NEXT: .cfi_def_cfa sp, 2040
; LP64E-WITHFP-NEXT: ld ra, 1984(sp) # 8-byte Folded Reload
; LP64E-WITHFP-NEXT: ld s0, 1976(sp) # 8-byte Folded Reload
; LP64E-WITHFP-NEXT: .cfi_restore ra
Expand Down