241 changes: 213 additions & 28 deletions llvm/test/CodeGen/X86/test-vs-bittest.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -49,6 +49,30 @@ no:
ret void
}

define void @test64_pgso(i64 inreg %x) !prof !14 {
; CHECK-LABEL: test64_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jb .LBB2_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB2_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i64 %x, 2048
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no

yes:
call void @bar()
ret void
no:
ret void
}

; This test is identical to test64 above with only the destination of the br
; reversed. This somehow causes the two functions to get slightly different
; initial IR. One has an extra invert of the setcc. This previous caused one
Expand All @@ -60,10 +84,10 @@ define void @test64_2(i64 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: testl $2048, %edi # imm = 0x800
; CHECK-NEXT: je .LBB2_2
; CHECK-NEXT: je .LBB3_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB2_2: # %no
; CHECK-NEXT: .LBB3_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -84,10 +108,34 @@ define void @test64_optsize_2(i64 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB3_2
; CHECK-NEXT: jae .LBB4_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB3_2: # %no
; CHECK-NEXT: .LBB4_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i64 %x, 2048
%s = icmp eq i64 %t, 0
br i1 %s, label %no, label %yes

yes:
call void @bar()
ret void
no:
ret void
}

define void @test64_pgso_2(i64 inreg %x) !prof !14 {
; CHECK-LABEL: test64_pgso_2:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB5_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB5_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -108,10 +156,10 @@ define void @test64_3(i64 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jb .LBB4_2
; CHECK-NEXT: jb .LBB6_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB4_2: # %no
; CHECK-NEXT: .LBB6_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -132,10 +180,34 @@ define void @test64_optsize_3(i64 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jb .LBB5_2
; CHECK-NEXT: jb .LBB7_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB5_2: # %no
; CHECK-NEXT: .LBB7_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i64 %x, 4294967296
%s = icmp eq i64 %t, 0
br i1 %s, label %yes, label %no

yes:
call void @bar()
ret void
no:
ret void
}

define void @test64_pgso_3(i64 inreg %x) !prof !14 {
; CHECK-LABEL: test64_pgso_3:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jb .LBB8_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB8_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -156,10 +228,10 @@ define void @test64_4(i64 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jae .LBB6_2
; CHECK-NEXT: jae .LBB9_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB6_2: # %no
; CHECK-NEXT: .LBB9_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -180,10 +252,34 @@ define void @test64_optsize_4(i64 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jae .LBB7_2
; CHECK-NEXT: jae .LBB10_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB7_2: # %no
; CHECK-NEXT: .LBB10_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i64 %x, 4294967296
%s = icmp eq i64 %t, 0
br i1 %s, label %no, label %yes

yes:
call void @bar()
ret void
no:
ret void
}

define void @test64_pgso_4(i64 inreg %x) !prof !14 {
; CHECK-LABEL: test64_pgso_4:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btq $32, %rdi
; CHECK-NEXT: jae .LBB11_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB11_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -204,10 +300,10 @@ define void @test32(i32 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: testl $2048, %edi # imm = 0x800
; CHECK-NEXT: jne .LBB8_2
; CHECK-NEXT: jne .LBB12_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB8_2: # %no
; CHECK-NEXT: .LBB12_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -228,10 +324,10 @@ define void @test32_optsize(i32 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jb .LBB9_2
; CHECK-NEXT: jb .LBB13_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB9_2: # %no
; CHECK-NEXT: .LBB13_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -252,10 +348,10 @@ define void @test32_2(i32 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: testl $2048, %edi # imm = 0x800
; CHECK-NEXT: je .LBB10_2
; CHECK-NEXT: je .LBB14_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB10_2: # %no
; CHECK-NEXT: .LBB14_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -276,10 +372,34 @@ define void @test32_optsize_2(i32 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB11_2
; CHECK-NEXT: jae .LBB15_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB11_2: # %no
; CHECK-NEXT: .LBB15_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i32 %x, 2048
%s = icmp eq i32 %t, 0
br i1 %s, label %no, label %yes

yes:
call void @bar()
ret void
no:
ret void
}

define void @test32_pgso_2(i32 inreg %x) !prof !14 {
; CHECK-LABEL: test32_pgso_2:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB16_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB16_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -300,10 +420,10 @@ define void @test16(i16 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: testl $2048, %edi # imm = 0x800
; CHECK-NEXT: jne .LBB12_2
; CHECK-NEXT: jne .LBB17_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB12_2: # %no
; CHECK-NEXT: .LBB17_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -324,10 +444,34 @@ define void @test16_optsize(i16 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jb .LBB13_2
; CHECK-NEXT: jb .LBB18_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB13_2: # %no
; CHECK-NEXT: .LBB18_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i16 %x, 2048
%s = icmp eq i16 %t, 0
br i1 %s, label %yes, label %no

yes:
call void @bar()
ret void
no:
ret void
}

define void @test16_pgso(i16 inreg %x) !prof !14 {
; CHECK-LABEL: test16_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jb .LBB19_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB19_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -348,10 +492,10 @@ define void @test16_2(i16 inreg %x) {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: testl $2048, %edi # imm = 0x800
; CHECK-NEXT: je .LBB14_2
; CHECK-NEXT: je .LBB20_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB14_2: # %no
; CHECK-NEXT: .LBB20_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand All @@ -372,10 +516,34 @@ define void @test16_optsize_2(i16 inreg %x) optsize {
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB15_2
; CHECK-NEXT: jae .LBB21_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB15_2: # %no
; CHECK-NEXT: .LBB21_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
%t = and i16 %x, 2048
%s = icmp eq i16 %t, 0
br i1 %s, label %no, label %yes

yes:
call void @bar()
ret void
no:
ret void
}

define void @test16_pgso_2(i16 inreg %x) !prof !14 {
; CHECK-LABEL: test16_pgso_2:
; CHECK: # %bb.0:
; CHECK-NEXT: pushq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: btl $11, %edi
; CHECK-NEXT: jae .LBB22_2
; CHECK-NEXT: # %bb.1: # %yes
; CHECK-NEXT: callq bar
; CHECK-NEXT: .LBB22_2: # %no
; CHECK-NEXT: popq %rax
; CHECK-NEXT: .cfi_def_cfa_offset 8
; CHECK-NEXT: retq
Expand Down Expand Up @@ -512,3 +680,20 @@ define i32 @setcc_is_bit_set(i32 %x) {
}

declare void @bar()

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
66 changes: 66 additions & 0 deletions llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2002,6 +2002,56 @@ define <8 x i32> @shuffle_v8i32_0zzzzzzz_optsize(<8 x i32> %a) optsize {
ret <8 x i32> %b
}

define <4 x double> @shuffle_v4f64_0zzz_pgso(<4 x double> %a) !prof !14 {
; ALL-LABEL: shuffle_v4f64_0zzz_pgso:
; ALL: # %bb.0:
; ALL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; ALL-NEXT: retq
%b = shufflevector <4 x double> %a, <4 x double> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
ret <4 x double> %b
}

define <4 x i64> @shuffle_v4i64_0zzz_pgso(<4 x i64> %a) !prof !14 {
; ALL-LABEL: shuffle_v4i64_0zzz_pgso:
; ALL: # %bb.0:
; ALL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero
; ALL-NEXT: retq
%b = shufflevector <4 x i64> %a, <4 x i64> zeroinitializer, <4 x i32> <i32 0, i32 5, i32 6, i32 7>
ret <4 x i64> %b
}

define <8 x float> @shuffle_v8f32_0zzzzzzz_pgso(<8 x float> %a) !prof !14 {
; AVX1OR2-LABEL: shuffle_v8f32_0zzzzzzz_pgso:
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX1OR2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v8f32_0zzzzzzz_pgso:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512VL-NEXT: retq
%b = shufflevector <8 x float> %a, <8 x float> zeroinitializer, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
ret <8 x float> %b
}

define <8 x i32> @shuffle_v8i32_0zzzzzzz_pgso(<8 x i32> %a) !prof !14 {
; AVX1OR2-LABEL: shuffle_v8i32_0zzzzzzz_pgso:
; AVX1OR2: # %bb.0:
; AVX1OR2-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX1OR2-NEXT: vblendps {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX1OR2-NEXT: retq
;
; AVX512VL-LABEL: shuffle_v8i32_0zzzzzzz_pgso:
; AVX512VL: # %bb.0:
; AVX512VL-NEXT: vxorps %xmm1, %xmm1, %xmm1
; AVX512VL-NEXT: vmovss {{.*#+}} xmm0 = xmm0[0],xmm1[1,2,3]
; AVX512VL-NEXT: retq
%b = shufflevector <8 x i32> %a, <8 x i32> zeroinitializer, <8 x i32> <i32 0, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
ret <8 x i32> %b
}

define <4 x i64> @unpckh_v4i64(<4 x i64> %x, <4 x i64> %y) {
; ALL-LABEL: unpckh_v4i64:
; ALL: # %bb.0:
Expand All @@ -2022,3 +2072,19 @@ define <4 x double> @unpckh_v4f64(<4 x double> %x, <4 x double> %y) {
ret <4 x double> %unpckh
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
137 changes: 137 additions & 0 deletions llvm/test/CodeGen/X86/x86-64-bittest-logic.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -240,3 +240,140 @@ define i64 @xor4_optsize(i64 %x) optsize {
%a = xor i64 %x, 9223372036854775808 ; toggle bit 63
ret i64 %a
}

define i64 @and1_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: and1_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btrq $31, %rax
; CHECK-NEXT: retq
%a = and i64 %x, 18446744071562067967 ; clear bit 31
ret i64 %a
}

define i64 @and2_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: and2_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btrq $32, %rax
; CHECK-NEXT: retq
%a = and i64 %x, 18446744069414584319 ; clear bit 32
ret i64 %a
}

define i64 @and3_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: and3_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btrq $62, %rax
; CHECK-NEXT: retq
%a = and i64 %x, 13835058055282163711 ; clear bit 62
ret i64 %a
}

define i64 @and4_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: and4_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btrq $63, %rax
; CHECK-NEXT: retq
%a = and i64 %x, 9223372036854775807 ; clear bit 63
ret i64 %a
}

define i64 @or1_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: or1_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btsq $31, %rax
; CHECK-NEXT: retq
%a = or i64 %x, 2147483648 ; set bit 31
ret i64 %a
}

define i64 @or2_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: or2_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btsq $32, %rax
; CHECK-NEXT: retq
%a = or i64 %x, 4294967296 ; set bit 32
ret i64 %a
}

define i64 @or3_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: or3_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btsq $62, %rax
; CHECK-NEXT: retq
%a = or i64 %x, 4611686018427387904 ; set bit 62
ret i64 %a
}

define i64 @or4_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: or4_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btsq $63, %rax
; CHECK-NEXT: retq
%a = or i64 %x, 9223372036854775808 ; set bit 63
ret i64 %a
}

define i64 @xor1_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: xor1_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btcq $31, %rax
; CHECK-NEXT: retq
%a = xor i64 %x, 2147483648 ; toggle bit 31
ret i64 %a
}

define i64 @xor2_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: xor2_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btcq $32, %rax
; CHECK-NEXT: retq
%a = xor i64 %x, 4294967296 ; toggle bit 32
ret i64 %a
}

define i64 @xor3_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: xor3_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btcq $62, %rax
; CHECK-NEXT: retq
%a = xor i64 %x, 4611686018427387904 ; toggle bit 62
ret i64 %a
}

define i64 @xor4_pgso(i64 %x) !prof !14 {
; CHECK-LABEL: xor4_pgso:
; CHECK: # %bb.0:
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: btcq $63, %rax
; CHECK-NEXT: retq
%a = xor i64 %x, 9223372036854775808 ; toggle bit 63
ret i64 %a
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
29 changes: 29 additions & 0 deletions llvm/test/CodeGen/X86/x86-64-double-shifts-Oz-Os-O2.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -50,6 +50,19 @@ entry:
ret i64 %or
}

define i64 @_Z8lshift11mm_pgso(i64 %a, i64 %b) !prof !14 {
; CHECK-LABEL: _Z8lshift11mm_pgso:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: shldq $11, %rsi, %rax
; CHECK-NEXT: retq
entry:
%shl = shl i64 %a, 11
%shr = lshr i64 %b, 53
%or = or i64 %shr, %shl
ret i64 %or
}

attributes #1 = { nounwind optsize readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

; clang -O2 -c test2.cpp -emit-llvm -S
Expand Down Expand Up @@ -78,3 +91,19 @@ entry:

attributes #2= { nounwind readnone uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
53 changes: 53 additions & 0 deletions llvm/test/CodeGen/X86/x86-repmov-copy-eflags.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -25,6 +25,26 @@ while.end: ; preds = %while.body
ret void
}

define void @f_pgso(i8* %p, i8* %q, i32* inalloca nocapture %unused) !prof !14 {
entry:
%g = alloca %struct.T, align 8
%r = alloca i32, align 8
store i32 0, i32* %r, align 4
call void @llvm.memcpy.p0i8.p0i8.i32(i8* align 8 %p, i8* align 8 %q, i32 24, i1 false)
br label %while.body

while.body: ; preds = %while.body, %entry
%load = load i32, i32* %r, align 4
%dec = add nsw i32 %load, -1
store i32 %dec, i32* %r, align 4
call void @g(%struct.T* %g)
%tobool = icmp eq i32 %dec, 0
br i1 %tobool, label %while.end, label %while.body

while.end: ; preds = %while.body
ret void
}

; Function Attrs: argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture readonly, i32, i1) #1

Expand All @@ -46,5 +66,38 @@ declare void @g(%struct.T*)
; CHECK: testb %[[NE_REG]], %[[NE_REG]]
; CHECK: jne

; CHECK-LABEL: _f_pgso:
; CHECK: pushl %ebp
; CHECK: movl %esp, %ebp
; CHECK: andl $-8, %esp
; CHECK-NOT: movl %esp, %esi
; CHECK: rep;movsl
; CHECK: leal 8(%esp), %esi

; CHECK: decl (%esp)
; CHECK: setne %[[NE_REG:.*]]
; CHECK: pushl %esi
; CHECK: calll _g
; CHECK: addl $4, %esp
; CHECK: testb %[[NE_REG]], %[[NE_REG]]
; CHECK: jne

attributes #0 = { nounwind optsize }
attributes #1 = { argmemonly nounwind }

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}
41 changes: 41 additions & 0 deletions llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -152,6 +152,30 @@ rare.1:
br label %fallthrough
}

; Negative test - opt for size
define void @test6_pgso(i1 %cond, i64* %base) !prof !14 {
; CHECK-LABEL: @test6
entry:
; CHECK: %addr = getelementptr
%addr = getelementptr inbounds i64, i64* %base, i64 5
%casted = bitcast i64* %addr to i32*
br i1 %cond, label %if.then, label %fallthrough

if.then:
; CHECK-LABEL: if.then:
; CHECK-NOT: getelementptr inbounds i8, {{.+}} 40
%v1 = load i32, i32* %casted, align 4
call void @foo(i32 %v1)
%cmp = icmp eq i32 %v1, 0
br i1 %cmp, label %rare.1, label %fallthrough

fallthrough:
ret void

rare.1:
call void @slowpath(i32 %v1, i32* %casted) cold
br label %fallthrough
}

; Make sure sinking two copies of addressing mode into different blocks works
; when there are cold paths for each.
Expand Down Expand Up @@ -278,3 +302,20 @@ BB:
store i1 false, i1* %G23
ret void
}

!llvm.module.flags = !{!0}
!0 = !{i32 1, !"ProfileSummary", !1}
!1 = !{!2, !3, !4, !5, !6, !7, !8, !9}
!2 = !{!"ProfileFormat", !"InstrProf"}
!3 = !{!"TotalCount", i64 10000}
!4 = !{!"MaxCount", i64 10}
!5 = !{!"MaxInternalCount", i64 1}
!6 = !{!"MaxFunctionCount", i64 1000}
!7 = !{!"NumCounts", i64 3}
!8 = !{!"NumFunctions", i64 3}
!9 = !{!"DetailedSummary", !10}
!10 = !{!11, !12, !13}
!11 = !{i32 10000, i64 100, i32 1}
!12 = !{i32 999000, i64 100, i32 1}
!13 = !{i32 999999, i64 1, i32 2}
!14 = !{!"function_entry_count", i64 0}