diff --git a/llvm/test/CodeGen/PowerPC/Atomics-64.ll b/llvm/test/CodeGen/PowerPC/Atomics-64.ll
diff --git a/llvm/test/CodeGen/PowerPC/BoolRetToIntTest-2.ll b/llvm/test/CodeGen/PowerPC/BoolRetToIntTest-2.ll
@@ -4,13 +4,13 @@
 ; Don't generate zero extension for the return value.
 ; CHECK-NOT: clrldi
 
-define zeroext i1 @foo(i32 signext %i, i32* %p) {
+define zeroext i1 @foo(i32 signext %i, ptr %p) {
 entry:
   %cmp = icmp eq i32 %i, 0
   br i1 %cmp, label %return, label %if.end
 
 if.end:
-  store i32 %i, i32* %p, align 4
+  store i32 %i, ptr %p, align 4
   br label %return
 
 return:

diff --git a/llvm/test/CodeGen/PowerPC/BoolRetToIntTest.ll b/llvm/test/CodeGen/PowerPC/BoolRetToIntTest.ll
@@ -11,23 +11,23 @@ entry:
 }
 
 ; CHECK-LABEL: find
-define zeroext i1 @find(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp) {
+define zeroext i1 @find(ptr readonly %begin, ptr readnone %end, ptr nocapture %hasProp) {
 entry:
-  %cmp.4 = icmp eq i8** %begin, %end
+  %cmp.4 = icmp eq ptr %begin, %end
   br i1 %cmp.4, label %cleanup, label %for.body.preheader
 
 for.body.preheader:                               ; preds = %entry
   br label %for.body
 
 for.cond:                                         ; preds = %for.body
-  %cmp = icmp eq i8** %incdec.ptr, %end
+  %cmp = icmp eq ptr %incdec.ptr, %end
   br i1 %cmp, label %cleanup.loopexit, label %for.body
 
 for.body:                                         ; preds = %for.body.preheader, %for.cond
-  %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
-  %0 = load i8*, i8** %curr.05, align 8
-  %call = tail call zeroext i1 %hasProp(i8* %0)
-  %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1
+  %curr.05 = phi ptr [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
+  %0 = load ptr, ptr %curr.05, align 8
+  %call = tail call zeroext i1 %hasProp(ptr %0)
+  %incdec.ptr = getelementptr inbounds ptr, ptr %curr.05, i64 1
   br i1 %call, label %cleanup.loopexit, label %for.cond
 
 cleanup.loopexit:                                 ; preds = %for.body, %for.cond
@@ -58,23 +58,23 @@ entry:
 }
 
 ; CHECK-LABEL: find_cont
-define void @find_cont(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp, void (i1)* nocapture %cont) {
+define void @find_cont(ptr readonly %begin, ptr readnone %end, ptr nocapture %hasProp, ptr nocapture %cont) {
 entry:
-  %cmp.4 = icmp eq i8** %begin, %end
+  %cmp.4 = icmp eq ptr %begin, %end
   br i1 %cmp.4, label %cleanup, label %for.body.preheader
 
 for.body.preheader:                               ; preds = %entry
   br label %for.body
 
 for.cond:                                         ; preds = %for.body
-  %cmp = icmp eq i8** %incdec.ptr, %end
+  %cmp = icmp eq ptr %incdec.ptr, %end
   br i1 %cmp, label %cleanup.loopexit, label %for.body
 
 for.body:                                         ; preds = %for.body.preheader, %for.cond
-  %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
-  %0 = load i8*, i8** %curr.05, align 8
-  %call = tail call zeroext i1 %hasProp(i8* %0)
-  %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1
+  %curr.05 = phi ptr [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
+  %0 = load ptr, ptr %curr.05, align 8
+  %call = tail call zeroext i1 %hasProp(ptr %0)
+  %incdec.ptr = getelementptr inbounds ptr, ptr %curr.05, i64 1
   br i1 %call, label %cleanup.loopexit, label %for.cond
 
 cleanup.loopexit:                                 ; preds = %for.body, %for.cond
@@ -92,23 +92,23 @@ cleanup:                                          ; preds = %cleanup.loopexit, %
 }
 
 ; CHECK-LABEL: find_cont_ret
-define zeroext i1 @find_cont_ret(i8** readonly %begin, i8** readnone %end, i1 (i8*)* nocapture %hasProp, void (i1)* nocapture %cont) {
+define zeroext i1 @find_cont_ret(ptr readonly %begin, ptr readnone %end, ptr nocapture %hasProp, ptr nocapture %cont) {
 entry:
-  %cmp.4 = icmp eq i8** %begin, %end
+  %cmp.4 = icmp eq ptr %begin, %end
   br i1 %cmp.4, label %cleanup, label %for.body.preheader
 
 for.body.preheader:                               ; preds = %entry
   br label %for.body
 
 for.cond:                                         ; preds = %for.body
-  %cmp = icmp eq i8** %incdec.ptr, %end
+  %cmp = icmp eq ptr %incdec.ptr, %end
   br i1 %cmp, label %cleanup.loopexit, label %for.body
 
 for.body:                                         ; preds = %for.body.preheader, %for.cond
-  %curr.05 = phi i8** [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
-  %0 = load i8*, i8** %curr.05, align 8
-  %call = tail call zeroext i1 %hasProp(i8* %0)
-  %incdec.ptr = getelementptr inbounds i8*, i8** %curr.05, i64 1
+  %curr.05 = phi ptr [ %incdec.ptr, %for.cond ], [ %begin, %for.body.preheader ]
+  %0 = load ptr, ptr %curr.05, align 8
+  %call = tail call zeroext i1 %hasProp(ptr %0)
+  %incdec.ptr = getelementptr inbounds ptr, ptr %curr.05, i64 1
   br i1 %call, label %cleanup.loopexit, label %for.cond
 
 cleanup.loopexit:                                 ; preds = %for.body, %for.cond

diff --git a/llvm/test/CodeGen/PowerPC/BreakableToken-reduced.ll b/llvm/test/CodeGen/PowerPC/BreakableToken-reduced.ll
diff --git a/llvm/test/CodeGen/PowerPC/CompareEliminationSpillIssue.ll b/llvm/test/CodeGen/PowerPC/CompareEliminationSpillIssue.ll
@@ -21,7 +21,7 @@
 ; Function Attrs: noinline nounwind
 define void @call(i64 %a) local_unnamed_addr #0 {
 entry:
-  store i64 %a, i64* @glob, align 8
+  store i64 %a, ptr @glob, align 8
   tail call void asm sideeffect "#Do Nothing", "~{memory}"()
   ret void
 }
@@ -63,9 +63,9 @@ entry:
 define signext i32 @main() local_unnamed_addr #1 {
 entry:
   %call = tail call signext i32 @test(i32 signext 10, i32 signext -15, i32 signext 0)
-  %call1 = tail call signext i32 (i8*, ...) @printf(i8* getelementptr inbounds ([12 x i8], [12 x i8]* @.str, i64 0, i64 0), i32 signext %call)
+  %call1 = tail call signext i32 (ptr, ...) @printf(ptr @.str, i32 signext %call)
   ret i32 0
 }
 
 ; Function Attrs: nounwind
-declare signext i32 @printf(i8* nocapture readonly, ...) local_unnamed_addr #2
+declare signext i32 @printf(ptr nocapture readonly, ...) local_unnamed_addr #2
diff --git a/llvm/test/CodeGen/PowerPC/Frames-dyn-alloca-with-func-call.ll b/llvm/test/CodeGen/PowerPC/Frames-dyn-alloca-with-func-call.ll
@@ -28,9 +28,9 @@
 
 define dso_local signext i32 @foo(i32 %n) {
 entry:
-  %ptr0 = alloca i32*
+  %ptr0 = alloca ptr
   %0 = alloca i32, i32 %n
-  store i32* %0, i32** %ptr0
+  store ptr %0, ptr %ptr0
   %1 = alloca i32, i32 %n
   %2 = alloca i32, i32 %n
   %3 = alloca i32, i32 %n
@@ -39,13 +39,13 @@ entry:
   %6 = alloca i32, i32 %n
   %7 = alloca i32, i32 %n
   %8 = alloca i32, i32 %n
-  %9 = load i32*, i32** %ptr0
+  %9 = load ptr, ptr %ptr0
 
-  %call = call i32 @bar(i32* %1, i32* %2, i32* %3, i32* %4, i32* %5, i32* %6, i32* %7, i32* %8, i32* %9)
+  %call = call i32 @bar(ptr %1, ptr %2, ptr %3, ptr %4, ptr %5, ptr %6, ptr %7, ptr %8, ptr %9)
   ret i32 %call
 }
 
-declare i32 @bar(i32*, i32*, i32*, i32*, i32*, i32*, i32*, i32*, i32*)
+declare i32 @bar(ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr)
 
 ; PPC32-LINUX-LABEL: foo
 ; PPC32-LINUX: mflr 0

diff --git a/llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll b/llvm/test/CodeGen/PowerPC/Frames-dyn-alloca.ll
@@ -18,9 +18,9 @@
 ; RUN: -mtriple=powerpc64-ibm-aix-xcoff -frame-pointer=all | FileCheck %s \
 ; RUN: -check-prefix=PPC64-AIX
 
-define i32* @f1(i32 %n) nounwind {
-        %tmp = alloca i32, i32 %n               ; <i32*> [#uses=1]
-        ret i32* %tmp
+define ptr @f1(i32 %n) nounwind {
+        %tmp = alloca i32, i32 %n               ; <ptr> [#uses=1]
+        ret ptr %tmp
 }
 
 ; PPC32-LINUX-LABEL: f1

diff --git a/llvm/test/CodeGen/PowerPC/Frames-large.ll b/llvm/test/CodeGen/PowerPC/Frames-large.ll
@@ -26,9 +26,9 @@
 ; RUN: -mtriple=powerpc64-ibm-aix-xcoff -frame-pointer=all | FileCheck %s \
 ; RUN: -check-prefix=PPC64-AIX-FP
 
-define i32* @f1() nounwind {
-        %tmp = alloca i32, i32 8191             ; <i32*> [#uses=1]
-        ret i32* %tmp
+define ptr @f1() nounwind {
+        %tmp = alloca i32, i32 8191             ; <ptr> [#uses=1]
+        ret ptr %tmp
 }
 
 ;   - The stdux is used to update the back-chain link when allocated frame is large

diff --git a/llvm/test/CodeGen/PowerPC/Frames-leaf.ll b/llvm/test/CodeGen/PowerPC/Frames-leaf.ll
@@ -31,7 +31,7 @@
 ; RUN: llc -verify-machineinstrs < %s -mtriple=ppc64-- -frame-pointer=all | \
 ; RUN:   not grep "ld r31, 40(r1)"
 
-define i32* @f1() {
-        %tmp = alloca i32, i32 2                ; <i32*> [#uses=1]
-        ret i32* %tmp
+define ptr @f1() {
+        %tmp = alloca i32, i32 2                ; <ptr> [#uses=1]
+        ret ptr %tmp
 }
diff --git a/llvm/test/CodeGen/PowerPC/Frames-small.ll b/llvm/test/CodeGen/PowerPC/Frames-small.ll
@@ -26,9 +26,9 @@
 ; RUN: -mtriple=powerpc64-ibm-aix-xcoff -frame-pointer=all | FileCheck %s \
 ; RUN: -check-prefix=PPC64-AIX-FP
 
-define i32* @frame_small() {
+define ptr @frame_small() {
         %tmp = alloca i32, i32 95
-        ret i32* %tmp
+        ret ptr %tmp
 }
 
 ; The linkage area, if there is one, is still on the top of the stack after

diff --git a/llvm/test/CodeGen/PowerPC/Frames-stack-floor.ll b/llvm/test/CodeGen/PowerPC/Frames-stack-floor.ll
@@ -30,24 +30,24 @@
 ; - PPC32 AIX ABI:
 ;   220 bytes = 18*8 (FPRs) + 19*4 (GPRs);
 
-define i32* @in_stack_floor_32() {
+define ptr @in_stack_floor_32() {
         %tmp = alloca i32, i32 55
-        ret i32* %tmp
+        ret ptr %tmp
 }
 
-define i32* @out_stack_floor_32() {
+define ptr @out_stack_floor_32() {
         %tmp = alloca i32, i32 56
-        ret i32* %tmp
+        ret ptr %tmp
 }
 
-define i32* @in_stack_floor_64() {
+define ptr @in_stack_floor_64() {
         %tmp = alloca i32, i32 72
-        ret i32* %tmp
+        ret ptr %tmp
 }
 
-define i32* @out_stack_floor_64() {
+define ptr @out_stack_floor_64() {
         %tmp = alloca i32, i32 73
-        ret i32* %tmp
+        ret ptr %tmp
 }
 
 ; PPC32-LINUX-NOFP-LABEL: in_stack_floor_32

diff --git a/llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering.ll b/llvm/test/CodeGen/PowerPC/GlobalISel/irtranslator-args-lowering.ll
@@ -64,7 +64,7 @@ define void @foo_notrunc(<7 x i64> %x) {
   ret void
 }
 
-define void @foo_pt(<7 x i8>* %x) {
+define void @foo_pt(ptr %x) {
   ; CHECK-LABEL: name: foo_pt
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $x3
@@ -91,7 +91,7 @@ entry:
   ret void
 }
 
-define void @foo_int(i32* %x) {
+define void @foo_int(ptr %x) {
   ; CHECK-LABEL: name: foo_int
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $x3
@@ -100,7 +100,7 @@ define void @foo_int(i32* %x) {
   ret void
 }
 
-define void @foo(float* %x) {
+define void @foo(ptr %x) {
   ; CHECK-LABEL: name: foo
   ; CHECK: bb.1 (%ir-block.0):
   ; CHECK:   liveins: $x3

diff --git a/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator-stackprotect.ll b/llvm/test/CodeGen/PowerPC/GlobalISel/ppc-irtranslator-stackprotect.ll
@@ -42,7 +42,7 @@ define void @test_stack_guard_linux() {
 ; OPENBSD: [[GUARD:%[0-9]+]]:_(p0) = G_LOAD [[GUARD_LOCAL]](p0) :: (dereferenceable load (p0) from @__guard_local)
 ; OPENBSD: G_STORE [[GUARD]](p0), [[GUARD_SLOT]](p0) :: (volatile store (p0) into %stack.0.StackGuardSlot)
 define void @test_stack_guard_openbsd() {
-  %StackGuardSlot = alloca i8*
+  %StackGuardSlot = alloca ptr
   %StackGuard = load ptr, ptr @__guard_local
   call void @llvm.stackprotector(ptr %StackGuard, ptr %StackGuardSlot)
   ret void

diff --git a/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll b/llvm/test/CodeGen/PowerPC/LargeAbsoluteAddr.ll
@@ -8,7 +8,7 @@
 ; PPC64: 4, 32751(3)
 ; PPC64: blr
 define void @test() nounwind {
-	store i32 0, i32* inttoptr (i64 48725999 to i32*)
+	store i32 0, ptr inttoptr (i64 48725999 to ptr)
 	ret void
 }
 
@@ -20,7 +20,7 @@ define void @test() nounwind {
 ; PPC64: std 4, 9024(3)
 ; PPC64: blr
 define void @test2() nounwind {
-	store i64 0, i64* inttoptr (i64 74560 to i64*)
+	store i64 0, ptr inttoptr (i64 74560 to ptr)
 	ret void
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll b/llvm/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
@@ -9,11 +9,11 @@
 
 %"struct.CC::TT" = type { i64, i32 }
 %class.CC = type { %struct.SS }
-%struct.SS = type { void ()* }
+%struct.SS = type { ptr }
 
 @_ZN2CC2ccE = external thread_local global %"struct.CC::TT", align 8
 
-define noalias i8* @_ZN2CC3funEv(%class.CC* %this) nounwind {
+define noalias ptr @_ZN2CC3funEv(ptr %this) nounwind {
 ; CHECK-LABEL: _ZN2CC3funEv:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr 0
@@ -46,19 +46,18 @@ define noalias i8* @_ZN2CC3funEv(%class.CC* %this) nounwind {
 ; CHECK-NEXT:    mtlr 0
 ; CHECK-NEXT:    blr
 entry:
-  %foo = getelementptr inbounds %class.CC, %class.CC* %this, i64 0, i32 0, i32 0
-  %0 = load void ()*, void ()** %foo, align 8
+  %0 = load ptr, ptr %this, align 8
   tail call void %0()
-  %1 = load i64, i64* getelementptr inbounds (%"struct.CC::TT", %"struct.CC::TT"* @_ZN2CC2ccE, i64 0, i32 0)
+  %1 = load i64, ptr @_ZN2CC2ccE
   %tobool = icmp eq i64 %1, 0
   br i1 %tobool, label %if.end, label %if.then
 
 if.then:
-  tail call void @_ZN2CC3barEPi(%class.CC* nonnull %this, i32* getelementptr inbounds (%"struct.CC::TT", %"struct.CC::TT"* @_ZN2CC2ccE, i64 0, i32 1))
+  tail call void @_ZN2CC3barEPi(ptr nonnull %this, ptr getelementptr inbounds (%"struct.CC::TT", ptr @_ZN2CC2ccE, i64 0, i32 1))
   br label %if.end
 
 if.end:
-  ret i8* null
+  ret ptr null
 }
 
-declare void @_ZN2CC3barEPi(%class.CC*, i32*)
+declare void @_ZN2CC3barEPi(ptr, ptr)
diff --git a/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll b/llvm/test/CodeGen/PowerPC/MMO-flags-assertion.ll
@@ -3,35 +3,33 @@
 ; void llvm::MachineMemOperand::refineAlignment(const llvm::MachineMemOperand*):
 ; Assertion `MMO->getFlags() == getFlags() && "Flags mismatch !"' failed.
 
-declare void @_Z3fn11F(%class.F* byval(%class.F) align 8) local_unnamed_addr
-declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i1)
-declare signext i32 @_ZN1F11isGlobalRegEv(%class.F*) local_unnamed_addr
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture)
-declare void @_Z10EmitLValuev(%class.F* sret(%class.F)) local_unnamed_addr
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture)
+declare void @_Z3fn11F(ptr byval(%class.F) align 8) local_unnamed_addr
+declare void @llvm.memcpy.p0.p0.i64(ptr nocapture writeonly, ptr nocapture readonly, i64, i1)
+declare signext i32 @_ZN1F11isGlobalRegEv(ptr) local_unnamed_addr
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture)
+declare void @_Z10EmitLValuev(ptr sret(%class.F)) local_unnamed_addr
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture)
 
-%class.F = type { i32, i64, i8, [64 x i8], i8, i32* }
+%class.F = type { i32, i64, i8, [64 x i8], i8, ptr }
 
-define signext i32 @_Z29EmitOMPAtomicSimpleUpdateExpr1F(%class.F* byval(%class.F) align 8 %p1) local_unnamed_addr {
+define signext i32 @_Z29EmitOMPAtomicSimpleUpdateExpr1F(ptr byval(%class.F) align 8 %p1) local_unnamed_addr {
 entry:
-  call void @_Z3fn11F(%class.F* byval(%class.F) nonnull align 8 %p1)
-  %call = call signext i32 @_ZN1F11isGlobalRegEv(%class.F* nonnull %p1)
+  call void @_Z3fn11F(ptr byval(%class.F) nonnull align 8 %p1)
+  %call = call signext i32 @_ZN1F11isGlobalRegEv(ptr nonnull %p1)
   ret i32 %call
 }
 
 define void @_Z3fn2v() local_unnamed_addr {
 entry:
   %agg.tmp1 = alloca %class.F, align 8
   %XLValue = alloca %class.F, align 8
-  %0 = bitcast %class.F* %XLValue to i8*
-  call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %0)
-  call void @_Z10EmitLValuev(%class.F* nonnull sret(%class.F) %XLValue)
-  %1 = bitcast %class.F* %agg.tmp1 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 96, i8* nonnull %1)
-  call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 nonnull %1, i8* align 8 nonnull %0, i64 96, i1 false)
-  call void @_Z3fn11F(%class.F* byval(%class.F) nonnull align 8 %XLValue)
-  %call.i = call signext i32 @_ZN1F11isGlobalRegEv(%class.F* nonnull %agg.tmp1)
-  call void @llvm.lifetime.end.p0i8(i64 96, i8* nonnull %1)
-  call void @llvm.lifetime.end.p0i8(i64 96, i8* nonnull %0)
+  call void @llvm.lifetime.start.p0(i64 96, ptr nonnull %XLValue)
+  call void @_Z10EmitLValuev(ptr nonnull sret(%class.F) %XLValue)
+  call void @llvm.lifetime.start.p0(i64 96, ptr nonnull %agg.tmp1)
+  call void @llvm.memcpy.p0.p0.i64(ptr align 8 nonnull %agg.tmp1, ptr align 8 nonnull %XLValue, i64 96, i1 false)
+  call void @_Z3fn11F(ptr byval(%class.F) nonnull align 8 %XLValue)
+  %call.i = call signext i32 @_ZN1F11isGlobalRegEv(ptr nonnull %agg.tmp1)
+  call void @llvm.lifetime.end.p0(i64 96, ptr nonnull %agg.tmp1)
+  call void @llvm.lifetime.end.p0(i64 96, ptr nonnull %XLValue)
   ret void
 }
diff --git a/llvm/test/CodeGen/PowerPC/MergeConsecutiveStores.ll b/llvm/test/CodeGen/PowerPC/MergeConsecutiveStores.ll
@@ -34,14 +34,14 @@
 ;; CHECK-NEXT: blr
 define void @f() {
 entry:
-  %0 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 0), align 4
-  %1 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 1), align 4
-  %2 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 2), align 4
-  %3 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 3), align 4
-  store i32 %0, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 0), align 4
-  store i32 %1, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 1), align 4
-  store i32 %2, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 2), align 4
-  store i32 %3, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 3), align 4
+  %0 = load i32, ptr @fx, align 4
+  %1 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 1), align 4
+  %2 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 2), align 4
+  %3 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 3), align 4
+  store i32 %0, ptr @fy, align 4
+  store i32 %1, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 1), align 4
+  store i32 %2, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 2), align 4
+  store i32 %3, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 3), align 4
   ret void
 }
 
@@ -56,13 +56,13 @@ entry:
 ;; CHECK: blr
 define void @g() {
 entry:
-  %0 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 0), align 16
-  %1 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 1), align 4
-  %2 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 2), align 4
-  %3 = load i32, i32* getelementptr inbounds (%struct.X, %struct.X* @fx, i32 0, i32 3), align 4
-  store i32 %0, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 0), align 16
-  store i32 %1, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 1), align 4
-  store i32 %2, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 2), align 4
-  store i32 %3, i32* getelementptr inbounds (%struct.X, %struct.X* @fy, i32 0, i32 3), align 4
+  %0 = load i32, ptr @fx, align 16
+  %1 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 1), align 4
+  %2 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 2), align 4
+  %3 = load i32, ptr getelementptr inbounds (%struct.X, ptr @fx, i32 0, i32 3), align 4
+  store i32 %0, ptr @fy, align 16
+  store i32 %1, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 1), align 4
+  store i32 %2, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 2), align 4
+  store i32 %3, ptr getelementptr inbounds (%struct.X, ptr @fy, i32 0, i32 3), align 4
   ret void
 }
diff --git a/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll b/llvm/test/CodeGen/PowerPC/P10-stack-alignment.ll
@@ -76,14 +76,12 @@ define dso_local signext i32 @test_32byte_vector() nounwind {
 ; CHECK-BE-NEXT:    blr
 entry:
   %a = alloca <8 x i32>, align 32
-  %0 = bitcast <8 x i32>* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 32, i8* %0)
-  store <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, <8 x i32>* %a, align 32
-  call void @test(<8 x i32>* %a)
-  %1 = load <8 x i32>, <8 x i32>* %a, align 32
-  %vecext = extractelement <8 x i32> %1, i32 0
-  %2 = bitcast <8 x i32>* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 32, i8* %2)
+  call void @llvm.lifetime.start.p0(i64 32, ptr %a)
+  store <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>, ptr %a, align 32
+  call void @test(ptr %a)
+  %0 = load <8 x i32>, ptr %a, align 32
+  %vecext = extractelement <8 x i32> %0, i32 0
+  call void @llvm.lifetime.end.p0(i64 32, ptr %a)
   ret i32 %vecext
 }
 
@@ -139,14 +137,12 @@ define dso_local signext i32 @test_32byte_aligned_vector() nounwind {
 ; CHECK-BE-NEXT:    blr
 entry:
   %a = alloca <4 x i32>, align 32
-  %0 = bitcast <4 x i32>* %a to i8*
-  call void @llvm.lifetime.start.p0i8(i64 16, i8* %0)
-  store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, <4 x i32>* %a, align 32
-  call void @test1(<4 x i32>* %a)
-  %1 = load <4 x i32>, <4 x i32>* %a, align 32
-  %vecext = extractelement <4 x i32> %1, i32 0
-  %2 = bitcast <4 x i32>* %a to i8*
-  call void @llvm.lifetime.end.p0i8(i64 16, i8* %2)
+  call void @llvm.lifetime.start.p0(i64 16, ptr %a)
+  store <4 x i32> <i32 1, i32 2, i32 3, i32 4>, ptr %a, align 32
+  call void @test1(ptr %a)
+  %0 = load <4 x i32>, ptr %a, align 32
+  %vecext = extractelement <4 x i32> %0, i32 0
+  call void @llvm.lifetime.end.p0(i64 16, ptr %a)
   ret i32 %vecext
 }
 
@@ -157,7 +153,7 @@ define dso_local void @test_Array() nounwind {
 ; CHECK-OPT-LABEL: @test_Array(
 ; CHECK-OPT-NEXT: entry:
 ; CHECK-OPT-NEXT: %Arr2 = alloca [64 x i16], align 2
-; CHECK-OPT: store <16 x i16> [[TMP0:%.*]], <16 x i16>* [[TMP0:%.*]], align 2
+; CHECK-OPT: store <16 x i16> [[TMP0:%.*]], ptr [[TMP0:%.*]], align 2
 ; CHECK-LE-LABEL: test_Array:
 ; CHECK-LE:       # %bb.0: # %entry
 ; CHECK-LE-NEXT:    mflr r0
@@ -224,53 +220,48 @@ define dso_local void @test_Array() nounwind {
 entry:
   %Arr2 = alloca [64 x i16], align 2
   %i = alloca i32, align 4
-  %0 = bitcast [64 x i16]* %Arr2 to i8*
-  call void @llvm.lifetime.start.p0i8(i64 128, i8* %0)
-  %1 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.start.p0i8(i64 4, i8* %1)
-  store i32 0, i32* %i, align 4
+  call void @llvm.lifetime.start.p0(i64 128, ptr %Arr2)
+  call void @llvm.lifetime.start.p0(i64 4, ptr %i)
+  store i32 0, ptr %i, align 4
   br label %for.cond
 
 for.cond:                                         ; preds = %for.inc, %entry
-  %2 = load i32, i32* %i, align 4
-  %cmp = icmp slt i32 %2, 64
+  %0 = load i32, ptr %i, align 4
+  %cmp = icmp slt i32 %0, 64
   br i1 %cmp, label %for.body, label %for.cond.cleanup
 
 for.cond.cleanup:                                 ; preds = %for.cond
-  %3 = bitcast i32* %i to i8*
-  call void @llvm.lifetime.end.p0i8(i64 4, i8* %3)
+  call void @llvm.lifetime.end.p0(i64 4, ptr %i)
   br label %for.end
 
 for.body:                                         ; preds = %for.cond
-  %4 = load i32, i32* %i, align 4
-  %idxprom = sext i32 %4 to i64
-  %arrayidx = getelementptr inbounds [64 x i8], [64 x i8]* @Arr1, i64 0, i64 %idxprom
-  %5 = load i8, i8* %arrayidx, align 1
-  %conv = zext i8 %5 to i16
-  %6 = load i32, i32* %i, align 4
-  %idxprom1 = sext i32 %6 to i64
-  %arrayidx2 = getelementptr inbounds [64 x i16], [64 x i16]* %Arr2, i64 0, i64 %idxprom1
-  store i16 %conv, i16* %arrayidx2, align 2
+  %1 = load i32, ptr %i, align 4
+  %idxprom = sext i32 %1 to i64
+  %arrayidx = getelementptr inbounds [64 x i8], ptr @Arr1, i64 0, i64 %idxprom
+  %2 = load i8, ptr %arrayidx, align 1
+  %conv = zext i8 %2 to i16
+  %3 = load i32, ptr %i, align 4
+  %idxprom1 = sext i32 %3 to i64
+  %arrayidx2 = getelementptr inbounds [64 x i16], ptr %Arr2, i64 0, i64 %idxprom1
+  store i16 %conv, ptr %arrayidx2, align 2
   br label %for.inc
 
 for.inc:                                          ; preds = %for.body
-  %7 = load i32, i32* %i, align 4
-  %inc = add nsw i32 %7, 1
-  store i32 %inc, i32* %i, align 4
+  %4 = load i32, ptr %i, align 4
+  %inc = add nsw i32 %4, 1
+  store i32 %inc, ptr %i, align 4
   br label %for.cond
 
 for.end:                                          ; preds = %for.cond.cleanup
-  %arraydecay = getelementptr inbounds [64 x i16], [64 x i16]* %Arr2, i64 0, i64 0
-  call void @test_arr(i16* %arraydecay)
-  %8 = bitcast [64 x i16]* %Arr2 to i8*
-  call void @llvm.lifetime.end.p0i8(i64 128, i8* %8)
+  call void @test_arr(ptr %Arr2)
+  call void @llvm.lifetime.end.p0(i64 128, ptr %Arr2)
   ret void
 }
 
-declare void @llvm.lifetime.start.p0i8(i64 immarg, i8* nocapture) nounwind
+declare void @llvm.lifetime.start.p0(i64 immarg, ptr nocapture) nounwind
 
-declare void @test(<8 x i32>*) nounwind
-declare void @test1(<4 x i32>*) nounwind
-declare void @test_arr(i16*)
+declare void @test(ptr) nounwind
+declare void @test1(ptr) nounwind
+declare void @test_arr(ptr)
 
-declare void @llvm.lifetime.end.p0i8(i64 immarg, i8* nocapture) nounwind
+declare void @llvm.lifetime.end.p0(i64 immarg, ptr nocapture) nounwind
diff --git a/llvm/test/CodeGen/PowerPC/PR33636.ll b/llvm/test/CodeGen/PowerPC/PR33636.ll
@@ -9,7 +9,7 @@ define void @main(i1 %arg) {
   %constexpr5 = trunc i32 %constexpr4 to i8
   %constexpr6 = icmp ne i8 %constexpr5, 0
   %constexpr8 = zext i1 %constexpr6 to i16
-  store i16 %constexpr8, i16* null, align 2
+  store i16 %constexpr8, ptr null, align 2
   ret void
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/PR33671.ll b/llvm/test/CodeGen/PowerPC/PR33671.ll
@@ -1,28 +1,24 @@
 ; Function Attrs: norecurse nounwind
 ; RUN: llc -mtriple=powerpc64le-unknown-unknown -mcpu=pwr9 < %s | FileCheck %s
-define void @test1(i32* nocapture readonly %arr, i32* nocapture %arrTo) {
+define void @test1(ptr nocapture readonly %arr, ptr nocapture %arrTo) {
 entry:
-  %arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 4
-  %0 = bitcast i32* %arrayidx to <4 x i32>*
-  %arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 4
-  %1 = bitcast i32* %arrayidx1 to <4 x i32>*
-  %2 = load <4 x i32>, <4 x i32>* %1, align 16
-  store <4 x i32> %2, <4 x i32>* %0, align 16
+  %arrayidx = getelementptr inbounds i32, ptr %arrTo, i64 4
+  %arrayidx1 = getelementptr inbounds i32, ptr %arr, i64 4
+  %0 = load <4 x i32>, ptr %arrayidx1, align 16
+  store <4 x i32> %0, ptr %arrayidx, align 16
   ret void
 ; CHECK-LABEL: test1
 ; CHECK: lxv [[LD:[0-9]+]], 16(3)
 ; CHECK: stxv [[LD]], 16(4)
 }
 
 ; Function Attrs: norecurse nounwind
-define void @test2(i32* nocapture readonly %arr, i32* nocapture %arrTo) {
+define void @test2(ptr nocapture readonly %arr, ptr nocapture %arrTo) {
 entry:
-  %arrayidx = getelementptr inbounds i32, i32* %arrTo, i64 1
-  %0 = bitcast i32* %arrayidx to <4 x i32>*
-  %arrayidx1 = getelementptr inbounds i32, i32* %arr, i64 2
-  %1 = bitcast i32* %arrayidx1 to <4 x i32>*
-  %2 = load <4 x i32>, <4 x i32>* %1, align 16
-  store <4 x i32> %2, <4 x i32>* %0, align 16
+  %arrayidx = getelementptr inbounds i32, ptr %arrTo, i64 1
+  %arrayidx1 = getelementptr inbounds i32, ptr %arr, i64 2
+  %0 = load <4 x i32>, ptr %arrayidx1, align 16
+  store <4 x i32> %0, ptr %arrayidx, align 16
   ret void
 ; CHECK-LABEL: test2
 ; CHECK: li [[REG:[0-9]+]], 8

diff --git a/llvm/test/CodeGen/PowerPC/PR3488.ll b/llvm/test/CodeGen/PowerPC/PR3488.ll
@@ -98,7 +98,7 @@ module asm "\09.previous\09\09\09\09\09"
 ; Function Attrs: nounwind
 define void @__alloc_pages_nodemask() #0 {
 entry:
-  %0 = call i64 asm sideeffect "ld${1:U}${1:X} $0,$1", "=r,*m"(i64* elementtype(i64) undef)
+  %0 = call i64 asm sideeffect "ld${1:U}${1:X} $0,$1", "=r,*m"(ptr elementtype(i64) undef)
   br i1 undef, label %do.body.lr.ph.i.i.i, label %zone_page_state_snapshot.exit.i.i
 ; CHECK: ld 3, 0(3)
 
@@ -107,10 +107,10 @@ do.body.lr.ph.i.i.i:                              ; preds = %entry
 
 do.body.i.i.i:                                    ; preds = %do.body.i.i.i, %do.body.lr.ph.i.i.i
   %x.022.i.i.i = phi i64 [ %0, %do.body.lr.ph.i.i.i ], [ %add7.i.i.i, %do.body.i.i.i ]
-  %1 = load i8, i8* undef, align 1
+  %1 = load i8, ptr undef, align 1
   %conv.i.i458.i = sext i8 %1 to i64
   %add7.i.i.i = add i64 %x.022.i.i.i, %conv.i.i458.i
-  %2 = load i32, i32* @nr_cpu_ids, align 4
+  %2 = load i32, ptr @nr_cpu_ids, align 4
   %cmp.i1.i.i = icmp ult i32 0, %2
   br i1 %cmp.i1.i.i, label %do.body.i.i.i, label %zone_page_state_snapshot.exit.i.i
 

diff --git a/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll b/llvm/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -129,28 +129,28 @@ define signext i32 @main() nounwind {
 ; CHECK-P7-NEXT:    blr
 L.entry:
   %value.addr = alloca i16, align 2
-  store i16 -32477, i16* %value.addr, align 2
-  %0 = cmpxchg i16* %value.addr, i16 -32477, i16 234 seq_cst seq_cst
+  store i16 -32477, ptr %value.addr, align 2
+  %0 = cmpxchg ptr %value.addr, i16 -32477, i16 234 seq_cst seq_cst
   %1 = extractvalue { i16, i1 } %0, 1
   br i1 %1, label %L.B0000, label %L.B0003
 
 L.B0003:                                          ; preds = %L.entry
-  %puts = call i32 @puts(i8* getelementptr inbounds ([46 x i8], [46 x i8]* @str, i64 0, i64 0))
+  %puts = call i32 @puts(ptr @str)
   ret i32 1
 
 L.B0000:                                          ; preds = %L.entry
-  %2 = load i16, i16* %value.addr, align 2
+  %2 = load i16, ptr %value.addr, align 2
   %3 = icmp eq i16 %2, 234
   br i1 %3, label %L.B0001, label %L.B0005
 
 L.B0005:                                          ; preds = %L.B0000
-  %puts1 = call i32 @puts(i8* getelementptr inbounds ([59 x i8], [59 x i8]* @str.1, i64 0, i64 0))
+  %puts1 = call i32 @puts(ptr @str.1)
   ret i32 1
 
 L.B0001:                                          ; preds = %L.B0000
-  %puts2 = call i32 @puts(i8* getelementptr inbounds ([7 x i8], [7 x i8]* @str.2, i64 0, i64 0))
+  %puts2 = call i32 @puts(ptr @str.2)
   ret i32 0
 }
 
 ; Function Attrs: nounwind
-declare i32 @puts(i8* nocapture readonly) #0
+declare i32 @puts(ptr nocapture readonly) #0
diff --git a/llvm/test/CodeGen/PowerPC/VSX-DForm-Scalars.ll b/llvm/test/CodeGen/PowerPC/VSX-DForm-Scalars.ll
@@ -7,12 +7,12 @@
 ; Function Attrs: nounwind
 define double @_Z7getLXSDddddddddddddd(double %a, double %b, double %c, double %d, double %e, double %f, double %g, double %h, double %i, double %j, double %k, double %l, double %m) local_unnamed_addr #0 {
 entry:
-  %0 = load double, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 10), align 8
-  %1 = load double, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 17), align 8
-  %2 = load double, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 87), align 8
-  %3 = load double, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 97), align 8
-  %4 = load double, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 77), align 8
-  store double %3, double* getelementptr inbounds ([500 x double], [500 x double]* @gd, i64 0, i64 122), align 8
+  %0 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 10), align 8
+  %1 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 17), align 8
+  %2 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 87), align 8
+  %3 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 97), align 8
+  %4 = load double, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 77), align 8
+  store double %3, ptr getelementptr inbounds ([500 x double], ptr @gd, i64 0, i64 122), align 8
   %add = fadd double %a, %b
   %add1 = fadd double %add, %c
   %add2 = fadd double %add1, %d
@@ -41,12 +41,12 @@ entry:
 ; Function Attrs: nounwind
 define float @_Z8getLXSSPfffffffffffff(float %a, float %b, float %c, float %d, float %e, float %f, float %g, float %h, float %i, float %j, float %k, float %l, float %m) local_unnamed_addr #0 {
 entry:
-  %0 = load float, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 10), align 4
-  %1 = load float, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 17), align 4
-  %2 = load float, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 87), align 4
-  %3 = load float, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 97), align 4
-  %4 = load float, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 77), align 4
-  store float %3, float* getelementptr inbounds ([500 x float], [500 x float]* @gf, i64 0, i64 122), align 4
+  %0 = load float, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 10), align 4
+  %1 = load float, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 17), align 4
+  %2 = load float, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 87), align 4
+  %3 = load float, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 97), align 4
+  %4 = load float, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 77), align 4
+  store float %3, ptr getelementptr inbounds ([500 x float], ptr @gf, i64 0, i64 122), align 4
   %add = fadd float %a, %b
   %add1 = fadd float %add, %c
   %add2 = fadd float %add1, %d

diff --git a/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll b/llvm/test/CodeGen/PowerPC/VSX-XForm-Scalars.ll
@@ -6,9 +6,9 @@
 ; RUN:   | FileCheck %s --check-prefix=CHECK-P9
 
 @a = external local_unnamed_addr global <4 x i32>, align 16
-@pb = external local_unnamed_addr global float*, align 8
+@pb = external local_unnamed_addr global ptr, align 8
 
-define void @testExpandPostRAPseudo(i32* nocapture readonly %ptr) {
+define void @testExpandPostRAPseudo(ptr nocapture readonly %ptr) {
 ; CHECK-P8-LABEL: testExpandPostRAPseudo:
 ; CHECK-P8:  # %bb.0: # %entry
 ; CHECK-P8:    lfiwzx f0, 0, r3
@@ -40,15 +40,15 @@ define void @testExpandPostRAPseudo(i32* nocapture readonly %ptr) {
 ; CHECK-P9:    stfsx f0, r3, r4
 ; CHECK-P9:    blr
 entry:
-  %0 = load i32, i32* %ptr, align 4
+  %0 = load i32, ptr %ptr, align 4
   %splat.splatinsert = insertelement <4 x i32> undef, i32 %0, i32 0
   %splat.splat = shufflevector <4 x i32> %splat.splatinsert, <4 x i32> undef, <4 x i32> zeroinitializer
-  store <4 x i32> %splat.splat, <4 x i32>* @a, align 16
+  store <4 x i32> %splat.splat, ptr @a, align 16
   tail call void asm sideeffect "#Clobber Rigisters", "~{f0},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
-  %1 = load i32, i32* %ptr, align 4
+  %1 = load i32, ptr %ptr, align 4
   %conv = sitofp i32 %1 to float
-  %2 = load float*, float** @pb, align 8
-  %add.ptr = getelementptr inbounds float, float* %2, i64 16777216
-  store float %conv, float* %add.ptr, align 4
+  %2 = load ptr, ptr @pb, align 8
+  %add.ptr = getelementptr inbounds float, ptr %2, i64 16777216
+  store float %conv, ptr %add.ptr, align 4
   ret void
 }
diff --git a/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll b/llvm/test/CodeGen/PowerPC/a2-fp-basic.ll
@@ -2,32 +2,28 @@
 
 %0 = type { double, double }
 
-define void @maybe_an_fma(%0* sret(%0) %agg.result, %0* byval(%0) %a, %0* byval(%0) %b, %0* byval(%0) %c) nounwind {
+define void @maybe_an_fma(ptr sret(%0) %agg.result, ptr byval(%0) %a, ptr byval(%0) %b, ptr byval(%0) %c) nounwind {
 entry:
-  %a.realp = getelementptr inbounds %0, %0* %a, i32 0, i32 0
-  %a.real = load double, double* %a.realp
-  %a.imagp = getelementptr inbounds %0, %0* %a, i32 0, i32 1
-  %a.imag = load double, double* %a.imagp
-  %b.realp = getelementptr inbounds %0, %0* %b, i32 0, i32 0
-  %b.real = load double, double* %b.realp
-  %b.imagp = getelementptr inbounds %0, %0* %b, i32 0, i32 1
-  %b.imag = load double, double* %b.imagp
+  %a.real = load double, ptr %a
+  %a.imagp = getelementptr inbounds %0, ptr %a, i32 0, i32 1
+  %a.imag = load double, ptr %a.imagp
+  %b.real = load double, ptr %b
+  %b.imagp = getelementptr inbounds %0, ptr %b, i32 0, i32 1
+  %b.imag = load double, ptr %b.imagp
   %mul.rl = fmul double %a.real, %b.real
   %mul.rr = fmul double %a.imag, %b.imag
   %mul.r = fsub double %mul.rl, %mul.rr
   %mul.il = fmul double %a.imag, %b.real
   %mul.ir = fmul double %a.real, %b.imag
   %mul.i = fadd double %mul.il, %mul.ir
-  %c.realp = getelementptr inbounds %0, %0* %c, i32 0, i32 0
-  %c.real = load double, double* %c.realp
-  %c.imagp = getelementptr inbounds %0, %0* %c, i32 0, i32 1
-  %c.imag = load double, double* %c.imagp
+  %c.real = load double, ptr %c
+  %c.imagp = getelementptr inbounds %0, ptr %c, i32 0, i32 1
+  %c.imag = load double, ptr %c.imagp
   %add.r = fadd double %mul.r, %c.real
   %add.i = fadd double %mul.i, %c.imag
-  %real = getelementptr inbounds %0, %0* %agg.result, i32 0, i32 0
-  %imag = getelementptr inbounds %0, %0* %agg.result, i32 0, i32 1
-  store double %add.r, double* %real
-  store double %add.i, double* %imag
+  %imag = getelementptr inbounds %0, ptr %agg.result, i32 0, i32 1
+  store double %add.r, ptr %agg.result
+  store double %add.i, ptr %imag
   ret void
 ; CHECK: fmadd
 }
diff --git a/llvm/test/CodeGen/PowerPC/aa-tbaa.ll b/llvm/test/CodeGen/PowerPC/aa-tbaa.ll
@@ -17,14 +17,14 @@ entry:
 ; CHECK-LABEL: @foo
 
 next:
-  %sunkaddr18 = ptrtoint %"class.llvm::MCOperand"* %MCOp to i64
+  %sunkaddr18 = ptrtoint ptr %MCOp to i64
   %sunkaddr19 = add i64 %sunkaddr18, 8
-  %sunkaddr20 = inttoptr i64 %sunkaddr19 to double*
-  store double 0.000000e+00, double* %sunkaddr20, align 8, !tbaa !1
-  %sunkaddr21 = ptrtoint %"class.llvm::MCOperand"* %MCOp to i64
+  %sunkaddr20 = inttoptr i64 %sunkaddr19 to ptr
+  store double 0.000000e+00, ptr %sunkaddr20, align 8, !tbaa !1
+  %sunkaddr21 = ptrtoint ptr %MCOp to i64
   %sunkaddr22 = add i64 %sunkaddr21, 8
-  %sunkaddr23 = inttoptr i64 %sunkaddr22 to i32*
-  store i32 %v, i32* %sunkaddr23, align 8, !tbaa !2
+  %sunkaddr23 = inttoptr i64 %sunkaddr22 to ptr
+  store i32 %v, ptr %sunkaddr23, align 8, !tbaa !2
   ret void
 
 ; Make sure that the 64-bit store comes first, regardless of what TBAA says

diff --git a/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll b/llvm/test/CodeGen/PowerPC/aantidep-inline-asm-use.ll
@@ -112,9 +112,9 @@ _ZN10SubProcess12SafeSyscalls5closeEi.exit22:     ; preds = %_ZN10SubProcess12Sa
   br label %.thread
 
 .thread:                                          ; preds = %45, %.thread.outer
-  call void @llvm.memset.p0i8.i64(i8* align 8 undef, i8 0, i64 56, i1 false)
-  store i8* %21, i8** undef, align 8
-  store i32 1073741824, i32* undef, align 8
+  call void @llvm.memset.p0.i64(ptr align 8 undef, i8 0, i64 56, i1 false)
+  store ptr %21, ptr undef, align 8
+  store i32 1073741824, ptr undef, align 8
   %22 = call { i64, i64, i64, i64, i64, i64, i64 } asm sideeffect "sc\0A\09mfcr $0", "=&{r0},=&{r3},=&{r4},=&{r5},=&{r6},=&{r7},=&{r8},{r0},{r3},{r4},{r5},~{cr0},~{ctr},~{memory},~{r11},~{r12}"(i64 342, i64 80871424, i64 undef, i64 0) #2, !srcloc !1
   br i1 undef, label %.lr.ph, label %.critedge15.preheader
 
@@ -296,7 +296,7 @@ _ZN10SubProcess12SafeSyscalls5fcntlEiil.exit:     ; preds = %_ZN10SubProcess12Sa
 }
 
 ; Function Attrs: nounwind argmemonly
-declare void @llvm.memset.p0i8.i64(i8* nocapture, i8, i64, i1) #1
+declare void @llvm.memset.p0.i64(ptr nocapture, i8, i64, i1) #1
 
 attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="pwr8" "target-features"="+altivec,+bpermd,+crypto,+direct-move,+extdiv,+power8-vector,+vsx" "unsafe-fp-math"="false" "use-soft-float"="false" }
 attributes #1 = { nounwind argmemonly }

diff --git a/llvm/test/CodeGen/PowerPC/absol-jump-table-enabled.ll b/llvm/test/CodeGen/PowerPC/absol-jump-table-enabled.ll
@@ -8,10 +8,10 @@
 ; RUN:      -ppc-use-absolute-jumptables -ppc-asm-full-reg-names \
 ; RUN:      -verify-machineinstrs %s | FileCheck %s -check-prefix=CHECK-BE
 
-%struct.node = type { i8, %struct.node* }
+%struct.node = type { i8, ptr }
 
 ; Function Attrs: norecurse nounwind readonly
-define zeroext i32 @jumpTableTest(%struct.node* readonly %list) {
+define zeroext i32 @jumpTableTest(ptr readonly %list) {
 ; CHECK-LE-LABEL: jumpTableTest:
 ; CHECK-LE:       # %bb.0: # %entry
 ; CHECK-LE:       rldic r[[REG:[0-9]+]], r[[REG]], 3, 29
@@ -28,18 +28,17 @@ define zeroext i32 @jumpTableTest(%struct.node* readonly %list) {
 ; CHECK-BE:       bctr
 ; CHECK-BE:       blr
 entry:
-  %cmp36 = icmp eq %struct.node* %list, null
+  %cmp36 = icmp eq ptr %list, null
   br i1 %cmp36, label %while.end, label %while.body
 
 while.body:                                       ; preds = %entry, %sw.epilog
   %result.038 = phi i32 [ %result.1, %sw.epilog ], [ 0, %entry ]
-  %current.037 = phi %struct.node* [ %spec.store.select, %sw.epilog ], [ %list, %entry ]
-  %next1 = getelementptr inbounds %struct.node, %struct.node* %current.037, i64 0, i32 1
-  %0 = load %struct.node*, %struct.node** %next1, align 8
-  %cmp2 = icmp eq %struct.node* %0, %current.037
-  %spec.store.select = select i1 %cmp2, %struct.node* null, %struct.node* %0
-  %type = getelementptr inbounds %struct.node, %struct.node* %current.037, i64 0, i32 0
-  %1 = load i8, i8* %type, align 8
+  %current.037 = phi ptr [ %spec.store.select, %sw.epilog ], [ %list, %entry ]
+  %next1 = getelementptr inbounds %struct.node, ptr %current.037, i64 0, i32 1
+  %0 = load ptr, ptr %next1, align 8
+  %cmp2 = icmp eq ptr %0, %current.037
+  %spec.store.select = select i1 %cmp2, ptr null, ptr %0
+  %1 = load i8, ptr %current.037, align 8
   switch i8 %1, label %sw.epilog [
     i8 1, label %sw.bb
     i8 2, label %sw.bb3
@@ -90,7 +89,7 @@ sw.bb17:                                          ; preds = %while.body
 
 sw.epilog:                                        ; preds = %while.body, %sw.bb17, %sw.bb15, %sw.bb13, %sw.bb11, %sw.bb9, %sw.bb7, %sw.bb5, %sw.bb3, %sw.bb
   %result.1 = phi i32 [ %result.038, %while.body ], [ %add18, %sw.bb17 ], [ %add16, %sw.bb15 ], [ %add14, %sw.bb13 ], [ %add12, %sw.bb11 ], [ %add10, %sw.bb9 ], [ %add8, %sw.bb7 ], [ %add6, %sw.bb5 ], [ %add4, %sw.bb3 ], [ %add, %sw.bb ]
-  %cmp = icmp eq %struct.node* %spec.store.select, null
+  %cmp = icmp eq ptr %spec.store.select, null
   br i1 %cmp, label %while.end, label %while.body
 
 while.end:                                        ; preds = %sw.epilog, %entry

diff --git a/llvm/test/CodeGen/PowerPC/add-fi.ll b/llvm/test/CodeGen/PowerPC/add-fi.ll
@@ -2,20 +2,20 @@
 target datalayout = "E-m:e-i64:64-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-define i32* @test1() {
+define ptr @test1() {
         %X = alloca { i32, i32 }
-        %Y = getelementptr {i32,i32}, {i32,i32}* %X, i32 0, i32 1
-        ret i32* %Y
+        %Y = getelementptr {i32,i32}, ptr %X, i32 0, i32 1
+        ret ptr %Y
 
 ; CHECK-LABEL: @test1
 ; CHECK: addi 3, 1, -4
 ; CHECK: blr
 }
 
-define i32* @test2() {
+define ptr @test2() {
         %X = alloca { i32, i32, i32, i32 }
-        %Y = getelementptr {i32,i32,i32,i32}, {i32,i32,i32,i32}* %X, i32 0, i32 3
-        ret i32* %Y
+        %Y = getelementptr {i32,i32,i32,i32}, ptr %X, i32 0, i32 3
+        ret ptr %Y
 
 ; CHECK-LABEL: @test2
 ; CHECK: addi 3, 1, -4

diff --git a/llvm/test/CodeGen/PowerPC/addegluecrash.ll b/llvm/test/CodeGen/PowerPC/addegluecrash.ll
@@ -3,7 +3,7 @@
 target datalayout = "e-m:e-i64:64-n32:64"
 target triple = "powerpc64le-unknown-linux-gnu"
 
-define void @bn_mul_comba8(i64* nocapture %r, i64* nocapture readonly %a, i64* nocapture readonly %b) {
+define void @bn_mul_comba8(ptr nocapture %r, ptr nocapture readonly %a, ptr nocapture readonly %b) {
 ; CHECK-LABEL: bn_mul_comba8:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    std 4, -8(1) # 8-byte Folded Spill
@@ -30,21 +30,21 @@ define void @bn_mul_comba8(i64* nocapture %r, i64* nocapture readonly %a, i64* n
 ; CHECK-NEXT:    isel 3, 3, 5, 20
 ; CHECK-NEXT:    std 3, 0(4)
 ; CHECK-NEXT:    blr
-  %1 = load i64, i64* %a, align 8
+  %1 = load i64, ptr %a, align 8
   %conv = zext i64 %1 to i128
-  %2 = load i64, i64* %b, align 8
+  %2 = load i64, ptr %b, align 8
   %conv2 = zext i64 %2 to i128
   %mul = mul nuw i128 %conv2, %conv
   %shr = lshr i128 %mul, 64
-  %agep = getelementptr inbounds i64, i64* %a, i64 1
-  %3 = load i64, i64* %agep, align 8
+  %agep = getelementptr inbounds i64, ptr %a, i64 1
+  %3 = load i64, ptr %agep, align 8
   %conv14 = zext i64 %3 to i128
   %mul15 = mul nuw i128 %conv14, %conv
   %add17 = add i128 %mul15, %shr
   %shr19 = lshr i128 %add17, 64
   %conv20 = trunc i128 %shr19 to i64
-  %bgep = getelementptr inbounds i64, i64* %b, i64 1
-  %4 = load i64, i64* %bgep, align 8
+  %bgep = getelementptr inbounds i64, ptr %b, i64 1
+  %4 = load i64, ptr %bgep, align 8
   %conv28 = zext i64 %4 to i128
   %mul31 = mul nuw i128 %conv28, %conv2
   %conv32 = and i128 %add17, 18446744073709551615
@@ -54,7 +54,7 @@ define void @bn_mul_comba8(i64* nocapture %r, i64* nocapture readonly %a, i64* n
   %add37 = add i64 %conv36, %conv20
   %cmp38 = icmp ult i64 %add37, %conv36
   %conv148 = zext i1 %cmp38 to i64
-  store i64 %conv148, i64* %r, align 8
+  store i64 %conv148, ptr %r, align 8
   ret void
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/addi-licm.ll b/llvm/test/CodeGen/PowerPC/addi-licm.ll
@@ -8,10 +8,8 @@ define double @foo() #1 {
 entry:
   %x = alloca [2048 x float], align 4
   %y = alloca [2048 x float], align 4
-  %0 = bitcast [2048 x float]* %x to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8192, i8* %0) #2
-  %1 = bitcast [2048 x float]* %y to i8*
-  call void @llvm.lifetime.start.p0i8(i64 8192, i8* %1) #2
+  call void @llvm.lifetime.start.p0(i64 8192, ptr %x) #2
+  call void @llvm.lifetime.start.p0(i64 8192, ptr %y) #2
   br label %for.body.i
 
 ; CHECK-LABEL: @foo
@@ -34,11 +32,11 @@ entry:
 for.body.i:                                       ; preds = %for.body.i.preheader, %for.body.i
   %accumulator.09.i = phi double [ %add.i, %for.body.i ], [ 0.000000e+00, %entry ]
   %i.08.i = phi i64 [ %inc.i, %for.body.i ], [ 0, %entry ]
-  %arrayidx.i = getelementptr inbounds [2048 x float], [2048 x float]* %x, i64 0, i64 %i.08.i
-  %v14 = load float, float* %arrayidx.i, align 4
+  %arrayidx.i = getelementptr inbounds [2048 x float], ptr %x, i64 0, i64 %i.08.i
+  %v14 = load float, ptr %arrayidx.i, align 4
   %conv.i = fpext float %v14 to double
-  %arrayidx1.i = getelementptr inbounds [2048 x float], [2048 x float]* %y, i64 0, i64 %i.08.i
-  %v15 = load float, float* %arrayidx1.i, align 4
+  %arrayidx1.i = getelementptr inbounds [2048 x float], ptr %y, i64 0, i64 %i.08.i
+  %v15 = load float, ptr %arrayidx1.i, align 4
   %conv2.i = fpext float %v15 to double
   %mul.i = fmul double %conv.i, %conv2.i
   %add.i = fadd double %accumulator.09.i, %mul.i
@@ -51,12 +49,12 @@ loop.exit:                                        ; preds = %for.body.i
 }
 
 ; Function Attrs: nounwind
-declare void @llvm.lifetime.start.p0i8(i64, i8* nocapture) #2
+declare void @llvm.lifetime.start.p0(i64, ptr nocapture) #2
 
-declare void @bar(float*, float*)
+declare void @bar(ptr, ptr)
 
 ; Function Attrs: nounwind
-declare void @llvm.lifetime.end.p0i8(i64, i8* nocapture) #2
+declare void @llvm.lifetime.end.p0(i64, ptr nocapture) #2
 
 attributes #0 = { nounwind readonly }
 attributes #1 = { nounwind }

diff --git a/llvm/test/CodeGen/PowerPC/addi-offset-fold.ll b/llvm/test/CodeGen/PowerPC/addi-offset-fold.ll
@@ -10,14 +10,12 @@ entry:
   %a = alloca %struct.S0, align 8
   %a.coerce.fca.0.extract = extractvalue [2 x i64] %a.coerce, 0
   %a.coerce.fca.1.extract = extractvalue [2 x i64] %a.coerce, 1
-  %a.0.a.0..sroa_cast = bitcast %struct.S0* %a to i64*
-  store i64 %a.coerce.fca.0.extract, i64* %a.0.a.0..sroa_cast, align 8
+  store i64 %a.coerce.fca.0.extract, ptr %a, align 8
   %tmp.sroa.2.0.extract.trunc = trunc i64 %a.coerce.fca.1.extract to i8
-  %a.8.a.8..sroa_idx = getelementptr inbounds %struct.S0, %struct.S0* %a, i64 0, i32 1, i64 4
-  store i8 %tmp.sroa.2.0.extract.trunc, i8* %a.8.a.8..sroa_idx, align 8
-  %a.4.a.4..sroa_idx = getelementptr inbounds %struct.S0, %struct.S0* %a, i64 0, i32 1
-  %a.4.a.4..sroa_cast = bitcast [5 x i8]* %a.4.a.4..sroa_idx to i40*
-  %a.4.a.4.bf.load = load i40, i40* %a.4.a.4..sroa_cast, align 4
+  %a.8.a.8..sroa_idx = getelementptr inbounds %struct.S0, ptr %a, i64 0, i32 1, i64 4
+  store i8 %tmp.sroa.2.0.extract.trunc, ptr %a.8.a.8..sroa_idx, align 8
+  %a.4.a.4..sroa_idx = getelementptr inbounds %struct.S0, ptr %a, i64 0, i32 1
+  %a.4.a.4.bf.load = load i40, ptr %a.4.a.4..sroa_idx, align 4
   %bf.lshr = lshr i40 %a.4.a.4.bf.load, 31
   %bf.lshr.tr = trunc i40 %bf.lshr to i32
   %bf.cast = and i32 %bf.lshr.tr, 127

diff --git a/llvm/test/CodeGen/PowerPC/addi-reassoc.ll b/llvm/test/CodeGen/PowerPC/addi-reassoc.ll
@@ -2,17 +2,17 @@
 
         %struct.X = type { [5 x i8] }
 
-define i32 @test1([4 x i32]* %P, i32 %i) {
+define i32 @test1(ptr %P, i32 %i) {
         %tmp.2 = add i32 %i, 2          ; <i32> [#uses=1]
-        %tmp.4 = getelementptr [4 x i32], [4 x i32]* %P, i32 %tmp.2, i32 1         ; <i32*> [#uses=1]
-        %tmp.5 = load i32, i32* %tmp.4               ; <i32> [#uses=1]
+        %tmp.4 = getelementptr [4 x i32], ptr %P, i32 %tmp.2, i32 1         ; <ptr> [#uses=1]
+        %tmp.5 = load i32, ptr %tmp.4               ; <i32> [#uses=1]
         ret i32 %tmp.5
 }
 
-define i32 @test2(%struct.X* %P, i32 %i) {
+define i32 @test2(ptr %P, i32 %i) {
         %tmp.2 = add i32 %i, 2          ; <i32> [#uses=1]
-        %tmp.5 = getelementptr %struct.X, %struct.X* %P, i32 %tmp.2, i32 0, i32 1          ; <i8*> [#uses=1]
-        %tmp.6 = load i8, i8* %tmp.5                ; <i8> [#uses=1]
+        %tmp.5 = getelementptr %struct.X, ptr %P, i32 %tmp.2, i32 0, i32 1          ; <ptr> [#uses=1]
+        %tmp.6 = load i8, ptr %tmp.5                ; <i8> [#uses=1]
         %tmp.7 = sext i8 %tmp.6 to i32          ; <i32> [#uses=1]
         ret i32 %tmp.7
 }

diff --git a/llvm/test/CodeGen/PowerPC/addrfuncstr.ll b/llvm/test/CodeGen/PowerPC/addrfuncstr.ll
@@ -6,19 +6,19 @@
 target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:128:128-v128:128:128-n32:64"
 target triple = "powerpc64-unknown-linux-gnu"
 
-%struct.x = type { i64 (i8*, i64, i64, %struct._IO_FILE*)* }
-%struct._IO_FILE = type { i32, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, i8*, %struct._IO_marker*, %struct._IO_FILE*, i32, i32, i64, i16, i8, [1 x i8], i8*, i64, i8*, i8*, i8*, i8*, i64, i32, [20 x i8] }
-%struct._IO_marker = type { %struct._IO_marker*, %struct._IO_FILE*, i32 }
+%struct.x = type { ptr }
+%struct._IO_FILE = type { i32, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, ptr, i32, i32, i64, i16, i8, [1 x i8], ptr, i64, ptr, ptr, ptr, ptr, i64, i32, [20 x i8] }
+%struct._IO_marker = type { ptr, ptr, i32 }
 
-@_ZL1y = internal constant %struct.x { i64 (i8*, i64, i64, %struct._IO_FILE*)* @fread }, align 8
+@_ZL1y = internal constant %struct.x { ptr @fread }, align 8
 
 ; Function Attrs: nounwind
-define %struct.x* @_Z3foov() #0 {
+define ptr @_Z3foov() #0 {
 entry:
-  ret %struct.x* @_ZL1y
+  ret ptr @_ZL1y
 }
 
-declare i64 @fread(i8*, i64, i64, %struct._IO_FILE*) #1
+declare i64 @fread(ptr, i64, i64, ptr) #1
 
 ; CHECK: .section .data.rel.ro
 ; CHECK: .quad fread

diff --git a/llvm/test/CodeGen/PowerPC/addrspacecast.ll b/llvm/test/CodeGen/PowerPC/addrspacecast.ll
@@ -1,22 +1,20 @@
 ; RUN: llc -mtriple=powerpc64le-unknown-linux-gnu %s -o - | FileCheck %s
 
 ; Check that codegen for an addrspace cast succeeds without error.
-define <4 x i32 addrspace(1)*> @f (<4 x i32*> %x) {
-  %1 = addrspacecast <4 x i32*> %x to <4 x i32 addrspace(1)*>
-  ret <4 x i32 addrspace(1)*> %1
+define <4 x ptr addrspace(1)> @f (<4 x ptr> %x) {
+  %1 = addrspacecast <4 x ptr> %x to <4 x ptr addrspace(1)>
+  ret <4 x ptr addrspace(1)> %1
   ; CHECK-LABEL: @f
 }
 
 ; Check that fairly complicated addrspace cast and operations succeed without error.
 %struct = type opaque
-define void @g (%struct addrspace(10)** %x) {
-  %1 = load %struct addrspace(10)*, %struct addrspace(10)** %x
-  %2 = addrspacecast %struct addrspace(10)* %1 to %struct addrspace(11)*
-  %3 = bitcast %struct addrspace(11)* %2 to i8 addrspace(11)*
-  %4 = getelementptr i8, i8 addrspace(11)* %3, i64 16
-  %5 = bitcast i8 addrspace(11)* %4 to %struct addrspace(10)* addrspace(11)*
-  %6 = load %struct addrspace(10)*, %struct addrspace(10)* addrspace(11)* %5
-  store %struct addrspace(10)* %6, %struct addrspace(10)** undef
+define void @g (ptr %x) {
+  %1 = load ptr addrspace(10), ptr %x
+  %2 = addrspacecast ptr addrspace(10) %1 to ptr addrspace(11)
+  %3 = getelementptr i8, ptr addrspace(11) %2, i64 16
+  %4 = load ptr addrspace(10), ptr addrspace(11) %3
+  store ptr addrspace(10) %4, ptr undef
   ret void
   ; CHECK-LABEL: @g
 }
diff --git a/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll b/llvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll
@@ -1,22 +1,22 @@
 ; RUN: llc -verify-machineinstrs %s -mtriple=powerpc64-unknown-linux-gnu -O2 -o - -optimize-regalloc=false -regalloc=fast | FileCheck %s
 
-declare void @func(i8*, i64, i64)
+declare void @func(ptr, i64, i64)
 
-define void @test(i8* %context, i32** %elementArrayPtr, i32 %value) {
+define void @test(ptr %context, ptr %elementArrayPtr, i32 %value) {
 entry:
   %cmp = icmp eq i32 %value, 0
   br i1 %cmp, label %lreturn, label %lnext
 
 lnext:
-  %elementArray = load i32*, i32** %elementArrayPtr, align 8
+  %elementArray = load ptr, ptr %elementArrayPtr, align 8
 ; CHECK: lwz [[LDREG:[0-9]+]], 140(1)                   # 4-byte Folded Reload
 ; CHECK: # implicit-def: $x[[TEMPREG:[0-9]+]]
-  %element = load i32, i32* %elementArray, align 4
+  %element = load i32, ptr %elementArray, align 4
 ; CHECK: mr [[TEMPREG]], [[LDREG]]
 ; CHECK: clrldi   4, [[TEMPREG]], 32
   %element.ext = zext i32 %element to i64
   %value.ext = zext i32 %value to i64
-  call void @func(i8* %context, i64 %value.ext, i64 %element.ext)
+  call void @func(ptr %context, i64 %value.ext, i64 %element.ext)
   br label %lreturn
 
 lreturn:

diff --git a/llvm/test/CodeGen/PowerPC/aix-AppendingLinkage.ll b/llvm/test/CodeGen/PowerPC/aix-AppendingLinkage.ll
@@ -4,8 +4,8 @@
 ; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mattr=-altivec -mtriple powerpc64-ibm-aix-xcoff < \
 ; RUN: %s | FileCheck %s
 
-@llvm.global_ctors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @foo, i8* null }]
-@llvm.global_dtors = appending global [1 x { i32, void ()*, i8* }] [{ i32, void ()*, i8* } { i32 65535, void ()* @bar, i8* null }]
+@llvm.global_ctors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @foo, ptr null }]
+@llvm.global_dtors = appending global [1 x { i32, ptr, ptr }] [{ i32, ptr, ptr } { i32 65535, ptr @bar, ptr null }]
 
 define dso_local void @foo() {
 entry:

diff --git a/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll b/llvm/test/CodeGen/PowerPC/aix-alias-alignment.ll
@@ -10,13 +10,13 @@
 ; RUN: llvm-objdump --syms %t.o | FileCheck --check-prefix=SYM %s
 
 @_MergedGlobals = global <{ i32, i32 }> <{ i32 1, i32 2 }>, align 4
-@var1 = alias i32, getelementptr inbounds (<{ i32, i32 }>, <{ i32, i32 }>* @_MergedGlobals, i32 0, i32 0)
-@var2 = alias i32, getelementptr inbounds (<{ i32, i32 }>, <{ i32, i32 }>* @_MergedGlobals, i32 0, i32 1)
-@var3 = alias i32, i32* @var2
+@var1 = alias i32, getelementptr inbounds (<{ i32, i32 }>, ptr @_MergedGlobals, i32 0, i32 0)
+@var2 = alias i32, getelementptr inbounds (<{ i32, i32 }>, ptr @_MergedGlobals, i32 0, i32 1)
+@var3 = alias i32, ptr @var2
 
 define void @foo(i32 %a1, i32 %a2, i32 %a3) {
-  store i32 %a1, i32* getelementptr inbounds (<{ i32, i32 }>, <{ i32, i32 }>* @_MergedGlobals, i32 0, i32 0), align 4
-  store i32 %a2, i32* getelementptr inbounds (<{ i32, i32 }>, <{ i32, i32 }>* @_MergedGlobals, i32 0, i32 1), align 4
+  store i32 %a1, ptr getelementptr inbounds (<{ i32, i32 }>, ptr @_MergedGlobals, i32 0, i32 0), align 4
+  store i32 %a2, ptr getelementptr inbounds (<{ i32, i32 }>, ptr @_MergedGlobals, i32 0, i32 1), align 4
   ret void
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-alias-unsupported.ll b/llvm/test/CodeGen/PowerPC/aix-alias-unsupported.ll
@@ -3,4 +3,4 @@
 ; CHECK: ERROR: alias without a base object is not yet supported on AIX
 
 @bar = global i32 42
-@test = alias i32, inttoptr(i32 42 to i32*)
+@test = alias i32, inttoptr(i32 42 to ptr)
diff --git a/llvm/test/CodeGen/PowerPC/aix-alias.ll b/llvm/test/CodeGen/PowerPC/aix-alias.ll
@@ -9,41 +9,40 @@
 ; RUN:   FileCheck --check-prefix=ASM %s
 
 @var = global i32 42
-@var1 = alias i32, i32* @var
-@var2 = alias i32, i32* @var1
-@var_l = linkonce_odr alias i32, i32* @var
-@var_i = internal alias i32, i32* @var
-@var_h = hidden alias i32, i32* @var
-@var_p = protected alias i32, i32* @var
+@var1 = alias i32, ptr @var
+@var2 = alias i32, ptr @var1
+@var_l = linkonce_odr alias i32, ptr @var
+@var_i = internal alias i32, ptr @var
+@var_h = hidden alias i32, ptr @var
+@var_p = protected alias i32, ptr @var
 
 @array = global [2 x i32] [i32 1, i32 2], align 4
-@x = global i32* bitcast (i8* getelementptr (i8, i8* bitcast ([2 x i32]* @array to i8*), i64 4) to i32*), align 4
-@bitcast_alias = alias i32*, i32** @x
+@x = global ptr getelementptr (i8, ptr @array, i64 4), align 4
+@bitcast_alias = alias ptr, ptr @x
 
 define i32 @fun() {
   ret i32 0
 }
 
 %FunTy = type i32()
-@fun_weak = weak alias %FunTy, %FunTy* @fun
-@fun_hidden = hidden alias %FunTy, %FunTy* @fun
-@fun_ptr = global i32()* @fun_weak
+@fun_weak = weak alias %FunTy, ptr @fun
+@fun_hidden = hidden alias %FunTy, ptr @fun
+@fun_ptr = global ptr @fun_weak
 
 define i32 @test() {
 entry:
-   %tmp = load i32, i32* @var1
-   %tmp1 = load i32, i32* @var2
-   %tmp0 = load i32, i32* @var_i
+   %tmp = load i32, ptr @var1
+   %tmp1 = load i32, ptr @var2
+   %tmp0 = load i32, ptr @var_i
    %tmp2 = call i32 @fun()
    %tmp3 = add i32 %tmp, %tmp2
    %tmp4 = call i32 @fun_weak()
    %tmp5 = add i32 %tmp3, %tmp4
    %tmp6 = add i32 %tmp1, %tmp5
    %tmp7 = add i32 %tmp6, %tmp0
-   %fun_ptr1 = alloca i32 ()*
-   store i32 ()* @fun_weak, i32 ()** %fun_ptr1
-   %callee.knr.cast = bitcast i32 ()** %fun_ptr1 to i32 ()*
-   %tmp8 = call i32 %callee.knr.cast()
+   %fun_ptr1 = alloca ptr
+   store ptr @fun_weak, ptr %fun_ptr1
+   %tmp8 = call i32 %fun_ptr1()
    %tmp9 = call i32 @fun_hidden()
    %tmp10 = add i32 %tmp7, %tmp8
    %tmp11 = add i32 %tmp10, %tmp9

diff --git a/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll b/llvm/test/CodeGen/PowerPC/aix-alloca-r31.ll
@@ -87,10 +87,9 @@ define i32 @varalloca() local_unnamed_addr {
 ; CHECK-ASM64-NEXT:    	.byte	0x1f                            # AllocaUsed
 ; CHECK-ASM64-NEXT:                                            # -- End function
 entry:
-  %0 = load i32, i32* @var
+  %0 = load i32, ptr @var
   %1 = alloca i8, i32 %0
-  %2 = bitcast i8* %1 to i32*
-  %3 = load i32, i32* %2
-  ret i32 %3
+  %2 = load i32, ptr %1
+  ret i32 %2
 }
 
diff --git a/llvm/test/CodeGen/PowerPC/aix-aux-header.ll b/llvm/test/CodeGen/PowerPC/aix-aux-header.ll
@@ -16,6 +16,6 @@
 
 define hidden i32 @fun() {
 entry:
-  %0 = load i32, i32* @var, align 4
+  %0 = load i32, ptr @var, align 4
   ret i32 %0
 }
diff --git a/llvm/test/CodeGen/PowerPC/aix-base-pointer.ll b/llvm/test/CodeGen/PowerPC/aix-base-pointer.ll
@@ -12,12 +12,11 @@
 
 define float @caller(float %f) {
   %AlignedBuffer = alloca [32 x i32], align 32
-  %Pointer = getelementptr inbounds [32 x i32], [32 x i32]* %AlignedBuffer, i64 0, i64 0
-  call void @callee(i32* %Pointer)
+  call void @callee(ptr %AlignedBuffer)
   ret float %f
 }
 
-declare void @callee(i32*)
+declare void @callee(ptr)
 
 ; 32BIT-LABEL: .caller:
 ; 32BIT:         stw 30, -16(1)

diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll b/llvm/test/CodeGen/PowerPC/aix-cc-abi.ll
@@ -131,7 +131,7 @@ entry:
 define  void @test_i1(i1 %b)  {
   entry:
    %frombool = zext i1 %b to i8
-   store i8 %frombool, i8* @global_i1, align 1
+   store i8 %frombool, ptr @global_i1, align 1
    ret void
 }
 
@@ -171,7 +171,7 @@ entry:
 define void @test_i1zext(i1 zeroext %b) {
   entry:
     %frombool = zext i1 %b to i8
-    store i8 %frombool, i8 * @global_i1, align 1
+    store i8 %frombool, ptr @global_i1, align 1
     ret void
   }
 
@@ -315,8 +315,8 @@ entry:
 define void @call_test_int_ptr() {
 entry:
   %b = alloca i32, align 4
-  store i32 0, i32* %b, align 4
-  call void @test_int_ptr(i32* %b)
+  store i32 0, ptr %b, align 4
+  call void @test_int_ptr(ptr %b)
   ret void
 }
 
@@ -332,10 +332,10 @@ entry:
 ; 64BIT: BL8_NOP <mcsymbol .test_int_ptr>, csr_ppc64, implicit-def dead $lr8, implicit $rm, implicit $x3, implicit $x2, implicit-def $r1
 ; 64BIT: ADJCALLSTACKUP 112, 0, implicit-def dead $r1, implicit $r1
 
-define void @test_int_ptr(i32* %a) {
+define void @test_int_ptr(ptr %a) {
 entry:
-  %a.addr = alloca i32*, align 8
-  store i32* %a, i32** %a.addr, align 8
+  %a.addr = alloca ptr, align 8
+  store ptr %a, ptr %a.addr, align 8
   ret void
 }
 
@@ -360,12 +360,12 @@ define i32 @caller(i32 %i)  {
 entry:
   %i.addr = alloca i32, align 4
   %b = alloca i8, align 1
-  store i32 %i, i32* %i.addr, align 4
-  %0 = load i32, i32* %i.addr, align 4
+  store i32 %i, ptr %i.addr, align 4
+  %0 = load i32, ptr %i.addr, align 4
   %cmp = icmp ne i32 %0, 0
   %frombool = zext i1 %cmp to i8
-  store i8 %frombool, i8* %b, align 1
-  %1 = load i8, i8* %b, align 1
+  store i8 %frombool, ptr %b, align 1
+  %1 = load i8, ptr %b, align 1
   %tobool = trunc i8 %1 to i1
   %call = call i32 @call_test_bool(i1 zeroext %tobool)
   ret i32 %call
@@ -398,7 +398,7 @@ declare i32 @call_test_bool(i1 zeroext)
 
 define void @call_test_floats() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   call float @test_floats(float %0, float %0, float %0)
   ret void
 }
@@ -440,7 +440,7 @@ entry:
 
 define void @call_test_fpr_max() {
 entry:
-  %0 = load double, double* @d1, align 8
+  %0 = load double, ptr @d1, align 8
   call double @test_fpr_max(double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0, double %0)
   ret void
 }
@@ -590,8 +590,8 @@ entry:
 
 define void @call_test_mix() {
 entry:
-  %0 = load float, float* @f1, align 4
-  %1 = load double, double* @d1, align 8
+  %0 = load float, ptr @f1, align 4
+  %1 = load double, ptr @d1, align 8
   call i32 @test_mix(float %0, i32 1, double %1, i8 signext 97)
   ret void
 }
@@ -689,9 +689,9 @@ entry:
 
 define void @call_test_vararg() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   %conv = fpext float %0 to double
-  %1 = load double, double* @d1, align 8
+  %1 = load double, ptr @d1, align 8
   call void (i32, ...) @test_vararg(i32 42, double %conv, double %1)
   ret void
 }
@@ -760,9 +760,9 @@ declare void @test_vararg(i32, ...)
 
 define void @call_test_vararg2() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   %conv = fpext float %0 to double
-  %1 = load double, double* @d1, align 8
+  %1 = load double, ptr @d1, align 8
   call void (i32, ...) @test_vararg(i32 42, double %conv, i32 42, double %1)
   ret void
 }
@@ -831,9 +831,9 @@ entry:
 
 define void @call_test_vararg3() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   %conv = fpext float %0 to double
-  %1 = load double, double* @d1, align 8
+  %1 = load double, ptr @d1, align 8
   call void (i32, ...) @test_vararg(i32 42, double %conv, i64 42, double %1)
   ret void
 }
@@ -904,7 +904,7 @@ entry:
 
 define void @call_test_vararg4() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   call void (i32, ...) @test_vararg(i32 42, float %0)
   ret void
 }
@@ -957,11 +957,11 @@ entry:
 ; Basic saving of integral type arguments to the parameter save area.
 define void @call_test_stackarg_int() {
 entry:
-  %0 = load i8, i8* @c, align 1
-  %1 = load i16, i16* @si, align 2
-  %2 = load i32, i32* @i, align 4
-  %3 = load i64, i64* @lli, align 8
-  %4 = load i32, i32* @i, align 4
+  %0 = load i8, ptr @c, align 1
+  %1 = load i16, ptr @si, align 2
+  %2 = load i32, ptr @i, align 4
+  %3 = load i64, ptr @lli, align 8
+  %4 = load i32, ptr @i, align 4
   call void @test_stackarg_int(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i8 zeroext %0, i16 signext %1, i32 %2, i64 %3, i32 %4)
   ret void
 }
@@ -1084,8 +1084,8 @@ declare void @test_stackarg_int(i32, i32, i32, i32, i32, i32, i32, i32, i8 zeroe
 ; The float and double arguments will pass in both fpr as well as parameter save area.
 define void @call_test_stackarg_float() {
 entry:
-  %0 = load float, float* @f, align 4
-  %1 = load double, double* @d, align 8
+  %0 = load float, ptr @f, align 4
+  %1 = load double, ptr @d, align 8
   call void @test_stackarg_float(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, float %0, double %1)
   ret void
 }
@@ -1176,7 +1176,7 @@ declare void @test_stackarg_float(i32, i32, i32, i32, i32, i32, i32, i32, float,
 
 define void @call_test_stackarg_float2() {
 entry:
-  %0 = load double, double* @d, align 8
+  %0 = load double, ptr @d, align 8
   call void (i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, double %0)
   ret void
 }
@@ -1254,8 +1254,8 @@ declare void @test_stackarg_float2(i32, i32, i32, i32, i32, i32, ...)
 ; A double arg will pass on the stack in PPC32 if there is only one available GPR.
 define void @call_test_stackarg_float3() {
 entry:
-  %0 = load double, double* @d, align 8
-  %1 = load float, float* @f, align 4
+  %0 = load double, ptr @d, align 8
+  %1 = load float, ptr @f, align 4
   call void (i32, i32, i32, i32, i32, i32, i32, ...) @test_stackarg_float3(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, double %0, float %1)
   ret void
 }
@@ -1460,14 +1460,14 @@ entry:
 
 define void @caller_ints_stack() {
 entry:
-  %0 = load i64, i64* @ll1, align 8
-  %1 = load i16, i16* @si1, align 2
-  %2 = load i8, i8* @ch, align 1
-  %3 = load i32, i32* @ui, align 4
-  %4 = load i32, i32* @sint, align 4
-  %5 = load i64, i64* @ll2, align 8
-  %6 = load i8, i8* @uc1, align 1
-  %7 = load i32, i32* @i1, align 4
+  %0 = load i64, ptr @ll1, align 8
+  %1 = load i16, ptr @si1, align 2
+  %2 = load i8, ptr @ch, align 1
+  %3 = load i32, ptr @ui, align 4
+  %4 = load i32, ptr @sint, align 4
+  %5 = load i64, ptr @ll2, align 8
+  %6 = load i8, ptr @uc1, align 1
+  %7 = load i32, ptr @i1, align 4
   %call = call i64 @test_ints_stack(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i64 %0, i16 signext %1, i8 zeroext %2, i32 %3, i32 %4, i64 %5, i8 zeroext %6, i32 %7)
   ret void
 }
@@ -1646,7 +1646,7 @@ entry:
 define void @test_i1_stack(i32 %a, i32 %c, i32 %d, i32 %e, i32 %f, i32 %g, i32 %h, i32 %i, i1 zeroext %b) {
   entry:
     %frombool = zext i1 %b to i8
-    store i8 %frombool, i8* @globali1, align 1
+    store i8 %frombool, ptr @globali1, align 1
     ret void
 }
 
@@ -1807,9 +1807,9 @@ define double @test_fpr_stack(double %d1, double %d2, double %d3, double %d4, do
 
 define void @caller_fpr_stack() {
 entry:
-  %0 = load float, float* @f14, align 4
-  %1 = load double, double* @d15, align 8
-  %2 = load float, float* @f16, align 4
+  %0 = load float, ptr @f14, align 4
+  %1 = load double, ptr @d15, align 8
+  %2 = load float, ptr @f16, align 4
   %call = call double @test_fpr_stack(double 1.000000e-01, double 2.000000e-01, double 3.000000e-01, double 4.000000e-01, double 5.000000e-01, double 6.000000e-01, double 0x3FE6666666666666, double 8.000000e-01, double 9.000000e-01, double 1.000000e-01, double 1.100000e-01, double 1.200000e-01, double 1.300000e-01, float %0, double %1, float %2)
   ret void
 }

diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll b/llvm/test/CodeGen/PowerPC/aix-cc-altivec.ll
@@ -7,7 +7,7 @@
 
 define void @call_test_vararg() {
 entry:
-  %0 = load float, float* @f1, align 4
+  %0 = load float, ptr @f1, align 4
   %conv = fpext float %0 to double
   call void (i32, ...) @test_vararg(i32 42, double %conv, float %0)
   ret void

diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval-limitation3.ll
@@ -7,10 +7,10 @@ define void @bar() {
 entry:
   %s1 = alloca %struct.S, align 32
   %agg.tmp = alloca %struct.S, align 32
-  call void @foo(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, %struct.S* byval(%struct.S) align 32 %agg.tmp)
+  call void @foo(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, ptr byval(%struct.S) align 32 %agg.tmp)
   ret void
 }
 
-declare void @foo(i32, i32, i32, i32, i32, i32, i32, i32, %struct.S* byval(%struct.S) align 32)
+declare void @foo(i32, i32, i32, i32, i32, i32, i32, i32, ptr byval(%struct.S) align 32)
 
 ; CHECK: LLVM ERROR: Pass-by-value arguments with alignment greater than register width are not supported.
diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval-mem.ll
@@ -22,7 +22,7 @@
 
 define void @call_test_byval_mem1() {
 entry:
-  %call = call zeroext i8 @test_byval_mem1(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, %struct_S1* byval(%struct_S1) align 1 @gS1)
+  %call = call zeroext i8 @test_byval_mem1(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, ptr byval(%struct_S1) align 1 @gS1)
   ret void
 }
 
@@ -43,10 +43,9 @@ entry:
 ; ASM64BIT:       bl .test_byval_mem1
 ; ASM64BIT:       addi 1, 1, 128
 
-define zeroext  i8 @test_byval_mem1(i32, i32, i32, i32, i32, i32, i32, i32, %struct_S1* byval(%struct_S1) align 1 %s) {
+define zeroext  i8 @test_byval_mem1(i32, i32, i32, i32, i32, i32, i32, i32, ptr byval(%struct_S1) align 1 %s) {
 entry:
-  %gep = getelementptr inbounds %struct_S1, %struct_S1* %s, i32 0, i32 0
-  %load = load i8, i8* %gep, align 1
+  %load = load i8, ptr %s, align 1
   ret i8 %load
 }
 
@@ -73,7 +72,7 @@ entry:
 
 define void @call_test_byval_mem2() {
 entry:
-  %call = call zeroext i8 @test_byval_mem2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, %struct_S256* byval(%struct_S256) align 1 @gS256)
+  %call = call zeroext i8 @test_byval_mem2(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, ptr byval(%struct_S256) align 1 @gS256)
   ret void
 }
 
@@ -143,10 +142,10 @@ entry:
 ; ASM64BIT:       addi 1, 1, 368
 
 
-define zeroext i8 @test_byval_mem2(i32, i32, i32, i32, i32, i32, i32, i32, %struct_S256* byval(%struct_S256) align 1 %s) {
+define zeroext i8 @test_byval_mem2(i32, i32, i32, i32, i32, i32, i32, i32, ptr byval(%struct_S256) align 1 %s) {
 entry:
-  %gep = getelementptr inbounds %struct_S256, %struct_S256* %s, i32 0, i32 0, i32 255
-  %load = load i8, i8* %gep, align 1
+  %gep = getelementptr inbounds %struct_S256, ptr %s, i32 0, i32 0, i32 255
+  %load = load i8, ptr %gep, align 1
   ret i8 %load
 }
 
@@ -172,7 +171,7 @@ entry:
 
 define void @call_test_byval_mem3() {
 entry:
-  call void @test_byval_mem3(i32 42, float 0x40091EB860000000, %struct_S57* byval(%struct_S57) align 1 @gS57)
+  call void @test_byval_mem3(i32 42, float 0x40091EB860000000, ptr byval(%struct_S57) align 1 @gS57)
   ret void
 }
 
@@ -234,7 +233,7 @@ entry:
 ; ASM64BIT:       bl .test_byval_mem3
 ; ASM64BIT:       addi 1, 1, 128
 
-define void @test_byval_mem3(i32, float, %struct_S57* byval(%struct_S57) align 1 %s) {
+define void @test_byval_mem3(i32, float, ptr byval(%struct_S57) align 1 %s) {
 entry:
   ret void
 }
@@ -288,7 +287,7 @@ entry:
 
 define void @call_test_byval_mem4() {
 entry:
-  call void @test_byval_mem4(i32 42, %struct_S31* byval(%struct_S31) align 1 @gS31, %struct_S256* byval(%struct_S256) align 1 @gS256)
+  call void @test_byval_mem4(i32 42, ptr byval(%struct_S31) align 1 @gS31, ptr byval(%struct_S256) align 1 @gS256)
   ret void
 }
 
@@ -385,7 +384,7 @@ entry:
 ; ASM64BIT:       bl .test_byval_mem4
 ; ASM64BIT:       addi 1, 1, 352
 
-define void @test_byval_mem4(i32, %struct_S31* byval(%struct_S31) align 1, %struct_S256* byval(%struct_S256) align 1 %s) {
+define void @test_byval_mem4(i32, ptr byval(%struct_S31) align 1, ptr byval(%struct_S256) align 1 %s) {
 entry:
   ret void
 }

diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval-split.ll
@@ -9,12 +9,12 @@
 %struct.Spill = type { [12 x i64 ] }
 @GS = external global %struct.Spill, align 4
 
-define i64 @test(%struct.Spill* byval(%struct.Spill) align 4 %s) {
+define i64 @test(ptr byval(%struct.Spill) align 4 %s) {
 entry:
-  %arrayidx_a = getelementptr inbounds %struct.Spill, %struct.Spill* %s, i32 0, i32 0, i32 2
-  %arrayidx_b = getelementptr inbounds %struct.Spill, %struct.Spill* %s, i32 0, i32 0, i32 10
-  %a = load i64, i64* %arrayidx_a
-  %b = load i64, i64* %arrayidx_b
+  %arrayidx_a = getelementptr inbounds %struct.Spill, ptr %s, i32 0, i32 0, i32 2
+  %arrayidx_b = getelementptr inbounds %struct.Spill, ptr %s, i32 0, i32 0, i32 10
+  %a = load i64, ptr %arrayidx_a
+  %b = load i64, ptr %arrayidx_b
   %add = add i64 %a, %b
   ret i64 %add
 }

diff --git a/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll b/llvm/test/CodeGen/PowerPC/aix-cc-byval.ll
@@ -22,7 +22,7 @@
 define void @call_test_byval_1Byte() {
 entry:
   %s0 = alloca %struct.S0, align 8
-  %call = call zeroext i8 @test_byval_1Byte(%struct.S0* byval(%struct.S0) align 1 %s0, %struct.S1* byval(%struct.S1) align 1 @gS1)
+  %call = call zeroext i8 @test_byval_1Byte(ptr byval(%struct.S0) align 1 %s0, ptr byval(%struct.S1) align 1 @gS1)
   ret void
 }
 
@@ -63,10 +63,9 @@ entry:
 ; ASM64-NEXT:  addi 1, 1, 128
 
 
-define zeroext i8 @test_byval_1Byte(%struct.S0* byval(%struct.S0) align 1 %s0, %struct.S1* byval(%struct.S1) align 1 %s) {
+define zeroext i8 @test_byval_1Byte(ptr byval(%struct.S0) align 1 %s0, ptr byval(%struct.S1) align 1 %s) {
 entry:
-  %arrayidx = getelementptr inbounds %struct.S1, %struct.S1* %s, i32 0, i32 0, i32 0
-  %0 = load i8, i8* %arrayidx, align 1
+  %0 = load i8, ptr %s, align 1
   ret i8 %0
 }
 
@@ -118,8 +117,8 @@ entry:
 
 define void @call_test_byval_2Byte() {
 entry:
-  %0 = load float, float* @f, align 4
-  %call = call zeroext i8 @test_byval_2Byte(i32 signext 42, float %0, %struct.S2* byval(%struct.S2) align 1 @gS2, float %0, i32 signext 43)
+  %0 = load float, ptr @f, align 4
+  %call = call zeroext i8 @test_byval_2Byte(i32 signext 42, float %0, ptr byval(%struct.S2) align 1 @gS2, float %0, i32 signext 43)
   ret void
 }
 
@@ -182,10 +181,10 @@ entry:
 ; ASM64-NEXT:  nop
 ; ASM64-NEXT:  addi 1, 1, 112
 
-define zeroext i8 @test_byval_2Byte(i32, float, %struct.S2* byval(%struct.S2) align 1 %s, float, i32) {
+define zeroext i8 @test_byval_2Byte(i32, float, ptr byval(%struct.S2) align 1 %s, float, i32) {
 entry:
-  %arrayidx = getelementptr inbounds %struct.S2, %struct.S2* %s, i32 0, i32 0, i32 1
-  %4 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds %struct.S2, ptr %s, i32 0, i32 0, i32 1
+  %4 = load i8, ptr %arrayidx, align 1
   ret i8 %4
 }
 
@@ -222,7 +221,7 @@ entry:
 
 define void @call_test_byval_3Byte() {
 entry:
-  %call = call zeroext i16 @test_byval_3Byte(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, %struct.S3* byval(%struct.S3) align 1 @gS3, i32 42)
+  %call = call zeroext i16 @test_byval_3Byte(i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, ptr byval(%struct.S3) align 1 @gS3, i32 42)
   ret void
 }
 
@@ -307,10 +306,10 @@ entry:
 ; ASM64-NEXT:  nop
 
 
-define zeroext i16 @test_byval_3Byte(i32, i32, i32, i32, i32, i32, i32, %struct.S3* byval(%struct.S3) align 1 %s, i32) {
+define zeroext i16 @test_byval_3Byte(i32, i32, i32, i32, i32, i32, i32, ptr byval(%struct.S3) align 1 %s, i32) {
 entry:
-  %gep = getelementptr inbounds %struct.S3, %struct.S3* %s, i32 0, i32 1
-  %8 = load i16, i16* %gep, align 1
+  %gep = getelementptr inbounds %struct.S3, ptr %s, i32 0, i32 1
+  %8 = load i16, ptr %gep, align 1
   ret i16 %8
 }
 
@@ -354,7 +353,7 @@ define void @call_test_byval_4Byte() {
 entry:
   %s0 = alloca %struct.S0, align 8
   %s4a = alloca %struct.S4A, align 4
-  %call = call signext i32 @test_byval_4Byte(%struct.S4* byval(%struct.S4) align 1 @gS4, %struct.S0* byval(%struct.S0) align 1 %s0, %struct.S4A* byval(%struct.S4A) align 4 %s4a)
+  %call = call signext i32 @test_byval_4Byte(ptr byval(%struct.S4) align 1 @gS4, ptr byval(%struct.S0) align 1 %s0, ptr byval(%struct.S4A) align 4 %s4a)
   ret void
 }
 
@@ -397,12 +396,11 @@ entry:
 ; ASM64-NEXT:  addi 1, 1, 128
 
 
-define signext i32 @test_byval_4Byte(%struct.S4* byval(%struct.S4) align 1 %s, %struct.S0* byval(%struct.S0) align 1, %struct.S4A* byval(%struct.S4A) align 4 %s4a) {
+define signext i32 @test_byval_4Byte(ptr byval(%struct.S4) align 1 %s, ptr byval(%struct.S0) align 1, ptr byval(%struct.S4A) align 4 %s4a) {
 entry:
-  %arrayidx = getelementptr inbounds %struct.S4, %struct.S4* %s, i32 0, i32 0, i32 3
-  %gep = getelementptr inbounds %struct.S4A, %struct.S4A* %s4a, i32 0, i32 0
-  %1 = load i8, i8* %arrayidx, align 1
-  %2 = load i32, i32* %gep, align 4
+  %arrayidx = getelementptr inbounds %struct.S4, ptr %s, i32 0, i32 0, i32 3
+  %1 = load i8, ptr %arrayidx, align 1
+  %2 = load i32, ptr %s4a, align 4
   %conv = zext i8 %1 to i32
   %add = add nsw i32 %2, %conv
   ret i32 %add
@@ -467,11 +465,11 @@ entry:
 
 define void @call_test_byval_5Byte() {
 entry:
-  %call = call zeroext i8 @test_byval_5Byte(%struct.S5* byval(%struct.S5) align 1 @gS5)
+  %call = call zeroext i8 @test_byval_5Byte(ptr byval(%struct.S5) align 1 @gS5)
   ret void
 }
 
-declare zeroext i8 @test_byval_5Byte(%struct.S5* byval(%struct.S5) align 1)
+declare zeroext i8 @test_byval_5Byte(ptr byval(%struct.S5) align 1)
 
 ; CHECK-LABEL: name: call_test_byval_5Byte{{.*}}
 
@@ -522,11 +520,11 @@ declare zeroext i8 @test_byval_5Byte(%struct.S5* byval(%struct.S5) align 1)
 
 define void @call_test_byval_6Byte() {
 entry:
-  %call = call zeroext i8 @test_byval_6Byte(%struct.S6* byval(%struct.S6) align 1 @gS6)
+  %call = call zeroext i8 @test_byval_6Byte(ptr byval(%struct.S6) align 1 @gS6)
   ret void
 }
 
-declare zeroext i8 @test_byval_6Byte(%struct.S6* byval(%struct.S6) align 1)
+declare zeroext i8 @test_byval_6Byte(ptr byval(%struct.S6) align 1)
 
 ; CHECK-LABEL: name: call_test_byval_6Byte{{.*}}
 
@@ -577,11 +575,11 @@ declare zeroext i8 @test_byval_6Byte(%struct.S6* byval(%struct.S6) align 1)
 
 define void @call_test_byval_7Byte() {
 entry:
-  %call = call zeroext i8 @test_byval_7Byte(%struct.S7* byval(%struct.S7) align 1 @gS7)
+  %call = call zeroext i8 @test_byval_7Byte(ptr byval(%struct.S7) align 1 @gS7)
   ret void
 }
 
-declare zeroext i8 @test_byval_7Byte(%struct.S7* byval(%struct.S7) align 1)
+declare zeroext i8 @test_byval_7Byte(ptr byval(%struct.S7) align 1)
 
 ; CHECK-LABEL: name: call_test_byval_7Byte{{.*}}
 
@@ -640,11 +638,11 @@ declare zeroext i8 @test_byval_7Byte(%struct.S7* byval(%struct.S7) align 1)
 
 define void @call_test_byval_8Byte() {
 entry:
-  %call = call zeroext i8 @test_byval_8Byte(%struct.S8* byval(%struct.S8) align 1 @gS8)
+  %call = call zeroext i8 @test_byval_8Byte(ptr byval(%struct.S8) align 1 @gS8)
   ret void
 }
 
-declare zeroext i8 @test_byval_8Byte(%struct.S8* byval(%struct.S8) align 1)
+declare zeroext i8 @test_byval_8Byte(ptr byval(%struct.S8) align 1)
 
 ; CHECK-LABEL: name: call_test_byval_8Byte{{.*}}
 
@@ -685,7 +683,7 @@ declare zeroext i8 @test_byval_8Byte(%struct.S8* byval(%struct.S8) align 1)
 
 define void @call_test_byval_32Byte() {
 entry:
-  %call = call zeroext i8 @test_byval_32Byte(%struct.S32* byval(%struct.S32) align 1 @gS32)
+  %call = call zeroext i8 @test_byval_32Byte(ptr byval(%struct.S32) align 1 @gS32)
   ret void
 }
 
@@ -740,10 +738,10 @@ entry:
 ; ASM64-NEXT:  bl .test_byval_32Byte
 ; ASM64-NEXT:  nop
 
-define zeroext i8 @test_byval_32Byte(%struct.S32* byval(%struct.S32) align 1 %s) {
+define zeroext i8 @test_byval_32Byte(ptr byval(%struct.S32) align 1 %s) {
 entry:
-  %arrayidx = getelementptr inbounds %struct.S32, %struct.S32* %s, i32 0, i32 0, i32 21
-  %0 = load i8, i8* %arrayidx, align 1
+  %arrayidx = getelementptr inbounds %struct.S32, ptr %s, i32 0, i32 0, i32 21
+  %0 = load i8, ptr %arrayidx, align 1
   ret i8 %0
 }
 
@@ -808,7 +806,7 @@ entry:
 
 define void @call_test_byval_31Byte() {
 entry:
-  %call = call double @test_byval_31Byte(%struct.S31* byval(%struct.S31) align 1 @gS31)
+  %call = call double @test_byval_31Byte(ptr byval(%struct.S31) align 1 @gS31)
   ret void
 }
 
@@ -882,10 +880,10 @@ entry:
 
 
 
-define double @test_byval_31Byte(%struct.S31* byval(%struct.S31) align 1 %s) {
+define double @test_byval_31Byte(ptr byval(%struct.S31) align 1 %s) {
 entry:
-  %gep = getelementptr inbounds %struct.S31, %struct.S31* %s, i32 0, i32 3
-  %load = load double, double* %gep, align 1
+  %gep = getelementptr inbounds %struct.S31, ptr %s, i32 0, i32 3
+  %load = load double, ptr %gep, align 1
   ret double %load
 }
 
@@ -946,15 +944,14 @@ entry:
 define i32 @call_test_byval_homogeneous_float_struct() {
 entry:
   %s = alloca %struct.F, align 4
-  %0 = bitcast %struct.F* %s to i8*
-  call void @llvm.memset.p0i8.i32(i8* align 4 %0, i8 0, i32 12, i1 false)
-  %call = call i32 @test_byval_homogeneous_float_struct(%struct.F* byval(%struct.F) align 4 %s)
+  call void @llvm.memset.p0.i32(ptr align 4 %s, i8 0, i32 12, i1 false)
+  %call = call i32 @test_byval_homogeneous_float_struct(ptr byval(%struct.F) align 4 %s)
   ret i32 %call
 }
 
-declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg)
+declare void @llvm.memset.p0.i32(ptr nocapture writeonly, i8, i32, i1 immarg)
 
-declare i32 @test_byval_homogeneous_float_struct(%struct.F* byval(%struct.F) align 4)
+declare i32 @test_byval_homogeneous_float_struct(ptr byval(%struct.F) align 4)
 
 ; CHECK-LABEL: name: call_test_byval_homogeneous_float_struct{{.*}}
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-complex.ll b/llvm/test/CodeGen/PowerPC/aix-complex.ll
@@ -12,11 +12,11 @@ declare void @anchor(...)
 define dso_local { double, double } @dblCmplxRetCallee()  {
 entry:
   %retval = alloca { double, double }, align 8
-  %retval.realp = getelementptr inbounds { double, double }, { double, double }* %retval, i32 0, i32 0
-  store double 1.000000e+00, double* %retval.realp, align 8
-  %retval.imagp = getelementptr inbounds { double, double }, { double, double }* %retval, i32 0, i32 1
-  store double 0.000000e+00, double* %retval.imagp, align 8
-  %0 = load { double, double }, { double, double }* %retval, align 8
+  %retval.realp = getelementptr inbounds { double, double }, ptr %retval, i32 0, i32 0
+  store double 1.000000e+00, ptr %retval.realp, align 8
+  %retval.imagp = getelementptr inbounds { double, double }, ptr %retval, i32 0, i32 1
+  store double 0.000000e+00, ptr %retval.imagp, align 8
+  %0 = load { double, double }, ptr %retval, align 8
   ret { double, double } %0
 }
 
@@ -31,9 +31,9 @@ entry:
   %call = call { double, double } @dblCmplxRetCallee()
   %0 = extractvalue { double, double } %call, 0
   %1 = extractvalue { double, double } %call, 1
-  store double %0, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd, i32 0, i32 0), align 8
-  store double %1, double* getelementptr inbounds ({ double, double }, { double, double }* @gcd, i32 0, i32 1), align 8
-  call void bitcast (void (...)* @anchor to void ()*)()
+  store double %0, ptr getelementptr inbounds ({ double, double }, ptr @gcd, i32 0, i32 0), align 8
+  store double %1, ptr getelementptr inbounds ({ double, double }, ptr @gcd, i32 0, i32 1), align 8
+  call void @anchor()
   ret void
 }
 
@@ -49,11 +49,11 @@ entry:
 define dso_local { float, float } @fltCmplxRetCallee()  {
 entry:
   %retval = alloca { float, float }, align 4
-  %retval.realp = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 0
-  %retval.imagp = getelementptr inbounds { float, float }, { float, float }* %retval, i32 0, i32 1
-  store float 1.000000e+00, float* %retval.realp, align 4
-  store float 0.000000e+00, float* %retval.imagp, align 4
-  %0 = load { float, float }, { float, float }* %retval, align 4
+  %retval.realp = getelementptr inbounds { float, float }, ptr %retval, i32 0, i32 0
+  %retval.imagp = getelementptr inbounds { float, float }, ptr %retval, i32 0, i32 1
+  store float 1.000000e+00, ptr %retval.realp, align 4
+  store float 0.000000e+00, ptr %retval.imagp, align 4
+  %0 = load { float, float }, ptr %retval, align 4
   ret { float, float } %0
 }
 
@@ -68,9 +68,9 @@ entry:
   %call = call { float, float } @fltCmplxRetCallee()
   %0 = extractvalue { float, float } %call, 0
   %1 = extractvalue { float, float } %call, 1
-  store float %0, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf, i32 0, i32 0), align 4
-  store float %1, float* getelementptr inbounds ({ float, float }, { float, float }* @gcf, i32 0, i32 1), align 4
-  call void bitcast (void (...)* @anchor to void ()*)()
+  store float %0, ptr getelementptr inbounds ({ float, float }, ptr @gcf, i32 0, i32 0), align 4
+  store float %1, ptr getelementptr inbounds ({ float, float }, ptr @gcf, i32 0, i32 1), align 4
+  call void @anchor()
   ret void
 }
 
@@ -86,11 +86,11 @@ entry:
 define dso_local { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee()  {
 entry:
   %retval = alloca { ppc_fp128, ppc_fp128 }, align 16
-  %retval.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 0
-  %retval.imagp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, i32 0, i32 1
-  store ppc_fp128 0xM7ffeffffffffffffffffffffffffffff, ppc_fp128* %retval.realp, align 16
-  store ppc_fp128 0xM3ffefffffffffffffffffffffffffffe, ppc_fp128* %retval.imagp, align 16
-  %0 = load { ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* %retval, align 16
+  %retval.realp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, ptr %retval, i32 0, i32 0
+  %retval.imagp = getelementptr inbounds { ppc_fp128, ppc_fp128 }, ptr %retval, i32 0, i32 1
+  store ppc_fp128 0xM7ffeffffffffffffffffffffffffffff, ptr %retval.realp, align 16
+  store ppc_fp128 0xM3ffefffffffffffffffffffffffffffe, ptr %retval.imagp, align 16
+  %0 = load { ppc_fp128, ppc_fp128 }, ptr %retval, align 16
   ret { ppc_fp128, ppc_fp128 } %0
 }
 
@@ -107,9 +107,9 @@ entry:
   %call = call { ppc_fp128, ppc_fp128 } @fp128CmplxRetCallee()
   %0 = extractvalue { ppc_fp128, ppc_fp128 } %call, 0
   %1 = extractvalue { ppc_fp128, ppc_fp128 } %call, 1
-  store ppc_fp128 %0, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcfp128, i32 0, i32 0), align 16
-  store ppc_fp128 %1, ppc_fp128* getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, { ppc_fp128, ppc_fp128 }* @gcfp128, i32 0, i32 1), align 16
-  call void bitcast (void (...)* @anchor to void ()*)()
+  store ppc_fp128 %0, ptr getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, ptr @gcfp128, i32 0, i32 0), align 16
+  store ppc_fp128 %1, ptr getelementptr inbounds ({ ppc_fp128, ppc_fp128 }, ptr @gcfp128, i32 0, i32 1), align 16
+  call void @anchor()
   ret void
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll b/llvm/test/CodeGen/PowerPC/aix-dfltabi-rsrvd-reg.ll
@@ -7,33 +7,33 @@
 ; RUN:     -stop-after=machine-cp -mtriple powerpc64-ibm-aix-xcoff < %s | \
 ; RUN:   FileCheck %s --check-prefix=EXTABI
 
-define double @dbl_test(double %a, double* %b) local_unnamed_addr {
+define double @dbl_test(double %a, ptr %b) local_unnamed_addr {
 entry:
-  %0 = load volatile double, double* %b, align 4
+  %0 = load volatile double, ptr %b, align 4
   %add = fadd double %0, %a
-  store volatile double %add, double* %b, align 4
+  store volatile double %add, ptr %b, align 4
   ;; Clobbered all vector and floating point registers. In the default Altivec
   ;; ABI this forces a register spill since no registers are free to use.
   tail call void asm sideeffect "nop", "~{v19},~{v18},~{v17},~{v16},~{v15},~{v14},~{v13},~{v12},~{v11},~{v10},~{v9},~{v8},~{v7},~{v6},~{v5},~{v4},~{v3},~{v2},~{v1},~{v0},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
   %mul = fmul double %a, %a
-  %1 = load volatile double, double* %b, align 4
+  %1 = load volatile double, ptr %b, align 4
   %add1 = fadd double %mul, %1
-  store volatile double %add1, double* %b, align 4
-  %2 = load volatile double, double* %b, align 4
+  store volatile double %add1, ptr %b, align 4
+  %2 = load volatile double, ptr %b, align 4
   ret double %2
 }
 
-define <4 x i32> @vec_test(<4 x i32> %a,  <4 x i32>* %b) local_unnamed_addr {
+define <4 x i32> @vec_test(<4 x i32> %a,  ptr %b) local_unnamed_addr {
 entry:
-  %0 = load volatile <4 x i32>, <4 x i32>* %b, align 4
+  %0 = load volatile <4 x i32>, ptr %b, align 4
   %add = add <4 x i32> %0, %a
-  store volatile <4 x i32> %add, <4 x i32>* %b, align 4
+  store volatile <4 x i32> %add, ptr %b, align 4
   tail call void asm sideeffect "nop", "~{v19},~{v18},~{v17},~{v16},~{v15},~{v14},~{v13},~{v12},~{v11},~{v10},~{v9},~{v8},~{v7},~{v6},~{v5},~{v4},~{v3},~{v2},~{v1},~{v0},~{f0},~{f1},~{f2},~{f3},~{f4},~{f5},~{f6},~{f7},~{f8},~{f9},~{f10},~{f11},~{f12},~{f13},~{f14},~{f15},~{f16},~{f17},~{f18},~{f19},~{f20},~{f21},~{f22},~{f23},~{f24},~{f25},~{f26},~{f27},~{f28},~{f29},~{f30},~{f31}"()
   %mul = mul <4 x i32> %a, %a
-  %1 = load volatile <4 x i32>, <4 x i32>* %b, align 4
+  %1 = load volatile <4 x i32>, ptr %b, align 4
   %add1 = add <4 x i32> %mul, %1
-  store volatile <4 x i32> %add1, <4 x i32>* %b, align 4
-  %2 = load volatile <4 x i32>, <4 x i32>* %b, align 4
+  store volatile <4 x i32> %add1, ptr %b, align 4
+  %2 = load volatile <4 x i32>, ptr %b, align 4
   ret <4 x i32> %2
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-dwarf.ll b/llvm/test/CodeGen/PowerPC/aix-dwarf.ll
@@ -18,7 +18,7 @@ target datalayout = "E-m:a-p:32:32-i64:64-n32"
 define i32 @main() #0 !dbg !8 {
 entry:
   %retval = alloca i32, align 4
-  store i32 0, i32* %retval, align 4
+  store i32 0, ptr %retval, align 4
   ret i32 0, !dbg !12
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-ehinfo-sym.ll b/llvm/test/CodeGen/PowerPC/aix-ehinfo-sym.ll
@@ -10,9 +10,9 @@ declare i32 @func1() #0
 declare i32 @__xlcxx_personality_v1(...)
 
 ; Function Attrs: mustprogress noinline optnone
-define linkonce_odr void @func2() #1 align 2 personality i8* bitcast (i32 (...)* @__xlcxx_personality_v1 to i8*) {
+define linkonce_odr void @func2() #1 align 2 personality ptr @__xlcxx_personality_v1 {
 entry:
-  %0 = alloca i8*, align 8
+  %0 = alloca ptr, align 8
   %1 = alloca i32, align 4
   br label %2
 
@@ -24,23 +24,23 @@ entry:
           to label %2 unwind label %lpad
 
 lpad:                                                ; preds = %3
-  %5 = landingpad { i8*, i32 }
+  %5 = landingpad { ptr, i32 }
           cleanup
-  %6 = extractvalue { i8*, i32 } %5, 0
-  store i8* %6, i8** %0, align 8
-  %7 = extractvalue { i8*, i32 } %5, 1
-  store i32 %7, i32* %1, align 4
+  %6 = extractvalue { ptr, i32 } %5, 0
+  store ptr %6, ptr %0, align 8
+  %7 = extractvalue { ptr, i32 } %5, 1
+  store i32 %7, ptr %1, align 4
   br label %eh.resume
 
 8:                                               ; preds = 2%
   ret void
 
 eh.resume:                                               ; preds = %lpad
-  %9 = load i8*, i8** %0, align 8
-  %10 = load i32, i32* %1, align 4
-  %11 = insertvalue { i8*, i32 } undef, i8* %9, 0
-  %12 = insertvalue { i8*, i32 } %11, i32 %10, 1
-  resume { i8*, i32 } %12
+  %9 = load ptr, ptr %0, align 8
+  %10 = load i32, ptr %1, align 4
+  %11 = insertvalue { ptr, i32 } undef, ptr %9, 0
+  %12 = insertvalue { ptr, i32 } %11, i32 %10, 1
+  resume { ptr, i32 } %12
 }
 
 attributes #0 = { nounwind }

diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-clobber-register.ll
@@ -11,17 +11,17 @@ entry:
   %fvalue = alloca float, align 4
   %taken = alloca i32, align 4
   %data = alloca i32, align 4
-  store float 1.000000e+00, float* %fvalue, align 4
-  %0 = load float, float* %fvalue, align 4
+  store float 1.000000e+00, ptr %fvalue, align 4
+  %0 = load float, ptr %fvalue, align 4
   %1 = call float asm "fneg $0,$1\0A\09", "=b,b,~{f31},~{f30},~{f29},~{f28},~{f27}"(float %0)
-  store float %1, float* %fvalue, align 4
-  store i32 123, i32* %data, align 4
-  %2 = load i32, i32* %data, align 4
+  store float %1, ptr %fvalue, align 4
+  store i32 123, ptr %data, align 4
+  %2 = load i32, ptr %data, align 4
   %3 = call i32 asm "cntlzw $0, $1\0A\09", "=b,b,~{r31},~{r30},~{r29},~{r28}"(i32 %2)
-  store i32 %3, i32* %taken, align 4
-  %4 = load i32, i32* %taken, align 4
+  store i32 %3, ptr %taken, align 4
+  %4 = load i32, ptr %taken, align 4
   %conv = sitofp i32 %4 to float
-  %5 = load float, float* %fvalue, align 4
+  %5 = load float, ptr %fvalue, align 4
   %add = fadd float %conv, %5
   ret float %add
 }
@@ -30,9 +30,9 @@ define <4 x i32> @foov() #0 {
 entry:
   %taken = alloca <4 x i32>, align 16
   %data = alloca <4 x i32>, align 16
-  store <4 x i32> <i32 123, i32 0, i32 0, i32 0>, <4 x i32>* %data, align 16
+  store <4 x i32> <i32 123, i32 0, i32 0, i32 0>, ptr %data, align 16
   call void asm sideeffect "", "~{v31},~{v30},~{v29},~{v28}"() 
-  %0 = load <4 x i32>, <4 x i32>* %taken, align 16
+  %0 = load <4 x i32>, ptr %taken, align 16
   ret <4 x i32> %0
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-ssp.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-ssp.ll
@@ -3,19 +3,19 @@
 ; CHECK-LABEL: f:
 ; CHECK: __ssp_canary_word
 ; CHECK: TB_SSP_CANARY
-define i32 @f() #0 personality i8* bitcast (i32 (...)* @__xlcxx_personality_v1 to i8*) {
-  invoke i32 undef(i8* undef)
+define i32 @f() #0 personality ptr @__xlcxx_personality_v1 {
+  invoke i32 undef(ptr undef)
     to label %invoke unwind label %lpad
 
   invoke:
     %var = alloca i32, align 4
-    store i32 0, i32* %var, align 4
-    %gep = getelementptr inbounds i32, i32* %var, i32 1
-    %ret = load i32, i32* %gep, align 4
+    store i32 0, ptr %var, align 4
+    %gep = getelementptr inbounds i32, ptr %var, i32 1
+    %ret = load i32, ptr %gep, align 4
     ret i32 %ret
   lpad:
-    landingpad { i8*, i32 }
-  catch i8* null
+    landingpad { ptr, i32 }
+  catch ptr null
     unreachable
 
 }
@@ -26,9 +26,9 @@ define i32 @f() #0 personality i8* bitcast (i32 (...)* @__xlcxx_personality_v1 t
 ; CHECK-NOT: TB_SSP_CANARY
 define i32 @f2() #0 {
   %var = alloca i32, align 4
-  store i32 0, i32* %var, align 4
-  %gep = getelementptr inbounds i32, i32* %var, i32 1
-  %ret = load i32, i32* %gep, align 4
+  store i32 0, ptr %var, align 4
+  %gep = getelementptr inbounds i32, ptr %var, i32 1
+  %ret = load i32, ptr %gep, align 4
   ret i32 %ret
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo.ll
@@ -26,17 +26,17 @@ entry:
   %vf.addr = alloca <4 x float>, align 16
   %d1.addr = alloca double, align 8
   %vc1.addr = alloca <16 x i8>, align 16
-  store <4 x i32> %vi1, <4 x i32>* %vi1.addr, align 16
-  store i32 %i1, i32* %i1.addr, align 4
-  store i32 %i2, i32* %i2.addr, align 4
-  store float %f1, float* %f1.addr, align 4
-  store <4 x float> %vf, <4 x float>* %vf.addr, align 16
-  store double %d1, double* %d1.addr, align 8
-  store <16 x i8> %vc1, <16 x i8>* %vc1.addr, align 16
-  %0 = load <4 x float>, <4 x float>* %vf.addr, align 16
-  store <4 x float> %0, <4 x float>* %__a.addr.i, align 16
-  %1 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
-  %2 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
+  store <4 x i32> %vi1, ptr %vi1.addr, align 16
+  store i32 %i1, ptr %i1.addr, align 4
+  store i32 %i2, ptr %i2.addr, align 4
+  store float %f1, ptr %f1.addr, align 4
+  store <4 x float> %vf, ptr %vf.addr, align 16
+  store double %d1, ptr %d1.addr, align 8
+  store <16 x i8> %vc1, ptr %vc1.addr, align 16
+  %0 = load <4 x float>, ptr %vf.addr, align 16
+  store <4 x float> %0, ptr %__a.addr.i, align 16
+  %1 = load <4 x float>, ptr %__a.addr.i, align 16
+  %2 = load <4 x float>, ptr %__a.addr.i, align 16
   %3 = call <4 x float> @llvm.fabs.v4f32(<4 x float> %2) #2
   ret <4 x float> %3
 }
@@ -48,31 +48,31 @@ entry:
   %retval = alloca <4 x float>, align 16
   %x.addr = alloca i32, align 4
   %vf = alloca <4 x float>, align 16
-  store i32 %x, i32* %x.addr, align 4
-  store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, <4 x float>* %vf, align 16
-  %0 = load i32, i32* %x.addr, align 4
+  store i32 %x, ptr %x.addr, align 4
+  store <4 x float> <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>, ptr %vf, align 16
+  %0 = load i32, ptr %x.addr, align 4
   %tobool = icmp ne i32 %0, 0
   br i1 %tobool, label %if.then, label %if.end
 
 if.then:                                          ; preds = %entry
-  %1 = load <4 x float>, <4 x float>* %vf, align 16
-  store <4 x float> %1, <4 x float>* %retval, align 16
+  %1 = load <4 x float>, ptr %vf, align 16
+  store <4 x float> %1, ptr %retval, align 16
   br label %return
 
 if.end:                                           ; preds = %entry
-  %2 = load <4 x float>, <4 x float>* %vf, align 16
-  store <4 x float> %2, <4 x float>* %__a.addr.i, align 16
-  %3 = load <4 x float>, <4 x float>* %__a.addr.i, align 16
+  %2 = load <4 x float>, ptr %vf, align 16
+  store <4 x float> %2, ptr %__a.addr.i, align 16
+  %3 = load <4 x float>, ptr %__a.addr.i, align 16
   %4 = bitcast <4 x float> %3 to <4 x i32>
   %and.i = and <4 x i32> %4, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647>
-  store <4 x i32> %and.i, <4 x i32>* %__res.i, align 16
-  %5 = load <4 x i32>, <4 x i32>* %__res.i, align 16
+  store <4 x i32> %and.i, ptr %__res.i, align 16
+  %5 = load <4 x i32>, ptr %__res.i, align 16
   %6 = bitcast <4 x i32> %5 to <4 x float>
-  store <4 x float> %6, <4 x float>* %retval, align 16
+  store <4 x float> %6, ptr %retval, align 16
   br label %return
 
 return:                                           ; preds = %if.end, %if.then
-  %7 = load <4 x float>, <4 x float>* %retval, align 16
+  %7 = load <4 x float>, ptr %retval, align 16
   ret <4 x float> %7
 }
 

diff --git a/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll b/llvm/test/CodeGen/PowerPC/aix-emit-tracebacktable-vectorinfo_hasvarg.ll
@@ -8,7 +8,7 @@
 define void @f(<4 x float> %vf, ...) #0 {
 entry:
   %vf.addr = alloca <4 x float>, align 16
-  store <4 x float> %vf, <4 x float>* %vf.addr, align 16
+  store <4 x float> %vf, ptr %vf.addr, align 16
   ret void
 }