56 changes: 28 additions & 28 deletions llvm/test/MC/Disassembler/AMDGPU/gfx11_dasm_vop3p.txt
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Original file line number Diff line number Diff line change
Expand Up @@ -466,7 +466,7 @@
# GFX11: v_pk_add_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x02,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x02,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_add_i16 v5, m0, 0x3800
# GFX11: v_pk_add_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x02,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x02,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_add_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x02,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -481,7 +481,7 @@
# GFX11: v_pk_add_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x02,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x02,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_add_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_add_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x02,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x02,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_add_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x02,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -511,7 +511,7 @@
# GFX11: v_pk_add_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0a,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0a,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_add_u16 v5, m0, 0x3800
# GFX11: v_pk_add_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0a,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0a,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_add_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -526,7 +526,7 @@
# GFX11: v_pk_add_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0a,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0a,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_add_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_add_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0a,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0a,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_add_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0a,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -556,7 +556,7 @@
# GFX11: v_pk_ashrrev_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x06,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x06,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_ashrrev_i16 v5, m0, 0x3800
# GFX11: v_pk_ashrrev_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x06,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x06,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_ashrrev_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x06,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -571,7 +571,7 @@
# GFX11: v_pk_ashrrev_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x06,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x06,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_ashrrev_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_ashrrev_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x06,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x06,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_ashrrev_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x06,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -646,7 +646,7 @@
# GFX11: v_pk_lshlrev_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x04,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x04,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_lshlrev_b16 v5, m0, 0x3800
# GFX11: v_pk_lshlrev_b16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x04,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x04,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_lshlrev_b16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x04,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -661,7 +661,7 @@
# GFX11: v_pk_lshlrev_b16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x04,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x04,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_lshlrev_b16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_lshlrev_b16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x04,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x04,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_lshlrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x04,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -691,7 +691,7 @@
# GFX11: v_pk_lshrrev_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x05,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x05,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_lshrrev_b16 v5, m0, 0x3800
# GFX11: v_pk_lshrrev_b16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x05,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x05,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_lshrrev_b16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x05,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -706,7 +706,7 @@
# GFX11: v_pk_lshrrev_b16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x05,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x05,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_lshrrev_b16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_lshrrev_b16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x05,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x05,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_lshrrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x05,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -736,7 +736,7 @@
# GFX11: v_pk_mad_i16 v5, ttmp15, src_scc, ttmp15 ; encoding: [0x05,0x40,0x00,0xcc,0x7b,0xfa,0xed,0x19]
0x05,0x40,0x00,0xcc,0x7b,0xfa,0xed,0x19

# GFX11: v_pk_mad_i16 v5, m0, 0x3800, m0
# GFX11: v_pk_mad_i16 v5, m0, 0.5, m0 ; encoding: [0x05,0x40,0x00,0xcc,0x7d,0xe0,0xf5,0x19]
0x05,0x40,0x00,0xcc,0x7d,0xe0,0xf5,0x19

# GFX11: v_pk_mad_i16 v5, exec_lo, -1, vcc_hi op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x00,0xcc,0x7e,0x82,0xad,0x01]
Expand All @@ -751,7 +751,7 @@
# GFX11: v_pk_mad_i16 v5, -1, exec_hi, src_scc op_sel:[1,1,1] op_sel_hi:[1,0,0] ; encoding: [0x05,0x38,0x00,0xcc,0xc1,0xfe,0xf4,0x0b]
0x05,0x38,0x00,0xcc,0xc1,0xfe,0xf4,0x0b

# GFX11: v_pk_mad_i16 v5, 0x3800, m0, 0x3800 op_sel:[1,0,0] op_sel_hi:[0,1,1]
# GFX11: v_pk_mad_i16 v5, 0.5, m0, 0.5 op_sel:[1,0,0] op_sel_hi:[0,1,1] ; encoding: [0x05,0x48,0x00,0xcc,0xf0,0xfa,0xc0,0x13]
0x05,0x48,0x00,0xcc,0xf0,0xfa,0xc0,0x13

# GFX11: v_pk_mad_i16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] ; encoding: [0x05,0x50,0x00,0xcc,0xfd,0xd4,0x04,0x0b]
Expand Down Expand Up @@ -781,7 +781,7 @@
# GFX11: v_pk_mad_u16 v5, ttmp15, src_scc, ttmp15 ; encoding: [0x05,0x40,0x09,0xcc,0x7b,0xfa,0xed,0x19]
0x05,0x40,0x09,0xcc,0x7b,0xfa,0xed,0x19

# GFX11: v_pk_mad_u16 v5, m0, 0x3800, m0
# GFX11: v_pk_mad_u16 v5, m0, 0.5, m0 ; encoding: [0x05,0x40,0x09,0xcc,0x7d,0xe0,0xf5,0x19]
0x05,0x40,0x09,0xcc,0x7d,0xe0,0xf5,0x19

# GFX11: v_pk_mad_u16 v5, exec_lo, -1, vcc_hi op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x09,0xcc,0x7e,0x82,0xad,0x01]
Expand All @@ -796,7 +796,7 @@
# GFX11: v_pk_mad_u16 v5, -1, exec_hi, src_scc op_sel:[1,1,1] op_sel_hi:[1,0,0] ; encoding: [0x05,0x38,0x09,0xcc,0xc1,0xfe,0xf4,0x0b]
0x05,0x38,0x09,0xcc,0xc1,0xfe,0xf4,0x0b

# GFX11: v_pk_mad_u16 v5, 0x3800, m0, 0x3800 op_sel:[1,0,0] op_sel_hi:[0,1,1]
# GFX11: v_pk_mad_u16 v5, 0.5, m0, 0.5 op_sel:[1,0,0] op_sel_hi:[0,1,1] ; encoding: [0x05,0x48,0x09,0xcc,0xf0,0xfa,0xc0,0x13]
0x05,0x48,0x09,0xcc,0xf0,0xfa,0xc0,0x13

# GFX11: v_pk_mad_u16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] ; encoding: [0x05,0x50,0x09,0xcc,0xfd,0xd4,0x04,0x0b]
Expand Down Expand Up @@ -871,7 +871,7 @@
# GFX11: v_pk_max_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x07,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x07,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_max_i16 v5, m0, 0x3800
# GFX11: v_pk_max_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x07,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x07,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_max_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x07,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -886,7 +886,7 @@
# GFX11: v_pk_max_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x07,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x07,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_max_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_max_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x07,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x07,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_max_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x07,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -916,7 +916,7 @@
# GFX11: v_pk_max_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0c,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0c,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_max_u16 v5, m0, 0x3800
# GFX11: v_pk_max_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0c,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0c,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_max_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0c,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -931,7 +931,7 @@
# GFX11: v_pk_max_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0c,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0c,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_max_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_max_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0c,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0c,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_max_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0c,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1006,7 +1006,7 @@
# GFX11: v_pk_min_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x08,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x08,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_min_i16 v5, m0, 0x3800
# GFX11: v_pk_min_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x08,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x08,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_min_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x08,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1021,7 +1021,7 @@
# GFX11: v_pk_min_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x08,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x08,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_min_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_min_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x08,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x08,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_min_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x08,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1051,7 +1051,7 @@
# GFX11: v_pk_min_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0d,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0d,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_min_u16 v5, m0, 0x3800
# GFX11: v_pk_min_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0d,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0d,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_min_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0d,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1066,7 +1066,7 @@
# GFX11: v_pk_min_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0d,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0d,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_min_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_min_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0d,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0d,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_min_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0d,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1141,7 +1141,7 @@
# GFX11: v_pk_mul_lo_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x01,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x01,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_mul_lo_u16 v5, m0, 0x3800
# GFX11: v_pk_mul_lo_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x01,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x01,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_mul_lo_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x01,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1156,7 +1156,7 @@
# GFX11: v_pk_mul_lo_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x01,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x01,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_mul_lo_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_mul_lo_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x01,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x01,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_mul_lo_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x01,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1186,7 +1186,7 @@
# GFX11: v_pk_sub_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x03,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x03,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_sub_i16 v5, m0, 0x3800
# GFX11: v_pk_sub_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x03,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x03,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_sub_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x03,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1201,7 +1201,7 @@
# GFX11: v_pk_sub_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x03,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x03,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_sub_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_sub_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x03,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x03,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_sub_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x03,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1231,7 +1231,7 @@
# GFX11: v_pk_sub_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0b,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0b,0xcc,0x7b,0xfa,0x01,0x18

# GFX11: v_pk_sub_u16 v5, m0, 0x3800
# GFX11: v_pk_sub_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0b,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0b,0xcc,0x7d,0xe0,0x01,0x18

# GFX11: v_pk_sub_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0b,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1246,7 +1246,7 @@
# GFX11: v_pk_sub_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0b,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0b,0xcc,0xc1,0xfe,0x00,0x18

# GFX11: v_pk_sub_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX11: v_pk_sub_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0b,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0b,0xcc,0xf0,0xfa,0x00,0x00

# GFX11: v_pk_sub_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0b,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down
56 changes: 28 additions & 28 deletions llvm/test/MC/Disassembler/AMDGPU/gfx12_dasm_vop3p.txt
View file
Original file line number Diff line number Diff line change
Expand Up @@ -463,7 +463,7 @@
# GFX12: v_pk_add_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x02,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x02,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_add_i16 v5, m0, 0x3800
# GFX12: v_pk_add_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x02,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x02,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_add_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x02,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -478,7 +478,7 @@
# GFX12: v_pk_add_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x02,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x02,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_add_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_add_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x02,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x02,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_add_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x02,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -508,7 +508,7 @@
# GFX12: v_pk_add_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0a,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0a,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_add_u16 v5, m0, 0x3800
# GFX12: v_pk_add_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0a,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0a,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_add_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0a,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -523,7 +523,7 @@
# GFX12: v_pk_add_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0a,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0a,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_add_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_add_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0a,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0a,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_add_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0a,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -553,7 +553,7 @@
# GFX12: v_pk_ashrrev_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x06,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x06,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_ashrrev_i16 v5, m0, 0x3800
# GFX12: v_pk_ashrrev_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x06,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x06,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_ashrrev_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x06,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -568,7 +568,7 @@
# GFX12: v_pk_ashrrev_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x06,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x06,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_ashrrev_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_ashrrev_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x06,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x06,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_ashrrev_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x06,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -643,7 +643,7 @@
# GFX12: v_pk_lshlrev_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x04,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x04,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_lshlrev_b16 v5, m0, 0x3800
# GFX12: v_pk_lshlrev_b16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x04,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x04,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_lshlrev_b16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x04,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -658,7 +658,7 @@
# GFX12: v_pk_lshlrev_b16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x04,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x04,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_lshlrev_b16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_lshlrev_b16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x04,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x04,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_lshlrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x04,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -688,7 +688,7 @@
# GFX12: v_pk_lshrrev_b16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x05,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x05,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_lshrrev_b16 v5, m0, 0x3800
# GFX12: v_pk_lshrrev_b16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x05,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x05,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_lshrrev_b16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x05,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -703,7 +703,7 @@
# GFX12: v_pk_lshrrev_b16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x05,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x05,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_lshrrev_b16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_lshrrev_b16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x05,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x05,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_lshrrev_b16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x05,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -733,7 +733,7 @@
# GFX12: v_pk_mad_i16 v5, ttmp15, src_scc, ttmp15 ; encoding: [0x05,0x40,0x00,0xcc,0x7b,0xfa,0xed,0x19]
0x05,0x40,0x00,0xcc,0x7b,0xfa,0xed,0x19

# GFX12: v_pk_mad_i16 v5, m0, 0x3800, m0
# GFX12: v_pk_mad_i16 v5, m0, 0.5, m0 ; encoding: [0x05,0x40,0x00,0xcc,0x7d,0xe0,0xf5,0x19]
0x05,0x40,0x00,0xcc,0x7d,0xe0,0xf5,0x19

# GFX12: v_pk_mad_i16 v5, exec_lo, -1, vcc_hi op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x00,0xcc,0x7e,0x82,0xad,0x01]
Expand All @@ -748,7 +748,7 @@
# GFX12: v_pk_mad_i16 v5, -1, exec_hi, src_scc op_sel:[1,1,1] op_sel_hi:[1,0,0] ; encoding: [0x05,0x38,0x00,0xcc,0xc1,0xfe,0xf4,0x0b]
0x05,0x38,0x00,0xcc,0xc1,0xfe,0xf4,0x0b

# GFX12: v_pk_mad_i16 v5, 0x3800, m0, 0x3800 op_sel:[1,0,0] op_sel_hi:[0,1,1]
# GFX12: v_pk_mad_i16 v5, 0.5, m0, 0.5 op_sel:[1,0,0] op_sel_hi:[0,1,1] ; encoding: [0x05,0x48,0x00,0xcc,0xf0,0xfa,0xc0,0x13]
0x05,0x48,0x00,0xcc,0xf0,0xfa,0xc0,0x13

# GFX12: v_pk_mad_i16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] ; encoding: [0x05,0x50,0x00,0xcc,0xfd,0xd4,0x04,0x0b]
Expand Down Expand Up @@ -778,7 +778,7 @@
# GFX12: v_pk_mad_u16 v5, ttmp15, src_scc, ttmp15 ; encoding: [0x05,0x40,0x09,0xcc,0x7b,0xfa,0xed,0x19]
0x05,0x40,0x09,0xcc,0x7b,0xfa,0xed,0x19

# GFX12: v_pk_mad_u16 v5, m0, 0x3800, m0
# GFX12: v_pk_mad_u16 v5, m0, 0.5, m0 ; encoding: [0x05,0x40,0x09,0xcc,0x7d,0xe0,0xf5,0x19]
0x05,0x40,0x09,0xcc,0x7d,0xe0,0xf5,0x19

# GFX12: v_pk_mad_u16 v5, exec_lo, -1, vcc_hi op_sel_hi:[0,0,0] ; encoding: [0x05,0x00,0x09,0xcc,0x7e,0x82,0xad,0x01]
Expand All @@ -793,7 +793,7 @@
# GFX12: v_pk_mad_u16 v5, -1, exec_hi, src_scc op_sel:[1,1,1] op_sel_hi:[1,0,0] ; encoding: [0x05,0x38,0x09,0xcc,0xc1,0xfe,0xf4,0x0b]
0x05,0x38,0x09,0xcc,0xc1,0xfe,0xf4,0x0b

# GFX12: v_pk_mad_u16 v5, 0x3800, m0, 0x3800 op_sel:[1,0,0] op_sel_hi:[0,1,1]
# GFX12: v_pk_mad_u16 v5, 0.5, m0, 0.5 op_sel:[1,0,0] op_sel_hi:[0,1,1] ; encoding: [0x05,0x48,0x09,0xcc,0xf0,0xfa,0xc0,0x13]
0x05,0x48,0x09,0xcc,0xf0,0xfa,0xc0,0x13

# GFX12: v_pk_mad_u16 v5, src_scc, vcc_lo, -1 op_sel:[0,1,0] op_sel_hi:[1,0,1] ; encoding: [0x05,0x50,0x09,0xcc,0xfd,0xd4,0x04,0x0b]
Expand Down Expand Up @@ -868,7 +868,7 @@
# GFX12: v_pk_max_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x07,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x07,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_max_i16 v5, m0, 0x3800
# GFX12: v_pk_max_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x07,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x07,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_max_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x07,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -883,7 +883,7 @@
# GFX12: v_pk_max_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x07,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x07,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_max_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_max_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x07,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x07,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_max_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x07,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -913,7 +913,7 @@
# GFX12: v_pk_max_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0c,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0c,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_max_u16 v5, m0, 0x3800
# GFX12: v_pk_max_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0c,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0c,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_max_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0c,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -928,7 +928,7 @@
# GFX12: v_pk_max_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0c,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0c,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_max_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_max_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0c,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0c,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_max_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0c,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1003,7 +1003,7 @@
# GFX12: v_pk_min_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x08,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x08,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_min_i16 v5, m0, 0x3800
# GFX12: v_pk_min_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x08,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x08,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_min_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x08,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1018,7 +1018,7 @@
# GFX12: v_pk_min_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x08,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x08,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_min_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_min_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x08,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x08,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_min_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x08,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1048,7 +1048,7 @@
# GFX12: v_pk_min_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0d,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0d,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_min_u16 v5, m0, 0x3800
# GFX12: v_pk_min_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0d,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0d,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_min_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0d,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1063,7 +1063,7 @@
# GFX12: v_pk_min_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0d,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0d,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_min_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_min_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0d,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0d,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_min_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0d,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1138,7 +1138,7 @@
# GFX12: v_pk_mul_lo_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x01,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x01,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_mul_lo_u16 v5, m0, 0x3800
# GFX12: v_pk_mul_lo_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x01,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x01,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_mul_lo_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x01,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1153,7 +1153,7 @@
# GFX12: v_pk_mul_lo_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x01,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x01,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_mul_lo_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_mul_lo_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x01,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x01,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_mul_lo_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x01,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1183,7 +1183,7 @@
# GFX12: v_pk_sub_i16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x03,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x03,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_sub_i16 v5, m0, 0x3800
# GFX12: v_pk_sub_i16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x03,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x03,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_sub_i16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x03,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1198,7 +1198,7 @@
# GFX12: v_pk_sub_i16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x03,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x03,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_sub_i16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_sub_i16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x03,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x03,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_sub_i16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x03,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down Expand Up @@ -1228,7 +1228,7 @@
# GFX12: v_pk_sub_u16 v5, ttmp15, src_scc ; encoding: [0x05,0x40,0x0b,0xcc,0x7b,0xfa,0x01,0x18]
0x05,0x40,0x0b,0xcc,0x7b,0xfa,0x01,0x18

# GFX12: v_pk_sub_u16 v5, m0, 0x3800
# GFX12: v_pk_sub_u16 v5, m0, 0.5 ; encoding: [0x05,0x40,0x0b,0xcc,0x7d,0xe0,0x01,0x18]
0x05,0x40,0x0b,0xcc,0x7d,0xe0,0x01,0x18

# GFX12: v_pk_sub_u16 v5, exec_lo, -1 ; encoding: [0x05,0x40,0x0b,0xcc,0x7e,0x82,0x01,0x18]
Expand All @@ -1243,7 +1243,7 @@
# GFX12: v_pk_sub_u16 v5, -1, exec_hi ; encoding: [0x05,0x40,0x0b,0xcc,0xc1,0xfe,0x00,0x18]
0x05,0x40,0x0b,0xcc,0xc1,0xfe,0x00,0x18

# GFX12: v_pk_sub_u16 v5, 0x3800, m0 op_sel:[1,1] op_sel_hi:[0,0]
# GFX12: v_pk_sub_u16 v5, 0.5, m0 op_sel:[1,1] op_sel_hi:[0,0] ; encoding: [0x05,0x58,0x0b,0xcc,0xf0,0xfa,0x00,0x00]
0x05,0x58,0x0b,0xcc,0xf0,0xfa,0x00,0x00

# GFX12: v_pk_sub_u16 v5, src_scc, vcc_lo op_sel:[1,0] op_sel_hi:[0,1] ; encoding: [0x05,0x48,0x0b,0xcc,0xfd,0xd4,0x00,0x10]
Expand Down
120 changes: 60 additions & 60 deletions llvm/test/MC/Disassembler/AMDGPU/gfx9_vop3p.txt
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