74 changes: 58 additions & 16 deletions llvm/test/MC/AMDGPU/reg-syntax-extra.s
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@@ -1,129 +1,171 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICI --check-prefix=NOSICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=GFX10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=GFX10 %s

// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefix=NOSICI --check-prefix=NOSICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=NOGCN --check-prefix=NOVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=NOGCN --check-prefix=NOGFX10 --implicit-check-not=error: %s

s_mov_b32 [ttmp5], [ttmp3]
// SICI: s_mov_b32 ttmp5, ttmp3 ; encoding: [0x73,0x03,0xf5,0xbe]
// VI: s_mov_b32 ttmp5, ttmp3 ; encoding: [0x73,0x00,0xf5,0xbe]
// GFX10: s_mov_b32 ttmp5, ttmp3 ; encoding: [0x6f,0x03,0xf1,0xbe]

s_mov_b64 [ttmp4,ttmp5], [ttmp2,ttmp3]
// SICI: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x72,0x04,0xf4,0xbe]
// VI: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x72,0x01,0xf4,0xbe]
// GFX10: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x6e,0x04,0xf0,0xbe]

s_mov_b64 ttmp[4:5], ttmp[2:3]
// SICI: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x72,0x04,0xf4,0xbe]
// VI: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x72,0x01,0xf4,0xbe]
// GFX10: s_mov_b64 ttmp[4:5], ttmp[2:3] ; encoding: [0x6e,0x04,0xf0,0xbe]

s_mov_b64 [s6,s7], s[8:9]
// SICI: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x04,0x86,0xbe]
// VI: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x01,0x86,0xbe]
// GFX10: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x04,0x86,0xbe]

s_mov_b64 s[6:7], [s8,s9]
// SICI: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x04,0x86,0xbe]
// VI: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x01,0x86,0xbe]
// GFX10: s_mov_b64 s[6:7], s[8:9] ; encoding: [0x08,0x04,0x86,0xbe]

s_mov_b64 [exec_lo,exec_hi], s[2:3]
// SICI: s_mov_b64 exec, s[2:3] ; encoding: [0x02,0x04,0xfe,0xbe]
// VI: s_mov_b64 exec, s[2:3] ; encoding: [0x02,0x01,0xfe,0xbe]
// GFX10: s_mov_b64 exec, s[2:3] ; encoding: [0x02,0x04,0xfe,0xbe]

s_mov_b64 [flat_scratch_lo,flat_scratch_hi], s[2:3]
// NOSICI: error:
// NOSICI: error: not a valid operand.
// VI: s_mov_b64 flat_scratch, s[2:3] ; encoding: [0x02,0x01,0xe6,0xbe]
// NOGFX10: error: not a valid operand.

s_mov_b64 [vcc_lo,vcc_hi], s[2:3]
// SICI: s_mov_b64 vcc, s[2:3] ; encoding: [0x02,0x04,0xea,0xbe]
// VI: s_mov_b64 vcc, s[2:3] ; encoding: [0x02,0x01,0xea,0xbe]
// GFX10: s_mov_b64 vcc, s[2:3] ; encoding: [0x02,0x04,0xea,0xbe]

s_mov_b64 [tba_lo,tba_hi], s[2:3]
// SICI: s_mov_b64 tba, s[2:3] ; encoding: [0x02,0x04,0xec,0xbe]
// VI: s_mov_b64 tba, s[2:3] ; encoding: [0x02,0x01,0xec,0xbe]
// NOGFX10: error: not a valid operand.

s_mov_b64 [tma_lo,tma_hi], s[2:3]
// SICI: s_mov_b64 tma, s[2:3] ; encoding: [0x02,0x04,0xee,0xbe]
// VI: s_mov_b64 tma, s[2:3] ; encoding: [0x02,0x01,0xee,0xbe]
// NOGFX10: error: not a valid operand.

v_mov_b32_e32 [v1], [v2]
// GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]

v_rcp_f64 [v1,v2], [v2,v3]
// SICI: v_rcp_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x5f,0x02,0x7e]
// VI: v_rcp_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x4b,0x02,0x7e]
// GFX10: v_rcp_f64_e32 v[1:2], v[2:3] ; encoding: [0x02,0x5f,0x02,0x7e]

buffer_load_dwordx4 [v1,v2,v3,v4], off, [s4,s5,s6,s7], s1
// SICI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x01,0x01]
// VI: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x5c,0xe0,0x00,0x01,0x01,0x01]
// GFX10: buffer_load_dwordx4 v[1:4], off, s[4:7], s1 ; encoding: [0x00,0x00,0x38,0xe0,0x00,0x01,0x01,0x01]

buffer_load_dword v1, off, [ttmp4,ttmp5,ttmp6,ttmp7], s1
// SICI: buffer_load_dword v1, off, ttmp[4:7], s1 ; encoding: [0x00,0x00,0x30,0xe0,0x00,0x01,0x1d,0x01]
// VI: buffer_load_dword v1, off, ttmp[4:7], s1 ; encoding: [0x00,0x00,0x50,0xe0,0x00,0x01,0x1d,0x01]
// GFX10: buffer_load_dword v1, off, ttmp[4:7], s1 ; encoding: [0x00,0x00,0x30,0xe0,0x00,0x01,0x1c,0x01]

buffer_store_format_xyzw v[1:4], off, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp1
// SICI: buffer_store_format_xyzw v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x1c,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_store_format_xyzw v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x1c,0xe0,0x00,0x01,0x1d,0x71]
// GFX10: buffer_store_format_xyzw v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x1c,0xe0,0x00,0x01,0x1c,0x6d]

buffer_load_ubyte v1, off, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp1
// SICI: buffer_load_ubyte v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x20,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_load_ubyte v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x40,0xe0,0x00,0x01,0x1d,0x71]
// GFX10: buffer_load_ubyte v1, off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x20,0xe0,0x00,0x01,0x1c,0x6d]

buffer_store_dwordx4 v[1:4], off, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp1
// SICI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x1d,0x71]
// VI: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x7c,0xe0,0x00,0x01,0x1d,0x71]
// GFX10: buffer_store_dwordx4 v[1:4], off, ttmp[4:7], ttmp1 ; encoding: [0x00,0x00,0x78,0xe0,0x00,0x01,0x1c,0x6d]

s_load_dwordx4 [ttmp4,ttmp5,ttmp6,ttmp7], [ttmp2,ttmp3], ttmp4
// SICI: s_load_dwordx4 ttmp[4:7], ttmp[2:3], ttmp4 ; encoding: [0x74,0x72,0xba,0xc0]
// VI: s_load_dwordx4 ttmp[4:7], ttmp[2:3], ttmp4 ; encoding: [0x39,0x1d,0x08,0xc0,0x74,0x00,0x00,0x00]
// GFX10: s_load_dwordx4 ttmp[4:7], ttmp[2:3], ttmp4 ; encoding: [0x37,0x1c,0x08,0xf4,0x00,0x00,0x00,0xe0]

s_buffer_load_dword ttmp1, [ttmp4,ttmp5,ttmp6,ttmp7], ttmp4
// SICI: s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 ; encoding: [0x74,0xf4,0x38,0xc2]
// VI: s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 ; encoding: [0x7a,0x1c,0x20,0xc0,0x74,0x00,0x00,0x00]
// GFX10: s_buffer_load_dword ttmp1, ttmp[4:7], ttmp4 ; encoding: [0x78,0x1b,0x20,0xf4,0x00,0x00,0x00,0xe0]

s_buffer_load_dwordx4 [ttmp8,ttmp9,ttmp10,ttmp11], [ttmp4,ttmp5,ttmp6,ttmp7], ttmp4
// SICI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x74,0x74,0xbc,0xc2]
// VI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x3a,0x1e,0x28,0xc0,0x74,0x00,0x00,0x00]
// GFX10: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x38,0x1d,0x28,0xf4,0x00,0x00,0x00,0xe0]

s_buffer_load_dwordx4 [ttmp[8],ttmp[8+1],ttmp[5*2],ttmp[(3+2)*2+1]], ttmp[45/11:(33+45)/11], ttmp4
// SICI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x74,0x74,0xbc,0xc2]
// VI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x3a,0x1e,0x28,0xc0,0x74,0x00,0x00,0x00]
// GFX10: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x38,0x1d,0x28,0xf4,0x00,0x00,0x00,0xe0]

s_buffer_load_dwordx4 ttmp[7+1:(3+2)*2+1], [ttmp[45/11],ttmp[5],ttmp6,ttmp[(33+45)/11]], ttmp4
// SICI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x74,0x74,0xbc,0xc2]
// VI: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x3a,0x1e,0x28,0xc0,0x74,0x00,0x00,0x00]
// GFX10: s_buffer_load_dwordx4 ttmp[8:11], ttmp[4:7], ttmp4 ; encoding: [0x38,0x1d,0x28,0xf4,0x00,0x00,0x00,0xe0]

flat_load_dword v[8:8], v[2:3]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x30,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dword v[63/8+1:65/8], v[2:3]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x30,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dword v8, v[2*2-2:(3+7)/3]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x30,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dword v[63/8+1], v[2:3]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// VI: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x50,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dword v8, v[2:3] ; encoding: [0x00,0x00,0x30,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dwordx4 v[8:11], v[2*2-2:(3*3-6)]
// VI: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x5c,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x38,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dwordx4 v[8/2+4:11/2+6], v[2:3]
// VI: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x5c,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x38,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

flat_load_dwordx4 [v[8/2+4],v9,v[10],v[11/2+6]], v[2:3]
// VI: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x5c,0xdc,0x02,0x00,0x00,0x08]
// GFX10: flat_load_dwordx4 v[8:11], v[2:3] ; encoding: [0x00,0x00,0x38,0xdc,0x02,0x00,0x7d,0x08]
// NOSICI: error: instruction not supported on this GPU

v_mul_f32 v0, null, v2
// NOSICIVI: error:
// GFX10: v_mul_f32_e32 v0, null, v2 ; encoding: [0x7d,0x04,0x00,0x10]
// NOSICIVI: error: not a valid operand.
// GFX10: v_mul_f32_e32 v0, null, v2 ; encoding: [0x7d,0x04,0x00,0x10]
// NOVI: error: not a valid operand.

v_mul_f64 v[0:1], null, null
// NOSICIVI: error:
// GFX10: v_mul_f64 v[0:1], null, null ; encoding: [0x00,0x00,0x65,0xd5,0x7d,0xfa,0x00,0x00]
// NOSICIVI: error: not a valid operand.
// GFX10: v_mul_f64 v[0:1], null, null ; encoding: [0x00,0x00,0x65,0xd5,0x7d,0xfa,0x00,0x00]
// NOVI: error: not a valid operand.

s_add_u32 null, null, null
// NOSICIVI: error:
// GFX10: s_add_u32 null, null, null ; encoding: [0x7d,0x7d,0x7d,0x80]
// NOSICIVI: error: not a valid operand.
// GFX10: s_add_u32 null, null, null ; encoding: [0x7d,0x7d,0x7d,0x80]
// NOVI: error: not a valid operand.

s_not_b64 s[2:3], null
// NOSICIVI: error:
// GFX10: s_not_b64 s[2:3], null ; encoding: [0x7d,0x08,0x82,0xbe]
// NOSICIVI: error: not a valid operand.
// GFX10: s_not_b64 s[2:3], null ; encoding: [0x7d,0x08,0x82,0xbe]
// NOVI: error: not a valid operand.
12 changes: 6 additions & 6 deletions llvm/test/MC/AMDGPU/regression/bug28538.s
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@@ -1,12 +1,12 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOCIVI --check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOCIVI --check-prefix=NOVI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:

// NOSICI: error:
// NOSICI: error: not a valid operand.
// NOVI: error: failed parsing operand
v_mov_b32 v0, v0 row_bcast:0

// NOSICI: error:
// NOSICI: error: not a valid operand.
// NOVI: error: failed parsing operand
v_mov_b32 v0, v0 row_bcast:13
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/smem-err.s
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@@ -1,4 +1,4 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s

s_memtime exec
// NOVI: :11: error: invalid operand for instruction
Expand Down
159 changes: 84 additions & 75 deletions llvm/test/MC/AMDGPU/smem.s
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11 changes: 5 additions & 6 deletions llvm/test/MC/AMDGPU/smrd-err.s
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@@ -1,15 +1,14 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI %s
// RUN: llvm-mc -arch=amdgcn -mcpu=tahiti %s | FileCheck -check-prefix=GCN -check-prefix=SI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=NOVI --implicit-check-not=error: %s

s_load_dwordx4 s[100:103], s[2:3], s4
// VI: error: not a valid operand
// NOVI: error: not a valid operand
// SI: s_load_dwordx4 s[100:103], s[2:3], s4


s_load_dwordx8 s[96:103], s[2:3], s4
// VI: error: not a valid operand
// NOVI: error: not a valid operand
// SI: s_load_dwordx8 s[96:103], s[2:3], s4

s_load_dwordx16 s[88:103], s[2:3], s4
// VI: error: not a valid operand
// NOVI: error: not a valid operand
// SI: s_load_dwordx16 s[88:103], s[2:3], s4
6 changes: 3 additions & 3 deletions llvm/test/MC/AMDGPU/smrd.s
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Original file line number Diff line number Diff line change
Expand Up @@ -3,9 +3,9 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=CI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=VI %s

// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:

//===----------------------------------------------------------------------===//
// Offset Handling
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/MC/AMDGPU/sop1-err.s
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI --implicit-check-not=error: %s

s_mov_b32 v1, s2
// GCN: error: invalid operand for instruction
Expand Down
86 changes: 78 additions & 8 deletions llvm/test/MC/AMDGPU/sop1.s
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Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/sop2-err.s
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Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN --implicit-check-not=error: %s

s_cbranch_g_fork 100, s[6:7]
// GCN: error: invalid operand for instruction
Expand Down
102 changes: 77 additions & 25 deletions llvm/test/MC/AMDGPU/sop2.s
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Original file line number Diff line number Diff line change
Expand Up @@ -5,13 +5,12 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=GFX89 --check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=GFX10 %s

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=NOSICIVI --check-prefix=NOVI --check-prefix=NOGFX89 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck --check-prefix=NOGFX89 %s

// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding 2>&1 %s | FileCheck --check-prefix=GFX10-ERR %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --check-prefix=NOSICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=NOSICIVI --check-prefix=NOVI --check-prefix=NOGFX89 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefix=NOGFX9 --check-prefix=NOGFX89 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 2>&1 %s | FileCheck --check-prefix=GFX10-ERR --implicit-check-not=error: %s

s_add_u32 s1, s2, s3
// GCN: s_add_u32 s1, s2, s3 ; encoding: [0x02,0x03,0x01,0x80]
Expand Down Expand Up @@ -52,134 +51,167 @@ s_cselect_b64 s[2:3], s[4:5], s[6:7]
s_and_b32 s2, s4, s6
// SICI: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
// GFX89: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x86]
// GFX10: s_and_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]

s_and_b32 s2, 1234, 1234
// SICI: s_and_b32 s2, 0x4d2, 0x4d2 ; encoding: [0xff,0xff,0x02,0x87,0xd2,0x04,0x00,0x00]
// GFX89: s_and_b32 s2, 0x4d2, 0x4d2 ; encoding: [0xff,0xff,0x02,0x86,0xd2,0x04,0x00,0x00]
// GFX10: s_and_b32 s2, 0x4d2, 0x4d2 ; encoding: [0xff,0xff,0x02,0x87,0xd2,0x04,0x00,0x00]

s_and_b32 s2, 0xFFFF0000, -65536
// SICI: s_and_b32 s2, 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x02,0x87,0x00,0x00,0xff,0xff]
// GFX89: s_and_b32 s2, 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x02,0x86,0x00,0x00,0xff,0xff]
// GFX10: s_and_b32 s2, 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x02,0x87,0x00,0x00,0xff,0xff]

s_and_b64 null, s[4:5], s[6:7]
// GFX10: s_and_b64 null, s[4:5], s[6:7] ; encoding: [0x04,0x06,0xfd,0x87]
// NOSICIVI: error: not a valid operand.
// NOGFX9: error: not a valid operand.

s_and_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_and_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x87]
// GFX89: s_and_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x86]
// GFX10: s_and_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x87]

s_or_b32 s2, s4, s6
// SICI: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
// GFX89: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x87]
// GFX10: s_or_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]

s_or_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_or_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x88]
// GFX89: s_or_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x87]
// GFX10: s_or_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x88]

s_xor_b32 s2, s4, s6
// SICI: s_xor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x89]
// GFX89: s_xor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x88]
// GFX10: s_xor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x89]

s_xor_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_xor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]
// GFX89: s_xor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x88]
// GFX10: s_xor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]

s_andn2_b32 s2, s4, s6
// SICI: s_andn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8a]
// GFX89: s_andn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x89]
// GFX10: s_andn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8a]

s_andn2_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8a]
// GFX89: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x89]
// GFX10: s_andn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8a]

s_orn2_b32 s2, s4, s6
// SICI: s_orn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8b]
// GFX89: s_orn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8a]
// GFX10: s_orn2_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8b]

s_orn2_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_orn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8b]
// GFX89: s_orn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8a]
// GFX10: s_orn2_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8b]

s_nand_b32 s2, s4, s6
// SICI: s_nand_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8c]
// GFX89: s_nand_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8b]
// GFX10: s_nand_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8c]

s_nand_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_nand_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8c]
// GFX89: s_nand_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8b]
// GFX10: s_nand_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8c]

s_nor_b32 s2, s4, s6
// SICI: s_nor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8d]
// GFX89: s_nor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8c]
// GFX10: s_nor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8d]

s_nor_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_nor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8d]
// GFX89: s_nor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8c]
// GFX10: s_nor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8d]

s_xnor_b32 s2, s4, s6
// SICI: s_xnor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8e]
// GFX89: s_xnor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8d]
// GFX10: s_xnor_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8e]

s_xnor_b64 s[2:3], s[4:5], s[6:7]
// SICI: s_xnor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8e]
// GFX89: s_xnor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8d]
// GFX10: s_xnor_b64 s[2:3], s[4:5], s[6:7] ; encoding: [0x04,0x06,0x82,0x8e]

s_lshl_b32 s2, s4, s6
// SICI: s_lshl_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]
// GFX89: s_lshl_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8e]
// GFX10: s_lshl_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]

s_lshl_b64 s[2:3], s[4:5], s6
// SICI: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
// GFX89: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8e]
// GFX10: s_lshl_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]

s_lshr_b32 s2, s4, s6
// SICI: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x90]
// GFX89: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x8f]
// GFX10: s_lshr_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x90]

s_lshr_b64 s[2:3], s[4:5], s6
// SICI: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]
// GFX89: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x8f]
// GFX10: s_lshr_b64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]

s_ashr_i32 s2, s4, s6
// SICI: s_ashr_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x91]
// GFX89: s_ashr_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x90]
// GFX10: s_ashr_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x91]

s_ashr_i64 s[2:3], s[4:5], s6
// SICI: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x91]
// GFX89: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x90]
// GFX10: s_ashr_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x91]

s_ashr_i64 s[2:3], -65536, 0xFFFF0000
// SICI: s_ashr_i64 s[2:3], 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x82,0x91,0x00,0x00,0xff,0xff]
// GFX89: s_ashr_i64 s[2:3], 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x82,0x90,0x00,0x00,0xff,0xff]
// GFX10: s_ashr_i64 s[2:3], 0xffff0000, 0xffff0000 ; encoding: [0xff,0xff,0x82,0x91,0x00,0x00,0xff,0xff]

s_bfm_b32 s2, s4, s6
// SICI: s_bfm_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x92]
// GFX89: s_bfm_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x91]
// GFX10: s_bfm_b32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x92]

s_bfm_b64 s[2:3], s4, s6
// SICI: s_bfm_b64 s[2:3], s4, s6 ; encoding: [0x04,0x06,0x82,0x92]
// GFX89: s_bfm_b64 s[2:3], s4, s6 ; encoding: [0x04,0x06,0x82,0x91]
// GFX10: s_bfm_b64 s[2:3], s4, s6 ; encoding: [0x04,0x06,0x82,0x92]

s_mul_i32 s2, s4, s6
// SICI: s_mul_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x93]
// GFX89: s_mul_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x92]
// GFX10: s_mul_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x93]

s_bfe_u32 s2, s4, s6
// SICI: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x93]
// GFX89: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x92]
// GFX10: s_bfe_u32 s2, s4, s6 ; encoding: [0x04,0x06,0x82,0x93]

s_bfe_i32 s2, s4, s6
// SICI: s_bfe_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x94]
// GFX89: s_bfe_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x93]
// GFX10: s_bfe_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x94]

s_bfe_u64 s[2:3], s[4:5], s6
// SICI: s_bfe_u64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x94]
// GFX89: s_bfe_u64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x93]
// GFX10: s_bfe_u64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x82,0x94]

s_bfe_i64 s[2:3], s[4:5], s6
// SICI: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x95]
// GFX89: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x94]
// GFX10: s_bfe_i64 s[2:3], s[4:5], s6 ; encoding: [0x04,0x06,0x02,0x95]

s_cbranch_g_fork s[4:5], s[6:7]
// SICI: s_cbranch_g_fork s[4:5], s[6:7] ; encoding: [0x04,0x06,0x80,0x95]
Expand All @@ -199,79 +231,99 @@ s_cbranch_g_fork s[6:7], 2
s_absdiff_i32 s2, s4, s6
// SICI: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96]
// GFX89: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x95]
// GFX10: s_absdiff_i32 s2, s4, s6 ; encoding: [0x04,0x06,0x02,0x96]

s_add_u32 s101, s102, s103
// SICI: s_add_u32 s101, s102, s103 ; encoding: [0x66,0x67,0x65,0x80]
// NOGFX89: error: not a valid operand
// GFX10: s_add_u32 s101, s102, s103 ; encoding: [0x66,0x67,0x65,0x80]

s_lshl1_add_u32 s5, s1, s2
// GFX9: s_lshl1_add_u32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x97]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl1_add_u32 s5, s1, s2 ; encoding: [0x01,0x02,0x05,0x97]

s_lshl1_add_u32 s5, -1, s2
// GFX9: s_lshl1_add_u32 s5, -1, s2 ; encoding: [0xc1,0x02,0x05,0x97]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl1_add_u32 s5, -1, s2 ; encoding: [0xc1,0x02,0x05,0x97]

s_lshl1_add_u32 s5, s1, 0
// GFX9: s_lshl1_add_u32 s5, s1, 0 ; encoding: [0x01,0x80,0x05,0x97]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl1_add_u32 s5, s1, 0 ; encoding: [0x01,0x80,0x05,0x97]

s_lshl1_add_u32 s5, s1, 0x3f717273
// GFX9: s_lshl1_add_u32 s5, s1, 0x3f717273 ; encoding: [0x01,0xff,0x05,0x97,0x73,0x72,0x71,0x3f]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl1_add_u32 s5, s1, 0x3f717273 ; encoding: [0x01,0xff,0x05,0x97,0x73,0x72,0x71,0x3f]

s_lshl2_add_u32 s101, s1, s2
// GFX9: s_lshl2_add_u32 s101, s1, s2 ; encoding: [0x01,0x02,0xe5,0x97]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl2_add_u32 s101, s1, s2 ; encoding: [0x01,0x02,0xe5,0x97]

s_lshl2_add_u32 s5, 0xaf123456, s2
// GFX9: s_lshl2_add_u32 s5, 0xaf123456, s2 ; encoding: [0xff,0x02,0x85,0x97,0x56,0x34,0x12,0xaf]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl2_add_u32 s5, 0xaf123456, s2 ; encoding: [0xff,0x02,0x85,0x97,0x56,0x34,0x12,0xaf]

s_lshl3_add_u32 s5, 0x3f717273, s2
// GFX9: s_lshl3_add_u32 s5, 0x3f717273, s2 ; encoding: [0xff,0x02,0x05,0x98,0x73,0x72,0x71,0x3f]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl3_add_u32 s5, 0x3f717273, s2 ; encoding: [0xff,0x02,0x05,0x98,0x73,0x72,0x71,0x3f]

s_lshl3_add_u32 s5, s1, s101
// GFX9: s_lshl3_add_u32 s5, s1, s101 ; encoding: [0x01,0x65,0x05,0x98]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl3_add_u32 s5, s1, s101 ; encoding: [0x01,0x65,0x05,0x98]

s_lshl4_add_u32 s5, s1, 0xaf123456
// GFX9: s_lshl4_add_u32 s5, s1, 0xaf123456 ; encoding: [0x01,0xff,0x85,0x98,0x56,0x34,0x12,0xaf]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl4_add_u32 s5, s1, 0xaf123456 ; encoding: [0x01,0xff,0x85,0x98,0x56,0x34,0x12,0xaf]

s_lshl4_add_u32 s5, -1, s2
// GFX9: s_lshl4_add_u32 s5, -1, s2 ; encoding: [0xc1,0x02,0x85,0x98]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_lshl4_add_u32 s5, -1, s2 ; encoding: [0xc1,0x02,0x85,0x98]

s_mul_hi_i32 s5, s101, s2
// GFX9: s_mul_hi_i32 s5, s101, s2 ; encoding: [0x65,0x02,0x85,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_i32 s5, s101, s2 ; encoding: [0x65,0x02,0x05,0x9b]

s_mul_hi_i32 s5, 0, s2
// GFX9: s_mul_hi_i32 s5, 0, s2 ; encoding: [0x80,0x02,0x85,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_i32 s5, 0, s2 ; encoding: [0x80,0x02,0x05,0x9b]

s_mul_hi_i32 s5, 0x3f717273, s2
// GFX9: s_mul_hi_i32 s5, 0x3f717273, s2 ; encoding: [0xff,0x02,0x85,0x96,0x73,0x72,0x71,0x3f]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_i32 s5, 0x3f717273, s2 ; encoding: [0xff,0x02,0x05,0x9b,0x73,0x72,0x71,0x3f]

s_mul_hi_i32 s5, s1, s101
// GFX9: s_mul_hi_i32 s5, s1, s101 ; encoding: [0x01,0x65,0x85,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_i32 s5, s1, s101 ; encoding: [0x01,0x65,0x05,0x9b]

s_mul_hi_i32 s5, s1, 0
// GFX9: s_mul_hi_i32 s5, s1, 0 ; encoding: [0x01,0x80,0x85,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_i32 s5, s1, 0 ; encoding: [0x01,0x80,0x05,0x9b]

s_mul_hi_u32 s5, s1, 0x3f717273
// GFX9: s_mul_hi_u32 s5, s1, 0x3f717273 ; encoding: [0x01,0xff,0x05,0x96,0x73,0x72,0x71,0x3f]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_u32 s5, s1, 0x3f717273 ; encoding: [0x01,0xff,0x85,0x9a,0x73,0x72,0x71,0x3f]

s_mul_hi_u32 s5, s1, s101
// GFX9: s_mul_hi_u32 s5, s1, s101 ; encoding: [0x01,0x65,0x05,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_u32 s5, s1, s101 ; encoding: [0x01,0x65,0x85,0x9a]

s_mul_hi_u32 s5, s1, 0
// GFX9: s_mul_hi_u32 s5, s1, 0 ; encoding: [0x01,0x80,0x05,0x96]
// NOSICIVI: error
// NOSICIVI: error: instruction not supported on this GPU
// GFX10: s_mul_hi_u32 s5, s1, 0 ; encoding: [0x01,0x80,0x85,0x9a]
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/sopc-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI --implicit-check-not=error: %s

s_set_gpr_idx_on s0, s1
// VI: error: expected absolute expression
Expand Down
34 changes: 22 additions & 12 deletions llvm/test/MC/AMDGPU/sopc.s
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=SICI %s
// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=GCN -check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX10-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s

//===----------------------------------------------------------------------===//
// SOPC Instructions
Expand Down Expand Up @@ -76,41 +76,51 @@ s_cmp_lg_u64 s[0:1], s[2:3]
gpr_idx = 1
s_set_gpr_idx_on s0, gpr_idx
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

gpr_idx_mode = 10
s_set_gpr_idx_on s0, gpr_idx_mode + 5
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, 0
// VI: s_set_gpr_idx_on s0, gpr_idx() ; encoding: [0x00,0x00,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, gpr_idx()
// VI: s_set_gpr_idx_on s0, gpr_idx() ; encoding: [0x00,0x00,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: unknown token in expression
// GFX10-ERR: error: unknown token in expression

s_set_gpr_idx_on s0, 1
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, gpr_idx(SRC0)
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0) ; encoding: [0x00,0x01,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, 3
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1) ; encoding: [0x00,0x03,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, gpr_idx(SRC1,SRC0)
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1) ; encoding: [0x00,0x03,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: expected ')' in parentheses expression
// GFX10-ERR: error: expected ')' in parentheses expression

s_set_gpr_idx_on s0, 15
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// GFX10-ERR: error: invalid operand for instruction

s_set_gpr_idx_on s0, gpr_idx(SRC0,DST,SRC2,SRC1)
// VI: s_set_gpr_idx_on s0, gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x00,0x0f,0x11,0xbf]
// NOSICI: error:
// NOSICI: error: expected ')' in parentheses expression
// GFX10-ERR: error: expected ')' in parentheses expression
67 changes: 33 additions & 34 deletions llvm/test/MC/AMDGPU/sopk-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,9 +1,14 @@
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=GFX9-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX10 %s
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck -check-prefixes=SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s | FileCheck -check-prefixes=SI,SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck -check-prefixes=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck -check-prefix=GFX10 %s

// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,SICIVI-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX10-ERR --implicit-check-not=error: %s

s_setreg_b32 0x1f803, s2
// GCN: error: invalid immediate: only 16-bit values are legal
Expand Down Expand Up @@ -42,61 +47,55 @@ s_getreg_b32 s2, hwreg(3,32,32)
// GCN: error: invalid bit offset: only 5-bit values are legal

s_cbranch_i_fork s[2:3], 0x6
// GFX10: error: instruction not supported on this GPU
// SICI: s_cbranch_i_fork s[2:3], 6 ; encoding: [0x06,0x00,0x82,0xb8]
// GFX10-ERR: error: instruction not supported on this GPU
// GFX9: s_cbranch_i_fork s[2:3], 6 ; encoding: [0x06,0x00,0x02,0xb8]
// VI: s_cbranch_i_fork s[2:3], 6 ; encoding: [0x06,0x00,0x02,0xb8]

s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x82,0xb8]
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9: s_getreg_b32 s2, hwreg(HW_REG_SH_MEM_BASES) ; encoding: [0x0f,0xf8,0x82,0xb8]

s_getreg_b32 s2, hwreg(HW_REG_TBA_LO)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_TBA_LO) ; encoding: [0x10,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_TBA_HI)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_TBA_HI) ; encoding: [0x11,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_TMA_LO)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_TMA_LO) ; encoding: [0x12,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_TMA_HI)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_TMA_HI) ; encoding: [0x13,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_LO) ; encoding: [0x14,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_FLAT_SCR_HI) ; encoding: [0x15,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_XNACK_MASK)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_XNACK_MASK) ; encoding: [0x16,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_getreg_b32 s2, hwreg(HW_REG_POPS_PACKER)
// SI-ERR: specified hardware register is not supported on this GPU
// VI-ERR: specified hardware register is not supported on this GPU
// GFX9-ERR: specified hardware register is not supported on this GPU
// GFX10: s_getreg_b32 s2, hwreg(HW_REG_POPS_PACKER) ; encoding: [0x19,0xf8,0x02,0xb9]
// SICIVI-ERR: error: specified hardware register is not supported on this GPU
// GFX9-ERR: error: specified hardware register is not supported on this GPU

s_cmpk_le_u32 s2, -1
// GCN: error: invalid operand for instruction
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/sopk.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,10 +4,10 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI9 --check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=GFX10 %s

// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=NOSICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOSI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefix=NOGFX9 %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=NOSICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOSI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck -check-prefix=NOSICIVI -check-prefix=NOVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck --check-prefix=NOGFX9 --implicit-check-not=error: %s

//===----------------------------------------------------------------------===//
// Instructions
Expand Down
19 changes: 15 additions & 4 deletions llvm/test/MC/AMDGPU/sopp-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=SICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=VI --check-prefix=SICIVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -show-encoding %s 2>&1 | FileCheck --check-prefix=GCN %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=SICI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=SICI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=VI --check-prefix=SICIVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 %s 2>&1 | FileCheck --check-prefix=GCN --check-prefix=GFX10 --implicit-check-not=error: %s

//===----------------------------------------------------------------------===//
// sendmsg
Expand Down Expand Up @@ -84,15 +84,22 @@ s_sendmsg sendmsg(MSG_GS_DONE, 0, 0)

s_sendmsg sendmsg(MSG_GS_ALLOC_REQ)
// SICIVI: error: invalid message id
// SICI: error: invalid message id

s_sendmsg sendmsg(MSG_GS_ALLOC_REQ, 0)
// SICIVI: error: invalid message id
// SICI: error: invalid message id
// GFX10: error: message does not support operations

s_sendmsg sendmsg(-1)
// SICIVI: error: invalid message id
// SICI: error: invalid message id
// GFX10: error: invalid message id

s_sendmsg sendmsg(16)
// SICIVI: error: invalid message id
// SICI: error: invalid message id
// GFX10: error: invalid message id

s_sendmsg sendmsg(MSG_SYSMSG)
// GCN: error: missing message operation
Expand All @@ -112,6 +119,7 @@ s_sendmsg sendmsg(MSG_SYSMSG, 5)

s_waitcnt lgkmcnt(16)
// SICIVI: error: too large value for lgkmcnt
// SICI: error: too large value for lgkmcnt

s_waitcnt lgkmcnt(64)
// GCN: error: too large value for lgkmcnt
Expand All @@ -121,9 +129,12 @@ s_waitcnt expcnt(8)

s_waitcnt vmcnt(16)
// SICIVI: error: too large value for vmcnt
// SICI: error: too large value for vmcnt

s_waitcnt vmcnt(64)
// GFX10: error: too large value for vmcnt
// SICI: error: too large value for vmcnt
// SICIVI: error: too large value for vmcnt

s_waitcnt vmcnt(0xFFFFFFFFFFFF0000)
// GCN: error: too large value for vmcnt
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/MC/AMDGPU/sopp.s
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=SICI %s
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck --check-prefix=GCN --check-prefix=VI %s

//===----------------------------------------------------------------------===//
Expand Down Expand Up @@ -357,23 +357,23 @@ s_ttracedata

s_set_gpr_idx_off
// VI: s_set_gpr_idx_off ; encoding: [0x00,0x00,0x9c,0xbf]
// NOSICI: error:
// NOSICI: error: instruction not supported on this GPU

s_set_gpr_idx_mode 0
// VI: s_set_gpr_idx_mode gpr_idx() ; encoding: [0x00,0x00,0x9d,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction

s_set_gpr_idx_mode gpr_idx()
// VI: s_set_gpr_idx_mode gpr_idx() ; encoding: [0x00,0x00,0x9d,0xbf]
// NOSICI: error:
// NOSICI: error: unknown token in expression

s_set_gpr_idx_mode 15
// VI: s_set_gpr_idx_mode gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x0f,0x00,0x9d,0xbf]
// NOSICI: error:
// NOSICI: error: invalid operand for instruction

s_set_gpr_idx_mode gpr_idx(SRC2,SRC1,SRC0,DST)
// VI: s_set_gpr_idx_mode gpr_idx(SRC0,SRC1,SRC2,DST) ; encoding: [0x0f,0x00,0x9d,0xbf]
// NOSICI: error:
// NOSICI: error: expected ')' in parentheses expression

s_endpgm_saved
// VI: s_endpgm_saved ; encoding: [0x00,0x00,0x9b,0xbf]
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/trap.s
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Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck %s --check-prefix=VI
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s --check-prefix=GFX9

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOGFX9
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=NOSICIVI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=NOGFX9 --implicit-check-not=error:

//===----------------------------------------------------------------------===//
// Trap Handler related - 32 bit registers
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4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/vintrp-err.s
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=SI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=GCN -check-prefix=VI --implicit-check-not=error: %s

v_interp_p1_f32 v0, v1, attr64.w
// GCN: :25: error: out of bounds attr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/vop-err.s
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s

// GENERIC LIMITATIONS ON VOP FORMATS: CONSTANT BUS RESTRICTIONS

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6 changes: 3 additions & 3 deletions llvm/test/MC/AMDGPU/vop1-gfx9-err.s
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefixes=GCN,VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefixes=GCN,CI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefixes=GCN,GFX9 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefixes=GCN,VI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefixes=GCN,CI --implicit-check-not=error: %s

v_swap_b32 v1, 1
// GCN: :16: error: invalid operand for instruction
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/MC/AMDGPU/vop1-gfx9.s
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOVI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s

v_swap_b32 v1, v2
// GFX9: v_swap_b32 v1, v2 ; encoding: [0x02,0xa3,0x02,0x7e]
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/vop1.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI --check-prefix=CIVI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=VI

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s -check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:

// Force 32-bit encoding

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/vop2-err.s
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s

//===----------------------------------------------------------------------===//
// Generic checks
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/vop2.s
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=VI

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s -check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:

//===----------------------------------------------------------------------===//
// Generic Checks for floating-point instructions (These have modifiers).
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/vop3-convert.s
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Original file line number Diff line number Diff line change
Expand Up @@ -3,10 +3,10 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=SICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=GCN --check-prefix=CIVI --check-prefix=VI

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s -check-prefix=NOVI
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=bonaire %s 2>&1 | FileCheck %s --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s -check-prefix=NOVI --implicit-check-not=error:

v_mov_b32 [v1], [v2]
// GCN: v_mov_b32_e32 v1, v2 ; encoding: [0x02,0x03,0x02,0x7e]
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/MC/AMDGPU/vop3-errs.s
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck %s --check-prefix=GFX67 --check-prefix=GCN --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=fiji %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck %s --check-prefix=GFX89 --check-prefix=GCN --implicit-check-not=error:

v_add_f32_e64 v0, v1
// GCN: error: too few operands for instruction
Expand Down
281 changes: 211 additions & 70 deletions llvm/test/MC/AMDGPU/vop3-gfx9.s
View file

Large diffs are not rendered by default.

31 changes: 25 additions & 6 deletions llvm/test/MC/AMDGPU/vop3-literal.s
View file
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX10-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 -show-encoding %s | FileCheck -check-prefix=GFX10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-WavefrontSize32,+WavefrontSize64 %s 2>&1 | FileCheck -check-prefix=GFX10-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9-ERR --implicit-check-not=error: %s

v_bfe_u32 v0, 0x3039, v1, s1
// GFX10: v_bfe_u32 v0, 0x3039, v1, s1 ; encoding: [0x00,0x00,0x48,0xd5,0xff,0x02,0x06,0x00,0x39,0x30,0x00,0x00]
Expand Down Expand Up @@ -44,12 +44,12 @@ v_bfe_u32 v0, 0x3039, 0x12345, v2
// GFX9-ERR: error: invalid literal operand

v_bfe_u32 v0, s1, 0x3039, s1
// GFX10-ERR: v_bfe_u32 v0, s1, 0x3039, s1 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xfe,0x05,0x00,0x39,0x30,0x00,0x00]
// GFX9-ERR: error: invalid literal operand
// GFX10: v_bfe_u32 v0, s1, 0x3039, s1 ; encoding: [0x00,0x00,0x48,0xd5,0x01,0xfe,0x05,0x00,0x39,0x30,0x00,0x00]

v_bfe_u32 v0, s1, 0x3039, s2
// GFX10: error: invalid operand (violates constant bus restrictions)
// GFX9-ERR: error: invalid literal operand
// GFX10-ERR: error: invalid operand (violates constant bus restrictions)

v_bfm_b32_e64 v0, 0x3039, s1
// GFX10: v_bfm_b32_e64 v0, 0x3039, s1 ; encoding: [0x00,0x00,0x63,0xd7,0xff,0x02,0x00,0x00,0x39,0x30,0x00,0x00]
Expand Down Expand Up @@ -197,12 +197,15 @@ v_min3_i16 v5, 0x5678, 0x5678, 0x5679

v_add_nc_u16 v5, 0xfe0b, v2
// GFX10: v_add_nc_u16_e64 v5, 0xfe0b, v2 ; encoding: [0x05,0x00,0x03,0xd7,0xff,0x04,0x02,0x00,0x0b,0xfe,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_add_nc_u16 v5, v1, 0x1234
// GFX10: v_add_nc_u16_e64 v5, v1, 0x1234 ; encoding: [0x05,0x00,0x03,0xd7,0x01,0xff,0x01,0x00,0x34,0x12,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_add_nc_u16 v5, 0x1234, 0x1234
// GFX10: v_add_nc_u16_e64 v5, 0x1234, 0x1234 ; encoding: [0x05,0x00,0x03,0xd7,0xff,0xfe,0x01,0x00,0x34,0x12,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_ashrrev_i16_e64 v5, 0x3456, v2
// GFX10: v_ashrrev_i16_e64 v5, 0x3456, v2 ; encoding: [0x05,0x00,0x08,0xd7,0xff,0x04,0x02,0x00,0x56,0x34,0x00,0x00]
Expand Down Expand Up @@ -254,6 +257,7 @@ v_cmp_f_i32_e64 s[10:11], 0xaf123456, 0xaf123456

v_cmp_f_i32_e64 s[10:11], 0xaf123456, 0xaf123455
// GFX10-ERR: error: invalid literal operand
// GFX9-ERR: error: invalid literal operand

v_cmp_f_u64_e64 s[10:11], 0xaf123456, v[2:3]
// GFX10: v_cmp_f_u64_e64 s[10:11], 0xaf123456, v[2:3] ; encoding: [0x0a,0x00,0xe0,0xd4,0xff,0x04,0x02,0x00,0x56,0x34,0x12,0xaf]
Expand All @@ -269,33 +273,43 @@ v_cmp_f_u64_e64 s[10:11], 0x3f717273, 0x3f717273

v_cmpx_class_f32_e64 0xaf123456, v2
// GFX10: v_cmpx_class_f32_e64 0xaf123456, v2 ; encoding: [0x00,0x00,0x98,0xd4,0xff,0x04,0x02,0x00,0x56,0x34,0x12,0xaf]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_class_f32_e64 v1, 0xaf123456
// GFX10: v_cmpx_class_f32_e64 v1, 0xaf123456 ; encoding: [0x00,0x00,0x98,0xd4,0x01,0xff,0x01,0x00,0x56,0x34,0x12,0xaf]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_class_f32_e64 0xaf123456, 0xaf123456
// GFX10: v_cmpx_class_f32_e64 0xaf123456, 0xaf123456 ; encoding: [0x00,0x00,0x98,0xd4,0xff,0xfe,0x01,0x00,0x56,0x34,0x12,0xaf]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_class_f32_e64 0xaf123456, 0xaf123455
// GFX10-ERR: error: invalid literal operand
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_lt_i16_e64 v1, 0x3456
// GFX10: v_cmpx_lt_i16_e64 v1, 0x3456 ; encoding: [0x00,0x00,0x99,0xd4,0x01,0xff,0x01,0x00,0x56,0x34,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_lt_i16_e64 0x3456, v2
// GFX10: v_cmpx_lt_i16_e64 0x3456, v2 ; encoding: [0x00,0x00,0x99,0xd4,0xff,0x04,0x02,0x00,0x56,0x34,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_lt_i16_e64 0x3456, 0x3456
// GFX10: v_cmpx_lt_i16_e64 0x3456, 0x3456 ; encoding: [0x00,0x00,0x99,0xd4,0xff,0xfe,0x01,0x00,0x56,0x34,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_f_i64_e64 0xaf123456, v[2:3]
// GFX10: v_cmpx_f_i64_e64 0xaf123456, v[2:3] ; encoding: [0x00,0x00,0xb0,0xd4,0xff,0x04,0x02,0x00,0x56,0x34,0x12,0xaf]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_f_i64_e64 v[1:2], 0x3f717273
// GFX10: v_cmpx_f_i64_e64 v[1:2], 0x3f717273 ; encoding: [0x00,0x00,0xb0,0xd4,0x01,0xff,0x01,0x00,0x73,0x72,0x71,0x3f]
// GFX9-ERR: error: instruction not supported on this GPU

v_cmpx_f_i64_e64 0x3f717273, 0x3f717273
// GFX10: v_cmpx_f_i64_e64 0x3f717273, 0x3f717273 ; encoding: [0x00,0x00,0xb0,0xd4,0xff,0xfe,0x01,0x00,0x73,0x72,0x71,0x3f]
// GFX9-ERR: error: instruction not supported on this GPU

v_lshlrev_b64 v[5:6], 0xaf123456, v[2:3]
// GFX10: v_lshlrev_b64 v[5:6], 0xaf123456, v[2:3] ; encoding: [0x05,0x00,0xff,0xd6,0xff,0x04,0x02,0x00,0x56,0x34,0x12,0xaf]
Expand All @@ -307,18 +321,23 @@ v_lshlrev_b64 v[5:6], v1, 0x3f717273

v_fma_mix_f32 v5, 0x123, v2, v3
// GFX10: v_fma_mix_f32 v5, 0x123, v2, v3 ; encoding: [0x05,0x00,0x20,0xcc,0xff,0x04,0x0e,0x04,0x23,0x01,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_fma_mix_f32 v5, v1, 0x7b, v3
// GFX10: v_fma_mix_f32 v5, v1, 0x7b, v3 ; encoding: [0x05,0x00,0x20,0xcc,0x01,0xff,0x0d,0x04,0x7b,0x00,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_fma_mix_f32 v5, v1, v2, 0x1c8
// GFX10: v_fma_mix_f32 v5, v1, v2, 0x1c8 ; encoding: [0x05,0x00,0x20,0xcc,0x01,0x05,0xfe,0x03,0xc8,0x01,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_fma_mix_f32 v5, 0x1c8a, v2, 0x1c8a
// GFX10: v_fma_mix_f32 v5, 0x1c8a, v2, 0x1c8a ; encoding: [0x05,0x00,0x20,0xcc,0xff,0x04,0xfe,0x03,0x8a,0x1c,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_fma_mix_f32 v5, 0x1c8a, 0x1c8a, 0x1c8a
// GFX10: v_fma_mix_f32 v5, 0x1c8a, 0x1c8a, 0x1c8a ; encoding: [0x05,0x00,0x20,0xcc,0xff,0xfe,0xfd,0x03,0x8a,0x1c,0x00,0x00]
// GFX9-ERR: error: instruction not supported on this GPU

v_pk_add_f16 v5, 0xaf123456, v2
// GFX10: v_pk_add_f16 v5, 0xaf123456, v2 ; encoding: [0x05,0x00,0x0f,0xcc,0xff,0x04,0x02,0x18,0x56,0x34,0x12,0xaf]
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/MC/AMDGPU/vop3-modifiers-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s

//---------------------------------------------------------------------------//
// VOP3 Modifiers
Expand Down
67 changes: 49 additions & 18 deletions llvm/test/MC/AMDGPU/vop3.s
View file
Original file line number Diff line number Diff line change
@@ -1,14 +1,14 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s | FileCheck %s --check-prefix=SICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck %s --check-prefix=CI
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s | FileCheck %s --check-prefix=CI --check-prefix=SICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s | FileCheck %s --check-prefix=VI

// Make sure interp instructions disassemble regardless of lds bank count
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 -show-encoding %s | FileCheck %s --check-prefix=VI

// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOSICI
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s --check-prefix=NOVI

// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck %s --check-prefix=NOSI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck %s -check-prefix=NOCI --check-prefix=NOSICI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck %s --check-prefix=NOVI --implicit-check-not=error:
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx810 %s 2>&1 | FileCheck -check-prefix=NOVI --implicit-check-not=error: %s

//===----------------------------------------------------------------------===//
// VOPC Instructions
Expand Down Expand Up @@ -287,39 +287,42 @@ v_mac_f32_e64 v0, -v1, |v2|
// VI: v_mac_f32_e64 v0, -v1, |v2| ; encoding: [0x00,0x02,0x16,0xd1,0x01,0x05,0x02,0x20]

v_mac_f16_e64 v0, 0.5, flat_scratch_lo
// NOSICI: error:
// VI: v_mac_f16_e64 v0, 0.5, flat_scratch_lo ; encoding: [0x00,0x00,0x23,0xd1,0xf0,0xcc,0x00,0x00]
// NOCI: error: instruction not supported on this GPU
// NOSI: error: not a valid operand.

v_mac_f16_e64 v0, -4.0, flat_scratch_lo
// NOSICI: error:
// VI: v_mac_f16_e64 v0, -4.0, flat_scratch_lo ; encoding: [0x00,0x00,0x23,0xd1,0xf7,0xcc,0x00,0x00]
// NOCI: error: instruction not supported on this GPU
// NOSI: error: not a valid operand.

v_mac_f16_e64 v0, flat_scratch_lo, -4.0
// NOSICI: error:
// VI: v_mac_f16_e64 v0, flat_scratch_lo, -4.0 ; encoding: [0x00,0x00,0x23,0xd1,0x66,0xee,0x01,0x00]
// NOCI: error: instruction not supported on this GPU
// NOSI: error: not a valid operand.

v_add_u32 v84, vcc, v13, s31 clamp
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// VI: v_add_u32_e64 v84, vcc, v13, s31 clamp ; encoding: [0x54,0xea,0x19,0xd1,0x0d,0x3f,0x00,0x00]

v_sub_u32 v84, s[2:3], v13, s31 clamp
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// VI: v_sub_u32_e64 v84, s[2:3], v13, s31 clamp ; encoding: [0x54,0x82,0x1a,0xd1,0x0d,0x3f,0x00,0x00]

v_subrev_u32 v84, vcc, v13, s31 clamp
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// VI: v_subrev_u32_e64 v84, vcc, v13, s31 clamp ; encoding: [0x54,0xea,0x1b,0xd1,0x0d,0x3f,0x00,0x00]

v_addc_u32 v84, s[4:5], v13, v31, vcc clamp
// NOSICI: error:
// NOSICI: error: integer clamping is not supported on this GPU
// VI: v_addc_u32_e64 v84, s[4:5], v13, v31, vcc clamp ; encoding: [0x54,0x84,0x1c,0xd1,0x0d,0x3f,0xaa,0x01]

v_subb_u32 v84, s[2:3], v13, v31, vcc clamp
// NOSICI: error:
// NOSICI: error: integer clamping is not supported on this GPU
// VI: v_subb_u32_e64 v84, s[2:3], v13, v31, vcc clamp ; encoding: [0x54,0x82,0x1d,0xd1,0x0d,0x3f,0xaa,0x01]

v_subbrev_u32 v84, vcc, v13, v31, s[6:7] clamp
// NOSICI: error:
// NOSICI: error: integer clamping is not supported on this GPU
// VI: v_subbrev_u32_e64 v84, vcc, v13, v31, s[6:7] clamp ; encoding: [0x54,0xea,0x1e,0xd1,0x0d,0x3f,0x1a,0x00]

///===---------------------------------------------------------------------===//
Expand Down Expand Up @@ -493,81 +496,107 @@ v_cubeid_f32 v0, |-1|, |-1.0|, |1.0|

v_fma_f16_e64 v5, v1, v2, v3
// VI: v_fma_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_fma_f16 v5, v1, v2, 0.5
// VI: v_fma_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0xc2,0x03]
// NOSICI: error: instruction not supported on this GPU

v_fma_f16 v5, -v1, -v2, -v3
// VI: v_fma_f16 v5, -v1, -v2, -v3 ; encoding: [0x05,0x00,0xee,0xd1,0x01,0x05,0x0e,0xe4]
// NOSICI: error: not a valid operand.

v_fma_f16 v5, |v1|, |v2|, |v3|
// VI: v_fma_f16 v5, |v1|, |v2|, |v3| ; encoding: [0x05,0x07,0xee,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: not a valid operand.

v_fma_f16 v5, v1, v2, v3 clamp
// VI: v_fma_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xee,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: invalid operand for instruction

v_div_fixup_f16_e64 v5, v1, v2, v3
// VI: v_div_fixup_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_div_fixup_f16 v5, 0.5, v2, v3
// VI: v_div_fixup_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0xf0,0x04,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_div_fixup_f16 v5, v1, 0.5, v3
// VI: v_div_fixup_f16 v5, v1, 0.5, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0xe1,0x0d,0x04]
// NOSICI: error: instruction not supported on this GPU

v_div_fixup_f16 v5, v1, v2, 0.5
// VI: v_div_fixup_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xc2,0x03]
// NOSICI: error: instruction not supported on this GPU

v_div_fixup_f16 v5, v1, v2, -4.0
// VI: v_div_fixup_f16 v5, v1, v2, -4.0 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0xde,0x03]
// NOSICI: error: instruction not supported on this GPU

v_div_fixup_f16 v5, -v1, v2, v3
// VI: v_div_fixup_f16 v5, -v1, v2, v3 ; encoding: [0x05,0x00,0xef,0xd1,0x01,0x05,0x0e,0x24]
// NOSICI: error: not a valid operand.

v_div_fixup_f16 v5, v1, |v2|, v3
// VI: v_div_fixup_f16 v5, v1, |v2|, v3 ; encoding: [0x05,0x02,0xef,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: not a valid operand.

v_div_fixup_f16 v5, v1, v2, v3 clamp
// VI: v_div_fixup_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xef,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: invalid operand for instruction

v_mad_f16_e64 v5, v1, v2, v3
// VI: v_mad_f16 v5, v1, v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_f16 v5, 0.5, v2, v3
// VI: v_mad_f16 v5, 0.5, v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0xf0,0x04,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_f16 v5, v1, 0.5, v3
// VI: v_mad_f16 v5, v1, 0.5, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0xe1,0x0d,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_f16 v5, v1, v2, 0.5
// VI: v_mad_f16 v5, v1, v2, 0.5 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0xc2,0x03]
// NOSICI: error: instruction not supported on this GPU

v_mad_f16 v5, v1, -v2, v3
// VI: v_mad_f16 v5, v1, -v2, v3 ; encoding: [0x05,0x00,0xea,0xd1,0x01,0x05,0x0e,0x44]
// NOSICI: error: not a valid operand.

v_mad_f16 v5, v1, v2, |v3|
// VI: v_mad_f16 v5, v1, v2, |v3| ; encoding: [0x05,0x04,0xea,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: not a valid operand.

v_mad_f16 v5, v1, v2, v3 clamp
// VI: v_mad_f16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xea,0xd1,0x01,0x05,0x0e,0x04]
// NOSICI: error: invalid operand for instruction

v_mad_i16_e64 v5, -1, v2, v3
// VI: v_mad_i16 v5, -1, v2, v3 ; encoding: [0x05,0x00,0xec,0xd1,0xc1,0x04,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_i16 v5, v1, -4.0, v3
// NOVI: error: invalid literal operand
// NOSICI: error: instruction not supported on this GPU

v_mad_i16 v5, v1, v2, 0
// VI: v_mad_i16 v5, v1, v2, 0 ; encoding: [0x05,0x00,0xec,0xd1,0x01,0x05,0x02,0x02]
// NOSICI: error: instruction not supported on this GPU

v_mad_u16_e64 v5, -1, v2, v3
// VI: v_mad_u16 v5, -1, v2, v3 ; encoding: [0x05,0x00,0xeb,0xd1,0xc1,0x04,0x0e,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_u16 v5, v1, 0, v3
// VI: v_mad_u16 v5, v1, 0, v3 ; encoding: [0x05,0x00,0xeb,0xd1,0x01,0x01,0x0d,0x04]
// NOSICI: error: instruction not supported on this GPU

v_mad_u16 v5, v1, v2, -4.0
// NOVI: error: invalid literal operand
// NOSICI: error: instruction not supported on this GPU

///===---------------------------------------------------------------------===//
// VOP3 with Integer Clamp
Expand Down Expand Up @@ -606,19 +635,21 @@ v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
// VI: v_mqsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp ; encoding: [0x05,0x80,0xe6,0xd1,0x01,0x05,0x0e,0x04]

v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp
// NOSICI: error:
// VI: v_qsad_pk_u16_u8 v[5:6], v[1:2], v2, v[3:4] clamp ; encoding: [0x05,0x80,0xe5,0xd1,0x01,0x05,0x0e,0x04]
// NOCI: error: integer clamping is not supported on this GPU
// NOSI: error: invalid operand for instruction

v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp
// NOSICI: error:
// VI: v_mqsad_u32_u8 v[252:255], v[1:2], v2, v[3:6] clamp ; encoding: [0xfc,0x80,0xe7,0xd1,0x01,0x05,0x0e,0x04]
// NOCI: error: integer clamping is not supported on this GPU
// NOSI: error: invalid operand for instruction

v_mad_u16 v5, v1, v2, v3 clamp
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// VI: v_mad_u16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xeb,0xd1,0x01,0x05,0x0e,0x04]

v_mad_i16 v5, v1, v2, v3 clamp
// NOSICI: error:
// NOSICI: error: invalid operand for instruction
// VI: v_mad_i16 v5, v1, v2, v3 clamp ; encoding: [0x05,0x80,0xec,0xd1,0x01,0x05,0x0e,0x04]

//
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/MC/AMDGPU/vop3p-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX9 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx900 %s 2>&1 | FileCheck -check-prefix=GFX9 --implicit-check-not=error: %s

// GFX9: 25: error: invalid operand for instruction
v_pk_add_u16 v1, v2, v3 op_sel
Expand All @@ -15,7 +15,7 @@ v_pk_add_u16 v1, v2, v3 op_sel:[]
// GFX9: 33: error: unknown token in expression
v_pk_add_u16 v1, v2, v3 op_sel:[,]

// XXGFX9: 34: error: failed parsing operand.
// FIXME: Should trigger an error.
// v_pk_add_u16 v1, v2, v3 op_sel:[0]

// GFX9: 35: error: expected a comma
Expand Down Expand Up @@ -51,14 +51,14 @@ v_pk_add_u16 v1, v2, v3 op_sel:[0,-1]
// GFX9: 40: error: expected a closing square bracket
v_pk_add_u16 v1, v2, v3 op_sel:[0,0,0,0,0]

// XXGFX9: invalid operand for instruction
// FIXME: should trigger an error
v_pk_add_u16 v1, v2, v3 neg_lo:[0,0]

//
// Regular modifiers on packed instructions
//

// FIXME: should be invalid operand for instruction
// FIXME: should be "invalid operand for instruction"
// GFX9: :18: error: not a valid operand.
v_pk_add_f16 v1, |v2|, v3

Expand Down Expand Up @@ -87,5 +87,5 @@ v_pk_add_u16 v1, -v2, v3
// Constant bus restrictions
//

// GFX9: invalid operand (violates constant bus restrictions)
// GFX9: error: invalid operand (violates constant bus restrictions)
v_pk_add_f16 v255, s1, s2
320 changes: 161 additions & 159 deletions llvm/test/MC/AMDGPU/vop_dpp.s
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Large diffs are not rendered by default.

648 changes: 328 additions & 320 deletions llvm/test/MC/AMDGPU/vop_sdwa.s
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6 changes: 3 additions & 3 deletions llvm/test/MC/AMDGPU/vopc-errs.s
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// RUN: not llvm-mc -arch=amdgcn -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck %s
// RUN: not llvm-mc -arch=amdgcn %s 2>&1 | FileCheck --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck --implicit-check-not=error: %s

// Force 32-bit encoding with non-vcc result

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/vopc-vi.s
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Original file line number Diff line number Diff line change
@@ -1,6 +1,6 @@
// RUN: llvm-mc -arch=amdgcn -mcpu=fiji -show-encoding %s | FileCheck -check-prefix=VI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICI %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICI --implicit-check-not=error: %s

v_cmp_class_f16 vcc, v2, v4
// VI: v_cmp_class_f16_e32 vcc, v2, v4 ; encoding: [0x02,0x09,0x28,0x7c]
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/wave32.s
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1032 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s | FileCheck -check-prefix=GFX1064 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX1032-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 -show-encoding %s 2>&1 | FileCheck -check-prefix=GFX1064-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=+wavefrontsize32,-wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1032-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1010 -mattr=-wavefrontsize32,+wavefrontsize64 %s 2>&1 | FileCheck -check-prefix=GFX1064-ERR --implicit-check-not=error: %s

v_cmp_ge_i32_e32 s0, v0
// GFX1032: v_cmp_ge_i32_e32 vcc_lo, s0, v0 ; encoding: [0x00,0x00,0x0c,0x7d]
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/MC/AMDGPU/xdl-insts-err.s
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GCN-ERR,GFX906-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 -show-encoding %s 2>&1 | FileCheck --check-prefixes=GCN-ERR,GFX908-ERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx906 %s 2>&1 | FileCheck --check-prefixes=GCN-ERR,GFX906-ERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx908 %s 2>&1 | FileCheck --check-prefixes=GCN-ERR,GFX908-ERR --implicit-check-not=error: %s

// GFX906-ERR: error: instruction not supported on this GPU
v_dot2c_f32_f16 v0, v1, v2
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/MC/AMDGPU/xnack-mask.s
View file
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1001 -show-encoding %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tahiti %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=hawaii %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=tonga %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=gfx1001 %s 2>&1 | FileCheck -check-prefix=NOSICIVI10 --implicit-check-not=error: %s

// RUN: not llvm-mc -arch=amdgcn -mcpu=stoney -show-encoding %s 2>&1 | FileCheck -check-prefix=XNACKERR %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=stoney %s 2>&1 | FileCheck -check-prefix=XNACKERR --implicit-check-not=error: %s
// RUN: not llvm-mc -arch=amdgcn -mcpu=stoney -show-encoding %s | FileCheck -check-prefix=XNACK %s

s_mov_b64 xnack_mask, -1
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