148 changes: 84 additions & 64 deletions llvm/test/CodeGen/PowerPC/vec-itofp.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -14,31 +14,36 @@ define void @test8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI0_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI0_2@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI0_1@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI0_3@toc@ha
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r5, r5, .LCPI0_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI0_2@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI0_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI0_3@toc@ha
; CHECK-P8-NEXT: lvx v5, 0, r6
; CHECK-P8-NEXT: lvx v1, 0, r4
; CHECK-P8-NEXT: addi r4, r4, .LCPI0_3@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI0_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: addi r5, r5, .LCPI0_3@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI0_1@toc@ha
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r5, r5, .LCPI0_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs4, 0, r5
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: vperm v2, v4, v3, v2
; CHECK-P8-NEXT: vperm v5, v4, v3, v5
; CHECK-P8-NEXT: vperm v0, v4, v3, v0
; CHECK-P8-NEXT: vperm v3, v4, v3, v1
; CHECK-P8-NEXT: xvcvuxddp vs0, v2
; CHECK-P8-NEXT: xvcvuxddp vs1, v5
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xxswapd v1, vs4
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: vperm v2, v4, v2, v1
; CHECK-P8-NEXT: xvcvuxddp vs2, v0
; CHECK-P8-NEXT: xvcvuxddp vs3, v3
; CHECK-P8-NEXT: xvcvuxddp vs0, v3
; CHECK-P8-NEXT: xvcvuxddp vs1, v5
; CHECK-P8-NEXT: xvcvuxddp vs3, v2
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: li r4, 16
Expand Down Expand Up @@ -118,17 +123,20 @@ define void @test4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI1_1@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: vperm v2, v4, v3, v2
; CHECK-P8-NEXT: vperm v3, v4, v3, v5
; CHECK-P8-NEXT: xvcvuxddp vs0, v2
; CHECK-P8-NEXT: xvcvuxddp vs1, v3
; CHECK-P8-NEXT: addi r4, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v2, v4, v2, v5
; CHECK-P8-NEXT: xvcvuxddp vs0, v3
; CHECK-P8-NEXT: xvcvuxddp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
Expand Down Expand Up @@ -181,11 +189,13 @@ define void @test2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-P8-LABEL: test2:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: vperm v2, v4, v3, v2
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: vperm v2, v4, v2, v3
; CHECK-P8-NEXT: xvcvuxddp vs0, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
Expand Down Expand Up @@ -226,37 +236,42 @@ define void @stest8(<8 x double>* nocapture %Sink, <8 x i16>* nocapture readonly
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_2@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI3_2@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI3_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_4@toc@ha
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_4@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_4@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_3@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI3_4@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r5
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: lxvd2x vs4, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v5, vs3
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: vperm v4, v3, v3, v4
; CHECK-P8-NEXT: vperm v5, v3, v3, v5
; CHECK-P8-NEXT: vperm v3, v3, v3, v0
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: xxswapd v0, vs4
; CHECK-P8-NEXT: vperm v3, v2, v2, v3
; CHECK-P8-NEXT: vperm v4, v2, v2, v4
; CHECK-P8-NEXT: vperm v5, v2, v2, v5
; CHECK-P8-NEXT: vperm v2, v2, v2, v0
; CHECK-P8-NEXT: xxswapd v0, vs0
; CHECK-P8-NEXT: vsld v2, v2, v0
; CHECK-P8-NEXT: vsld v3, v3, v0
; CHECK-P8-NEXT: vsld v4, v4, v0
; CHECK-P8-NEXT: vsld v5, v5, v0
; CHECK-P8-NEXT: vsld v3, v3, v0
; CHECK-P8-NEXT: vsrad v2, v2, v0
; CHECK-P8-NEXT: vsld v2, v2, v0
; CHECK-P8-NEXT: vsrad v3, v3, v0
; CHECK-P8-NEXT: vsrad v2, v2, v0
; CHECK-P8-NEXT: vsrad v4, v4, v0
; CHECK-P8-NEXT: vsrad v5, v5, v0
; CHECK-P8-NEXT: xvcvsxddp vs2, v3
; CHECK-P8-NEXT: xvcvsxddp vs0, v2
; CHECK-P8-NEXT: xvcvsxddp vs2, v2
; CHECK-P8-NEXT: xvcvsxddp vs0, v3
; CHECK-P8-NEXT: xvcvsxddp vs1, v5
; CHECK-P8-NEXT: xvcvsxddp vs3, v4
; CHECK-P8-NEXT: xxswapd vs2, vs2
Expand Down Expand Up @@ -347,24 +362,27 @@ define void @stest4(<4 x double>* nocapture %Sink, <4 x i16>* nocapture readonly
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI4_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI4_2@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI4_1@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addi r5, r5, .LCPI4_0@toc@l
; CHECK-P8-NEXT: addi r4, r6, .LCPI4_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI4_1@toc@ha
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: addi r4, r4, .LCPI4_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI4_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vperm v3, v3, v3, v4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: vperm v3, v2, v2, v3
; CHECK-P8-NEXT: vperm v2, v2, v2, v4
; CHECK-P8-NEXT: xxswapd v4, vs0
; CHECK-P8-NEXT: vsld v2, v2, v4
; CHECK-P8-NEXT: vsld v3, v3, v4
; CHECK-P8-NEXT: vsrad v2, v2, v4
; CHECK-P8-NEXT: vsld v2, v2, v4
; CHECK-P8-NEXT: vsrad v3, v3, v4
; CHECK-P8-NEXT: xvcvsxddp vs0, v2
; CHECK-P8-NEXT: xvcvsxddp vs1, v3
; CHECK-P8-NEXT: vsrad v2, v2, v4
; CHECK-P8-NEXT: xvcvsxddp vs0, v3
; CHECK-P8-NEXT: xvcvsxddp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
Expand Down Expand Up @@ -419,13 +437,15 @@ define void @stest2(<2 x double>* nocapture %Sink, <2 x i16>* nocapture readonly
; CHECK-P8-LABEL: stest2:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: vperm v2, v2, v2, v3
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vsld v2, v2, v3
; CHECK-P8-NEXT: vsrad v2, v2, v3
Expand Down
30 changes: 19 additions & 11 deletions llvm/test/CodeGen/PowerPC/vec-trunc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,8 @@
define void @test8i8(<8 x i8>* nocapture %Sink, <8 x i16>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test8i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: vpkuhum v2, v2, v2
; CHECK-NEXT: xxswapd vs0, v2
; CHECK-NEXT: stfdx f0, 0, r3
Expand All @@ -34,7 +35,8 @@ entry:
define void @test4i8(<4 x i8>* nocapture %Sink, <4 x i16>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test4i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: vpkuhum v2, v2, v2
; CHECK-NEXT: xxsldwi vs0, v2, v2, 2
; CHECK-NEXT: stfiwx f0, 0, r3
Expand All @@ -60,10 +62,12 @@ define void @test4i8w(<4 x i8>* nocapture %Sink, <4 x i32>* nocapture readonly %
; CHECK-LABEL: test4i8w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-NEXT: lvx v3, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-NEXT: lvx v2, 0, r5
; CHECK-NEXT: vperm v2, v3, v3, v2
; CHECK-NEXT: lxvd2x vs1, 0, r5
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: xxswapd v3, vs1
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: xxsldwi vs0, v2, v2, 2
; CHECK-NEXT: stfiwx f0, 0, r3
; CHECK-NEXT: blr
Expand All @@ -90,7 +94,8 @@ entry:
define void @test2i8(<2 x i8>* nocapture %Sink, <2 x i16>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test2i8:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: vpkuhum v2, v2, v2
; CHECK-NEXT: xxswapd vs0, v2
; CHECK-NEXT: mffprd r4, f0
Expand All @@ -117,7 +122,8 @@ entry:
define void @test4i16(<4 x i16>* nocapture %Sink, <4 x i32>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test4i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: vpkuwum v2, v2, v2
; CHECK-NEXT: xxswapd vs0, v2
; CHECK-NEXT: stfdx f0, 0, r3
Expand All @@ -142,7 +148,8 @@ entry:
define void @test2i16(<2 x i16>* nocapture %Sink, <2 x i32>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test2i16:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: vpkuwum v2, v2, v2
; CHECK-NEXT: xxsldwi vs0, v2, v2, 2
; CHECK-NEXT: stfiwx f0, 0, r3
Expand All @@ -167,11 +174,12 @@ entry:
define void @test2i16d(<2 x i16>* nocapture %Sink, <2 x i64>* nocapture readonly %SrcPtr) {
; CHECK-LABEL: test2i16d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: addis r5, r2, .LCPI6_0@toc@ha
; CHECK-NEXT: addi r4, r5, .LCPI6_0@toc@l
; CHECK-NEXT: lvx v3, 0, r4
; CHECK-NEXT: lxvd2x vs0, 0, r4
; CHECK-NEXT: addi r5, r5, .LCPI6_0@toc@l
; CHECK-NEXT: lxvd2x vs1, 0, r5
; CHECK-NEXT: xxswapd v2, vs0
; CHECK-NEXT: xxswapd v3, vs1
; CHECK-NEXT: vperm v2, v2, v2, v3
; CHECK-NEXT: xxsldwi vs0, v2, v2, 2
; CHECK-NEXT: stfiwx f0, 0, r3
Expand Down
22 changes: 12 additions & 10 deletions llvm/test/CodeGen/PowerPC/vec-trunc2.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -9,19 +9,20 @@
define dso_local <8 x i8> @test8x32(i32 %i1, i32 %i2, i32 %i3, i32 %i4, i32 %i5, i32 %i6, i32 %i7, i32 %i8) {
; CHECK-LABEL: test8x32:
; CHECK: # %bb.0:
; CHECK-NEXT: addis r11, r2, .LCPI0_0@toc@ha
; CHECK-NEXT: rldimi r3, r4, 32, 0
; CHECK-NEXT: rldimi r5, r6, 32, 0
; CHECK-NEXT: addis r11, r2, .LCPI0_0@toc@ha
; CHECK-NEXT: rldimi r7, r8, 32, 0
; CHECK-NEXT: rldimi r9, r10, 32, 0
; CHECK-NEXT: mtfprd f0, r3
; CHECK-NEXT: addi r3, r11, .LCPI0_0@toc@l
; CHECK-NEXT: rldimi r7, r8, 32, 0
; CHECK-NEXT: rldimi r9, r10, 32, 0
; CHECK-NEXT: lxvd2x vs3, 0, r3
; CHECK-NEXT: mtfprd f1, r5
; CHECK-NEXT: lvx v4, 0, r3
; CHECK-NEXT: mtfprd f2, r7
; CHECK-NEXT: mtfprd f3, r9
; CHECK-NEXT: mtfprd f4, r9
; CHECK-NEXT: xxmrghd v2, vs1, vs0
; CHECK-NEXT: xxmrghd v3, vs3, vs2
; CHECK-NEXT: xxswapd v4, vs3
; CHECK-NEXT: xxmrghd v3, vs4, vs2
; CHECK-NEXT: vperm v2, v3, v2, v4
; CHECK-NEXT: blr
;
Expand Down Expand Up @@ -79,13 +80,14 @@ define dso_local <4 x i16> @test4x64(i64 %i1, i64 %i2, i64 %i3, i64 %i4) {
; CHECK: # %bb.0:
; CHECK-NEXT: addis r7, r2, .LCPI1_0@toc@ha
; CHECK-NEXT: mtfprd f0, r5
; CHECK-NEXT: addi r5, r7, .LCPI1_0@toc@l
; CHECK-NEXT: mtfprd f1, r6
; CHECK-NEXT: lxvd2x vs3, 0, r5
; CHECK-NEXT: mtfprd f2, r3
; CHECK-NEXT: addi r3, r7, .LCPI1_0@toc@l
; CHECK-NEXT: mtfprd f3, r4
; CHECK-NEXT: mtfprd f4, r4
; CHECK-NEXT: xxmrghd v2, vs1, vs0
; CHECK-NEXT: lvx v4, 0, r3
; CHECK-NEXT: xxmrghd v3, vs3, vs2
; CHECK-NEXT: xxmrghd v3, vs4, vs2
; CHECK-NEXT: xxswapd v4, vs3
; CHECK-NEXT: vperm v2, v2, v3, v4
; CHECK-NEXT: blr
;
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/PowerPC/vec_cmpd_p7.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -9,10 +9,11 @@
define <2 x i64> @v2si64_cmp(<2 x i64> %x, <2 x i64> %y) nounwind readnone {
; CHECK-LABEL: v2si64_cmp:
; CHECK: # %bb.0:
; CHECK-NEXT: vcmpequw 2, 2, 3
; CHECK-NEXT: addis 3, 2, .LCPI0_0@toc@ha
; CHECK-NEXT: vcmpequw 2, 2, 3
; CHECK-NEXT: addi 3, 3, .LCPI0_0@toc@l
; CHECK-NEXT: lvx 3, 0, 3
; CHECK-NEXT: lxvd2x 0, 0, 3
; CHECK-NEXT: xxswapd 35, 0
; CHECK-NEXT: vperm 3, 2, 2, 3
; CHECK-NEXT: xxland 34, 35, 34
; CHECK-NEXT: blr
Expand Down
24 changes: 15 additions & 9 deletions llvm/test/CodeGen/PowerPC/vec_constants.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -21,17 +21,23 @@ define void @test1(<4 x i32>* %P1, <4 x i32>* %P2, <4 x float>* %P3) nounwind {
;
; LE-LABEL: test1:
; LE: # %bb.0:
; LE-NEXT: lvx 2, 0, 3
; LE-NEXT: lxvd2x 0, 0, 3
; LE-NEXT: xxswapd 34, 0
; LE-NEXT: vspltisb 3, -1
; LE-NEXT: vslw 3, 3, 3
; LE-NEXT: xxland 34, 34, 35
; LE-NEXT: stvx 2, 0, 3
; LE-NEXT: lvx 2, 0, 4
; LE-NEXT: xxlandc 34, 34, 35
; LE-NEXT: stvx 2, 0, 4
; LE-NEXT: lvx 2, 0, 5
; LE-NEXT: xvabssp 34, 34
; LE-NEXT: stvx 2, 0, 5
; LE-NEXT: xxland 0, 34, 35
; LE-NEXT: xxswapd 0, 0
; LE-NEXT: stxvd2x 0, 0, 3
; LE-NEXT: lxvd2x 0, 0, 4
; LE-NEXT: xxswapd 34, 0
; LE-NEXT: xxlandc 0, 34, 35
; LE-NEXT: xxswapd 0, 0
; LE-NEXT: stxvd2x 0, 0, 4
; LE-NEXT: lxvd2x 0, 0, 5
; LE-NEXT: xxswapd 34, 0
; LE-NEXT: xvabssp 0, 34
; LE-NEXT: xxswapd 0, 0
; LE-NEXT: stxvd2x 0, 0, 5
; LE-NEXT: blr
%tmp = load <4 x i32>, <4 x i32>* %P1 ; <<4 x i32>> [#uses=1]
%tmp4 = and <4 x i32> %tmp, < i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648 > ; <<4 x i32>> [#uses=1]
Expand Down
432 changes: 218 additions & 214 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
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Large diffs are not rendered by default.

72 changes: 42 additions & 30 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -90,10 +90,12 @@ define void @test8elt(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.result,
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs2, v3, v3
; CHECK-P8-NEXT: xxmrghw vs3, v3, v3
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
Expand Down Expand Up @@ -173,33 +175,37 @@ define void @test16elt(<16 x i64>* noalias nocapture sret(<16 x i64>) %agg.resul
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxmrghw vs3, v4, v4
; CHECK-P8-NEXT: xxmrglw vs1, v2, v2
; CHECK-P8-NEXT: xxmrghw vs2, v2, v2
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs5, v4, v4
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
; CHECK-P8-NEXT: xxmrghw vs1, v2, v2
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxmrglw vs2, v3, v3
; CHECK-P8-NEXT: xxmrghw vs4, v3, v3
; CHECK-P8-NEXT: xxmrglw vs0, v3, v3
; CHECK-P8-NEXT: xvcvspdp vs3, vs3
; CHECK-P8-NEXT: xxmrghw vs4, v3, v3
; CHECK-P8-NEXT: xxmrglw vs6, v2, v2
; CHECK-P8-NEXT: xxmrghw vs7, v2, v2
; CHECK-P8-NEXT: xvcvspdp vs5, vs5
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
; CHECK-P8-NEXT: xvcvspdp vs1, vs1
; CHECK-P8-NEXT: xvcvspdp vs2, vs2
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
; CHECK-P8-NEXT: xvcvspdp vs4, vs4
; CHECK-P8-NEXT: xvcvspdp vs6, vs6
; CHECK-P8-NEXT: xvcvspdp vs7, vs7
; CHECK-P8-NEXT: xvcvdpuxds v3, vs3
; CHECK-P8-NEXT: xvcvdpuxds v5, vs5
; CHECK-P8-NEXT: xvcvdpuxds v2, vs0
; CHECK-P8-NEXT: xvcvdpuxds v4, vs1
; CHECK-P8-NEXT: xvcvdpuxds v2, vs1
; CHECK-P8-NEXT: xvcvdpuxds v4, vs2
; CHECK-P8-NEXT: xvcvdpuxds v0, vs4
; CHECK-P8-NEXT: xvcvdpuxds v1, vs2
; CHECK-P8-NEXT: xvcvdpuxds v1, vs0
; CHECK-P8-NEXT: xvcvdpuxds v6, vs6
; CHECK-P8-NEXT: xxswapd vs0, v3
; CHECK-P8-NEXT: xvcvdpuxds v7, vs7
Expand Down Expand Up @@ -389,10 +395,12 @@ define void @test8elt_signed(<8 x i64>* noalias nocapture sret(<8 x i64>) %agg.r
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs2, v3, v3
; CHECK-P8-NEXT: xxmrghw vs3, v3, v3
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
Expand Down Expand Up @@ -472,33 +480,37 @@ define void @test16elt_signed(<16 x i64>* noalias nocapture sret(<16 x i64>) %ag
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxmrghw vs3, v4, v4
; CHECK-P8-NEXT: xxmrglw vs1, v2, v2
; CHECK-P8-NEXT: xxmrghw vs2, v2, v2
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs5, v4, v4
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
; CHECK-P8-NEXT: xxmrghw vs1, v2, v2
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxmrglw vs2, v3, v3
; CHECK-P8-NEXT: xxmrghw vs4, v3, v3
; CHECK-P8-NEXT: xxmrglw vs0, v3, v3
; CHECK-P8-NEXT: xvcvspdp vs3, vs3
; CHECK-P8-NEXT: xxmrghw vs4, v3, v3
; CHECK-P8-NEXT: xxmrglw vs6, v2, v2
; CHECK-P8-NEXT: xxmrghw vs7, v2, v2
; CHECK-P8-NEXT: xvcvspdp vs5, vs5
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
; CHECK-P8-NEXT: xvcvspdp vs1, vs1
; CHECK-P8-NEXT: xvcvspdp vs2, vs2
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
; CHECK-P8-NEXT: xvcvspdp vs4, vs4
; CHECK-P8-NEXT: xvcvspdp vs6, vs6
; CHECK-P8-NEXT: xvcvspdp vs7, vs7
; CHECK-P8-NEXT: xvcvdpuxds v3, vs3
; CHECK-P8-NEXT: xvcvdpuxds v5, vs5
; CHECK-P8-NEXT: xvcvdpuxds v2, vs0
; CHECK-P8-NEXT: xvcvdpuxds v4, vs1
; CHECK-P8-NEXT: xvcvdpuxds v2, vs1
; CHECK-P8-NEXT: xvcvdpuxds v4, vs2
; CHECK-P8-NEXT: xvcvdpuxds v0, vs4
; CHECK-P8-NEXT: xvcvdpuxds v1, vs2
; CHECK-P8-NEXT: xvcvdpuxds v1, vs0
; CHECK-P8-NEXT: xvcvdpuxds v6, vs6
; CHECK-P8-NEXT: xxswapd vs0, v3
; CHECK-P8-NEXT: xvcvdpuxds v7, vs7
Expand Down
456 changes: 228 additions & 228 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
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Large diffs are not rendered by default.

12 changes: 8 additions & 4 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -371,10 +371,12 @@ define void @test16elt(<16 x i16>* noalias nocapture sret(<16 x i16>) %agg.resul
; CHECK-P8-NEXT: vmrghh v7, v9, v7
; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
; CHECK-P8-NEXT: xxmrglw vs2, v1, v0
; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxmrglw vs3, v7, v6
; CHECK-P8-NEXT: xxmrgld v3, vs3, vs2
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: xxswapd vs0, v3
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -916,10 +918,12 @@ define void @test16elt_signed(<16 x i16>* noalias nocapture sret(<16 x i16>) %ag
; CHECK-P8-NEXT: vmrghh v7, v9, v7
; CHECK-P8-NEXT: xxmrgld v2, vs1, vs0
; CHECK-P8-NEXT: xxmrglw vs2, v1, v0
; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: xxswapd vs1, v2
; CHECK-P8-NEXT: xxmrglw vs3, v7, v6
; CHECK-P8-NEXT: xxmrgld v3, vs3, vs2
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: xxswapd vs0, v3
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
152 changes: 64 additions & 88 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -95,22 +95,18 @@ define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result,
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r5
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxmrgld vs4, vs1, vs0
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P8-NEXT: xxmrgld vs1, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs2, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs4, vs0, vs1
; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2
; CHECK-P8-NEXT: xxmrgld vs2, vs3, vs2
; CHECK-P8-NEXT: xvcvdpuxws v2, vs4
; CHECK-P8-NEXT: xvcvdpuxws v3, vs0
; CHECK-P8-NEXT: xvcvdpuxws v4, vs1
; CHECK-P8-NEXT: xvcvdpuxws v5, vs2
; CHECK-P8-NEXT: vmrgew v2, v3, v2
; CHECK-P8-NEXT: vmrgew v3, v5, v4
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stxvd2x v2, r3, r5
; CHECK-P8-NEXT: stxvd2x v3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -164,51 +160,43 @@ define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.resul
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: li r7, 16
; CHECK-P8-NEXT: li r9, 80
; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
; CHECK-P8-NEXT: li r7, 64
; CHECK-P8-NEXT: li r8, 80
; CHECK-P8-NEXT: lxvd2x vs8, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs3, r4, r8
; CHECK-P8-NEXT: li r8, 96
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: lxvd2x vs5, r4, r8
; CHECK-P8-NEXT: lxvd2x vs3, r4, r8
; CHECK-P8-NEXT: li r7, 96
; CHECK-P8-NEXT: li r8, 112
; CHECK-P8-NEXT: lxvd2x vs4, r4, r9
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: lxvd2x vs5, r4, r7
; CHECK-P8-NEXT: li r7, 16
; CHECK-P8-NEXT: lxvd2x vs6, r4, r8
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xxswapd vs4, vs4
; CHECK-P8-NEXT: xxswapd vs5, vs5
; CHECK-P8-NEXT: xxmrgld vs8, vs1, vs0
; CHECK-P8-NEXT: xxswapd vs6, vs6
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs7
; CHECK-P8-NEXT: xxmrgld vs7, vs4, vs3
; CHECK-P8-NEXT: xxmrghd vs3, vs4, vs3
; CHECK-P8-NEXT: xxmrgld vs4, vs6, vs5
; CHECK-P8-NEXT: xvcvdpuxws v2, vs8
; CHECK-P8-NEXT: xxmrghd vs4, vs0, vs1
; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1
; CHECK-P8-NEXT: lxvd2x vs7, r4, r7
; CHECK-P8-NEXT: xxmrghd vs1, vs2, vs3
; CHECK-P8-NEXT: xxmrgld vs2, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs3, vs5, vs6
; CHECK-P8-NEXT: xvcvdpuxws v3, vs0
; CHECK-P8-NEXT: xxmrghd vs0, vs6, vs5
; CHECK-P8-NEXT: xxmrgld vs5, vs2, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs2, vs1
; CHECK-P8-NEXT: xvcvdpuxws v4, vs7
; CHECK-P8-NEXT: xvcvdpuxws v5, vs3
; CHECK-P8-NEXT: xvcvdpuxws v0, vs4
; CHECK-P8-NEXT: xxmrgld vs0, vs5, vs6
; CHECK-P8-NEXT: xvcvdpuxws v4, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs8, vs7
; CHECK-P8-NEXT: xvcvdpuxws v5, vs2
; CHECK-P8-NEXT: xxmrgld vs2, vs8, vs7
; CHECK-P8-NEXT: xvcvdpuxws v2, vs4
; CHECK-P8-NEXT: xvcvdpuxws v0, vs3
; CHECK-P8-NEXT: xvcvdpuxws v1, vs0
; CHECK-P8-NEXT: xvcvdpuxws v6, vs5
; CHECK-P8-NEXT: xvcvdpuxws v7, vs1
; CHECK-P8-NEXT: xvcvdpuxws v6, vs1
; CHECK-P8-NEXT: xvcvdpuxws v7, vs2
; CHECK-P8-NEXT: vmrgew v2, v3, v2
; CHECK-P8-NEXT: vmrgew v3, v5, v4
; CHECK-P8-NEXT: vmrgew v4, v1, v0
; CHECK-P8-NEXT: vmrgew v5, v7, v6
; CHECK-P8-NEXT: stvx v2, r3, r7
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: stvx v4, r3, r6
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stxvd2x v4, r3, r6
; CHECK-P8-NEXT: stxvd2x v3, r3, r5
; CHECK-P8-NEXT: stxvd2x v2, r3, r7
; CHECK-P8-NEXT: stxvd2x v5, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -375,22 +363,18 @@ define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.r
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r5
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxmrgld vs4, vs1, vs0
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P8-NEXT: xxmrgld vs1, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs2, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs4, vs0, vs1
; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs3, vs2
; CHECK-P8-NEXT: xxmrgld vs2, vs3, vs2
; CHECK-P8-NEXT: xvcvdpsxws v2, vs4
; CHECK-P8-NEXT: xvcvdpsxws v3, vs0
; CHECK-P8-NEXT: xvcvdpsxws v4, vs1
; CHECK-P8-NEXT: xvcvdpsxws v5, vs2
; CHECK-P8-NEXT: vmrgew v2, v3, v2
; CHECK-P8-NEXT: vmrgew v3, v5, v4
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stxvd2x v2, r3, r5
; CHECK-P8-NEXT: stxvd2x v3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -444,51 +428,43 @@ define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %ag
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: li r7, 16
; CHECK-P8-NEXT: li r9, 80
; CHECK-P8-NEXT: lxvd2x vs7, 0, r4
; CHECK-P8-NEXT: li r7, 64
; CHECK-P8-NEXT: li r8, 80
; CHECK-P8-NEXT: lxvd2x vs8, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs3, r4, r8
; CHECK-P8-NEXT: li r8, 96
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: lxvd2x vs5, r4, r8
; CHECK-P8-NEXT: lxvd2x vs3, r4, r8
; CHECK-P8-NEXT: li r7, 96
; CHECK-P8-NEXT: li r8, 112
; CHECK-P8-NEXT: lxvd2x vs4, r4, r9
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: lxvd2x vs5, r4, r7
; CHECK-P8-NEXT: li r7, 16
; CHECK-P8-NEXT: lxvd2x vs6, r4, r8
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xxswapd vs4, vs4
; CHECK-P8-NEXT: xxswapd vs5, vs5
; CHECK-P8-NEXT: xxmrgld vs8, vs1, vs0
; CHECK-P8-NEXT: xxswapd vs6, vs6
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs7
; CHECK-P8-NEXT: xxmrgld vs7, vs4, vs3
; CHECK-P8-NEXT: xxmrghd vs3, vs4, vs3
; CHECK-P8-NEXT: xxmrgld vs4, vs6, vs5
; CHECK-P8-NEXT: xvcvdpsxws v2, vs8
; CHECK-P8-NEXT: xxmrghd vs4, vs0, vs1
; CHECK-P8-NEXT: xxmrgld vs0, vs0, vs1
; CHECK-P8-NEXT: lxvd2x vs7, r4, r7
; CHECK-P8-NEXT: xxmrghd vs1, vs2, vs3
; CHECK-P8-NEXT: xxmrgld vs2, vs2, vs3
; CHECK-P8-NEXT: xxmrghd vs3, vs5, vs6
; CHECK-P8-NEXT: xvcvdpsxws v3, vs0
; CHECK-P8-NEXT: xxmrghd vs0, vs6, vs5
; CHECK-P8-NEXT: xxmrgld vs5, vs2, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs2, vs1
; CHECK-P8-NEXT: xvcvdpsxws v4, vs7
; CHECK-P8-NEXT: xvcvdpsxws v5, vs3
; CHECK-P8-NEXT: xvcvdpsxws v0, vs4
; CHECK-P8-NEXT: xxmrgld vs0, vs5, vs6
; CHECK-P8-NEXT: xvcvdpsxws v4, vs1
; CHECK-P8-NEXT: xxmrghd vs1, vs8, vs7
; CHECK-P8-NEXT: xvcvdpsxws v5, vs2
; CHECK-P8-NEXT: xxmrgld vs2, vs8, vs7
; CHECK-P8-NEXT: xvcvdpsxws v2, vs4
; CHECK-P8-NEXT: xvcvdpsxws v0, vs3
; CHECK-P8-NEXT: xvcvdpsxws v1, vs0
; CHECK-P8-NEXT: xvcvdpsxws v6, vs5
; CHECK-P8-NEXT: xvcvdpsxws v7, vs1
; CHECK-P8-NEXT: xvcvdpsxws v6, vs1
; CHECK-P8-NEXT: xvcvdpsxws v7, vs2
; CHECK-P8-NEXT: vmrgew v2, v3, v2
; CHECK-P8-NEXT: vmrgew v3, v5, v4
; CHECK-P8-NEXT: vmrgew v4, v1, v0
; CHECK-P8-NEXT: vmrgew v5, v7, v6
; CHECK-P8-NEXT: stvx v2, r3, r7
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: stvx v4, r3, r6
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stxvd2x v4, r3, r6
; CHECK-P8-NEXT: stxvd2x v3, r3, r5
; CHECK-P8-NEXT: stxvd2x v2, r3, r7
; CHECK-P8-NEXT: stxvd2x v5, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
72 changes: 36 additions & 36 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -64,12 +64,12 @@ define void @test8elt(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.result,
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: xvcvspuxws v3, v3
; CHECK-P8-NEXT: xvcvspuxws v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: xvcvspuxws vs1, vs1
; CHECK-P8-NEXT: xvcvspuxws vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -104,18 +104,18 @@ define void @test16elt(<16 x i32>* noalias nocapture sret(<16 x i32>) %agg.resul
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: xvcvspuxws v5, v5
; CHECK-P8-NEXT: xvcvspuxws v2, v2
; CHECK-P8-NEXT: xvcvspuxws v3, v3
; CHECK-P8-NEXT: xvcvspuxws v4, v4
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, r3, r6
; CHECK-P8-NEXT: stvx v4, r3, r7
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: xvcvspuxws vs3, vs3
; CHECK-P8-NEXT: xvcvspuxws vs0, vs0
; CHECK-P8-NEXT: xvcvspuxws vs1, vs1
; CHECK-P8-NEXT: xvcvspuxws vs2, vs2
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -211,12 +211,12 @@ define void @test8elt_signed(<8 x i32>* noalias nocapture sret(<8 x i32>) %agg.r
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: xvcvspsxws v3, v3
; CHECK-P8-NEXT: xvcvspsxws v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: xvcvspsxws vs1, vs1
; CHECK-P8-NEXT: xvcvspsxws vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -251,18 +251,18 @@ define void @test16elt_signed(<16 x i32>* noalias nocapture sret(<16 x i32>) %ag
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: xvcvspsxws v5, v5
; CHECK-P8-NEXT: xvcvspsxws v2, v2
; CHECK-P8-NEXT: xvcvspsxws v3, v3
; CHECK-P8-NEXT: xvcvspsxws v4, v4
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, r3, r6
; CHECK-P8-NEXT: stvx v4, r3, r7
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: xvcvspsxws vs3, vs3
; CHECK-P8-NEXT: xvcvspsxws vs0, vs0
; CHECK-P8-NEXT: xvcvspsxws vs1, vs1
; CHECK-P8-NEXT: xvcvspsxws vs2, vs2
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
98 changes: 58 additions & 40 deletions llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -101,10 +101,12 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: vmrglh v4, v3, v2
; CHECK-P8-NEXT: vmrghh v2, v3, v2
; CHECK-P8-NEXT: xvcvuxwsp v3, v4
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r4
; CHECK-P8-NEXT: xvcvuxwsp vs0, v4
; CHECK-P8-NEXT: xvcvuxwsp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -138,29 +140,37 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: xxlxor v3, v3, v3
; CHECK-P8-NEXT: lvx v4, 0, r4
; CHECK-P8-NEXT: li r6, 16
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI3_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v0, 0, r6
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v5, r4, r5
; CHECK-P8-NEXT: lxvd2x vs2, r4, r6
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: addi r4, r5, .LCPI3_1@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: vperm v1, v3, v4, v2
; CHECK-P8-NEXT: vperm v2, v3, v5, v2
; CHECK-P8-NEXT: vperm v5, v3, v5, v0
; CHECK-P8-NEXT: vperm v3, v3, v4, v0
; CHECK-P8-NEXT: xvcvuxwsp v4, v1
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: xvcvuxwsp v5, v5
; CHECK-P8-NEXT: xvcvuxwsp v3, v3
; CHECK-P8-NEXT: stvx v4, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r6
; CHECK-P8-NEXT: stvx v5, r3, r4
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: vperm v1, v4, v2, v3
; CHECK-P8-NEXT: vperm v3, v4, v5, v3
; CHECK-P8-NEXT: vperm v5, v4, v5, v0
; CHECK-P8-NEXT: vperm v2, v4, v2, v0
; CHECK-P8-NEXT: xvcvuxwsp vs0, v1
; CHECK-P8-NEXT: xvcvuxwsp vs1, v3
; CHECK-P8-NEXT: xvcvuxwsp vs2, v5
; CHECK-P8-NEXT: xvcvuxwsp vs3, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -317,10 +327,12 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-P8-NEXT: vslw v2, v2, v3
; CHECK-P8-NEXT: vsraw v4, v4, v3
; CHECK-P8-NEXT: vsraw v2, v2, v3
; CHECK-P8-NEXT: xvcvsxwsp v3, v4
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r4
; CHECK-P8-NEXT: xvcvsxwsp vs0, v4
; CHECK-P8-NEXT: xvcvsxwsp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -356,16 +368,18 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-LABEL: test16elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: vspltisw v5, 8
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v3, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: vadduwm v5, v5, v5
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: vmrglh v4, v2, v2
; CHECK-P8-NEXT: vmrglh v0, v3, v3
; CHECK-P8-NEXT: vmrghh v3, v3, v3
; CHECK-P8-NEXT: vmrghh v2, v2, v2
; CHECK-P8-NEXT: vadduwm v5, v5, v5
; CHECK-P8-NEXT: vslw v4, v4, v5
; CHECK-P8-NEXT: vslw v0, v0, v5
; CHECK-P8-NEXT: vslw v3, v3, v5
Expand All @@ -374,14 +388,18 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-NEXT: vsraw v0, v0, v5
; CHECK-P8-NEXT: vsraw v3, v3, v5
; CHECK-P8-NEXT: vsraw v2, v2, v5
; CHECK-P8-NEXT: xvcvsxwsp v4, v4
; CHECK-P8-NEXT: xvcvsxwsp v5, v0
; CHECK-P8-NEXT: xvcvsxwsp v3, v3
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: stvx v4, 0, r3
; CHECK-P8-NEXT: stvx v5, r3, r6
; CHECK-P8-NEXT: stvx v3, r3, r4
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: xvcvsxwsp vs0, v4
; CHECK-P8-NEXT: xvcvsxwsp vs1, v0
; CHECK-P8-NEXT: xvcvsxwsp vs2, v3
; CHECK-P8-NEXT: xvcvsxwsp vs3, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: stxvd2x vs3, r3, r5
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
204 changes: 115 additions & 89 deletions llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,8 @@ define <2 x double> @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: mtvsrwz v2, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI0_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v4, v2, v3
; CHECK-P8-NEXT: xvcvuxddp v2, v2
; CHECK-P8-NEXT: blr
Expand Down Expand Up @@ -53,15 +54,17 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI1_1@toc@ha
; CHECK-P8-NEXT: mtvsrd v2, r4
; CHECK-P8-NEXT: xxlxor v2, v2, v2
; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l
; CHECK-P8-NEXT: addi r4, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r5
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: mtvsrd v4, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v2, v4, v2, v5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: vperm v3, v2, v4, v3
; CHECK-P8-NEXT: vperm v2, v2, v4, v5
; CHECK-P8-NEXT: xvcvuxddp vs0, v3
; CHECK-P8-NEXT: xvcvuxddp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
Expand Down Expand Up @@ -120,16 +123,20 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_0@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_2@toc@l
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_1@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r4
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: xxswapd v0, vs2
; CHECK-P8-NEXT: xxswapd v1, vs3
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
Expand Down Expand Up @@ -215,38 +222,44 @@ entry:
define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg.result, <16 x i16>* nocapture readonly) local_unnamed_addr #3 {
; CHECK-P8-LABEL: test16elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_2@toc@ha
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_0@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r4
; CHECK-P8-NEXT: xxlxor v3, v3, v3
; CHECK-P8-NEXT: addi r6, r6, .LCPI3_2@toc@l
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_2@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_0@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r6
; CHECK-P8-NEXT: li r6, 16
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: lvx v0, r4, r6
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_1@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: li r5, 96
; CHECK-P8-NEXT: lvx v8, 0, r4
; CHECK-P8-NEXT: vperm v6, v3, v4, v2
; CHECK-P8-NEXT: addi r6, r6, .LCPI3_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lxvd2x vs2, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: lxvd2x vs3, r4, r5
; CHECK-P8-NEXT: addi r4, r6, .LCPI3_1@toc@l
; CHECK-P8-NEXT: addis r6, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs4, 0, r4
; CHECK-P8-NEXT: addi r4, r6, .LCPI3_3@toc@l
; CHECK-P8-NEXT: li r6, 96
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: vperm v7, v3, v4, v5
; CHECK-P8-NEXT: vperm v2, v3, v0, v2
; CHECK-P8-NEXT: vperm v9, v3, v0, v1
; CHECK-P8-NEXT: vperm v5, v3, v0, v5
; CHECK-P8-NEXT: vperm v0, v3, v0, v8
; CHECK-P8-NEXT: vperm v1, v3, v4, v1
; CHECK-P8-NEXT: vperm v3, v3, v4, v8
; CHECK-P8-NEXT: xvcvuxddp vs1, v2
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: xxswapd v1, vs4
; CHECK-P8-NEXT: xxswapd v8, vs0
; CHECK-P8-NEXT: vperm v6, v4, v2, v3
; CHECK-P8-NEXT: vperm v7, v4, v2, v5
; CHECK-P8-NEXT: vperm v3, v4, v0, v3
; CHECK-P8-NEXT: vperm v9, v4, v0, v1
; CHECK-P8-NEXT: vperm v5, v4, v0, v5
; CHECK-P8-NEXT: vperm v0, v4, v0, v8
; CHECK-P8-NEXT: vperm v1, v4, v2, v1
; CHECK-P8-NEXT: vperm v2, v4, v2, v8
; CHECK-P8-NEXT: xvcvuxddp vs1, v3
; CHECK-P8-NEXT: xvcvuxddp vs4, v9
; CHECK-P8-NEXT: xvcvuxddp vs2, v5
; CHECK-P8-NEXT: xvcvuxddp vs3, v0
; CHECK-P8-NEXT: xvcvuxddp vs0, v7
; CHECK-P8-NEXT: xvcvuxddp vs5, v3
; CHECK-P8-NEXT: xvcvuxddp vs5, v2
; CHECK-P8-NEXT: xvcvuxddp vs6, v6
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xvcvuxddp vs7, v1
Expand All @@ -256,18 +269,18 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs5, vs5
; CHECK-P8-NEXT: stxvd2x vs3, r3, r4
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r6
; CHECK-P8-NEXT: li r4, 80
; CHECK-P8-NEXT: li r5, 64
; CHECK-P8-NEXT: li r6, 64
; CHECK-P8-NEXT: xxswapd vs2, vs7
; CHECK-P8-NEXT: xxswapd vs3, vs6
; CHECK-P8-NEXT: stxvd2x vs4, r3, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: stxvd2x vs5, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r6
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
Expand Down Expand Up @@ -371,7 +384,8 @@ define <2 x double> @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: addis r3, r2, .LCPI4_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI4_0@toc@l
; CHECK-P8-NEXT: addi r3, r3, .LCPI4_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: xxswapd v3, vs0
Expand Down Expand Up @@ -416,11 +430,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI5_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vperm v3, v3, v3, v4
; CHECK-P8-NEXT: xxswapd v4, vs0
Expand Down Expand Up @@ -483,23 +499,27 @@ entry:
define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>) %agg.result, <8 x i16> %a) local_unnamed_addr #2 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_2@toc@ha
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI6_3@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_2@toc@l
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_2@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI6_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI6_3@toc@l
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_3@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_4@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lvx v5, 0, r6
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI6_3@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_4@toc@l
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: vperm v3, v2, v2, v3
; CHECK-P8-NEXT: vperm v4, v2, v2, v4
; CHECK-P8-NEXT: vperm v5, v2, v2, v5
Expand Down Expand Up @@ -602,63 +622,69 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI7_2@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r4
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI7_2@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_3@toc@ha
; CHECK-P8-NEXT: lvx v3, 0, r6
; CHECK-P8-NEXT: lxvd2x vs2, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI7_4@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_3@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI7_4@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: lvx v0, 0, r6
; CHECK-P8-NEXT: li r6, 16
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_1@toc@ha
; CHECK-P8-NEXT: lvx v7, r4, r6
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_1@toc@l
; CHECK-P8-NEXT: vperm v1, v4, v4, v2
; CHECK-P8-NEXT: xxswapd v2, vs1
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lxvd2x vs4, 0, r6
; CHECK-P8-NEXT: li r6, 96
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: xxswapd v4, vs2
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-P8-NEXT: xxswapd v5, vs3
; CHECK-P8-NEXT: xxswapd v0, vs4
; CHECK-P8-NEXT: xxswapd v6, vs0
; CHECK-P8-NEXT: vperm v1, v2, v2, v3
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: vperm v6, v4, v4, v3
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: li r5, 96
; CHECK-P8-NEXT: vperm v8, v4, v4, v5
; CHECK-P8-NEXT: vperm v4, v4, v4, v0
; CHECK-P8-NEXT: vperm v5, v7, v7, v5
; CHECK-P8-NEXT: vperm v7, v2, v2, v4
; CHECK-P8-NEXT: vperm v8, v2, v2, v5
; CHECK-P8-NEXT: vperm v2, v2, v2, v0
; CHECK-P8-NEXT: xxswapd v9, vs0
; CHECK-P8-NEXT: vperm v0, v7, v7, v0
; CHECK-P8-NEXT: vperm v2, v7, v7, v2
; CHECK-P8-NEXT: vperm v3, v7, v7, v3
; CHECK-P8-NEXT: vperm v5, v6, v6, v5
; CHECK-P8-NEXT: vperm v0, v6, v6, v0
; CHECK-P8-NEXT: vperm v3, v6, v6, v3
; CHECK-P8-NEXT: vperm v4, v6, v6, v4
; CHECK-P8-NEXT: vsld v1, v1, v9
; CHECK-P8-NEXT: vsld v6, v6, v9
; CHECK-P8-NEXT: vsld v6, v7, v9
; CHECK-P8-NEXT: vsld v5, v5, v9
; CHECK-P8-NEXT: vsld v0, v0, v9
; CHECK-P8-NEXT: vsld v2, v2, v9
; CHECK-P8-NEXT: vsld v3, v3, v9
; CHECK-P8-NEXT: vsld v4, v4, v9
; CHECK-P8-NEXT: vsrad v5, v5, v9
; CHECK-P8-NEXT: vsrad v0, v0, v9
; CHECK-P8-NEXT: vsld v7, v8, v9
; CHECK-P8-NEXT: vsld v4, v4, v9
; CHECK-P8-NEXT: vsrad v2, v2, v9
; CHECK-P8-NEXT: vsld v2, v2, v9
; CHECK-P8-NEXT: vsrad v3, v3, v9
; CHECK-P8-NEXT: vsrad v4, v4, v9
; CHECK-P8-NEXT: xvcvsxddp vs2, v5
; CHECK-P8-NEXT: xvcvsxddp vs3, v0
; CHECK-P8-NEXT: vsrad v1, v1, v9
; CHECK-P8-NEXT: vsrad v6, v6, v9
; CHECK-P8-NEXT: vsrad v7, v7, v9
; CHECK-P8-NEXT: vsrad v4, v4, v9
; CHECK-P8-NEXT: xvcvsxddp vs1, v2
; CHECK-P8-NEXT: vsrad v2, v2, v9
; CHECK-P8-NEXT: xvcvsxddp vs1, v3
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xvcvsxddp vs4, v3
; CHECK-P8-NEXT: xvcvsxddp vs4, v4
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xvcvsxddp vs0, v7
; CHECK-P8-NEXT: xvcvsxddp vs5, v4
; CHECK-P8-NEXT: xvcvsxddp vs5, v2
; CHECK-P8-NEXT: xvcvsxddp vs6, v1
; CHECK-P8-NEXT: stxvd2x vs3, r3, r4
; CHECK-P8-NEXT: li r4, 80
; CHECK-P8-NEXT: xvcvsxddp vs7, v6
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: li r5, 64
; CHECK-P8-NEXT: stxvd2x vs2, r3, r6
; CHECK-P8-NEXT: li r6, 64
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs4, vs4
; CHECK-P8-NEXT: xxswapd vs0, vs0
Expand All @@ -667,11 +693,11 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P8-NEXT: stxvd2x vs4, r3, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd vs2, vs7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: stxvd2x vs5, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r6
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
Expand Down
64 changes: 38 additions & 26 deletions llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -81,10 +81,12 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw v5, v3, v3
; CHECK-P8-NEXT: xxmrghw v3, v3, v3
; CHECK-P8-NEXT: xxmrglw v4, v2, v2
Expand Down Expand Up @@ -152,25 +154,29 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: li r7, 32
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v0, r4, r7
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, r4, r7
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxmrglw v4, v2, v2
; CHECK-P8-NEXT: xxmrghw v5, v3, v3
; CHECK-P8-NEXT: xxmrghw v0, v3, v3
; CHECK-P8-NEXT: xxswapd v5, vs0
; CHECK-P8-NEXT: xxmrghw v2, v2, v2
; CHECK-P8-NEXT: xxmrglw v3, v3, v3
; CHECK-P8-NEXT: xvcvuxwdp vs0, v4
; CHECK-P8-NEXT: lvx v4, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xvcvuxwdp vs1, v5
; CHECK-P8-NEXT: xxmrghw v5, v0, v0
; CHECK-P8-NEXT: xxmrglw v0, v0, v0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: xvcvuxwdp vs1, v0
; CHECK-P8-NEXT: xxmrghw v0, v5, v5
; CHECK-P8-NEXT: xxmrglw v5, v5, v5
; CHECK-P8-NEXT: xvcvuxwdp vs2, v2
; CHECK-P8-NEXT: xxmrglw v2, v4, v4
; CHECK-P8-NEXT: xvcvuxwdp vs3, v3
; CHECK-P8-NEXT: xxmrghw v3, v4, v4
; CHECK-P8-NEXT: xvcvuxwdp vs4, v5
; CHECK-P8-NEXT: xvcvuxwdp vs5, v0
; CHECK-P8-NEXT: xvcvuxwdp vs4, v0
; CHECK-P8-NEXT: xvcvuxwdp vs5, v5
; CHECK-P8-NEXT: xvcvuxwdp vs6, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xvcvuxwdp vs7, v3
Expand Down Expand Up @@ -335,10 +341,12 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw v5, v3, v3
; CHECK-P8-NEXT: xxmrghw v3, v3, v3
; CHECK-P8-NEXT: xxmrglw v4, v2, v2
Expand Down Expand Up @@ -406,25 +414,29 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P8-NEXT: li r6, 48
; CHECK-P8-NEXT: li r7, 32
; CHECK-P8-NEXT: li r8, 64
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v0, r4, r7
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: lxvd2x vs0, r4, r7
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxmrglw v4, v2, v2
; CHECK-P8-NEXT: xxmrghw v5, v3, v3
; CHECK-P8-NEXT: xxmrghw v0, v3, v3
; CHECK-P8-NEXT: xxswapd v5, vs0
; CHECK-P8-NEXT: xxmrghw v2, v2, v2
; CHECK-P8-NEXT: xxmrglw v3, v3, v3
; CHECK-P8-NEXT: xvcvsxwdp vs0, v4
; CHECK-P8-NEXT: lvx v4, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xvcvsxwdp vs1, v5
; CHECK-P8-NEXT: xxmrghw v5, v0, v0
; CHECK-P8-NEXT: xxmrglw v0, v0, v0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: xvcvsxwdp vs1, v0
; CHECK-P8-NEXT: xxmrghw v0, v5, v5
; CHECK-P8-NEXT: xxmrglw v5, v5, v5
; CHECK-P8-NEXT: xvcvsxwdp vs2, v2
; CHECK-P8-NEXT: xxmrglw v2, v4, v4
; CHECK-P8-NEXT: xvcvsxwdp vs3, v3
; CHECK-P8-NEXT: xxmrghw v3, v4, v4
; CHECK-P8-NEXT: xvcvsxwdp vs4, v5
; CHECK-P8-NEXT: xvcvsxwdp vs5, v0
; CHECK-P8-NEXT: xvcvsxwdp vs4, v0
; CHECK-P8-NEXT: xvcvsxwdp vs5, v5
; CHECK-P8-NEXT: xvcvsxwdp vs6, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xvcvsxwdp vs7, v3
Expand Down
36 changes: 24 additions & 12 deletions llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -115,8 +115,10 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-P8-NEXT: xxsldwi v4, vs2, vs2, 3
; CHECK-P8-NEXT: vpkudum v2, v3, v2
; CHECK-P8-NEXT: vpkudum v3, v4, v5
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -211,10 +213,14 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P8-NEXT: xxsldwi v7, vs7, vs7, 3
; CHECK-P8-NEXT: vpkudum v4, v1, v0
; CHECK-P8-NEXT: vpkudum v5, v6, v7
; CHECK-P8-NEXT: stvx v2, r3, r7
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: stvx v4, r3, r6
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: xxswapd vs2, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: xxswapd vs0, v4
; CHECK-P8-NEXT: xxswapd vs3, v5
; CHECK-P8-NEXT: stxvd2x vs0, r3, r6
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -401,8 +407,10 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-P8-NEXT: xxsldwi v4, vs2, vs2, 3
; CHECK-P8-NEXT: vpkudum v2, v3, v2
; CHECK-P8-NEXT: vpkudum v3, v4, v5
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -497,10 +505,14 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-NEXT: xxsldwi v7, vs7, vs7, 3
; CHECK-P8-NEXT: vpkudum v4, v1, v0
; CHECK-P8-NEXT: vpkudum v5, v6, v7
; CHECK-P8-NEXT: stvx v2, r3, r7
; CHECK-P8-NEXT: stvx v3, r3, r5
; CHECK-P8-NEXT: stvx v4, r3, r6
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: xxswapd vs2, v2
; CHECK-P8-NEXT: xxswapd vs1, v3
; CHECK-P8-NEXT: xxswapd vs0, v4
; CHECK-P8-NEXT: xxswapd vs3, v5
; CHECK-P8-NEXT: stxvd2x vs0, r3, r6
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
118 changes: 72 additions & 46 deletions llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -68,7 +68,8 @@ define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-NEXT: mtvsrwz v2, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI1_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v4, v2, v3
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: blr
Expand Down Expand Up @@ -105,19 +106,23 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: mtvsrd v2, r4
; CHECK-P8-NEXT: xxlxor v2, v2, v2
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-P8-NEXT: addi r4, r6, .LCPI2_1@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r5
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: mtvsrd v4, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v2, v4, v2, v5
; CHECK-P8-NEXT: xvcvuxwsp v3, v3
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI2_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: vperm v3, v2, v4, v3
; CHECK-P8-NEXT: vperm v2, v2, v4, v5
; CHECK-P8-NEXT: xvcvuxwsp vs0, v3
; CHECK-P8-NEXT: xvcvuxwsp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -170,29 +175,37 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_2@toc@l
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_3@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_1@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r4
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: xxswapd v0, vs2
; CHECK-P8-NEXT: xxswapd v1, vs3
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
; CHECK-P8-NEXT: vperm v2, v4, v2, v1
; CHECK-P8-NEXT: xvcvuxwsp v4, v5
; CHECK-P8-NEXT: xvcvuxwsp v3, v3
; CHECK-P8-NEXT: xvcvuxwsp v5, v0
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: stvx v4, r3, r5
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v5, r3, r4
; CHECK-P8-NEXT: xvcvuxwsp vs0, v3
; CHECK-P8-NEXT: xvcvuxwsp vs1, v5
; CHECK-P8-NEXT: xvcvuxwsp vs2, v0
; CHECK-P8-NEXT: xvcvuxwsp vs3, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: stvx v2, r3, r4
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -320,7 +333,8 @@ define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: mtvsrwz v3, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_0@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vspltisw v3, 12
; CHECK-P8-NEXT: vadduwm v3, v3, v3
Expand Down Expand Up @@ -362,23 +376,27 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: mtvsrd v3, r4
; CHECK-P8-NEXT: vspltisw v5, 12
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI6_1@toc@l
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vperm v3, v3, v3, v4
; CHECK-P8-NEXT: vadduwm v4, v5, v5
; CHECK-P8-NEXT: vspltisw v4, 12
; CHECK-P8-NEXT: vadduwm v4, v4, v4
; CHECK-P8-NEXT: vslw v2, v2, v4
; CHECK-P8-NEXT: vslw v3, v3, v4
; CHECK-P8-NEXT: vsraw v2, v2, v4
; CHECK-P8-NEXT: vsraw v3, v3, v4
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: xvcvsxwsp v3, v3
; CHECK-P8-NEXT: stvx v2, 0, r3
; CHECK-P8-NEXT: stvx v3, r3, r4
; CHECK-P8-NEXT: xvcvsxwsp vs0, v2
; CHECK-P8-NEXT: xvcvsxwsp vs1, v3
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs1, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -433,16 +451,20 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-NEXT: vspltisw v1, 12
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_0@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_2@toc@l
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_1@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: lvx v0, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: vperm v3, v2, v2, v3
; CHECK-P8-NEXT: vperm v4, v2, v2, v4
; CHECK-P8-NEXT: vperm v5, v2, v2, v5
Expand All @@ -456,15 +478,19 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-NEXT: vsraw v4, v4, v0
; CHECK-P8-NEXT: vsraw v5, v5, v0
; CHECK-P8-NEXT: vsraw v2, v2, v0
; CHECK-P8-NEXT: xvcvsxwsp v3, v3
; CHECK-P8-NEXT: xvcvsxwsp v4, v4
; CHECK-P8-NEXT: xvcvsxwsp v5, v5
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v4, r3, r5
; CHECK-P8-NEXT: stvx v5, r3, r4
; CHECK-P8-NEXT: xvcvsxwsp vs0, v3
; CHECK-P8-NEXT: xvcvsxwsp vs1, v4
; CHECK-P8-NEXT: xvcvsxwsp vs2, v5
; CHECK-P8-NEXT: xvcvsxwsp vs3, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: stvx v2, r3, r4
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, r3, r4
; CHECK-P8-NEXT: stxvd2x vs0, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
196 changes: 113 additions & 83 deletions llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,8 @@ define <2 x double> @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: mtvsrwz v2, r3
; CHECK-P8-NEXT: addi r4, r4, .LCPI0_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: vperm v2, v4, v2, v3
; CHECK-P8-NEXT: xvcvuxddp v2, v2
; CHECK-P8-NEXT: blr
Expand Down Expand Up @@ -53,15 +54,17 @@ define void @test4elt(<4 x double>* noalias nocapture sret(<4 x double>) %agg.re
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI1_1@toc@ha
; CHECK-P8-NEXT: mtvsrwz v2, r4
; CHECK-P8-NEXT: xxlxor v2, v2, v2
; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l
; CHECK-P8-NEXT: addi r4, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r5
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: mtvsrwz v4, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v2, v4, v2, v5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI1_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: vperm v3, v2, v4, v3
; CHECK-P8-NEXT: vperm v2, v2, v4, v5
; CHECK-P8-NEXT: xvcvuxddp vs0, v3
; CHECK-P8-NEXT: xvcvuxddp vs1, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
Expand Down Expand Up @@ -117,31 +120,35 @@ define void @test8elt(<8 x double>* noalias nocapture sret(<8 x double>) %agg.re
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI2_2@toc@ha
; CHECK-P8-NEXT: mtvsrd v2, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_3@toc@ha
; CHECK-P8-NEXT: xxlxor v2, v2, v2
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_3@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: lvx v3, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI2_2@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r4
; CHECK-P8-NEXT: addi r6, r6, .LCPI2_2@toc@l
; CHECK-P8-NEXT: mtvsrd v4, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_1@toc@l
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_3@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_3@toc@l
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI2_1@toc@l
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: vperm v2, v4, v2, v1
; CHECK-P8-NEXT: xvcvuxddp vs2, v0
; CHECK-P8-NEXT: xxswapd v0, vs2
; CHECK-P8-NEXT: xxswapd v1, vs3
; CHECK-P8-NEXT: vperm v3, v2, v4, v3
; CHECK-P8-NEXT: vperm v5, v2, v4, v5
; CHECK-P8-NEXT: vperm v0, v2, v4, v0
; CHECK-P8-NEXT: vperm v2, v2, v4, v1
; CHECK-P8-NEXT: xvcvuxddp vs0, v3
; CHECK-P8-NEXT: xvcvuxddp vs1, v5
; CHECK-P8-NEXT: xvcvuxddp vs2, v0
; CHECK-P8-NEXT: xvcvuxddp vs3, v2
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: stxvd2x vs2, r3, r4
; CHECK-P8-NEXT: li r4, 16
Expand Down Expand Up @@ -224,58 +231,66 @@ define void @test16elt(<16 x double>* noalias nocapture sret(<16 x double>) %agg
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_0@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_1@toc@l
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_2@toc@ha
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_4@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_2@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_4@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r4
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_6@toc@ha
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_7@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_6@toc@l
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_7@toc@l
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: lvx v6, 0, r4
; CHECK-P8-NEXT: xxswapd v5, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI3_5@toc@ha
; CHECK-P8-NEXT: lvx v7, 0, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI3_3@toc@ha
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: addi r4, r4, .LCPI3_5@toc@l
; CHECK-P8-NEXT: xxswapd v0, vs2
; CHECK-P8-NEXT: addi r5, r5, .LCPI3_3@toc@l
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
; CHECK-P8-NEXT: lvx v8, 0, r4
; CHECK-P8-NEXT: lvx v9, 0, r5
; CHECK-P8-NEXT: vperm v1, v4, v2, v1
; CHECK-P8-NEXT: xxswapd v1, vs3
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: vperm v3, v4, v2, v3
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: li r5, 96
; CHECK-P8-NEXT: xxswapd v6, vs0
; CHECK-P8-NEXT: xxswapd v7, vs1
; CHECK-P8-NEXT: vperm v5, v4, v2, v5
; CHECK-P8-NEXT: xxswapd v8, vs2
; CHECK-P8-NEXT: xxswapd v9, vs3
; CHECK-P8-NEXT: vperm v6, v4, v2, v6
; CHECK-P8-NEXT: vperm v7, v4, v2, v7
; CHECK-P8-NEXT: vperm v8, v4, v2, v8
; CHECK-P8-NEXT: vperm v0, v4, v2, v0
; CHECK-P8-NEXT: vperm v1, v4, v2, v1
; CHECK-P8-NEXT: vperm v2, v4, v2, v9
; CHECK-P8-NEXT: xvcvuxddp vs0, v0
; CHECK-P8-NEXT: xvcvuxddp vs1, v1
; CHECK-P8-NEXT: xvcvuxddp vs2, v6
; CHECK-P8-NEXT: xvcvuxddp vs3, v7
; CHECK-P8-NEXT: xvcvuxddp vs4, v8
; CHECK-P8-NEXT: xvcvuxddp vs0, v0
; CHECK-P8-NEXT: xvcvuxddp vs1, v1
; CHECK-P8-NEXT: xvcvuxddp vs5, v2
; CHECK-P8-NEXT: xvcvuxddp vs6, v3
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xvcvuxddp vs7, v5
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: xxswapd vs2, vs2
; CHECK-P8-NEXT: xvcvuxddp vs7, v5
; CHECK-P8-NEXT: xxswapd vs3, vs3
; CHECK-P8-NEXT: xxswapd vs4, vs4
; CHECK-P8-NEXT: xxswapd vs5, vs5
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: xxswapd vs1, vs1
; CHECK-P8-NEXT: stxvd2x vs3, r3, r4
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: li r4, 80
; CHECK-P8-NEXT: xxswapd vs5, vs5
; CHECK-P8-NEXT: stxvd2x vs2, r3, r5
; CHECK-P8-NEXT: li r5, 64
; CHECK-P8-NEXT: xxswapd vs2, vs7
; CHECK-P8-NEXT: xxswapd vs3, vs6
; CHECK-P8-NEXT: stxvd2x vs4, r3, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd vs2, vs7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r5
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: stxvd2x vs5, r3, r4
Expand Down Expand Up @@ -404,7 +419,8 @@ define <2 x double> @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: addis r3, r2, .LCPI4_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI4_0@toc@l
; CHECK-P8-NEXT: addi r3, r3, .LCPI4_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r3
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: xxswapd v3, vs0
Expand Down Expand Up @@ -449,11 +465,13 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret(<4 x double>)
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI5_2@toc@l
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 16
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vperm v3, v3, v3, v4
; CHECK-P8-NEXT: xxswapd v4, vs0
Expand Down Expand Up @@ -519,22 +537,26 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret(<8 x double>)
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI6_2@toc@ha
; CHECK-P8-NEXT: mtvsrd v3, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI6_2@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI6_1@toc@l
; CHECK-P8-NEXT: lvx v2, 0, r5
; CHECK-P8-NEXT: lxvd2x vs0, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_3@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r6
; CHECK-P8-NEXT: lxvd2x vs1, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI6_4@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_3@toc@l
; CHECK-P8-NEXT: lvx v5, 0, r5
; CHECK-P8-NEXT: lxvd2x vs2, 0, r5
; CHECK-P8-NEXT: addi r5, r6, .LCPI6_4@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r5
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: addi r4, r5, .LCPI6_1@toc@l
; CHECK-P8-NEXT: li r5, 32
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 48
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: vperm v2, v3, v3, v2
; CHECK-P8-NEXT: vperm v4, v3, v3, v4
; CHECK-P8-NEXT: vperm v5, v3, v3, v5
; CHECK-P8-NEXT: vperm v3, v3, v3, v0
Expand Down Expand Up @@ -639,38 +661,46 @@ define void @test16elt_signed(<16 x double>* noalias nocapture sret(<16 x double
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_0@toc@ha
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_2@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI7_3@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_0@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_2@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI7_3@toc@l
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_4@toc@ha
; CHECK-P8-NEXT: lvx v4, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_5@toc@ha
; CHECK-P8-NEXT: lvx v5, 0, r6
; CHECK-P8-NEXT: addis r6, r2, .LCPI7_1@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_4@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_5@toc@l
; CHECK-P8-NEXT: addi r6, r6, .LCPI7_1@toc@l
; CHECK-P8-NEXT: lvx v0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_6@toc@ha
; CHECK-P8-NEXT: lvx v1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_7@toc@ha
; CHECK-P8-NEXT: lxvd2x vs0, 0, r6
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_6@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_7@toc@l
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_3@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_4@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_3@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_4@toc@l
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_5@toc@ha
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_6@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_5@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_6@toc@l
; CHECK-P8-NEXT: xxswapd v3, vs0
; CHECK-P8-NEXT: xxswapd v4, vs1
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_7@toc@ha
; CHECK-P8-NEXT: lxvd2x vs1, 0, r5
; CHECK-P8-NEXT: addis r5, r2, .LCPI7_8@toc@ha
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_7@toc@l
; CHECK-P8-NEXT: addi r5, r5, .LCPI7_8@toc@l
; CHECK-P8-NEXT: xxswapd v5, vs2
; CHECK-P8-NEXT: xxswapd v0, vs3
; CHECK-P8-NEXT: lxvd2x vs2, 0, r4
; CHECK-P8-NEXT: lxvd2x vs3, 0, r5
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_1@toc@ha
; CHECK-P8-NEXT: vperm v3, v2, v2, v3
; CHECK-P8-NEXT: lvx v6, 0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI7_8@toc@ha
; CHECK-P8-NEXT: lvx v7, 0, r5
; CHECK-P8-NEXT: vperm v4, v2, v2, v4
; CHECK-P8-NEXT: li r5, 96
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_8@toc@l
; CHECK-P8-NEXT: xxswapd v1, vs0
; CHECK-P8-NEXT: xxswapd v6, vs1
; CHECK-P8-NEXT: addi r4, r4, .LCPI7_1@toc@l
; CHECK-P8-NEXT: vperm v4, v2, v2, v4
; CHECK-P8-NEXT: lxvd2x vs0, 0, r4
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxswapd v7, vs2
; CHECK-P8-NEXT: xxswapd v8, vs3
; CHECK-P8-NEXT: vperm v5, v2, v2, v5
; CHECK-P8-NEXT: xxswapd v9, vs0
; CHECK-P8-NEXT: lvx v8, 0, r4
; CHECK-P8-NEXT: vperm v0, v2, v2, v0
; CHECK-P8-NEXT: li r4, 112
; CHECK-P8-NEXT: xxswapd v9, vs0
; CHECK-P8-NEXT: vperm v1, v2, v2, v1
; CHECK-P8-NEXT: vperm v6, v2, v2, v6
; CHECK-P8-NEXT: vperm v7, v2, v2, v7
Expand Down
72 changes: 36 additions & 36 deletions llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -64,12 +64,12 @@ define void @test8elt(<8 x float>* noalias nocapture sret(<8 x float>) %agg.resu
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: xvcvuxwsp v3, v3
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: xvcvuxwsp vs1, vs1
; CHECK-P8-NEXT: xvcvuxwsp vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt:
Expand Down Expand Up @@ -104,18 +104,18 @@ define void @test16elt(<16 x float>* noalias nocapture sret(<16 x float>) %agg.r
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: xvcvuxwsp v5, v5
; CHECK-P8-NEXT: xvcvuxwsp v2, v2
; CHECK-P8-NEXT: xvcvuxwsp v3, v3
; CHECK-P8-NEXT: xvcvuxwsp v4, v4
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, r3, r6
; CHECK-P8-NEXT: stvx v4, r3, r7
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: xvcvuxwsp vs3, vs3
; CHECK-P8-NEXT: xvcvuxwsp vs0, vs0
; CHECK-P8-NEXT: xvcvuxwsp vs1, vs1
; CHECK-P8-NEXT: xvcvuxwsp vs2, vs2
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt:
Expand Down Expand Up @@ -211,12 +211,12 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret(<8 x float>) %a
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: lvx v3, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: xvcvsxwsp v3, v3
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: stvx v3, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: lxvd2x vs1, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: xvcvsxwsp vs1, vs1
; CHECK-P8-NEXT: xvcvsxwsp vs0, vs0
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs1, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test8elt_signed:
Expand Down Expand Up @@ -251,18 +251,18 @@ define void @test16elt_signed(<16 x float>* noalias nocapture sret(<16 x float>)
; CHECK-P8-NEXT: li r5, 16
; CHECK-P8-NEXT: li r6, 32
; CHECK-P8-NEXT: li r7, 48
; CHECK-P8-NEXT: lvx v5, 0, r4
; CHECK-P8-NEXT: lvx v2, r4, r5
; CHECK-P8-NEXT: lvx v3, r4, r6
; CHECK-P8-NEXT: lvx v4, r4, r7
; CHECK-P8-NEXT: xvcvsxwsp v5, v5
; CHECK-P8-NEXT: xvcvsxwsp v2, v2
; CHECK-P8-NEXT: xvcvsxwsp v3, v3
; CHECK-P8-NEXT: xvcvsxwsp v4, v4
; CHECK-P8-NEXT: stvx v5, 0, r3
; CHECK-P8-NEXT: stvx v2, r3, r5
; CHECK-P8-NEXT: stvx v3, r3, r6
; CHECK-P8-NEXT: stvx v4, r3, r7
; CHECK-P8-NEXT: lxvd2x vs3, 0, r4
; CHECK-P8-NEXT: lxvd2x vs0, r4, r5
; CHECK-P8-NEXT: lxvd2x vs1, r4, r6
; CHECK-P8-NEXT: lxvd2x vs2, r4, r7
; CHECK-P8-NEXT: xvcvsxwsp vs3, vs3
; CHECK-P8-NEXT: xvcvsxwsp vs0, vs0
; CHECK-P8-NEXT: xvcvsxwsp vs1, vs1
; CHECK-P8-NEXT: xvcvsxwsp vs2, vs2
; CHECK-P8-NEXT: stxvd2x vs2, r3, r7
; CHECK-P8-NEXT: stxvd2x vs1, r3, r6
; CHECK-P8-NEXT: stxvd2x vs0, r3, r5
; CHECK-P8-NEXT: stxvd2x vs3, 0, r3
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test16elt_signed:
Expand Down
15 changes: 10 additions & 5 deletions llvm/test/CodeGen/PowerPC/vec_shuffle_p8vector_le.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -4,9 +4,11 @@
define void @VPKUDUM_unary(<2 x i64>* %A) {
; CHECK-LABEL: VPKUDUM_unary:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx 2, 0, 3
; CHECK-NEXT: lxvd2x 0, 0, 3
; CHECK-NEXT: xxswapd 34, 0
; CHECK-NEXT: vpkudum 2, 2, 2
; CHECK-NEXT: stvx 2, 0, 3
; CHECK-NEXT: xxswapd 0, 34
; CHECK-NEXT: stxvd2x 0, 0, 3
; CHECK-NEXT: blr
entry:
%tmp = load <2 x i64>, <2 x i64>* %A
Expand All @@ -25,10 +27,13 @@ entry:
define void @VPKUDUM(<2 x i64>* %A, <2 x i64>* %B) {
; CHECK-LABEL: VPKUDUM:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: lvx 2, 0, 3
; CHECK-NEXT: lvx 3, 0, 4
; CHECK-NEXT: lxvd2x 0, 0, 3
; CHECK-NEXT: lxvd2x 1, 0, 4
; CHECK-NEXT: xxswapd 34, 0
; CHECK-NEXT: xxswapd 35, 1
; CHECK-NEXT: vpkudum 2, 3, 2
; CHECK-NEXT: stvx 2, 0, 3
; CHECK-NEXT: xxswapd 0, 34
; CHECK-NEXT: stxvd2x 0, 0, 3
; CHECK-NEXT: blr
entry:
%tmp = load <2 x i64>, <2 x i64>* %A
Expand Down
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