80 changes: 48 additions & 32 deletions llvm/test/CodeGen/AArch64/sve-fixed-length-int-vselect.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -48,12 +48,13 @@ define void @select_v32i8(<32 x i8>* %a, <32 x i8>* %b, <32 x i1>* %c) #0 {
; CHECK-LABEL: select_v32i8:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ldr w8, [x2]
; CHECK-NEXT: ptrue p0.b, vl32
; CHECK-NEXT: ptrue p1.b
Expand Down Expand Up @@ -143,12 +144,13 @@ define void @select_v64i8(<64 x i8>* %a, <64 x i8>* %b, <64 x i1>* %c) #0 {
; VBITS_GE_512-LABEL: select_v64i8:
; VBITS_GE_512: // %bb.0:
; VBITS_GE_512-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_512-NEXT: mov x29, sp
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_512-NEXT: .cfi_offset w30, -8
; VBITS_GE_512-NEXT: .cfi_offset w29, -16
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: ldr x8, [x2]
; VBITS_GE_512-NEXT: ptrue p0.b, vl64
; VBITS_GE_512-NEXT: ptrue p1.b
Expand Down Expand Up @@ -302,12 +304,13 @@ define void @select_v128i8(<128 x i8>* %a, <128 x i8>* %b, <128 x i1>* %c) #0 {
; VBITS_GE_1024-LABEL: select_v128i8:
; VBITS_GE_1024: // %bb.0:
; VBITS_GE_1024-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_1024-NEXT: mov x29, sp
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_1024-NEXT: .cfi_offset w30, -8
; VBITS_GE_1024-NEXT: .cfi_offset w29, -16
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: ldr x8, [x2, #8]
; VBITS_GE_1024-NEXT: ptrue p0.b, vl128
; VBITS_GE_1024-NEXT: ptrue p1.b
Expand Down Expand Up @@ -590,12 +593,13 @@ define void @select_v256i8(<256 x i8>* %a, <256 x i8>* %b, <256 x i1>* %c) #0 {
; VBITS_GE_2048-LABEL: select_v256i8:
; VBITS_GE_2048: // %bb.0:
; VBITS_GE_2048-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_2048-NEXT: mov x29, sp
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_2048-NEXT: .cfi_offset w30, -8
; VBITS_GE_2048-NEXT: .cfi_offset w29, -16
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: ldr x8, [x2, #24]
; VBITS_GE_2048-NEXT: ptrue p0.b, vl256
; VBITS_GE_2048-NEXT: ptrue p1.b
Expand Down Expand Up @@ -1161,12 +1165,13 @@ define void @select_v16i16(<16 x i16>* %a, <16 x i16>* %b, <16 x i1>* %c) #0 {
; CHECK-LABEL: select_v16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ldrh w8, [x2]
; CHECK-NEXT: ptrue p0.h, vl16
; CHECK-NEXT: ptrue p1.h
Expand Down Expand Up @@ -1224,12 +1229,13 @@ define void @select_v32i16(<32 x i16>* %a, <32 x i16>* %b, <32 x i1>* %c) #0 {
; VBITS_GE_512-LABEL: select_v32i16:
; VBITS_GE_512: // %bb.0:
; VBITS_GE_512-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_512-NEXT: mov x29, sp
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_512-NEXT: .cfi_offset w30, -8
; VBITS_GE_512-NEXT: .cfi_offset w29, -16
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: ldr w8, [x2]
; VBITS_GE_512-NEXT: ptrue p0.h, vl32
; VBITS_GE_512-NEXT: ptrue p1.h
Expand Down Expand Up @@ -1319,12 +1325,13 @@ define void @select_v64i16(<64 x i16>* %a, <64 x i16>* %b, <64 x i1>* %c) #0 {
; VBITS_GE_1024-LABEL: select_v64i16:
; VBITS_GE_1024: // %bb.0:
; VBITS_GE_1024-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_1024-NEXT: mov x29, sp
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_1024-NEXT: .cfi_offset w30, -8
; VBITS_GE_1024-NEXT: .cfi_offset w29, -16
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: ldr x8, [x2]
; VBITS_GE_1024-NEXT: ptrue p0.h, vl64
; VBITS_GE_1024-NEXT: ptrue p1.h
Expand Down Expand Up @@ -1478,12 +1485,13 @@ define void @select_v128i16(<128 x i16>* %a, <128 x i16>* %b, <128 x i1>* %c) #0
; VBITS_GE_2048-LABEL: select_v128i16:
; VBITS_GE_2048: // %bb.0:
; VBITS_GE_2048-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_2048-NEXT: mov x29, sp
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_2048-NEXT: .cfi_offset w30, -8
; VBITS_GE_2048-NEXT: .cfi_offset w29, -16
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: ldr x8, [x2, #8]
; VBITS_GE_2048-NEXT: ptrue p0.h, vl128
; VBITS_GE_2048-NEXT: ptrue p1.h
Expand Down Expand Up @@ -1791,12 +1799,13 @@ define void @select_v8i32(<8 x i32>* %a, <8 x i32>* %b, <8 x i1>* %c) #0 {
; CHECK-LABEL: select_v8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ldrb w8, [x2]
; CHECK-NEXT: ptrue p0.s, vl8
; CHECK-NEXT: ptrue p1.s
Expand Down Expand Up @@ -1834,12 +1843,13 @@ define void @select_v16i32(<16 x i32>* %a, <16 x i32>* %b, <16 x i1>* %c) #0 {
; VBITS_GE_512-LABEL: select_v16i32:
; VBITS_GE_512: // %bb.0:
; VBITS_GE_512-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_512-NEXT: mov x29, sp
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_512-NEXT: .cfi_offset w30, -8
; VBITS_GE_512-NEXT: .cfi_offset w29, -16
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: ldrh w8, [x2]
; VBITS_GE_512-NEXT: ptrue p0.s, vl16
; VBITS_GE_512-NEXT: ptrue p1.s
Expand Down Expand Up @@ -1889,12 +1899,13 @@ define void @select_v32i32(<32 x i32>* %a, <32 x i32>* %b, <32 x i1>* %c) #0 {
; VBITS_GE_1024-LABEL: select_v32i32:
; VBITS_GE_1024: // %bb.0:
; VBITS_GE_1024-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_1024-NEXT: mov x29, sp
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_1024-NEXT: .cfi_offset w30, -8
; VBITS_GE_1024-NEXT: .cfi_offset w29, -16
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: ldr w8, [x2]
; VBITS_GE_1024-NEXT: ptrue p0.s, vl32
; VBITS_GE_1024-NEXT: ptrue p1.s
Expand Down Expand Up @@ -1968,12 +1979,13 @@ define void @select_v64i32(<64 x i32>* %a, <64 x i32>* %b, <64 x i1>* %c) #0 {
; VBITS_GE_2048-LABEL: select_v64i32:
; VBITS_GE_2048: // %bb.0:
; VBITS_GE_2048-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_2048-NEXT: mov x29, sp
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_2048-NEXT: .cfi_offset w30, -8
; VBITS_GE_2048-NEXT: .cfi_offset w29, -16
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: ldr x8, [x2]
; VBITS_GE_2048-NEXT: ptrue p0.s, vl64
; VBITS_GE_2048-NEXT: ptrue p1.s
Expand Down Expand Up @@ -2121,12 +2133,13 @@ define void @select_v4i64(<4 x i64>* %a, <4 x i64>* %b, <4 x i1>* %c) #0 {
; CHECK-LABEL: select_v4i64:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ldrb w8, [x2]
; CHECK-NEXT: ptrue p0.d, vl4
; CHECK-NEXT: ptrue p1.d
Expand Down Expand Up @@ -2161,12 +2174,13 @@ define void @select_v8i64(<8 x i64>* %a, <8 x i64>* %b, <8 x i1>* %c) #0 {
; VBITS_GE_512-LABEL: select_v8i64:
; VBITS_GE_512: // %bb.0:
; VBITS_GE_512-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_512-NEXT: mov x29, sp
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_512-NEXT: .cfi_offset w30, -8
; VBITS_GE_512-NEXT: .cfi_offset w29, -16
; VBITS_GE_512-NEXT: sub x9, sp, #112
; VBITS_GE_512-NEXT: and sp, x9, #0xffffffffffffffc0
; VBITS_GE_512-NEXT: ldrb w8, [x2]
; VBITS_GE_512-NEXT: ptrue p0.d, vl8
; VBITS_GE_512-NEXT: ptrue p1.d
Expand Down Expand Up @@ -2211,12 +2225,13 @@ define void @select_v16i64(<16 x i64>* %a, <16 x i64>* %b, <16 x i1>* %c) #0 {
; VBITS_GE_1024-LABEL: select_v16i64:
; VBITS_GE_1024: // %bb.0:
; VBITS_GE_1024-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_1024-NEXT: mov x29, sp
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_1024-NEXT: .cfi_offset w30, -8
; VBITS_GE_1024-NEXT: .cfi_offset w29, -16
; VBITS_GE_1024-NEXT: sub x9, sp, #240
; VBITS_GE_1024-NEXT: and sp, x9, #0xffffffffffffff80
; VBITS_GE_1024-NEXT: ldrh w8, [x2]
; VBITS_GE_1024-NEXT: ptrue p0.d, vl16
; VBITS_GE_1024-NEXT: ptrue p1.d
Expand Down Expand Up @@ -2281,12 +2296,13 @@ define void @select_v32i64(<32 x i64>* %a, <32 x i64>* %b, <32 x i1>* %c) #0 {
; VBITS_GE_2048-LABEL: select_v32i64:
; VBITS_GE_2048: // %bb.0:
; VBITS_GE_2048-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: .cfi_def_cfa_offset 16
; VBITS_GE_2048-NEXT: mov x29, sp
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: .cfi_def_cfa w29, 16
; VBITS_GE_2048-NEXT: .cfi_offset w30, -8
; VBITS_GE_2048-NEXT: .cfi_offset w29, -16
; VBITS_GE_2048-NEXT: sub x9, sp, #496
; VBITS_GE_2048-NEXT: and sp, x9, #0xffffffffffffff00
; VBITS_GE_2048-NEXT: ldr w8, [x2]
; VBITS_GE_2048-NEXT: ptrue p0.d, vl32
; VBITS_GE_2048-NEXT: ptrue p1.d
Expand Down
20 changes: 12 additions & 8 deletions llvm/test/CodeGen/AArch64/sve-fixed-length-permute-rev.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -195,12 +195,13 @@ define void @test_rev_elts_fail(<4 x i64>* %a) #1 {
; CHECK-LABEL: test_rev_elts_fail:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0]
; CHECK-NEXT: mov z1.d, z0.d[2]
Expand Down Expand Up @@ -231,12 +232,13 @@ define void @test_revv8i32(<8 x i32>* %a) #0 {
; CHECK-LABEL: test_revv8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ptrue p0.s, vl8
; CHECK-NEXT: ld1w { z0.s }, p0/z, [x0]
; CHECK-NEXT: mov w8, v0.s[1]
Expand Down Expand Up @@ -347,12 +349,13 @@ define void @test_rev_fail(<16 x i16>* %a) #1 {
; CHECK-LABEL: test_rev_fail:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ptrue p0.h
; CHECK-NEXT: ld1h { z0.h }, p0/z, [x0]
; CHECK-NEXT: mov z1.h, z0.h[8]
Expand Down Expand Up @@ -411,12 +414,13 @@ define void @test_revv8i16v8i16(<8 x i16>* %a, <8 x i16>* %b, <16 x i16>* %c) #1
; CHECK-LABEL: test_revv8i16v8i16:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: mov x8, sp
; CHECK-NEXT: ldr q0, [x1]
; CHECK-NEXT: orr x9, x8, #0x1e
Expand Down
10 changes: 6 additions & 4 deletions llvm/test/CodeGen/AArch64/sve-fixed-length-permute-zip-uzp-trn.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -132,12 +132,13 @@ define void @zip_v4f64(<4 x double>* %a, <4 x double>* %b) #0 {
; VBITS_EQ_512-LABEL: zip_v4f64:
; VBITS_EQ_512: // %bb.0:
; VBITS_EQ_512-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; VBITS_EQ_512-NEXT: sub x9, sp, #48
; VBITS_EQ_512-NEXT: .cfi_def_cfa_offset 16
; VBITS_EQ_512-NEXT: mov x29, sp
; VBITS_EQ_512-NEXT: and sp, x9, #0xffffffffffffffe0
; VBITS_EQ_512-NEXT: .cfi_def_cfa w29, 16
; VBITS_EQ_512-NEXT: .cfi_offset w30, -8
; VBITS_EQ_512-NEXT: .cfi_offset w29, -16
; VBITS_EQ_512-NEXT: sub x9, sp, #48
; VBITS_EQ_512-NEXT: and sp, x9, #0xffffffffffffffe0
; VBITS_EQ_512-NEXT: ptrue p0.d, vl4
; VBITS_EQ_512-NEXT: ld1d { z0.d }, p0/z, [x0]
; VBITS_EQ_512-NEXT: ld1d { z1.d }, p0/z, [x1]
Expand Down Expand Up @@ -648,12 +649,13 @@ define void @zip_vscale2_4(<4 x double>* %a, <4 x double>* %b) #2 {
; CHECK-LABEL: zip_vscale2_4:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ptrue p0.d, vl4
; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0]
; CHECK-NEXT: ld1d { z1.d }, p0/z, [x1]
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/AArch64/sve-fixed-length-vector-shuffle.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -932,12 +932,13 @@ define void @shuffle_ext_invalid(<4 x double>* %a, <4 x double>* %b) #0 {
; CHECK-LABEL: shuffle_ext_invalid:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: .cfi_def_cfa w29, 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: sub x9, sp, #48
; CHECK-NEXT: and sp, x9, #0xffffffffffffffe0
; CHECK-NEXT: ptrue p0.d, vl4
; CHECK-NEXT: ld1d { z0.d }, p0/z, [x0]
; CHECK-NEXT: ld1d { z1.d }, p0/z, [x1]
Expand Down
3 changes: 2 additions & 1 deletion llvm/test/CodeGen/AArch64/sve-insert-element.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -500,9 +500,10 @@ define <vscale x 32 x i1> @test_predicate_insert_32xi1(<vscale x 32 x i1> %val,
; CHECK-LABEL: test_predicate_insert_32xi1:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: // kill: def $w1 killed $w1 def $x1
; CHECK-NEXT: sxtw x9, w1
Expand Down
6 changes: 4 additions & 2 deletions llvm/test/CodeGen/AArch64/sve-insert-vector.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -190,9 +190,10 @@ define void @insert_v2i64_nxv16i64(<2 x i64> %sv0, <2 x i64> %sv1, <vscale x 16
; CHECK-LABEL: insert_v2i64_nxv16i64:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: // kill: def $q0 killed $q0 def $z0
; CHECK-NEXT: st1d { z0.d }, p0, [sp]
Expand Down Expand Up @@ -231,9 +232,10 @@ define void @insert_v2i64_nxv16i64_lo2(<2 x i64>* %psv, <vscale x 16 x i64>* %ou
; CHECK-LABEL: insert_v2i64_nxv16i64_lo2:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: ldr q0, [x0]
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: str q0, [sp, #16]
Expand Down
12 changes: 8 additions & 4 deletions llvm/test/CodeGen/AArch64/sve-ldnf1.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -44,9 +44,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: renamable $z0 = LDNF1B_IMM renamable $p0, $sp, 7 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNF1B_H_IMM renamable $p0, $sp, 7 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNF1B_S_IMM renamable $p0, $sp, 7 :: (load (s8) from %ir.object, align 2)
Expand Down Expand Up @@ -99,9 +100,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: renamable $z0 = LDNF1B_IMM renamable $p0, $sp, -8 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNF1B_H_IMM renamable $p0, $sp, -8 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNF1B_S_IMM renamable $p0, $sp, -8 :: (load (s8) from %ir.object, align 2)
Expand Down Expand Up @@ -154,9 +156,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 1
; CHECK-NEXT: renamable $z0 = LDNF1B_IMM renamable $p0, killed $x8, 7 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: $x8 = ADDPL_XXI $sp, 4
Expand Down Expand Up @@ -222,9 +225,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -1
; CHECK-NEXT: renamable $z0 = LDNF1B_IMM renamable $p0, killed $x8, -8 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: $x8 = ADDPL_XXI $sp, -4
Expand Down
12 changes: 8 additions & 4 deletions llvm/test/CodeGen/AArch64/sve-ldstnt1.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -44,9 +44,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: renamable $z0 = LDNT1B_ZRI renamable $p0, $sp, 7 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNT1H_ZRI renamable $p0, $sp, 7 :: (load (s16) from %ir.object)
; CHECK-NEXT: renamable $z0 = LDNT1W_ZRI renamable $p0, $sp, 7 :: (load (s32) from %ir.object, align 8)
Expand Down Expand Up @@ -83,9 +84,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: renamable $z0 = LDNT1B_ZRI renamable $p0, $sp, -8 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: renamable $z0 = LDNT1H_ZRI renamable $p0, $sp, -8 :: (load (s16) from %ir.object)
; CHECK-NEXT: renamable $z0 = LDNT1W_ZRI renamable $p0, $sp, -8 :: (load (s32) from %ir.object)
Expand Down Expand Up @@ -122,9 +124,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 1
; CHECK-NEXT: renamable $z0 = LDNT1B_ZRI renamable $p0, killed $x8, 7 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, 1
Expand Down Expand Up @@ -169,9 +172,10 @@ body: |
; CHECK: liveins: $p0
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: early-clobber $sp = frame-setup STRXpre killed $fp, $sp, -16 :: (store (s64) into %stack.2)
; CHECK-NEXT: frame-setup CFI_INSTRUCTION def_cfa_offset 16
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $sp = frame-setup ADDVL_XXI $sp, -4
; CHECK-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22
; CHECK-NEXT: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -1
; CHECK-NEXT: renamable $z0 = LDNT1B_ZRI renamable $p0, killed $x8, -8 :: (load (s8) from %ir.object, align 2)
; CHECK-NEXT: $x8 = ADDVL_XXI $sp, -1
Expand Down
14 changes: 8 additions & 6 deletions llvm/test/CodeGen/AArch64/sve-pred-arith.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -50,19 +50,20 @@ define aarch64_sve_vector_pcs <vscale x 64 x i1> @add_nxv64i1(<vscale x 64 x i1>
; CHECK-LABEL: add_nxv64i1:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-1
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: ptrue p8.b
; CHECK-NEXT: ldr p4, [x1]
; CHECK-NEXT: ldr p5, [x0]
; CHECK-NEXT: ldr p6, [x3]
; CHECK-NEXT: ldr p7, [x2]
; CHECK-NEXT: ptrue p8.b
; CHECK-NEXT: eor p0.b, p8/z, p0.b, p5.b
; CHECK-NEXT: eor p1.b, p8/z, p1.b, p4.b
; CHECK-NEXT: eor p2.b, p8/z, p2.b, p7.b
Expand Down Expand Up @@ -130,19 +131,20 @@ define aarch64_sve_vector_pcs <vscale x 64 x i1> @sub_nxv64i1(<vscale x 64 x i1>
; CHECK-LABEL: sub_nxv64i1:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-1
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: str p8, [sp, #3, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p7, [sp, #4, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p6, [sp, #5, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: ptrue p8.b
; CHECK-NEXT: ldr p4, [x1]
; CHECK-NEXT: ldr p5, [x0]
; CHECK-NEXT: ldr p6, [x3]
; CHECK-NEXT: ldr p7, [x2]
; CHECK-NEXT: ptrue p8.b
; CHECK-NEXT: eor p0.b, p8/z, p0.b, p5.b
; CHECK-NEXT: eor p1.b, p8/z, p1.b, p4.b
; CHECK-NEXT: eor p2.b, p8/z, p2.b, p7.b
Expand Down
21 changes: 14 additions & 7 deletions llvm/test/CodeGen/AArch64/sve-split-extract-elt.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,10 @@ define i8 @split_extract_32i8_idx(<vscale x 32 x i8> %a, i32 %idx) {
; CHECK-LABEL: split_extract_32i8_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT: sxtw x9, w0
Expand All @@ -45,9 +46,10 @@ define i16 @split_extract_16i16_idx(<vscale x 16 x i16> %a, i32 %idx) {
; CHECK-LABEL: split_extract_16i16_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT: sxtw x9, w0
Expand All @@ -70,9 +72,10 @@ define i32 @split_extract_8i32_idx(<vscale x 8 x i32> %a, i32 %idx) {
; CHECK-LABEL: split_extract_8i32_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cnth x8
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT: sxtw x9, w0
Expand All @@ -95,9 +98,10 @@ define i64 @split_extract_8i64_idx(<vscale x 8 x i64> %a, i32 %idx) {
; CHECK-LABEL: split_extract_8i64_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cnth x8
; CHECK-NEXT: // kill: def $w0 killed $w0 def $x0
; CHECK-NEXT: sxtw x9, w0
Expand Down Expand Up @@ -142,9 +146,10 @@ define i16 @split_extract_16i16(<vscale x 16 x i16> %a) {
; CHECK-LABEL: split_extract_16i16:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: mov w9, #128
; CHECK-NEXT: ptrue p0.h
Expand All @@ -166,9 +171,10 @@ define i32 @split_extract_16i32(<vscale x 16 x i32> %a) {
; CHECK-LABEL: split_extract_16i32:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: mov w9, #34464
; CHECK-NEXT: movk w9, #1, lsl #16
Expand All @@ -193,9 +199,10 @@ define i64 @split_extract_4i64(<vscale x 4 x i64> %a) {
; CHECK-LABEL: split_extract_4i64:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cntw x8
; CHECK-NEXT: mov w9, #10
; CHECK-NEXT: sub x8, x8, #1
Expand Down
15 changes: 10 additions & 5 deletions llvm/test/CodeGen/AArch64/sve-split-insert-elt.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,10 @@ define <vscale x 32 x i8> @split_insert_32i8_idx(<vscale x 32 x i8> %a, i8 %elt,
; CHECK-LABEL: split_insert_32i8_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: ptrue p0.b
Expand All @@ -45,9 +46,10 @@ define <vscale x 8 x float> @split_insert_8f32_idx(<vscale x 8 x float> %a, floa
; CHECK-LABEL: split_insert_8f32_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cnth x8
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: sub x8, x8, #1
Expand All @@ -70,9 +72,10 @@ define <vscale x 8 x i64> @split_insert_8i64_idx(<vscale x 8 x i64> %a, i64 %elt
; CHECK-LABEL: split_insert_8i64_idx:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cnth x8
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: sub x8, x8, #1
Expand Down Expand Up @@ -132,9 +135,10 @@ define <vscale x 32 x i16> @split_insert_32i16(<vscale x 32 x i16> %a, i16 %elt)
; CHECK-LABEL: split_insert_32i16:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-4
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x20, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 32 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: mov x8, #-1
; CHECK-NEXT: mov w9, #128
; CHECK-NEXT: ptrue p0.h
Expand Down Expand Up @@ -162,9 +166,10 @@ define <vscale x 8 x i32> @split_insert_8i32(<vscale x 8 x i32> %a, i32 %elt) {
; CHECK-LABEL: split_insert_8i32:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x10, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 16 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: cnth x8
; CHECK-NEXT: mov w9, #16960
; CHECK-NEXT: movk w9, #15, lsl #16
Expand Down
5 changes: 3 additions & 2 deletions llvm/test/CodeGen/AArch64/sve-split-int-pred-reduce.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -20,12 +20,13 @@ define i1 @andv_nxv64i1(<vscale x 64 x i1> %a) {
; CHECK-LABEL: andv_nxv64i1:
; CHECK: // %bb.0:
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-1
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: and p1.b, p1/z, p1.b, p3.b
; CHECK-NEXT: and p0.b, p0/z, p0.b, p2.b
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: ptrue p4.b
; CHECK-NEXT: and p0.b, p0/z, p0.b, p1.b
; CHECK-NEXT: not p0.b, p4/z, p0.b
Expand Down
7 changes: 4 additions & 3 deletions llvm/test/CodeGen/AArch64/sve-trunc.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -110,16 +110,16 @@ define <vscale x 16 x i1> @trunc_i64toi1_split3(<vscale x 16 x i64> %in) {
; CHECK-LABEL: trunc_i64toi1_split3:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: str x29, [sp, #-16]! // 8-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-1
; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: .cfi_escape 0x0f, 0x0c, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x08, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 8 * VG
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: and z7.d, z7.d, #0x1
; CHECK-NEXT: ptrue p0.d
; CHECK-NEXT: and z6.d, z6.d, #0x1
; CHECK-NEXT: and z5.d, z5.d, #0x1
; CHECK-NEXT: and z4.d, z4.d, #0x1
; CHECK-NEXT: str p4, [sp, #7, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: cmpne p1.d, p0/z, z7.d, #0
; CHECK-NEXT: cmpne p2.d, p0/z, z6.d, #0
; CHECK-NEXT: cmpne p3.d, p0/z, z5.d, #0
Expand All @@ -128,6 +128,7 @@ define <vscale x 16 x i1> @trunc_i64toi1_split3(<vscale x 16 x i64> %in) {
; CHECK-NEXT: and z2.d, z2.d, #0x1
; CHECK-NEXT: and z1.d, z1.d, #0x1
; CHECK-NEXT: and z0.d, z0.d, #0x1
; CHECK-NEXT: str p5, [sp, #6, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: uzp1 p1.s, p2.s, p1.s
; CHECK-NEXT: uzp1 p2.s, p4.s, p3.s
; CHECK-NEXT: cmpne p3.d, p0/z, z3.d, #0
Expand Down
63 changes: 51 additions & 12 deletions llvm/test/CodeGen/AArch64/swifterror.ll
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Large diffs are not rendered by default.

2 changes: 1 addition & 1 deletion llvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -53,6 +53,7 @@ body: |
; CHECK: successors: %bb.1, %bb.2
; CHECK: liveins: $q0, $q22, $q23, $q20, $q21, $q18, $q19, $q16, $q17, $q14, $q15, $q12, $q13, $q10, $q11, $q8, $q9, $lr, $fp
; CHECK: $sp = frame-setup SUBXri $sp, 304, 0
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 304
; CHECK: frame-setup STPQi killed $q23, killed $q22, $sp, 2 :: (store (s128) into %stack.19), (store (s128) into %stack.18)
; CHECK: frame-setup STPQi killed $q21, killed $q20, $sp, 4 :: (store (s128) into %stack.17), (store (s128) into %stack.16)
; CHECK: frame-setup STPQi killed $q19, killed $q18, $sp, 6 :: (store (s128) into %stack.15), (store (s128) into %stack.14)
Expand All @@ -62,7 +63,6 @@ body: |
; CHECK: frame-setup STPQi killed $q11, killed $q10, $sp, 14 :: (store (s128) into %stack.7), (store (s128) into %stack.6)
; CHECK: frame-setup STPQi killed $q9, killed $q8, $sp, 16 :: (store (s128) into %stack.5), (store (s128) into %stack.4)
; CHECK: frame-setup STPXi killed $fp, killed $lr, $sp, 36 :: (store (s64) into %stack.3), (store (s64) into %stack.2)
; CHECK: frame-setup CFI_INSTRUCTION def_cfa_offset 304
; CHECK: frame-setup CFI_INSTRUCTION offset $w30, -8
; CHECK: frame-setup CFI_INSTRUCTION offset $w29, -16
; CHECK: frame-setup CFI_INSTRUCTION offset $b8, -32
Expand Down
24 changes: 14 additions & 10 deletions llvm/test/CodeGen/AArch64/unwind-preserved.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -9,7 +9,11 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 16
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-18
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
; CHECK-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
; CHECK-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
Expand Down Expand Up @@ -38,8 +42,6 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; CHECK-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill
; CHECK-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill
; CHECK-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0xa0, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 160 * VG
; CHECK-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
; CHECK-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
; CHECK-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
Expand All @@ -48,8 +50,8 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; CHECK-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
; CHECK-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
; CHECK-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: addvl sp, sp, #-2
; CHECK-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0xa0, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 160 * VG
; CHECK-NEXT: str z0, [sp] // 16-byte Folded Spill
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: bl may_throw_sve
Expand Down Expand Up @@ -131,7 +133,11 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; GISEL-NEXT: .cfi_startproc
; GISEL-NEXT: // %bb.0:
; GISEL-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; GISEL-NEXT: .cfi_def_cfa_offset 16
; GISEL-NEXT: .cfi_offset w30, -8
; GISEL-NEXT: .cfi_offset w29, -16
; GISEL-NEXT: addvl sp, sp, #-18
; GISEL-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0x90, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 144 * VG
; GISEL-NEXT: str p15, [sp, #4, mul vl] // 2-byte Folded Spill
; GISEL-NEXT: str p14, [sp, #5, mul vl] // 2-byte Folded Spill
; GISEL-NEXT: str p13, [sp, #6, mul vl] // 2-byte Folded Spill
Expand Down Expand Up @@ -160,8 +166,6 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; GISEL-NEXT: str z10, [sp, #15, mul vl] // 16-byte Folded Spill
; GISEL-NEXT: str z9, [sp, #16, mul vl] // 16-byte Folded Spill
; GISEL-NEXT: str z8, [sp, #17, mul vl] // 16-byte Folded Spill
; GISEL-NEXT: addvl sp, sp, #-2
; GISEL-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0xa0, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 160 * VG
; GISEL-NEXT: .cfi_escape 0x10, 0x48, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x78, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d8 @ cfa - 16 - 8 * VG
; GISEL-NEXT: .cfi_escape 0x10, 0x49, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x70, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d9 @ cfa - 16 - 16 * VG
; GISEL-NEXT: .cfi_escape 0x10, 0x4a, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x68, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d10 @ cfa - 16 - 24 * VG
Expand All @@ -170,8 +174,8 @@ define <vscale x 4 x i32> @invoke_callee_may_throw_sve(<vscale x 4 x i32> %v) pe
; GISEL-NEXT: .cfi_escape 0x10, 0x4d, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x50, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d13 @ cfa - 16 - 48 * VG
; GISEL-NEXT: .cfi_escape 0x10, 0x4e, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x48, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d14 @ cfa - 16 - 56 * VG
; GISEL-NEXT: .cfi_escape 0x10, 0x4f, 0x0a, 0x11, 0x70, 0x22, 0x11, 0x40, 0x92, 0x2e, 0x00, 0x1e, 0x22 // $d15 @ cfa - 16 - 64 * VG
; GISEL-NEXT: .cfi_offset w30, -8
; GISEL-NEXT: .cfi_offset w29, -16
; GISEL-NEXT: addvl sp, sp, #-2
; GISEL-NEXT: .cfi_escape 0x0f, 0x0d, 0x8f, 0x00, 0x11, 0x10, 0x22, 0x11, 0xa0, 0x01, 0x92, 0x2e, 0x00, 0x1e, 0x22 // sp + 16 + 160 * VG
; GISEL-NEXT: str z0, [sp] // 16-byte Folded Spill
; GISEL-NEXT: .Ltmp0:
; GISEL-NEXT: bl may_throw_sve
Expand Down Expand Up @@ -265,6 +269,7 @@ define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v)
; CHECK-NEXT: .cfi_startproc
; CHECK-NEXT: // %bb.0:
; CHECK-NEXT: sub sp, sp, #304
; CHECK-NEXT: .cfi_def_cfa_offset 304
; CHECK-NEXT: stp q23, q22, [sp, #32] // 32-byte Folded Spill
; CHECK-NEXT: stp q21, q20, [sp, #64] // 32-byte Folded Spill
; CHECK-NEXT: stp q19, q18, [sp, #96] // 32-byte Folded Spill
Expand All @@ -274,7 +279,6 @@ define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v)
; CHECK-NEXT: stp q11, q10, [sp, #224] // 32-byte Folded Spill
; CHECK-NEXT: stp q9, q8, [sp, #256] // 32-byte Folded Spill
; CHECK-NEXT: stp x29, x30, [sp, #288] // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 304
; CHECK-NEXT: .cfi_offset w30, -8
; CHECK-NEXT: .cfi_offset w29, -16
; CHECK-NEXT: .cfi_offset b8, -32
Expand Down Expand Up @@ -332,6 +336,7 @@ define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v)
; GISEL-NEXT: .cfi_startproc
; GISEL-NEXT: // %bb.0:
; GISEL-NEXT: sub sp, sp, #304
; GISEL-NEXT: .cfi_def_cfa_offset 304
; GISEL-NEXT: stp q23, q22, [sp, #32] // 32-byte Folded Spill
; GISEL-NEXT: stp q21, q20, [sp, #64] // 32-byte Folded Spill
; GISEL-NEXT: stp q19, q18, [sp, #96] // 32-byte Folded Spill
Expand All @@ -341,7 +346,6 @@ define aarch64_vector_pcs <4 x i32> @invoke_callee_may_throw_neon(<4 x i32> %v)
; GISEL-NEXT: stp q11, q10, [sp, #224] // 32-byte Folded Spill
; GISEL-NEXT: stp q9, q8, [sp, #256] // 32-byte Folded Spill
; GISEL-NEXT: stp x29, x30, [sp, #288] // 16-byte Folded Spill
; GISEL-NEXT: .cfi_def_cfa_offset 304
; GISEL-NEXT: .cfi_offset w30, -8
; GISEL-NEXT: .cfi_offset w29, -16
; GISEL-NEXT: .cfi_offset b8, -32
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/Transforms/CodeGenPrepare/AArch64/large-offset-gep.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -142,8 +142,8 @@ define void @test4(i32 %n) personality i32 (...)* @__FrameHandler {
; CHECK-NEXT: .cfi_lsda 0, .Lexception0
; CHECK-NEXT: // %bb.0: // %entry
; CHECK-NEXT: stp x30, x21, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: .cfi_def_cfa_offset 32
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: .cfi_offset w19, -8
; CHECK-NEXT: .cfi_offset w20, -16
; CHECK-NEXT: .cfi_offset w21, -24
Expand Down
2 changes: 2 additions & 0 deletions ...ateTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.generated.expected
View file
Original file line number Diff line number Diff line change
Expand Up @@ -65,6 +65,7 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-LABEL: check_boundaries:
; CHECK: // %bb.0:
; CHECK-NEXT: sub sp, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: stp x29, x30, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: add x29, sp, #32
; CHECK-NEXT: .cfi_def_cfa w29, 16
Expand Down Expand Up @@ -97,6 +98,7 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
; CHECK-LABEL: main:
; CHECK: // %bb.0:
; CHECK-NEXT: sub sp, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: stp x29, x30, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: add x29, sp, #32
; CHECK-NEXT: .cfi_def_cfa w29, 16
Expand Down
2 changes: 2 additions & 0 deletions ...eTestChecks/update_llc_test_checks/Inputs/aarch64_generated_funcs.ll.nogenerated.expected
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,6 +6,7 @@ define dso_local i32 @check_boundaries() #0 {
; CHECK-LABEL: check_boundaries:
; CHECK: // %bb.0:
; CHECK-NEXT: sub sp, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: stp x29, x30, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: add x29, sp, #32
; CHECK-NEXT: .cfi_def_cfa w29, 16
Expand Down Expand Up @@ -74,6 +75,7 @@ define dso_local i32 @main() #0 {
; CHECK-LABEL: main:
; CHECK: // %bb.0:
; CHECK-NEXT: sub sp, sp, #48
; CHECK-NEXT: .cfi_def_cfa_offset 48
; CHECK-NEXT: stp x29, x30, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: add x29, sp, #32
; CHECK-NEXT: .cfi_def_cfa w29, 16
Expand Down