110 changes: 55 additions & 55 deletions llvm/test/CodeGen/Hexagon/vmpa-halide-test.ll
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10 changes: 5 additions & 5 deletions llvm/test/CodeGen/Lanai/codemodel.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@ entry:
; CHECK: mov hi(data), %r[[REGISTER:[0-9]+]]
; CHECK: or %r[[REGISTER]], lo(data), %r[[REGISTER]]
; CHECK: ld 0[%r[[REGISTER]]], %rv
%0 = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @data, i64 0, i64 0), align 4 ; <i32> [#uses=1]
%0 = load i32, ptr @data, align 4 ; <i32> [#uses=1]
ret i32 %0
}

Expand All @@ -29,11 +29,11 @@ entry:
; CHECK: mov hi(data), %r[[REGISTER:[0-9]+]]
; CHECK: or %r[[REGISTER]], lo(data), %r[[REGISTER]]
; CHECK: ld 40[%r[[REGISTER]]], %rv
%0 = load i32, i32* getelementptr ([0 x i32], [0 x i32]* @data, i32 0, i64 10), align 4 ; <i32> [#uses=1]
%0 = load i32, ptr getelementptr ([0 x i32], ptr @data, i32 0, i64 10), align 4 ; <i32> [#uses=1]
ret i32 %0
}

@y = local_unnamed_addr global i32* null, section ".ldata,block", align 8
@y = local_unnamed_addr global ptr null, section ".ldata,block", align 8

define i32 @foo2() nounwind readonly {
entry:
Expand All @@ -43,7 +43,7 @@ entry:
; CHECK-LABEL: foo2:
; CHECK: mov hi(y), %r[[REGISTER:[0-9]+]]
; CHECK: or %r[[REGISTER]], lo(y), %r[[REGISTER]]
%0 = load i32*, i32** @y, align 8
%1 = load i32, i32* %0, align 4
%0 = load ptr, ptr @y, align 8
%1 = load i32, ptr %0, align 4
ret i32 %1
}
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Lanai/inlineasm-output-template.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ define dso_local i32 @test_inlineasm_c_output_template0() {
; CHECK: !TEST baz
@baz = internal global i32 0, align 4
define dso_local i32 @test_inlineasm_c_output_template1() {
tail call void asm sideeffect "!TEST ${0:c}", "i"(i32* nonnull @baz)
tail call void asm sideeffect "!TEST ${0:c}", "i"(ptr nonnull @baz)
ret i32 42
}

Expand Down
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/Lanai/lanai-misched-trivial-disjoint.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -5,27 +5,27 @@
; are trivially disjoint.

; Function Attrs: norecurse nounwind uwtable
define i32 @foo(i8* inreg nocapture %x) {
define i32 @foo(ptr inreg nocapture %x) {
entry:
%0 = bitcast i8* %x to i32*
store i32 1, i32* %0, align 4
%arrayidx1 = getelementptr inbounds i8, i8* %x, i32 4
%1 = bitcast i8* %arrayidx1 to i32*
store i32 2, i32* %1, align 4
%arrayidx2 = getelementptr inbounds i8, i8* %x, i32 12
%2 = bitcast i8* %arrayidx2 to i32*
%3 = load i32, i32* %2, align 4
%arrayidx3 = getelementptr inbounds i8, i8* %x, i32 10
%4 = bitcast i8* %arrayidx3 to i16*
store i16 3, i16* %4, align 2
%5 = bitcast i8* %arrayidx2 to i16*
store i16 4, i16* %5, align 2
%arrayidx5 = getelementptr inbounds i8, i8* %x, i32 14
store i8 5, i8* %arrayidx5, align 1
%arrayidx6 = getelementptr inbounds i8, i8* %x, i32 15
store i8 6, i8* %arrayidx6, align 1
%arrayidx7 = getelementptr inbounds i8, i8* %x, i32 16
store i8 7, i8* %arrayidx7, align 1
%0 = bitcast ptr %x to ptr
store i32 1, ptr %0, align 4
%arrayidx1 = getelementptr inbounds i8, ptr %x, i32 4
%1 = bitcast ptr %arrayidx1 to ptr
store i32 2, ptr %1, align 4
%arrayidx2 = getelementptr inbounds i8, ptr %x, i32 12
%2 = bitcast ptr %arrayidx2 to ptr
%3 = load i32, ptr %2, align 4
%arrayidx3 = getelementptr inbounds i8, ptr %x, i32 10
%4 = bitcast ptr %arrayidx3 to ptr
store i16 3, ptr %4, align 2
%5 = bitcast ptr %arrayidx2 to ptr
store i16 4, ptr %5, align 2
%arrayidx5 = getelementptr inbounds i8, ptr %x, i32 14
store i8 5, ptr %arrayidx5, align 1
%arrayidx6 = getelementptr inbounds i8, ptr %x, i32 15
store i8 6, ptr %arrayidx6, align 1
%arrayidx7 = getelementptr inbounds i8, ptr %x, i32 16
store i8 7, ptr %arrayidx7, align 1
ret i32 %3
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/Lanai/mem_alu_combiner.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
; CHECK-DIS-LABEL: sum,
; CHECK-DIS-NOT: ++],

define i32 @sum(i32* inreg nocapture readonly %data, i32 inreg %n) {
define i32 @sum(ptr inreg nocapture readonly %data, i32 inreg %n) {
entry:
%cmp6 = icmp sgt i32 %n, 0
br i1 %cmp6, label %for.body.preheader, label %for.cond.cleanup
Expand All @@ -26,8 +26,8 @@ for.cond.cleanup: ; preds = %for.cond.cleanup.lo
for.body: ; preds = %for.body.preheader, %for.body
%i.08 = phi i32 [ %inc, %for.body ], [ 0, %for.body.preheader ]
%sum_.07 = phi i32 [ %add, %for.body ], [ 0, %for.body.preheader ]
%arrayidx = getelementptr inbounds i32, i32* %data, i32 %i.08
%0 = load i32, i32* %arrayidx, align 4
%arrayidx = getelementptr inbounds i32, ptr %data, i32 %i.08
%0 = load i32, ptr %arrayidx, align 4
%add = add nsw i32 %0, %sum_.07
%inc = add nuw nsw i32 %i.08, 1
%exitcond = icmp eq i32 %inc, %n
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/Lanai/peephole-compare.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -130,14 +130,14 @@

define void @testBB() {
entry:
%0 = load i32, i32* @a, align 4, !tbaa !0
%1 = load i32, i32* @b, align 4, !tbaa !0
%0 = load i32, ptr @a, align 4, !tbaa !0
%1 = load i32, ptr @b, align 4, !tbaa !0
%sub.i = sub i32 %1, %0
%tobool = icmp sgt i32 %sub.i, -1
br i1 %tobool, label %if.end, label %if.then

if.then: ; preds = %entry
%call1 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
%call1 = tail call i32 @g()
br label %while.body

while.body: ; preds = %while.body, %if.then
Expand All @@ -148,7 +148,7 @@
br i1 %cmp.i, label %if.then4, label %if.end7

if.then4: ; preds = %if.end
%call5 = tail call i32 bitcast (i32 (...)* @g to i32 ()*)()
%call5 = tail call i32 @g()
br label %while.body6

while.body6: ; preds = %while.body6, %if.then4
Expand All @@ -161,7 +161,7 @@
declare i32 @g(...)

; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #0
declare void @llvm.stackprotector(ptr, ptr) #0

attributes #0 = { nounwind }

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/Lanai/set_and_hi.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,6 @@ target triple = "lanai"
; CHECK-LABEL: setandhi:
; CHECK: mov 0xfffffe4a, %r{{[0-9]+}}
define void @setandhi() #0 {
store volatile i32 -438, i32* @x, align 4
store volatile i32 -438, ptr @x, align 4
ret void
}
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/Lanai/sub-cmp-peephole.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -129,7 +129,7 @@ define i32 @cmp_ult0(i32 inreg %a, i32 inreg %b, i32 inreg %x, i32 inreg %y) {
; CHECK-NEXT: bt exit
; CHECK-NEXT: nop
entry:
%load = load i32, i32* @t, align 4
%load = load i32, ptr @t, align 4
%sub = sub i32 %load, 17
%cmp = icmp ult i32 %sub, 0
br i1 %cmp, label %if.then, label %if.else
Expand Down Expand Up @@ -169,7 +169,7 @@ define i32 @cmp_gt0(i32 inreg %a, i32 inreg %b, i32 inreg %x, i32 inreg %y) {
; CHECK-NEXT: bt exit
; CHECK-NEXT: nop
entry:
%load = load i32, i32* @t, align 4
%load = load i32, ptr @t, align 4
%sub = sub i32 %load, 17
%cmp = icmp sgt i32 %sub, 0
br i1 %cmp, label %if.then, label %if.else
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/Lanai/subword.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -4,16 +4,16 @@

%struct.X = type { i16, i16 }

define void @f(%struct.X* inreg nocapture %c) #0 {
define void @f(ptr inreg nocapture %c) #0 {
entry:
%a = getelementptr inbounds %struct.X, %struct.X* %c, i32 0, i32 0
%0 = load i16, i16* %a, align 2
%a = getelementptr inbounds %struct.X, ptr %c, i32 0, i32 0
%0 = load i16, ptr %a, align 2
%inc = add i16 %0, 1
store i16 %inc, i16* %a, align 2
%b = getelementptr inbounds %struct.X, %struct.X* %c, i32 0, i32 1
%1 = load i16, i16* %b, align 2
store i16 %inc, ptr %a, align 2
%b = getelementptr inbounds %struct.X, ptr %c, i32 0, i32 1
%1 = load i16, ptr %b, align 2
%dec = add i16 %1, -1
store i16 %dec, i16* %b, align 2
store i16 %dec, ptr %b, align 2
ret void
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/LoongArch/frame.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@

%struct.key_t = type { i32, [16 x i8] }

declare void @llvm.memset.p0i8.i64(ptr, i8, i64, i1)
declare void @llvm.memset.p0.i64(ptr, i8, i64, i1)
declare void @test1(ptr)

define i32 @test() nounwind {
Expand All @@ -21,7 +21,7 @@ define i32 @test() nounwind {
; CHECK-NEXT: addi.d $sp, $sp, 32
; CHECK-NEXT: ret
%key = alloca %struct.key_t, align 4
call void @llvm.memset.p0i8.i64(ptr %key, i8 0, i64 20, i1 false)
call void @llvm.memset.p0.i64(ptr %key, i8 0, i64 20, i1 false)
%1 = getelementptr inbounds %struct.key_t, ptr %key, i64 0, i32 1, i64 0
call void @test1(ptr %1)
ret i32 0
Expand Down
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-invalid-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvld(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvld(ptr, i32)

define <32 x i8> @lasx_xvld_lo(i8* %p) nounwind {
define <32 x i8> @lasx_xvld_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvld: argument out of range
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(i8* %p, i32 -2049)
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(ptr %p, i32 -2049)
ret <32 x i8> %res
}

define <32 x i8> @lasx_xvld_hi(i8* %p) nounwind {
define <32 x i8> @lasx_xvld_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvld: argument out of range
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(i8* %p, i32 2048)
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(ptr %p, i32 2048)
ret <32 x i8> %res
}
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld-non-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvld(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvld(ptr, i32)

define <32 x i8> @lasx_xvld(i8* %p, i32 %a) nounwind {
define <32 x i8> @lasx_xvld(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(i8* %p, i32 %a)
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(ptr %p, i32 %a)
ret <32 x i8> %res
}
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ld.ll
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Original file line number Diff line number Diff line change
@@ -1,26 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvld(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvld(ptr, i32)

define <32 x i8> @lasx_xvld(i8* %p) nounwind {
define <32 x i8> @lasx_xvld(ptr %p) nounwind {
; CHECK-LABEL: lasx_xvld:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvld $xr0, $a0, 1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(i8* %p, i32 1)
%res = call <32 x i8> @llvm.loongarch.lasx.xvld(ptr %p, i32 1)
ret <32 x i8> %res
}

declare <32 x i8> @llvm.loongarch.lasx.xvldx(i8*, i64)
declare <32 x i8> @llvm.loongarch.lasx.xvldx(ptr, i64)

define <32 x i8> @lasx_xvldx(i8* %p, i64 %b) nounwind {
define <32 x i8> @lasx_xvldx(ptr %p, i64 %b) nounwind {
; CHECK-LABEL: lasx_xvldx:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvldx $xr0, $a0, $a1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvldx(i8* %p, i64 %b)
%res = call <32 x i8> @llvm.loongarch.lasx.xvldx(ptr %p, i64 %b)
ret <32 x i8> %res
}
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-invalid-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,65 +1,65 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr, i32)

define <32 x i8> @lasx_xvldrepl_b_lo(i8* %p) nounwind {
define <32 x i8> @lasx_xvldrepl_b_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.b: argument out of range
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8* %p, i32 -2049)
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr %p, i32 -2049)
ret <32 x i8> %res
}

define <32 x i8> @lasx_xvldrepl_b_hi(i8* %p) nounwind {
define <32 x i8> @lasx_xvldrepl_b_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.b: argument out of range
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8* %p, i32 2048)
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr %p, i32 2048)
ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8*, i32)
declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr, i32)

define <16 x i16> @lasx_xvldrepl_h_lo(i8* %p) nounwind {
define <16 x i16> @lasx_xvldrepl_h_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.h: argument out of range or not a multiple of 2.
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8* %p, i32 -2050)
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr %p, i32 -2050)
ret <16 x i16> %res
}

define <16 x i16> @lasx_xvldrepl_h_hi(i8* %p) nounwind {
define <16 x i16> @lasx_xvldrepl_h_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.h: argument out of range or not a multiple of 2.
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8* %p, i32 2048)
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr %p, i32 2048)
ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8*, i32)
declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr, i32)

define <8 x i32> @lasx_xvldrepl_w_lo(i8* %p) nounwind {
define <8 x i32> @lasx_xvldrepl_w_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.w: argument out of range or not a multiple of 4.
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8* %p, i32 -2052)
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr %p, i32 -2052)
ret <8 x i32> %res
}

define <8 x i32> @lasx_xvldrepl_w_hi(i8* %p) nounwind {
define <8 x i32> @lasx_xvldrepl_w_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.w: argument out of range or not a multiple of 4.
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8* %p, i32 2048)
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr %p, i32 2048)
ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8*, i32)
declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr, i32)

define <4 x i64> @lasx_xvldrepl_d_lo(i8* %p) nounwind {
define <4 x i64> @lasx_xvldrepl_d_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.d: argument out of range or not a multiple of 8.
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8* %p, i32 -2056)
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr %p, i32 -2056)
ret <4 x i64> %res
}

define <4 x i64> @lasx_xvldrepl_d_hi(i8* %p) nounwind {
define <4 x i64> @lasx_xvldrepl_d_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvldrepl.d: argument out of range or not a multiple of 8.
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8* %p, i32 2048)
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr %p, i32 2048)
ret <4 x i64> %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl-non-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,37 +1,37 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr, i32)

define <32 x i8> @lasx_xvldrepl_b(i8* %p, i32 %a) nounwind {
define <32 x i8> @lasx_xvldrepl_b(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8* %p, i32 %a)
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr %p, i32 %a)
ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8*, i32)
declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr, i32)

define <16 x i16> @lasx_xvldrepl_h(i8* %p, i32 %a) nounwind {
define <16 x i16> @lasx_xvldrepl_h(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8* %p, i32 %a)
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr %p, i32 %a)
ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8*, i32)
declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr, i32)

define <8 x i32> @lasx_xvldrepl_w(i8* %p, i32 %a) nounwind {
define <8 x i32> @lasx_xvldrepl_w(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8* %p, i32 %a)
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr %p, i32 %a)
ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8*, i32)
declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr, i32)

define <4 x i64> @lasx_xvldrepl_d(i8* %p, i32 %a) nounwind {
define <4 x i64> @lasx_xvldrepl_d(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8* %p, i32 %a)
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr %p, i32 %a)
ret <4 x i64> %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-ldrepl.ll
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Original file line number Diff line number Diff line change
@@ -1,50 +1,50 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8*, i32)
declare <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr, i32)

define <32 x i8> @lasx_xvldrepl_b(i8* %p) nounwind {
define <32 x i8> @lasx_xvldrepl_b(ptr %p) nounwind {
; CHECK-LABEL: lasx_xvldrepl_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvldrepl.b $xr0, $a0, 1
; CHECK-NEXT: ret
entry:
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(i8* %p, i32 1)
%res = call <32 x i8> @llvm.loongarch.lasx.xvldrepl.b(ptr %p, i32 1)
ret <32 x i8> %res
}

declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8*, i32)
declare <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr, i32)

define <16 x i16> @lasx_xvldrepl_h(i8* %p) nounwind {
define <16 x i16> @lasx_xvldrepl_h(ptr %p) nounwind {
; CHECK-LABEL: lasx_xvldrepl_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvldrepl.h $xr0, $a0, 2
; CHECK-NEXT: ret
entry:
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(i8* %p, i32 2)
%res = call <16 x i16> @llvm.loongarch.lasx.xvldrepl.h(ptr %p, i32 2)
ret <16 x i16> %res
}

declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8*, i32)
declare <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr, i32)

define <8 x i32> @lasx_xvldrepl_w(i8* %p) nounwind {
define <8 x i32> @lasx_xvldrepl_w(ptr %p) nounwind {
; CHECK-LABEL: lasx_xvldrepl_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvldrepl.w $xr0, $a0, 4
; CHECK-NEXT: ret
entry:
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(i8* %p, i32 4)
%res = call <8 x i32> @llvm.loongarch.lasx.xvldrepl.w(ptr %p, i32 4)
ret <8 x i32> %res
}

declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8*, i32)
declare <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr, i32)

define <4 x i64> @lasx_xvldrepl_d(i8* %p) nounwind {
define <4 x i64> @lasx_xvldrepl_d(ptr %p) nounwind {
; CHECK-LABEL: lasx_xvldrepl_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvldrepl.d $xr0, $a0, 8
; CHECK-NEXT: ret
entry:
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(i8* %p, i32 8)
%res = call <4 x i64> @llvm.loongarch.lasx.xvldrepl.d(ptr %p, i32 8)
ret <4 x i64> %res
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-invalid-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lasx.xvst(<32 x i8>, i8*, i32)
declare void @llvm.loongarch.lasx.xvst(<32 x i8>, ptr, i32)

define void @lasx_xvst_lo(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvst_lo(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvst: argument out of range
entry:
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, i8* %p, i32 -2049)
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, ptr %p, i32 -2049)
ret void
}

define void @lasx_xvst_hi(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvst_hi(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvst: argument out of range
entry:
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, i8* %p, i32 2048)
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, ptr %p, i32 2048)
ret void
}
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-st-non-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lasx.xvst(<32 x i8>, i8*, i32)
declare void @llvm.loongarch.lasx.xvst(<32 x i8>, ptr, i32)

define void @lasx_xvst(<32 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvst(<32 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, i8* %p, i32 %b)
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, ptr %p, i32 %b)
ret void
}
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-st.ll
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Original file line number Diff line number Diff line change
@@ -1,27 +1,27 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare void @llvm.loongarch.lasx.xvst(<32 x i8>, i8*, i32)
declare void @llvm.loongarch.lasx.xvst(<32 x i8>, ptr, i32)

define void @lasx_xvst(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvst(<32 x i8> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvst:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvst $xr0, $a0, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, i8* %p, i32 1)
call void @llvm.loongarch.lasx.xvst(<32 x i8> %va, ptr %p, i32 1)
ret void
}

declare void @llvm.loongarch.lasx.xvstx(<32 x i8>, i8*, i64)
declare void @llvm.loongarch.lasx.xvstx(<32 x i8>, ptr, i64)

define void @lasx_xvstx(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstx(<32 x i8> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvstx:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: ori $a1, $zero, 1
; CHECK-NEXT: xvstx $xr0, $a0, $a1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvstx(<32 x i8> %va, i8* %p, i64 1)
call void @llvm.loongarch.lasx.xvstx(<32 x i8> %va, ptr %p, i64 1)
ret void
}
72 changes: 36 additions & 36 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-invalid-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,121 +1,121 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, ptr, i32, i32)

define void @lasx_xvstelm_b_lo(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstelm_b_lo(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.b: argument out of range
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 -129, i32 1)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 -129, i32 1)
ret void
}

define void @lasx_xvstelm_b_hi(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstelm_b_hi(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.b: argument out of range
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 128, i32 1)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 128, i32 1)
ret void
}

define void @lasx_xvstelm_b_idx_lo(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstelm_b_idx_lo(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.b: argument out of range
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 1, i32 -1)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 1, i32 -1)
ret void
}

define void @lasx_xvstelm_b_idx_hi(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstelm_b_idx_hi(<32 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.b: argument out of range
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 1, i32 32)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 1, i32 32)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, ptr, i32, i32)

define void @lasx_xvstelm_h_lo(<16 x i16> %va, i8* %p) nounwind {
define void @lasx_xvstelm_h_lo(<16 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 -258, i32 1)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 -258, i32 1)
ret void
}

define void @lasx_xvstelm_h_hi(<16 x i16> %va, i8* %p) nounwind {
define void @lasx_xvstelm_h_hi(<16 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 256, i32 1)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 256, i32 1)
ret void
}

define void @lasx_xvstelm_h_idx_lo(<16 x i16> %va, i8* %p) nounwind {
define void @lasx_xvstelm_h_idx_lo(<16 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 2, i32 -1)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 2, i32 -1)
ret void
}

define void @lasx_xvstelm_h_idx_hi(<16 x i16> %va, i8* %p) nounwind {
define void @lasx_xvstelm_h_idx_hi(<16 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 2, i32 16)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 2, i32 16)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, ptr, i32, i32)

define void @lasx_xvstelm_w_lo(<8 x i32> %va, i8* %p) nounwind {
define void @lasx_xvstelm_w_lo(<8 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 -516, i32 1)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 -516, i32 1)
ret void
}

define void @lasx_xvstelm_w_hi(<8 x i32> %va, i8* %p) nounwind {
define void @lasx_xvstelm_w_hi(<8 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 512, i32 1)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 512, i32 1)
ret void
}

define void @lasx_xvstelm_w_idx_lo(<8 x i32> %va, i8* %p) nounwind {
define void @lasx_xvstelm_w_idx_lo(<8 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 4, i32 -1)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 4, i32 -1)
ret void
}

define void @lasx_xvstelm_w_idx_hi(<8 x i32> %va, i8* %p) nounwind {
define void @lasx_xvstelm_w_idx_hi(<8 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 4, i32 8)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 4, i32 8)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, ptr, i32, i32)

define void @lasx_xvstelm_d_lo(<4 x i64> %va, i8* %p) nounwind {
define void @lasx_xvstelm_d_lo(<4 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 -1032, i32 1)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 -1032, i32 1)
ret void
}

define void @lasx_xvstelm_d_hi(<4 x i64> %va, i8* %p) nounwind {
define void @lasx_xvstelm_d_hi(<4 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 1024, i32 1)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 1024, i32 1)
ret void
}

define void @lasx_xvstelm_d_idx_lo(<4 x i64> %va, i8* %p) nounwind {
define void @lasx_xvstelm_d_idx_lo(<4 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 8, i32 -1)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 8, i32 -1)
ret void
}

define void @lasx_xvstelm_d_idx_hi(<4 x i64> %va, i8* %p) nounwind {
define void @lasx_xvstelm_d_idx_hi(<4 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lasx.xvstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 8, i32 4)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 8, i32 4)
ret void
}
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm-non-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,65 +1,65 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lasx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, ptr, i32, i32)

define void @lasx_xvstelm_b(<32 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_b(<32 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lasx_xvstelm_b_idx(<32 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_b_idx(<32 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 1, i32 %b)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 1, i32 %b)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, ptr, i32, i32)

define void @lasx_xvstelm_h(<16 x i16> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_h(<16 x i16> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lasx_xvstelm_h_idx(<16 x i16> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_h_idx(<16 x i16> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 2, i32 %b)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 2, i32 %b)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, ptr, i32, i32)

define void @lasx_xvstelm_w(<8 x i32> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_w(<8 x i32> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lasx_xvstelm_w_idx(<8 x i32> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_w_idx(<8 x i32> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 4, i32 %b)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 4, i32 %b)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, ptr, i32, i32)

define void @lasx_xvstelm_d(<4 x i64> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_d(<4 x i64> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lasx_xvstelm_d_idx(<4 x i64> %va, i8* %p, i32 %b) nounwind {
define void @lasx_xvstelm_d_idx(<4 x i64> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 8, i32 %b)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 8, i32 %b)
ret void
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lasx/intrinsic-stelm.ll
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Original file line number Diff line number Diff line change
@@ -1,50 +1,50 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s

declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.b(<32 x i8>, ptr, i32, i32)

define void @lasx_xvstelm_b(<32 x i8> %va, i8* %p) nounwind {
define void @lasx_xvstelm_b(<32 x i8> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvstelm_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvstelm.b $xr0, $a0, 1, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, i8* %p, i32 1, i32 1)
call void @llvm.loongarch.lasx.xvstelm.b(<32 x i8> %va, ptr %p, i32 1, i32 1)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.h(<16 x i16>, ptr, i32, i32)

define void @lasx_xvstelm_h(<16 x i16> %va, i8* %p) nounwind {
define void @lasx_xvstelm_h(<16 x i16> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvstelm_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvstelm.h $xr0, $a0, 2, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, i8* %p, i32 2, i32 1)
call void @llvm.loongarch.lasx.xvstelm.h(<16 x i16> %va, ptr %p, i32 2, i32 1)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.w(<8 x i32>, ptr, i32, i32)

define void @lasx_xvstelm_w(<8 x i32> %va, i8* %p) nounwind {
define void @lasx_xvstelm_w(<8 x i32> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvstelm_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvstelm.w $xr0, $a0, 4, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, i8* %p, i32 4, i32 1)
call void @llvm.loongarch.lasx.xvstelm.w(<8 x i32> %va, ptr %p, i32 4, i32 1)
ret void
}

declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lasx.xvstelm.d(<4 x i64>, ptr, i32, i32)

define void @lasx_xvstelm_d(<4 x i64> %va, i8* %p) nounwind {
define void @lasx_xvstelm_d(<4 x i64> %va, ptr %p) nounwind {
; CHECK-LABEL: lasx_xvstelm_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: xvstelm.d $xr0, $a0, 8, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, i8* %p, i32 8, i32 1)
call void @llvm.loongarch.lasx.xvstelm.d(<4 x i64> %va, ptr %p, i32 8, i32 1)
ret void
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-invalid-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vld(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vld(ptr, i32)

define <16 x i8> @lsx_vld_lo(i8* %p) nounwind {
define <16 x i8> @lsx_vld_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vld: argument out of range
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vld(i8* %p, i32 -2049)
%res = call <16 x i8> @llvm.loongarch.lsx.vld(ptr %p, i32 -2049)
ret <16 x i8> %res
}

define <16 x i8> @lsx_vld_hi(i8* %p) nounwind {
define <16 x i8> @lsx_vld_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vld: argument out of range
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vld(i8* %p, i32 2048)
%res = call <16 x i8> @llvm.loongarch.lsx.vld(ptr %p, i32 2048)
ret <16 x i8> %res
}
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld-non-imm.ll
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Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vld(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vld(ptr, i32)

define <16 x i8> @lsx_vld(i8* %p, i32 %a) nounwind {
define <16 x i8> @lsx_vld(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vld(i8* %p, i32 %a)
%res = call <16 x i8> @llvm.loongarch.lsx.vld(ptr %p, i32 %a)
ret <16 x i8> %res
}
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ld.ll
View file
Original file line number Diff line number Diff line change
@@ -1,26 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vld(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vld(ptr, i32)

define <16 x i8> @lsx_vld(i8* %p) nounwind {
define <16 x i8> @lsx_vld(ptr %p) nounwind {
; CHECK-LABEL: lsx_vld:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vld $vr0, $a0, 1
; CHECK-NEXT: ret
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vld(i8* %p, i32 1)
%res = call <16 x i8> @llvm.loongarch.lsx.vld(ptr %p, i32 1)
ret <16 x i8> %res
}

declare <16 x i8> @llvm.loongarch.lsx.vldx(i8*, i64)
declare <16 x i8> @llvm.loongarch.lsx.vldx(ptr, i64)

define <16 x i8> @lsx_vldx(i8* %p, i64 %b) nounwind {
define <16 x i8> @lsx_vldx(ptr %p, i64 %b) nounwind {
; CHECK-LABEL: lsx_vldx:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldx $vr0, $a0, $a1
; CHECK-NEXT: ret
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vldx(i8* %p, i64 %b)
%res = call <16 x i8> @llvm.loongarch.lsx.vldx(ptr %p, i64 %b)
ret <16 x i8> %res
}
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-invalid-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,65 +1,65 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr, i32)

define <16 x i8> @lsx_vldrepl_b_lo(i8* %p) nounwind {
define <16 x i8> @lsx_vldrepl_b_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.b: argument out of range
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8* %p, i32 -2049)
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr %p, i32 -2049)
ret <16 x i8> %res
}

define <16 x i8> @lsx_vldrepl_b_hi(i8* %p) nounwind {
define <16 x i8> @lsx_vldrepl_b_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.b: argument out of range
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8* %p, i32 2048)
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr %p, i32 2048)
ret <16 x i8> %res
}

declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8*, i32)
declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr, i32)

define <8 x i16> @lsx_vldrepl_h_lo(i8* %p) nounwind {
define <8 x i16> @lsx_vldrepl_h_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.h: argument out of range or not a multiple of 2.
entry:
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8* %p, i32 -2050)
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr %p, i32 -2050)
ret <8 x i16> %res
}

define <8 x i16> @lsx_vldrepl_h_hi(i8* %p) nounwind {
define <8 x i16> @lsx_vldrepl_h_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.h: argument out of range or not a multiple of 2.
entry:
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8* %p, i32 2048)
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr %p, i32 2048)
ret <8 x i16> %res
}

declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8*, i32)
declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr, i32)

define <4 x i32> @lsx_vldrepl_w_lo(i8* %p) nounwind {
define <4 x i32> @lsx_vldrepl_w_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.w: argument out of range or not a multiple of 4.
entry:
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8* %p, i32 -2052)
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr %p, i32 -2052)
ret <4 x i32> %res
}

define <4 x i32> @lsx_vldrepl_w_hi(i8* %p) nounwind {
define <4 x i32> @lsx_vldrepl_w_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.w: argument out of range or not a multiple of 4.
entry:
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8* %p, i32 2048)
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr %p, i32 2048)
ret <4 x i32> %res
}

declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8*, i32)
declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr, i32)

define <2 x i64> @lsx_vldrepl_d_lo(i8* %p) nounwind {
define <2 x i64> @lsx_vldrepl_d_lo(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.d: argument out of range or not a multiple of 8.
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8* %p, i32 -2056)
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr %p, i32 -2056)
ret <2 x i64> %res
}

define <2 x i64> @lsx_vldrepl_d_hi(i8* %p) nounwind {
define <2 x i64> @lsx_vldrepl_d_hi(ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vldrepl.d: argument out of range or not a multiple of 8.
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8* %p, i32 2048)
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr %p, i32 2048)
ret <2 x i64> %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl-non-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,37 +1,37 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr, i32)

define <16 x i8> @lsx_vldrepl_b(i8* %p, i32 %a) nounwind {
define <16 x i8> @lsx_vldrepl_b(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8* %p, i32 %a)
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr %p, i32 %a)
ret <16 x i8> %res
}

declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8*, i32)
declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr, i32)

define <8 x i16> @lsx_vldrepl_h(i8* %p, i32 %a) nounwind {
define <8 x i16> @lsx_vldrepl_h(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8* %p, i32 %a)
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr %p, i32 %a)
ret <8 x i16> %res
}

declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8*, i32)
declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr, i32)

define <4 x i32> @lsx_vldrepl_w(i8* %p, i32 %a) nounwind {
define <4 x i32> @lsx_vldrepl_w(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8* %p, i32 %a)
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr %p, i32 %a)
ret <4 x i32> %res
}

declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8*, i32)
declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr, i32)

define <2 x i64> @lsx_vldrepl_d(i8* %p, i32 %a) nounwind {
define <2 x i64> @lsx_vldrepl_d(ptr %p, i32 %a) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8* %p, i32 %a)
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr %p, i32 %a)
ret <2 x i64> %res
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-ldrepl.ll
View file
Original file line number Diff line number Diff line change
@@ -1,50 +1,50 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8*, i32)
declare <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr, i32)

define <16 x i8> @lsx_vldrepl_b(i8* %p, i32 %b) nounwind {
define <16 x i8> @lsx_vldrepl_b(ptr %p, i32 %b) nounwind {
; CHECK-LABEL: lsx_vldrepl_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldrepl.b $vr0, $a0, 1
; CHECK-NEXT: ret
entry:
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(i8* %p, i32 1)
%res = call <16 x i8> @llvm.loongarch.lsx.vldrepl.b(ptr %p, i32 1)
ret <16 x i8> %res
}

declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8*, i32)
declare <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr, i32)

define <8 x i16> @lsx_vldrepl_h(i8* %p, i32 %b) nounwind {
define <8 x i16> @lsx_vldrepl_h(ptr %p, i32 %b) nounwind {
; CHECK-LABEL: lsx_vldrepl_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldrepl.h $vr0, $a0, 2
; CHECK-NEXT: ret
entry:
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(i8* %p, i32 2)
%res = call <8 x i16> @llvm.loongarch.lsx.vldrepl.h(ptr %p, i32 2)
ret <8 x i16> %res
}

declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8*, i32)
declare <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr, i32)

define <4 x i32> @lsx_vldrepl_w(i8* %p, i32 %b) nounwind {
define <4 x i32> @lsx_vldrepl_w(ptr %p, i32 %b) nounwind {
; CHECK-LABEL: lsx_vldrepl_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldrepl.w $vr0, $a0, 4
; CHECK-NEXT: ret
entry:
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(i8* %p, i32 4)
%res = call <4 x i32> @llvm.loongarch.lsx.vldrepl.w(ptr %p, i32 4)
ret <4 x i32> %res
}

declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8*, i32)
declare <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr, i32)

define <2 x i64> @lsx_vldrepl_d(i8* %p, i32 %b) nounwind {
define <2 x i64> @lsx_vldrepl_d(ptr %p, i32 %b) nounwind {
; CHECK-LABEL: lsx_vldrepl_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vldrepl.d $vr0, $a0, 8
; CHECK-NEXT: ret
entry:
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(i8* %p, i32 8)
%res = call <2 x i64> @llvm.loongarch.lsx.vldrepl.d(ptr %p, i32 8)
ret <2 x i64> %res
}
10 changes: 5 additions & 5 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-invalid-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,17 +1,17 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lsx.vst(<16 x i8>, i8*, i32)
declare void @llvm.loongarch.lsx.vst(<16 x i8>, ptr, i32)

define void @lsx_vst_lo(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vst_lo(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vst: argument out of range
entry:
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, i8* %p, i32 -2049)
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, ptr %p, i32 -2049)
ret void
}

define void @lsx_vst_hi(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vst_hi(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vst: argument out of range
entry:
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, i8* %p, i32 2048)
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, ptr %p, i32 2048)
ret void
}
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-st-non-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,10 +1,10 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lsx.vst(<16 x i8>, i8*, i32)
declare void @llvm.loongarch.lsx.vst(<16 x i8>, ptr, i32)

define void @lsx_vst(<16 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vst(<16 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, i8* %p, i32 %b)
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, ptr %p, i32 %b)
ret void
}
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-st.ll
View file
Original file line number Diff line number Diff line change
@@ -1,26 +1,26 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare void @llvm.loongarch.lsx.vst(<16 x i8>, i8*, i32)
declare void @llvm.loongarch.lsx.vst(<16 x i8>, ptr, i32)

define void @lsx_vst(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vst(<16 x i8> %va, ptr %p) nounwind {
; CHECK-LABEL: lsx_vst:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vst $vr0, $a0, -2048
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, i8* %p, i32 -2048)
call void @llvm.loongarch.lsx.vst(<16 x i8> %va, ptr %p, i32 -2048)
ret void
}

declare void @llvm.loongarch.lsx.vstx(<16 x i8>, i8*, i64)
declare void @llvm.loongarch.lsx.vstx(<16 x i8>, ptr, i64)

define void @lsx_vstx(<16 x i8> %va, i8* %p, i64 %c) nounwind {
define void @lsx_vstx(<16 x i8> %va, ptr %p, i64 %c) nounwind {
; CHECK-LABEL: lsx_vstx:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vstx $vr0, $a0, $a1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vstx(<16 x i8> %va, i8* %p, i64 %c)
call void @llvm.loongarch.lsx.vstx(<16 x i8> %va, ptr %p, i64 %c)
ret void
}
72 changes: 36 additions & 36 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-invalid-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,121 +1,121 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, ptr, i32, i32)

define void @lsx_vstelm_b_lo(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vstelm_b_lo(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.b: argument out of range
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 -129, i32 15)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 -129, i32 15)
ret void
}

define void @lsx_vstelm_b_hi(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vstelm_b_hi(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.b: argument out of range
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 128, i32 15)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 128, i32 15)
ret void
}

define void @lsx_vstelm_b_idx_lo(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vstelm_b_idx_lo(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.b: argument out of range
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 1, i32 -1)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 1, i32 -1)
ret void
}

define void @lsx_vstelm_b_idx_hi(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vstelm_b_idx_hi(<16 x i8> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.b: argument out of range
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 1, i32 16)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 1, i32 16)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, ptr, i32, i32)

define void @lsx_vstelm_h_lo(<8 x i16> %va, i8* %p) nounwind {
define void @lsx_vstelm_h_lo(<8 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 -258, i32 7)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 -258, i32 7)
ret void
}

define void @lsx_vstelm_h_hi(<8 x i16> %va, i8* %p) nounwind {
define void @lsx_vstelm_h_hi(<8 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 256, i32 7)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 256, i32 7)
ret void
}

define void @lsx_vstelm_h_idx_lo(<8 x i16> %va, i8* %p) nounwind {
define void @lsx_vstelm_h_idx_lo(<8 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 2, i32 -1)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 2, i32 -1)
ret void
}

define void @lsx_vstelm_h_idx_hi(<8 x i16> %va, i8* %p) nounwind {
define void @lsx_vstelm_h_idx_hi(<8 x i16> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.h: argument out of range or not a multiple of 2.
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 2, i32 8)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 2, i32 8)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, ptr, i32, i32)

define void @lsx_vstelm_w_lo(<4 x i32> %va, i8* %p) nounwind {
define void @lsx_vstelm_w_lo(<4 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 -516, i32 3)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 -516, i32 3)
ret void
}

define void @lsx_vstelm_w_hi(<4 x i32> %va, i8* %p) nounwind {
define void @lsx_vstelm_w_hi(<4 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 512, i32 3)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 512, i32 3)
ret void
}

define void @lsx_vstelm_w_idx_lo(<4 x i32> %va, i8* %p) nounwind {
define void @lsx_vstelm_w_idx_lo(<4 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 4, i32 -1)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 4, i32 -1)
ret void
}

define void @lsx_vstelm_w_idx_hi(<4 x i32> %va, i8* %p) nounwind {
define void @lsx_vstelm_w_idx_hi(<4 x i32> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.w: argument out of range or not a multiple of 4.
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 4, i32 4)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 4, i32 4)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, ptr, i32, i32)

define void @lsx_vstelm_d_lo(<2 x i64> %va, i8* %p) nounwind {
define void @lsx_vstelm_d_lo(<2 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 -1032, i32 1)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 -1032, i32 1)
ret void
}

define void @lsx_vstelm_d_hi(<2 x i64> %va, i8* %p) nounwind {
define void @lsx_vstelm_d_hi(<2 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 1024, i32 1)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 1024, i32 1)
ret void
}

define void @lsx_vstelm_d_idx_lo(<2 x i64> %va, i8* %p) nounwind {
define void @lsx_vstelm_d_idx_lo(<2 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 8, i32 -1)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 8, i32 -1)
ret void
}

define void @lsx_vstelm_d_idx_hi(<2 x i64> %va, i8* %p) nounwind {
define void @lsx_vstelm_d_idx_hi(<2 x i64> %va, ptr %p) nounwind {
; CHECK: llvm.loongarch.lsx.vstelm.d: argument out of range or not a multiple of 8.
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 8, i32 2)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 8, i32 2)
ret void
}
40 changes: 20 additions & 20 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm-non-imm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,65 +1,65 @@
; RUN: not llc --mtriple=loongarch64 --mattr=+lsx < %s 2>&1 | FileCheck %s

declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, ptr, i32, i32)

define void @lsx_vstelm_b(<16 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_b(<16 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lsx_vstelm_b_idx(<16 x i8> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_b_idx(<16 x i8> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 1, i32 %b)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 1, i32 %b)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, ptr, i32, i32)

define void @lsx_vstelm_h(<8 x i16> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_h(<8 x i16> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lsx_vstelm_h_idx(<8 x i16> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_h_idx(<8 x i16> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 2, i32 %b)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 2, i32 %b)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, ptr, i32, i32)

define void @lsx_vstelm_w(<4 x i32> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_w(<4 x i32> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lsx_vstelm_w_idx(<4 x i32> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_w_idx(<4 x i32> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 4, i32 %b)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 4, i32 %b)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, ptr, i32, i32)

define void @lsx_vstelm_d(<2 x i64> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_d(<2 x i64> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 %b, i32 1)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 %b, i32 1)
ret void
}

define void @lsx_vstelm_d_idx(<2 x i64> %va, i8* %p, i32 %b) nounwind {
define void @lsx_vstelm_d_idx(<2 x i64> %va, ptr %p, i32 %b) nounwind {
; CHECK: immarg operand has non-immediate parameter
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 8, i32 %b)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 8, i32 %b)
ret void
}
24 changes: 12 additions & 12 deletions llvm/test/CodeGen/LoongArch/lsx/intrinsic-stelm.ll
View file
Original file line number Diff line number Diff line change
@@ -1,50 +1,50 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s

declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.b(<16 x i8>, ptr, i32, i32)

define void @lsx_vstelm_b(<16 x i8> %va, i8* %p) nounwind {
define void @lsx_vstelm_b(<16 x i8> %va, ptr %p) nounwind {
; CHECK-LABEL: lsx_vstelm_b:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vstelm.b $vr0, $a0, 1, 15
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, i8* %p, i32 1, i32 15)
call void @llvm.loongarch.lsx.vstelm.b(<16 x i8> %va, ptr %p, i32 1, i32 15)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.h(<8 x i16>, ptr, i32, i32)

define void @lsx_vstelm_h(<8 x i16> %va, i8* %p) nounwind {
define void @lsx_vstelm_h(<8 x i16> %va, ptr %p) nounwind {
; CHECK-LABEL: lsx_vstelm_h:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vstelm.h $vr0, $a0, 2, 7
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, i8* %p, i32 2, i32 7)
call void @llvm.loongarch.lsx.vstelm.h(<8 x i16> %va, ptr %p, i32 2, i32 7)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.w(<4 x i32>, ptr, i32, i32)

define void @lsx_vstelm_w(<4 x i32> %va, i8* %p) nounwind {
define void @lsx_vstelm_w(<4 x i32> %va, ptr %p) nounwind {
; CHECK-LABEL: lsx_vstelm_w:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vstelm.w $vr0, $a0, 4, 3
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, i8* %p, i32 4, i32 3)
call void @llvm.loongarch.lsx.vstelm.w(<4 x i32> %va, ptr %p, i32 4, i32 3)
ret void
}

declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, i8*, i32, i32)
declare void @llvm.loongarch.lsx.vstelm.d(<2 x i64>, ptr, i32, i32)

define void @lsx_vstelm_d(<2 x i64> %va, i8* %p) nounwind {
define void @lsx_vstelm_d(<2 x i64> %va, ptr %p) nounwind {
; CHECK-LABEL: lsx_vstelm_d:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: vstelm.d $vr0, $a0, 8, 1
; CHECK-NEXT: ret
entry:
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, i8* %p, i32 8, i32 1)
call void @llvm.loongarch.lsx.vstelm.d(<2 x i64> %va, ptr %p, i32 8, i32 1)
ret void
}
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/LoongArch/tail-calls.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,7 @@ entry:
;; Perform tail call optimization for external symbol.
;; Bytes copied should be large enough, otherwise the memcpy call would be optimized to multiple ld/st insns.
@dest = global [2 x i8] zeroinitializer
declare void @llvm.memcpy.p0i8.p0i8.i32(ptr, ptr, i32, i1)
declare void @llvm.memcpy.p0.p0.i32(ptr, ptr, i32, i1)
define void @caller_extern(ptr %src) optsize {
; CHECK-LABEL: caller_extern:
; CHECK: # %bb.0: # %entry
Expand All @@ -25,7 +25,7 @@ define void @caller_extern(ptr %src) optsize {
; CHECK-NEXT: ori $a2, $zero, 33
; CHECK-NEXT: b %plt(memcpy)
entry:
tail call void @llvm.memcpy.p0i8.p0i8.i32(ptr getelementptr inbounds ([2 x i8], ptr @dest, i32 0, i32 0), ptr %src, i32 33, i1 false)
tail call void @llvm.memcpy.p0.p0.i32(ptr @dest, ptr %src, i32 33, i1 false)
ret void
}

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/AArch64/expected-target-flag-name.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@

define i32 @sub_small() {
entry:
%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
ret i32 %val32
}

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/AArch64/invalid-target-flag-name.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@

define i32 @sub_small() {
entry:
%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
ret i32 %val32
}

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/AArch64/machine-metadata-error.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define i32 @test_memcpy(i32* nocapture %p, i32* nocapture readonly %q) {
define i32 @test_memcpy(ptr nocapture %p, ptr nocapture readonly %q) {
ret i32 0
}
...
Expand Down
54 changes: 27 additions & 27 deletions llvm/test/CodeGen/MIR/AArch64/machine-metadata.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,49 +6,49 @@
target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
target triple = "aarch64-unknown-linux-gnu"

define i32 @test_memcpy(i32* nocapture %p, i32* nocapture readonly %q) {
%p0 = bitcast i32* %p to i8*
%add.ptr = getelementptr inbounds i32, i32* %p, i64 4
%p1 = bitcast i32* %add.ptr to i8*
tail call void @llvm.memcpy.p0i8.p0i8.i64(i8* noundef nonnull align 4 dereferenceable(16) %p0, i8* noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%v0 = load i32, i32* %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, i32* %q, i64 1
%v1 = load i32, i32* %q1, align 4, !alias.scope !3, !noalias !0
define i32 @test_memcpy(ptr nocapture %p, ptr nocapture readonly %q) {
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
tail call void @llvm.memcpy.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
%add = add i32 %v0, %v1
ret i32 %add
}

define i32 @test_memcpy_inline(i32* nocapture %p, i32* nocapture readonly %q) {
%p0 = bitcast i32* %p to i8*
%add.ptr = getelementptr inbounds i32, i32* %p, i64 4
%p1 = bitcast i32* %add.ptr to i8*
tail call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* noundef nonnull align 4 dereferenceable(16) %p0, i8* noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%v0 = load i32, i32* %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, i32* %q, i64 1
%v1 = load i32, i32* %q1, align 4, !alias.scope !3, !noalias !0
define i32 @test_memcpy_inline(ptr nocapture %p, ptr nocapture readonly %q) {
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
tail call void @llvm.memcpy.inline.p0.p0.i64(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
%add = add i32 %v0, %v1
ret i32 %add
}

define i32 @test_mempcpy(i32* nocapture %p, i32* nocapture readonly %q) {
%p0 = bitcast i32* %p to i8*
%add.ptr = getelementptr inbounds i32, i32* %p, i64 4
%p1 = bitcast i32* %add.ptr to i8*
%call = tail call i8* @mempcpy(i8* noundef nonnull align 4 dereferenceable(16) %p0, i8* noundef nonnull align 4 dereferenceable(16) %p1, i64 16), !alias.scope !0, !noalias !3
%v0 = load i32, i32* %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, i32* %q, i64 1
%v1 = load i32, i32* %q1, align 4, !alias.scope !3, !noalias !0
define i32 @test_mempcpy(ptr nocapture %p, ptr nocapture readonly %q) {
%p0 = bitcast ptr %p to ptr
%add.ptr = getelementptr inbounds i32, ptr %p, i64 4
%p1 = bitcast ptr %add.ptr to ptr
%call = tail call ptr @mempcpy(ptr noundef nonnull align 4 dereferenceable(16) %p0, ptr noundef nonnull align 4 dereferenceable(16) %p1, i64 16), !alias.scope !0, !noalias !3
%v0 = load i32, ptr %q, align 4, !alias.scope !3, !noalias !0
%q1 = getelementptr inbounds i32, ptr %q, i64 1
%v1 = load i32, ptr %q1, align 4, !alias.scope !3, !noalias !0
%add = add i32 %v0, %v1
ret i32 %add
}

; Function Attrs: argmemonly nofree nounwind willreturn
declare void @llvm.memcpy.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64, i1 immarg) #0
declare void @llvm.memcpy.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64, i1 immarg) #0

; Function Attrs: argmemonly nofree nounwind willreturn
declare void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* noalias nocapture writeonly, i8* noalias nocapture readonly, i64 immarg, i1 immarg) #0
declare void @llvm.memcpy.inline.p0.p0.i64(ptr noalias nocapture writeonly, ptr noalias nocapture readonly, i64 immarg, i1 immarg) #0

declare i8* @mempcpy(i8*, i8*, i64)
declare ptr @mempcpy(ptr, ptr, i64)

attributes #0 = { argmemonly nofree nounwind willreturn }

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/AArch64/stack-object-local-offset.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,14 +2,14 @@

--- |
@var = global i64 0
@local_addr = global i64* null
@local_addr = global ptr null

define void @stack_local() {
entry:
%local_var = alloca i64
%val = load i64, i64* @var
store i64 %val, i64* %local_var
store i64* %local_var, i64** @local_addr
%val = load i64, ptr @var
store i64 %val, ptr %local_var
store ptr %local_var, ptr @local_addr
ret void
}
...
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/AArch64/swp.mir
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Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass none -o - %s | FileCheck %s

--- |
define i32 @swp(i32* %addr) #0 {
define i32 @swp(ptr %addr) #0 {
entry:
%0 = atomicrmw xchg i32* %addr, i32 1 monotonic
%0 = atomicrmw xchg ptr %addr, i32 1 monotonic
ret i32 %0
}

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/AArch64/target-flags.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -7,12 +7,12 @@

define void @sub_small() {
entry:
%val32 = load i32, i32* @var_i32
%val32 = load i32, ptr @var_i32
%newval32 = sub i32 %val32, 4095
store i32 %newval32, i32* @var_i32
%val64 = load i64, i64* @var_i64
store i32 %newval32, ptr @var_i32
%val64 = load i64, ptr @var_i64
%newval64 = sub i64 %val64, 52
store i64 %newval64, i64* @var_i64
store i64 %newval64, ptr @var_i64
ret void
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/AArch64/unnamed-stack.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@ entry:
; CHECK-NEXT: - { id: 0, name: '',
; CHECK: %0:_(p0) = G_FRAME_INDEX %stack.0
%0 = alloca i16
%1 = load i16, i16* %0
%1 = load i16, ptr %0
ret i16 %1
}

Expand All @@ -18,6 +18,6 @@ entry:
; CHECK-NEXT: - { id: 0, name: ptr,
; CHECK: %0:_(p0) = G_FRAME_INDEX %stack.0.ptr
%ptr = alloca i16
%0 = load i16, i16* %ptr
%0 = load i16, ptr %ptr
ret i16 %0
}
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/AMDGPU/expected-target-index-name.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@

@float_gv = internal unnamed_addr addrspace(4) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4

define amdgpu_kernel void @float(float addrspace(1)* %out, i32 %index) #0 {
define amdgpu_kernel void @float(ptr addrspace(1) %out, i32 %index) #0 {
entry:
%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
%1 = load float, float addrspace(4)* %0
store float %1, float addrspace(1)* %out
%0 = getelementptr inbounds [5 x float], ptr addrspace(4) @float_gv, i32 0, i32 %index
%1 = load float, ptr addrspace(4) %0
store float %1, ptr addrspace(1) %out
ret void
}

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/AMDGPU/invalid-target-index-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@

@float_gv = internal unnamed_addr addrspace(4) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4

define amdgpu_kernel void @float(float addrspace(1)* %out, i32 %index) #0 {
define amdgpu_kernel void @float(ptr addrspace(1) %out, i32 %index) #0 {
entry:
%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
%1 = load float, float addrspace(4)* %0
store float %1, float addrspace(1)* %out
%0 = getelementptr inbounds [5 x float], ptr addrspace(4) @float_gv, i32 0, i32 %index
%1 = load float, ptr addrspace(4) %0
store float %1, ptr addrspace(1) %out
ret void
}

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/AMDGPU/machine-metadata-error.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn-amd-amdhsa"

define i32 @test_memcpy(i32 addrspace(1)* nocapture %p, i32 addrspace(1)* nocapture readonly %q) #0 {
define i32 @test_memcpy(ptr addrspace(1) nocapture %p, ptr addrspace(1) nocapture readonly %q) #0 {
ret i32 0
}
...
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/MIR/AMDGPU/machine-metadata.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -6,37 +6,37 @@
target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5-G1-ni:7"
target triple = "amdgcn-amd-amdhsa"

define i32 @test_memcpy(i32 addrspace(1)* nocapture %p, i32 addrspace(1)* nocapture readonly %q) #0 {
%p0 = bitcast i32 addrspace(1)* %p to i8 addrspace(1)*
%add.ptr = getelementptr inbounds i32, i32 addrspace(1)* %p, i64 4
%p1 = bitcast i32 addrspace(1)* %add.ptr to i8 addrspace(1)*
tail call void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* noundef nonnull align 4 dereferenceable(16) %p0, i8 addrspace(1)* noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%1 = bitcast i32 addrspace(1)* %q to <2 x i32> addrspace(1)*
%2 = load <2 x i32>, <2 x i32> addrspace(1)* %1, align 4, !alias.scope !3, !noalias !0
define i32 @test_memcpy(ptr addrspace(1) nocapture %p, ptr addrspace(1) nocapture readonly %q) #0 {
%p0 = bitcast ptr addrspace(1) %p to ptr addrspace(1)
%add.ptr = getelementptr inbounds i32, ptr addrspace(1) %p, i64 4
%p1 = bitcast ptr addrspace(1) %add.ptr to ptr addrspace(1)
tail call void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) noundef nonnull align 4 dereferenceable(16) %p0, ptr addrspace(1) noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%1 = bitcast ptr addrspace(1) %q to ptr addrspace(1)
%2 = load <2 x i32>, ptr addrspace(1) %1, align 4, !alias.scope !3, !noalias !0
%v01 = extractelement <2 x i32> %2, i32 0
%v12 = extractelement <2 x i32> %2, i32 1
%add = add i32 %v01, %v12
ret i32 %add
}

define i32 @test_memcpy_inline(i32 addrspace(1)* nocapture %p, i32 addrspace(1)* nocapture readonly %q) #0 {
%p0 = bitcast i32 addrspace(1)* %p to i8 addrspace(1)*
%add.ptr = getelementptr inbounds i32, i32 addrspace(1)* %p, i64 4
%p1 = bitcast i32 addrspace(1)* %add.ptr to i8 addrspace(1)*
tail call void @llvm.memcpy.inline.p1i8.p1i8.i64(i8 addrspace(1)* noundef nonnull align 4 dereferenceable(16) %p0, i8 addrspace(1)* noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%1 = bitcast i32 addrspace(1)* %q to <2 x i32> addrspace(1)*
%2 = load <2 x i32>, <2 x i32> addrspace(1)* %1, align 4, !alias.scope !3, !noalias !0
define i32 @test_memcpy_inline(ptr addrspace(1) nocapture %p, ptr addrspace(1) nocapture readonly %q) #0 {
%p0 = bitcast ptr addrspace(1) %p to ptr addrspace(1)
%add.ptr = getelementptr inbounds i32, ptr addrspace(1) %p, i64 4
%p1 = bitcast ptr addrspace(1) %add.ptr to ptr addrspace(1)
tail call void @llvm.memcpy.inline.p1.p1.i64(ptr addrspace(1) noundef nonnull align 4 dereferenceable(16) %p0, ptr addrspace(1) noundef nonnull align 4 dereferenceable(16) %p1, i64 16, i1 false), !alias.scope !0, !noalias !3
%1 = bitcast ptr addrspace(1) %q to ptr addrspace(1)
%2 = load <2 x i32>, ptr addrspace(1) %1, align 4, !alias.scope !3, !noalias !0
%v01 = extractelement <2 x i32> %2, i32 0
%v12 = extractelement <2 x i32> %2, i32 1
%add = add i32 %v01, %v12
ret i32 %add
}

; Function Attrs: argmemonly nofree nounwind willreturn
declare void @llvm.memcpy.p1i8.p1i8.i64(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i64, i1 immarg) #1
declare void @llvm.memcpy.p1.p1.i64(ptr addrspace(1) noalias nocapture writeonly, ptr addrspace(1) noalias nocapture readonly, i64, i1 immarg) #1

; Function Attrs: argmemonly nofree nounwind willreturn
declare void @llvm.memcpy.inline.p1i8.p1i8.i64(i8 addrspace(1)* noalias nocapture writeonly, i8 addrspace(1)* noalias nocapture readonly, i64 immarg, i1 immarg) #1
declare void @llvm.memcpy.inline.p1.p1.i64(ptr addrspace(1) noalias nocapture writeonly, ptr addrspace(1) noalias nocapture readonly, i64 immarg, i1 immarg) #1

; Function Attrs: convergent nounwind willreturn
declare { i1, i32 } @llvm.amdgcn.if.i32(i1) #2
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/MIR/AMDGPU/mircanon-memoperands.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,7 @@
--- |
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"

define amdgpu_kernel void @f(i32 addrspace(1)* nocapture %arg) {
define amdgpu_kernel void @f(ptr addrspace(1) nocapture %arg) {
unreachable
}
...
Expand Down Expand Up @@ -33,11 +33,11 @@ body: |
; CHECK-NEXT: %bb0_{{[0-9a-f]+}}__1:sreg_64_xexec = S_LOAD_DWORDX2_IMM
%0 = COPY $sgpr4_sgpr5
%1 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
%2 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
%3 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( invariant load (s64) from `i64 addrspace(4)* undef`)
%4 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `i64 addrspace(4)* undef`)
%5 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `i64 addrspace(2)* undef`)
%6 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `i64 addrspace(1)* undef`)
%1 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
%2 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
%3 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( invariant load (s64) from `ptr addrspace(4) undef`)
%4 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(4) undef`)
%5 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(2) undef`)
%6 = S_LOAD_DWORDX2_IMM %0, 0, 0 :: ( load (s64) from `ptr addrspace(1) undef`)
...
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/MIR/AMDGPU/syncscopes.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,11 +6,11 @@
target datalayout = "e-p:32:32-p1:64:64-p2:64:64-p3:32:32-p4:64:64-p5:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64"
target triple = "amdgcn-amd-amdhsa"

define void @syncscopes(i32 %agent, i32 addrspace(4)* %agent_out, i32 %workgroup, i32 addrspace(4)* %workgroup_out, i32 %wavefront, i32 addrspace(4)* %wavefront_out) #0 {
define void @syncscopes(i32 %agent, ptr addrspace(4) %agent_out, i32 %workgroup, ptr addrspace(4) %workgroup_out, i32 %wavefront, ptr addrspace(4) %wavefront_out) #0 {
entry:
store atomic i32 %agent, i32 addrspace(4)* %agent_out syncscope("agent") seq_cst, align 4, !nontemporal !0
store atomic i32 %workgroup, i32 addrspace(4)* %workgroup_out syncscope("workgroup") seq_cst, align 4, !nontemporal !0
store atomic i32 %wavefront, i32 addrspace(4)* %wavefront_out syncscope("wavefront") seq_cst, align 4, !nontemporal !0
store atomic i32 %agent, ptr addrspace(4) %agent_out syncscope("agent") seq_cst, align 4, !nontemporal !0
store atomic i32 %workgroup, ptr addrspace(4) %workgroup_out syncscope("workgroup") seq_cst, align 4, !nontemporal !0
store atomic i32 %wavefront, ptr addrspace(4) %wavefront_out syncscope("wavefront") seq_cst, align 4, !nontemporal !0
ret void
}

Expand Down Expand Up @@ -74,14 +74,14 @@ body: |
liveins: $sgpr4_sgpr5
S_WAITCNT 0
$sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM $sgpr4_sgpr5, 8, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
$sgpr6 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 0, 0 :: (non-temporal dereferenceable invariant load (s32) from `i32 addrspace(4)* undef`)
$sgpr2_sgpr3 = S_LOAD_DWORDX2_IMM $sgpr4_sgpr5, 24, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
$sgpr7 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 16, 0 :: (non-temporal dereferenceable invariant load (s32) from `i32 addrspace(4)* undef`)
$sgpr8 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 32, 0 :: (non-temporal dereferenceable invariant load (s32) from `i32 addrspace(4)* undef`)
$sgpr0_sgpr1 = S_LOAD_DWORDX2_IMM $sgpr4_sgpr5, 8, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
$sgpr6 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 0, 0 :: (non-temporal dereferenceable invariant load (s32) from `ptr addrspace(4) undef`)
$sgpr2_sgpr3 = S_LOAD_DWORDX2_IMM $sgpr4_sgpr5, 24, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
$sgpr7 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 16, 0 :: (non-temporal dereferenceable invariant load (s32) from `ptr addrspace(4) undef`)
$sgpr8 = S_LOAD_DWORD_IMM $sgpr4_sgpr5, 32, 0 :: (non-temporal dereferenceable invariant load (s32) from `ptr addrspace(4) undef`)
S_WAITCNT 127
$vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr0_sgpr1
$sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed $sgpr4_sgpr5, 40, 0 :: (non-temporal dereferenceable invariant load (s64) from `i64 addrspace(4)* undef`)
$sgpr4_sgpr5 = S_LOAD_DWORDX2_IMM killed $sgpr4_sgpr5, 40, 0 :: (non-temporal dereferenceable invariant load (s64) from `ptr addrspace(4) undef`)
$vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit killed $sgpr0_sgpr1, implicit $sgpr0_sgpr1, implicit $exec
$vgpr2 = V_MOV_B32_e32 killed $sgpr6, implicit $exec, implicit $exec
FLAT_STORE_DWORD killed $vgpr0_vgpr1, killed $vgpr2, 0, 19, implicit $exec, implicit $flat_scr :: (volatile non-temporal store syncscope("agent") seq_cst (s32) into %ir.agent_out)
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/MIR/AMDGPU/target-index-operands.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -7,19 +7,19 @@

@float_gv = internal unnamed_addr addrspace(4) constant [5 x float] [float 0.000000e+00, float 1.000000e+00, float 2.000000e+00, float 3.000000e+00, float 4.000000e+00], align 4

define amdgpu_kernel void @float(float addrspace(1)* %out, i32 %index) #0 {
define amdgpu_kernel void @float(ptr addrspace(1) %out, i32 %index) #0 {
entry:
%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
%1 = load float, float addrspace(4)* %0
store float %1, float addrspace(1)* %out
%0 = getelementptr inbounds [5 x float], ptr addrspace(4) @float_gv, i32 0, i32 %index
%1 = load float, ptr addrspace(4) %0
store float %1, ptr addrspace(1) %out
ret void
}

define amdgpu_kernel void @float2(float addrspace(1)* %out, i32 %index) #0 {
define amdgpu_kernel void @float2(ptr addrspace(1) %out, i32 %index) #0 {
entry:
%0 = getelementptr inbounds [5 x float], [5 x float] addrspace(4)* @float_gv, i32 0, i32 %index
%1 = load float, float addrspace(4)* %0
store float %1, float addrspace(1)* %out
%0 = getelementptr inbounds [5 x float], ptr addrspace(4) @float_gv, i32 0, i32 %index
%1 = load float, ptr addrspace(4) %0
store float %1, ptr addrspace(1) %out
ret void
}
attributes #0 = { nounwind }
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/ARM/cfi-same-value.mir
View file
Original file line number Diff line number Diff line change
@@ -1,12 +1,12 @@
# RUN: llc -mtriple=arm-linux-unknown-gnueabi -run-pass none -o - %s | FileCheck %s

--- |
declare void @dummy_use(i32*, i32)
declare void @dummy_use(ptr, i32)

define void @test_basic() #0 {
entry:
%mem = alloca i32, i32 10
call void @dummy_use(i32* %mem, i32 10)
call void @dummy_use(ptr %mem, i32 10)
ret void
}

Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/ARM/expected-closing-brace.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -16,7 +16,7 @@
ret i32 %.

if.else:
%b = load i32, i32* @G
%b = load i32, ptr @G
%c = add i32 %b, 1
br label %foo
}
Expand Down
14 changes: 7 additions & 7 deletions llvm/test/CodeGen/MIR/ARM/thumb2-sub-sp-t3.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -7,16 +7,16 @@
define void @foo() #0 {
entry:
%v = alloca [4000 x i8], align 1
%s = alloca i8*, align 4
%0 = bitcast [4000 x i8]* %v to i8*
store i8* %0, i8** %s, align 4
%1 = load i8*, i8** %s, align 4
call void @bar(i8* %1)
%s = alloca ptr, align 4
%0 = bitcast ptr %v to ptr
store ptr %0, ptr %s, align 4
%1 = load ptr, ptr %s, align 4
call void @bar(ptr %1)
ret void
}
declare void @bar(i8*) #1
declare void @bar(ptr) #1
; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #2
declare void @llvm.stackprotector(ptr, ptr) #2

attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "min-legal-vector-width"="0" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+fpregs,+neon,+strict-align,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp" "unsafe-fp-math"="false" "use-soft-float"="false" }
attributes #1 = { "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "frame-pointer"="all" "less-precise-fpmad"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="generic" "target-features"="+armv7-a,+d32,+dsp,+fp64,+fpregs,+neon,+strict-align,+thumb-mode,+vfp2,+vfp2sp,+vfp3,+vfp3d16,+vfp3d16sp,+vfp3sp" "unsafe-fp-math"="false" "use-soft-float"="false" }
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/Generic/frame-info.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -7,16 +7,16 @@
define i32 @test(i32 %a) {
entry:
%b = alloca i32
store i32 %a, i32* %b
%c = load i32, i32* %b
store i32 %a, ptr %b
%c = load i32, ptr %b
ret i32 %c
}

define i32 @test2(i32 %a) {
entry:
%b = alloca i32
store i32 %a, i32* %b
%c = load i32, i32* %b
store i32 %a, ptr %b
%c = load i32, ptr %b
ret i32 %c
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/Generic/llvm-ir-error-reported.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -7,10 +7,10 @@
; CHECK: [[@LINE+3]]:15: use of undefined value '%a'
define i32 @foo(i32 %x, i32 %y) {
%z = alloca i32, align 4
store i32 %a, i32* %z, align 4
store i32 %a, ptr %z, align 4
br label %Test
Test:
%m = load i32, i32* %z, align 4
%m = load i32, ptr %z, align 4
%cond = icmp eq i32 %y, %m
br i1 %cond, label %IfEqual, label %IfUnequal
IfEqual:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/Mips/memory-operands.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@

define float @test2() #0 {
entry:
%call = tail call float bitcast (float (...)* @g to float ()*)()
%call = tail call float @g()
call void @__mips16_ret_sf(float %call)
ret float %call
}
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/Mips/setRegClassOrRegBank.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -10,7 +10,7 @@
--- |

declare <4 x i32> @llvm.mips.addvi.w(<4 x i32>, i32 immarg)
define void @add_v4i32_builtin_imm(<4 x i32>* %a, <4 x i32>* %c) { entry: ret void }
define void @add_v4i32_builtin_imm(ptr %a, ptr %c) { entry: ret void }

...
---
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/PowerPC/unordered-implicit-registers.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@
# PR24724

--- |
define signext i32 @main(i32* %p) #0 {
define signext i32 @main(ptr %p) #0 {
entry:
%0 = load i32, i32* %p, align 4
%0 = load i32, ptr %p, align 4
%or = or i32 0, %0
store i32 %or, i32* %p, align 4
store i32 %or, ptr %p, align 4
%lnot.1 = icmp eq i32 undef, 0
%lnot.ext.1 = zext i1 %lnot.1 to i32
%shr.i.1 = lshr i32 2072, %lnot.ext.1
Expand Down
30 changes: 15 additions & 15 deletions llvm/test/CodeGen/MIR/X86/block-address-operands.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -4,48 +4,48 @@

--- |

@addr = global i8* null
@addr = global ptr null

define void @test() {
entry:
store volatile i8* blockaddress(@test, %block), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %block]
store volatile ptr blockaddress(@test, %block), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %block]

block:
ret void
}

define void @test2() {
entry:
store volatile i8* blockaddress(@test2, %"quoted block"), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %"quoted block"]
store volatile ptr blockaddress(@test2, %"quoted block"), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %"quoted block"]

"quoted block":
ret void
}

define void @slot_in_other_function(i8** %addr) {
define void @slot_in_other_function(ptr %addr) {
entry:
store volatile i8* blockaddress(@test3, %0), i8** %addr
store volatile ptr blockaddress(@test3, %0), ptr %addr
ret void
}

define void @test3() {
entry:
store volatile i8* blockaddress(@test3, %0), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %0]
store volatile ptr blockaddress(@test3, %0), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %0]

ret void
}

define void @test4() {
entry:
store volatile i8* blockaddress(@test4, %block), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %block]
store volatile ptr blockaddress(@test4, %block), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %block]

block:
ret void
Expand Down
22 changes: 11 additions & 11 deletions llvm/test/CodeGen/MIR/X86/branch-folder-with-label.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -50,27 +50,27 @@
ret i32 %a
}

define i32 @baz(i32* %out) local_unnamed_addr !dbg !4 {
define i32 @baz(ptr %out) local_unnamed_addr !dbg !4 {
entry:
%0 = load i32, i32* %out, align 4
%0 = load i32, ptr %out, align 4
%call = tail call i32 @foo(i32 %0), !dbg !9
%cmp = icmp slt i32 %call, 0
br i1 %cmp, label %cleanup, label %if.then1

if.then1: ; preds = %entry
store i32 1, i32* %out, align 4
store i32 1, ptr %out, align 4
br label %cleanup

cleanup: ; preds = %if.then1, %entry
%retval.0 = phi i32 [ %call, %entry ], [ 0, %if.then1 ]
ret i32 %retval.0
}

define i32 @test(%struct.bar* nocapture readonly %s) local_unnamed_addr !dbg !11 {
define i32 @test(ptr nocapture readonly %s) local_unnamed_addr !dbg !11 {
entry:
%idx = alloca i32, align 4
call void @llvm.dbg.label(metadata !20), !dbg !21
%call58 = call i32 @baz(i32* nonnull %idx), !dbg !22
%call58 = call i32 @baz(ptr nonnull %idx), !dbg !22
%cmp69 = icmp slt i32 %call58, 0
br i1 %cmp69, label %if.then, label %do.cond.lr.ph.lr.ph

Expand All @@ -79,7 +79,7 @@

retry.loopexit: ; preds = %lor.rhs
call void @llvm.dbg.label(metadata !20), !dbg !21
%call5 = call i32 @baz(i32* nonnull %idx), !dbg !22
%call5 = call i32 @baz(ptr nonnull %idx), !dbg !22
%cmp6 = icmp slt i32 %call5, 0
br i1 %cmp6, label %if.then, label %do.cond

Expand All @@ -88,18 +88,18 @@
ret i32 %call.lcssa

do.cond: ; preds = %retry.loopexit, %do.body.backedge, %do.cond.lr.ph.lr.ph
%0 = load i32, i32* %idx, align 4
%0 = load i32, ptr %idx, align 4
%cmp1 = icmp slt i32 %0, 0
br i1 %cmp1, label %do.body.backedge, label %lor.rhs

lor.rhs: ; preds = %do.cond
%1 = bitcast %struct.bar* %s to i32*
%2 = load i32, i32* %1, align 4
%1 = bitcast ptr %s to ptr
%2 = load i32, ptr %1, align 4
%tobool = icmp eq i32 %2, 0
br i1 %tobool, label %do.body.backedge, label %retry.loopexit

do.body.backedge: ; preds = %lor.rhs, %do.cond
%call = call i32 @baz(i32* nonnull %idx), !dbg !22
%call = call i32 @baz(ptr nonnull %idx), !dbg !22
%cmp = icmp slt i32 %call, 0
br i1 %cmp, label %if.then, label %do.cond
}
Expand All @@ -108,7 +108,7 @@
declare void @llvm.dbg.label(metadata) #0

; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #1
declare void @llvm.stackprotector(ptr, ptr) #1

attributes #0 = { nounwind readnone speculatable }
attributes #1 = { nounwind }
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/callee-saved-info.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -12,18 +12,18 @@
define i32 @func(i32 %a) {
entry:
%b = alloca i32
store i32 %a, i32* %b
store i32 %a, ptr %b
br label %check

check:
%comp = icmp sle i32 %a, 10
br i1 %comp, label %loop, label %exit

loop:
%c = load i32, i32* %b
%c = load i32, ptr %b
%d = call i32 @compute(i32 %c)
%e = sub i32 %d, 1
store i32 %e, i32* %b
store i32 %e, ptr %b
br label %check

exit:
Expand Down
28 changes: 14 additions & 14 deletions llvm/test/CodeGen/MIR/X86/diexpr-win32.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -65,23 +65,23 @@
target datalayout = "e-m:x-p:32:32-i64:64-f80:32-n8:16:32-a:0:32-S32"
target triple = "i386-pc-windows-msvc19.0.24215"

%struct.string = type { i32, i32, i8* }
%struct.string = type { i32, i32, ptr }

define void @fun(%struct.string* noalias sret(%struct.string) %agg.result, %struct.string* noalias %str) !dbg !12 {
define void @fun(ptr noalias sret(%struct.string) %agg.result, ptr noalias %str) !dbg !12 {
entry:
call void @llvm.dbg.value(metadata %struct.string* %agg.result, metadata !23, metadata !24), !dbg !25
call void @llvm.dbg.value(metadata %struct.string* %str, metadata !26, metadata !28), !dbg !25
%call = call dereferenceable(12) %struct.string* @getString(), !dbg !29
%0 = bitcast %struct.string* %agg.result to i8*, !dbg !29
%1 = bitcast %struct.string* %call to i8*, !dbg !29
call void @llvm.memcpy.p0i8.p0i8.i32(i8* %0, i8* %1, i32 12, i32 4, i1 false), !dbg !29
call void @llvm.dbg.value(metadata ptr %agg.result, metadata !23, metadata !24), !dbg !25
call void @llvm.dbg.value(metadata ptr %str, metadata !26, metadata !28), !dbg !25
%call = call dereferenceable(12) ptr @getString(), !dbg !29
%0 = bitcast ptr %agg.result to ptr, !dbg !29
%1 = bitcast ptr %call to ptr, !dbg !29
call void @llvm.memcpy.p0.p0.i32(ptr %0, ptr %1, i32 12, i32 4, i1 false), !dbg !29
ret void, !dbg !30
}

define i32 @len(%struct.string* %s, i32 %acc) !dbg !31 {
define i32 @len(ptr %s, i32 %acc) !dbg !31 {
entry:
%0 = bitcast %struct.string* %s to i32*
%bytes = load i32, i32* %0, !dbg !34
%0 = bitcast ptr %s to ptr
%bytes = load i32, ptr %0, !dbg !34
call void @llvm.dbg.declare(metadata i32 %bytes, metadata !35, metadata !28), !dbg !34
%1 = add i32 %bytes, %acc, !dbg !36
ret i32 %1, !dbg !36
Expand All @@ -93,13 +93,13 @@
; Function Attrs: nounwind readnone speculatable
declare void @llvm.dbg.value(metadata, metadata, metadata) #0

declare dereferenceable(12) %struct.string* @getString()
declare dereferenceable(12) ptr @getString()

; Function Attrs: argmemonly nounwind
declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture readonly, i32, i32, i1) #1
declare void @llvm.memcpy.p0.p0.i32(ptr nocapture writeonly, ptr nocapture readonly, i32, i32, i1) #1

; Function Attrs: nounwind
declare void @llvm.stackprotector(i8*, i8**) #2
declare void @llvm.stackprotector(ptr, ptr) #2

attributes #0 = { nounwind readnone speculatable }
attributes #1 = { argmemonly nounwind }
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/duplicate-memory-operand-flag.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@

--- |

define i32 @volatile_inc(i32* %x) {
define i32 @volatile_inc(ptr %x) {
entry:
%0 = load volatile i32, i32* %x
%0 = load volatile i32, ptr %x
%1 = add i32 %0, 1
store volatile i32 %1, i32* %x
store volatile i32 %1, ptr %x
ret i32 %1
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-align-in-memory-operand.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@

--- |

define void @memory_alignment(<8 x float>* %vec) {
define void @memory_alignment(ptr %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v = load <8 x float>, ptr %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
store <8 x float> %v2, ptr %vec
ret void
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-alignment-after-align-in-memory-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@

--- |

define void @memory_alignment(<8 x float>* %vec) {
define void @memory_alignment(ptr %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v = load <8 x float>, ptr %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
store <8 x float> %v2, ptr %vec
ret void
}

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/X86/expected-block-reference-in-blockaddress.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -3,13 +3,13 @@

--- |

@addr = global i8* null
@addr = global ptr null

define void @test() {
entry:
store volatile i8* blockaddress(@test, %block), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %block]
store volatile ptr blockaddress(@test, %block), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %block]

block:
ret void
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-comma-after-memory-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@

--- |

define void @test(i32* %a) {
define void @test(ptr %a) {
entry2:
%b = load i32, i32* %a
%b = load i32, ptr %a
%c = add i32 %b, 1
store i32 %c, i32* %a
store i32 %c, ptr %a
ret void
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-different-implicit-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @foo(i32* %p) {
define i32 @foo(ptr %p) {
entry:
%a = load i32, i32* %p
%a = load i32, ptr %p
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-different-implicit-register-flag.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @foo(i32* %p) {
define i32 @foo(ptr %p) {
entry:
%a = load i32, i32* %p
%a = load i32, ptr %p
%0 = icmp sle i32 %a, 10
br i1 %0, label %less, label %exit

Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/X86/expected-function-reference-after-blockaddress.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,13 +2,13 @@

--- |

@addr = global i8* null
@addr = global ptr null

define void @test() {
entry:
store volatile i8* blockaddress(@test, %block), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %block]
store volatile ptr blockaddress(@test, %block), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %block]

block:
ret void
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/MIR/X86/expected-global-value-after-blockaddress.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,13 +2,13 @@

--- |

@addr = global i8* null
@addr = global ptr null

define void @test() {
entry:
store volatile i8* blockaddress(@test, %block), i8** @addr
%val = load volatile i8*, i8** @addr
indirectbr i8* %val, [label %block]
store volatile ptr blockaddress(@test, %block), ptr @addr
%val = load volatile ptr, ptr @addr
indirectbr ptr %val, [label %block]

block:
ret void
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/X86/expected-integer-after-offset-sign.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,7 @@

define i32 @inc() {
entry:
%a = load i32, i32* @G
%a = load i32, ptr @G
%b = add i32 %a, 1
ret i32 %b
}
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-load-or-store-in-memory-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @test(i32* %a) {
define i32 @test(ptr %a) {
entry:
%b = load i32, i32* %a
%b = load i32, ptr %a
ret i32 %b
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-debug-location.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@
define i32 @test(i32 %x) #0 !dbg !4 {
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !12, metadata !13), !dbg !14
%0 = load i32, i32* %x.addr, align 4, !dbg !15
store i32 %x, ptr %x.addr, align 4
call void @llvm.dbg.declare(metadata ptr %x.addr, metadata !12, metadata !13), !dbg !14
%0 = load i32, ptr %x.addr, align 4, !dbg !15
ret i32 %0, !dbg !15
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-metadata-node-after-exclaim.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@
define i32 @test(i32 %x) #0 !dbg !4 {
entry:
%x.addr = alloca i32, align 4
store i32 %x, i32* %x.addr, align 4
call void @llvm.dbg.declare(metadata i32* %x.addr, metadata !12, metadata !13), !dbg !14
%0 = load i32, i32* %x.addr, align 4, !dbg !15
store i32 %x, ptr %x.addr, align 4
call void @llvm.dbg.declare(metadata ptr %x.addr, metadata !12, metadata !13), !dbg !14
%0 = load i32, ptr %x.addr, align 4, !dbg !15
ret i32 %0, !dbg !15
}

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-metadata-node-in-stack-object.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -3,8 +3,8 @@
define i32 @test(i32 %x) {
entry:
%xa = alloca i32, align 4
store i32 %x, i32* %xa, align 4
%0 = load i32, i32* %xa, align 4
store i32 %x, ptr %xa, align 4
%0 = load i32, ptr %xa, align 4
ret i32 %0
}
...
Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -10,18 +10,18 @@
define i32 @func(i32 %a) {
entry:
%b = alloca i32
store i32 %a, i32* %b
store i32 %a, ptr %b
br label %check

check:
%comp = icmp sle i32 %a, 10
br i1 %comp, label %loop, label %exit

loop:
%c = load i32, i32* %b
%c = load i32, ptr %b
%d = call i32 @compute(i32 %c)
%e = sub i32 %d, 1
store i32 %e, i32* %b
store i32 %e, ptr %b
br label %check

exit:
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-number-after-bb.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @foo(i32* %p) {
define i32 @foo(ptr %p) {
entry:
%a = load i32, i32* %p
%a = load i32, ptr %p
%b = icmp sle i32 %a, 10
br i1 %b, label %yes, label %nah

Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-pointer-value-in-memory-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @test(i32* %a) {
define i32 @test(ptr %a) {
entry:
%b = load i32, i32* %a
%b = load i32, ptr %a
ret i32 %b
}

Expand Down
6 changes: 3 additions & 3 deletions llvm/test/CodeGen/MIR/X86/expected-positive-alignment-after-align.mir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,11 +2,11 @@

--- |

define void @memory_alignment(<8 x float>* %vec) {
define void @memory_alignment(ptr %vec) {
entry:
%v = load <8 x float>, <8 x float>* %vec
%v = load <8 x float>, ptr %vec
%v2 = insertelement <8 x float> %v, float 0.0, i32 4
store <8 x float> %v2, <8 x float>* %vec
store <8 x float> %v2, ptr %vec
ret void
}

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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation.mir
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Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @test(i32* %a) {
define i32 @test(ptr %a) {
entry:
%b = load i32, i32* %a
%b = load i32, ptr %a
ret i32 %b
}

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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-size-integer-after-memory-operation2.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @test(i32* %a) {
define i32 @test(ptr %a) {
entry:
%b = load i32, i32* %a
%b = load i32, ptr %a
ret i32 %b
}

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24 changes: 12 additions & 12 deletions llvm/test/CodeGen/MIR/X86/expected-stack-object.mir
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Expand Up @@ -3,27 +3,27 @@

--- |
@.str = private unnamed_addr constant [4 x i8] c"%s\0A\00", align 1
@__stack_chk_guard = external global i8*
@__stack_chk_guard = external global ptr

define i32 @test() #0 {
entry:
%StackGuardSlot = alloca i8*
%StackGuard = load i8*, i8** @__stack_chk_guard
call void @llvm.stackprotector(i8* %StackGuard, i8** %StackGuardSlot)
%test = alloca i8*, align 8
%StackGuardSlot = alloca ptr
%StackGuard = load ptr, ptr @__stack_chk_guard
call void @llvm.stackprotector(ptr %StackGuard, ptr %StackGuardSlot)
%test = alloca ptr, align 8
%a = alloca i8, i64 5
store i8* %a, i8** %test, align 8
%b = load i8*, i8** %test, align 8
%call = call i32 (i8*, ...) @printf(i8* getelementptr inbounds ([4 x i8], [4 x i8]* @.str, i32 0, i32 0), i8* %b)
call void @llvm.stackprotectorcheck(i8** @__stack_chk_guard)
store ptr %a, ptr %test, align 8
%b = load ptr, ptr %test, align 8
%call = call i32 (ptr, ...) @printf(ptr @.str, ptr %b)
call void @llvm.stackprotectorcheck(ptr @__stack_chk_guard)
ret i32 %call
}

declare i32 @printf(i8*, ...)
declare i32 @printf(ptr, ...)

declare void @llvm.stackprotector(i8*, i8**) #1
declare void @llvm.stackprotector(ptr, ptr) #1

declare void @llvm.stackprotectorcheck(i8**) #2
declare void @llvm.stackprotectorcheck(ptr) #2

attributes #0 = { ssp "stack-protector-buffer-size"="5" }
attributes #1 = { nounwind }
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2 changes: 1 addition & 1 deletion llvm/test/CodeGen/MIR/X86/expected-target-flag-name.mir
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Expand Up @@ -6,7 +6,7 @@

define i32 @inc() {
entry:
%a = load i32, i32* @G
%a = load i32, ptr @G
%b = add i32 %a, 1
ret i32 %b
}
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4 changes: 2 additions & 2 deletions llvm/test/CodeGen/MIR/X86/expected-value-in-memory-operand.mir
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Original file line number Diff line number Diff line change
Expand Up @@ -2,9 +2,9 @@

--- |

define i32 @test(i32* %a) {
define i32 @test(ptr %a) {
entry:
%b = load i32, i32* %a
%b = load i32, ptr %a
ret i32 %b
}

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