96 changes: 48 additions & 48 deletions llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vwmulu.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -414,8 +414,8 @@ define <2 x i16> @vwmulu_vx_v2i16(<2 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <2 x i8>, <2 x i8>* %x
%b = insertelement <2 x i8> undef, i8 %y, i32 0
%c = shufflevector <2 x i8> %b, <2 x i8> undef, <2 x i32> zeroinitializer
%b = insertelement <2 x i8> poison, i8 %y, i32 0
%c = shufflevector <2 x i8> %b, <2 x i8> poison, <2 x i32> zeroinitializer
%d = zext <2 x i8> %a to <2 x i16>
%e = zext <2 x i8> %c to <2 x i16>
%f = mul <2 x i16> %d, %e
Expand All @@ -430,8 +430,8 @@ define <4 x i16> @vwmulu_vx_v4i16(<4 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <4 x i8>, <4 x i8>* %x
%b = insertelement <4 x i8> undef, i8 %y, i32 0
%c = shufflevector <4 x i8> %b, <4 x i8> undef, <4 x i32> zeroinitializer
%b = insertelement <4 x i8> poison, i8 %y, i32 0
%c = shufflevector <4 x i8> %b, <4 x i8> poison, <4 x i32> zeroinitializer
%d = zext <4 x i8> %a to <4 x i16>
%e = zext <4 x i8> %c to <4 x i16>
%f = mul <4 x i16> %d, %e
Expand All @@ -446,8 +446,8 @@ define <2 x i32> @vwmulu_vx_v2i32(<2 x i16>* %x, i16 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <2 x i16>, <2 x i16>* %x
%b = insertelement <2 x i16> undef, i16 %y, i32 0
%c = shufflevector <2 x i16> %b, <2 x i16> undef, <2 x i32> zeroinitializer
%b = insertelement <2 x i16> poison, i16 %y, i32 0
%c = shufflevector <2 x i16> %b, <2 x i16> poison, <2 x i32> zeroinitializer
%d = zext <2 x i16> %a to <2 x i32>
%e = zext <2 x i16> %c to <2 x i32>
%f = mul <2 x i32> %d, %e
Expand All @@ -462,8 +462,8 @@ define <8 x i16> @vwmulu_vx_v8i16(<8 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <8 x i8>, <8 x i8>* %x
%b = insertelement <8 x i8> undef, i8 %y, i32 0
%c = shufflevector <8 x i8> %b, <8 x i8> undef, <8 x i32> zeroinitializer
%b = insertelement <8 x i8> poison, i8 %y, i32 0
%c = shufflevector <8 x i8> %b, <8 x i8> poison, <8 x i32> zeroinitializer
%d = zext <8 x i8> %a to <8 x i16>
%e = zext <8 x i8> %c to <8 x i16>
%f = mul <8 x i16> %d, %e
Expand All @@ -478,8 +478,8 @@ define <4 x i32> @vwmulu_vx_v4i32(<4 x i16>* %x, i16 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <4 x i16>, <4 x i16>* %x
%b = insertelement <4 x i16> undef, i16 %y, i32 0
%c = shufflevector <4 x i16> %b, <4 x i16> undef, <4 x i32> zeroinitializer
%b = insertelement <4 x i16> poison, i16 %y, i32 0
%c = shufflevector <4 x i16> %b, <4 x i16> poison, <4 x i32> zeroinitializer
%d = zext <4 x i16> %a to <4 x i32>
%e = zext <4 x i16> %c to <4 x i32>
%f = mul <4 x i32> %d, %e
Expand All @@ -494,8 +494,8 @@ define <2 x i64> @vwmulu_vx_v2i64(<2 x i32>* %x, i32 %y) {
; CHECK-NEXT: vwmulu.vx v8, v9, a1
; CHECK-NEXT: ret
%a = load <2 x i32>, <2 x i32>* %x
%b = insertelement <2 x i32> undef, i32 %y, i64 0
%c = shufflevector <2 x i32> %b, <2 x i32> undef, <2 x i32> zeroinitializer
%b = insertelement <2 x i32> poison, i32 %y, i64 0
%c = shufflevector <2 x i32> %b, <2 x i32> poison, <2 x i32> zeroinitializer
%d = zext <2 x i32> %a to <2 x i64>
%e = zext <2 x i32> %c to <2 x i64>
%f = mul <2 x i64> %d, %e
Expand All @@ -510,8 +510,8 @@ define <16 x i16> @vwmulu_vx_v16i16(<16 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v10, a1
; CHECK-NEXT: ret
%a = load <16 x i8>, <16 x i8>* %x
%b = insertelement <16 x i8> undef, i8 %y, i32 0
%c = shufflevector <16 x i8> %b, <16 x i8> undef, <16 x i32> zeroinitializer
%b = insertelement <16 x i8> poison, i8 %y, i32 0
%c = shufflevector <16 x i8> %b, <16 x i8> poison, <16 x i32> zeroinitializer
%d = zext <16 x i8> %a to <16 x i16>
%e = zext <16 x i8> %c to <16 x i16>
%f = mul <16 x i16> %d, %e
Expand All @@ -526,8 +526,8 @@ define <8 x i32> @vwmulu_vx_v8i32(<8 x i16>* %x, i16 %y) {
; CHECK-NEXT: vwmulu.vx v8, v10, a1
; CHECK-NEXT: ret
%a = load <8 x i16>, <8 x i16>* %x
%b = insertelement <8 x i16> undef, i16 %y, i32 0
%c = shufflevector <8 x i16> %b, <8 x i16> undef, <8 x i32> zeroinitializer
%b = insertelement <8 x i16> poison, i16 %y, i32 0
%c = shufflevector <8 x i16> %b, <8 x i16> poison, <8 x i32> zeroinitializer
%d = zext <8 x i16> %a to <8 x i32>
%e = zext <8 x i16> %c to <8 x i32>
%f = mul <8 x i32> %d, %e
Expand All @@ -542,8 +542,8 @@ define <4 x i64> @vwmulu_vx_v4i64(<4 x i32>* %x, i32 %y) {
; CHECK-NEXT: vwmulu.vx v8, v10, a1
; CHECK-NEXT: ret
%a = load <4 x i32>, <4 x i32>* %x
%b = insertelement <4 x i32> undef, i32 %y, i64 0
%c = shufflevector <4 x i32> %b, <4 x i32> undef, <4 x i32> zeroinitializer
%b = insertelement <4 x i32> poison, i32 %y, i64 0
%c = shufflevector <4 x i32> %b, <4 x i32> poison, <4 x i32> zeroinitializer
%d = zext <4 x i32> %a to <4 x i64>
%e = zext <4 x i32> %c to <4 x i64>
%f = mul <4 x i64> %d, %e
Expand All @@ -559,8 +559,8 @@ define <32 x i16> @vwmulu_vx_v32i16(<32 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v12, a1
; CHECK-NEXT: ret
%a = load <32 x i8>, <32 x i8>* %x
%b = insertelement <32 x i8> undef, i8 %y, i32 0
%c = shufflevector <32 x i8> %b, <32 x i8> undef, <32 x i32> zeroinitializer
%b = insertelement <32 x i8> poison, i8 %y, i32 0
%c = shufflevector <32 x i8> %b, <32 x i8> poison, <32 x i32> zeroinitializer
%d = zext <32 x i8> %a to <32 x i16>
%e = zext <32 x i8> %c to <32 x i16>
%f = mul <32 x i16> %d, %e
Expand All @@ -575,8 +575,8 @@ define <16 x i32> @vwmulu_vx_v16i32(<16 x i16>* %x, i16 %y) {
; CHECK-NEXT: vwmulu.vx v8, v12, a1
; CHECK-NEXT: ret
%a = load <16 x i16>, <16 x i16>* %x
%b = insertelement <16 x i16> undef, i16 %y, i32 0
%c = shufflevector <16 x i16> %b, <16 x i16> undef, <16 x i32> zeroinitializer
%b = insertelement <16 x i16> poison, i16 %y, i32 0
%c = shufflevector <16 x i16> %b, <16 x i16> poison, <16 x i32> zeroinitializer
%d = zext <16 x i16> %a to <16 x i32>
%e = zext <16 x i16> %c to <16 x i32>
%f = mul <16 x i32> %d, %e
Expand All @@ -591,8 +591,8 @@ define <8 x i64> @vwmulu_vx_v8i64(<8 x i32>* %x, i32 %y) {
; CHECK-NEXT: vwmulu.vx v8, v12, a1
; CHECK-NEXT: ret
%a = load <8 x i32>, <8 x i32>* %x
%b = insertelement <8 x i32> undef, i32 %y, i64 0
%c = shufflevector <8 x i32> %b, <8 x i32> undef, <8 x i32> zeroinitializer
%b = insertelement <8 x i32> poison, i32 %y, i64 0
%c = shufflevector <8 x i32> %b, <8 x i32> poison, <8 x i32> zeroinitializer
%d = zext <8 x i32> %a to <8 x i64>
%e = zext <8 x i32> %c to <8 x i64>
%f = mul <8 x i64> %d, %e
Expand All @@ -608,8 +608,8 @@ define <64 x i16> @vwmulu_vx_v64i16(<64 x i8>* %x, i8 %y) {
; CHECK-NEXT: vwmulu.vx v8, v16, a1
; CHECK-NEXT: ret
%a = load <64 x i8>, <64 x i8>* %x
%b = insertelement <64 x i8> undef, i8 %y, i32 0
%c = shufflevector <64 x i8> %b, <64 x i8> undef, <64 x i32> zeroinitializer
%b = insertelement <64 x i8> poison, i8 %y, i32 0
%c = shufflevector <64 x i8> %b, <64 x i8> poison, <64 x i32> zeroinitializer
%d = zext <64 x i8> %a to <64 x i16>
%e = zext <64 x i8> %c to <64 x i16>
%f = mul <64 x i16> %d, %e
Expand All @@ -625,8 +625,8 @@ define <32 x i32> @vwmulu_vx_v32i32(<32 x i16>* %x, i16 %y) {
; CHECK-NEXT: vwmulu.vx v8, v16, a1
; CHECK-NEXT: ret
%a = load <32 x i16>, <32 x i16>* %x
%b = insertelement <32 x i16> undef, i16 %y, i32 0
%c = shufflevector <32 x i16> %b, <32 x i16> undef, <32 x i32> zeroinitializer
%b = insertelement <32 x i16> poison, i16 %y, i32 0
%c = shufflevector <32 x i16> %b, <32 x i16> poison, <32 x i32> zeroinitializer
%d = zext <32 x i16> %a to <32 x i32>
%e = zext <32 x i16> %c to <32 x i32>
%f = mul <32 x i32> %d, %e
Expand All @@ -641,8 +641,8 @@ define <16 x i64> @vwmulu_vx_v16i64(<16 x i32>* %x, i32 %y) {
; CHECK-NEXT: vwmulu.vx v8, v16, a1
; CHECK-NEXT: ret
%a = load <16 x i32>, <16 x i32>* %x
%b = insertelement <16 x i32> undef, i32 %y, i64 0
%c = shufflevector <16 x i32> %b, <16 x i32> undef, <16 x i32> zeroinitializer
%b = insertelement <16 x i32> poison, i32 %y, i64 0
%c = shufflevector <16 x i32> %b, <16 x i32> poison, <16 x i32> zeroinitializer
%d = zext <16 x i32> %a to <16 x i64>
%e = zext <16 x i32> %c to <16 x i64>
%f = mul <16 x i64> %d, %e
Expand All @@ -660,8 +660,8 @@ define <8 x i16> @vwmulu_vx_v8i16_i8(<8 x i8>* %x, i8* %y) {
%a = load <8 x i8>, <8 x i8>* %x
%b = load i8, i8* %y
%c = zext i8 %b to i16
%d = insertelement <8 x i16> undef, i16 %c, i32 0
%e = shufflevector <8 x i16> %d, <8 x i16> undef, <8 x i32> zeroinitializer
%d = insertelement <8 x i16> poison, i16 %c, i32 0
%e = shufflevector <8 x i16> %d, <8 x i16> poison, <8 x i32> zeroinitializer
%f = zext <8 x i8> %a to <8 x i16>
%g = mul <8 x i16> %e, %f
ret <8 x i16> %g
Expand All @@ -679,8 +679,8 @@ define <8 x i16> @vwmulu_vx_v8i16_i16(<8 x i8>* %x, i16* %y) {
; CHECK-NEXT: ret
%a = load <8 x i8>, <8 x i8>* %x
%b = load i16, i16* %y
%d = insertelement <8 x i16> undef, i16 %b, i32 0
%e = shufflevector <8 x i16> %d, <8 x i16> undef, <8 x i32> zeroinitializer
%d = insertelement <8 x i16> poison, i16 %b, i32 0
%e = shufflevector <8 x i16> %d, <8 x i16> poison, <8 x i32> zeroinitializer
%f = zext <8 x i8> %a to <8 x i16>
%g = mul <8 x i16> %e, %f
ret <8 x i16> %g
Expand All @@ -697,8 +697,8 @@ define <4 x i32> @vwmulu_vx_v4i32_i8(<4 x i16>* %x, i8* %y) {
%a = load <4 x i16>, <4 x i16>* %x
%b = load i8, i8* %y
%c = zext i8 %b to i32
%d = insertelement <4 x i32> undef, i32 %c, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> undef, <4 x i32> zeroinitializer
%d = insertelement <4 x i32> poison, i32 %c, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> poison, <4 x i32> zeroinitializer
%f = zext <4 x i16> %a to <4 x i32>
%g = mul <4 x i32> %e, %f
ret <4 x i32> %g
Expand All @@ -715,8 +715,8 @@ define <4 x i32> @vwmulu_vx_v4i32_i16(<4 x i16>* %x, i16* %y) {
%a = load <4 x i16>, <4 x i16>* %x
%b = load i16, i16* %y
%c = zext i16 %b to i32
%d = insertelement <4 x i32> undef, i32 %c, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> undef, <4 x i32> zeroinitializer
%d = insertelement <4 x i32> poison, i32 %c, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> poison, <4 x i32> zeroinitializer
%f = zext <4 x i16> %a to <4 x i32>
%g = mul <4 x i32> %e, %f
ret <4 x i32> %g
Expand All @@ -734,8 +734,8 @@ define <4 x i32> @vwmulu_vx_v4i32_i32(<4 x i16>* %x, i32* %y) {
; CHECK-NEXT: ret
%a = load <4 x i16>, <4 x i16>* %x
%b = load i32, i32* %y
%d = insertelement <4 x i32> undef, i32 %b, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> undef, <4 x i32> zeroinitializer
%d = insertelement <4 x i32> poison, i32 %b, i32 0
%e = shufflevector <4 x i32> %d, <4 x i32> poison, <4 x i32> zeroinitializer
%f = zext <4 x i16> %a to <4 x i32>
%g = mul <4 x i32> %e, %f
ret <4 x i32> %g
Expand Down Expand Up @@ -772,8 +772,8 @@ define <2 x i64> @vwmulu_vx_v2i64_i8(<2 x i32>* %x, i8* %y) {
%a = load <2 x i32>, <2 x i32>* %x
%b = load i8, i8* %y
%c = zext i8 %b to i64
%d = insertelement <2 x i64> undef, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> undef, <2 x i32> zeroinitializer
%d = insertelement <2 x i64> poison, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> poison, <2 x i32> zeroinitializer
%f = zext <2 x i32> %a to <2 x i64>
%g = mul <2 x i64> %e, %f
ret <2 x i64> %g
Expand Down Expand Up @@ -810,8 +810,8 @@ define <2 x i64> @vwmulu_vx_v2i64_i16(<2 x i32>* %x, i16* %y) {
%a = load <2 x i32>, <2 x i32>* %x
%b = load i16, i16* %y
%c = zext i16 %b to i64
%d = insertelement <2 x i64> undef, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> undef, <2 x i32> zeroinitializer
%d = insertelement <2 x i64> poison, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> poison, <2 x i32> zeroinitializer
%f = zext <2 x i32> %a to <2 x i64>
%g = mul <2 x i64> %e, %f
ret <2 x i64> %g
Expand Down Expand Up @@ -848,8 +848,8 @@ define <2 x i64> @vwmulu_vx_v2i64_i32(<2 x i32>* %x, i32* %y) {
%a = load <2 x i32>, <2 x i32>* %x
%b = load i32, i32* %y
%c = zext i32 %b to i64
%d = insertelement <2 x i64> undef, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> undef, <2 x i32> zeroinitializer
%d = insertelement <2 x i64> poison, i64 %c, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> poison, <2 x i32> zeroinitializer
%f = zext <2 x i32> %a to <2 x i64>
%g = mul <2 x i64> %e, %f
ret <2 x i64> %g
Expand Down Expand Up @@ -885,8 +885,8 @@ define <2 x i64> @vwmulu_vx_v2i64_i64(<2 x i32>* %x, i64* %y) {
; RV64-NEXT: ret
%a = load <2 x i32>, <2 x i32>* %x
%b = load i64, i64* %y
%d = insertelement <2 x i64> undef, i64 %b, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> undef, <2 x i32> zeroinitializer
%d = insertelement <2 x i64> poison, i64 %b, i64 0
%e = shufflevector <2 x i64> %d, <2 x i64> poison, <2 x i32> zeroinitializer
%f = zext <2 x i32> %a to <2 x i64>
%g = mul <2 x i64> %e, %f
ret <2 x i64> %g
Expand Down