248 changes: 124 additions & 124 deletions llvm/test/CodeGen/PowerPC/urem-vector-lkk.ll
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6 changes: 3 additions & 3 deletions llvm/test/CodeGen/PowerPC/vec-min-max.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -246,9 +246,9 @@ define i128 @invalidv1i128(<2 x i128> %v1, <2 x i128> %v2) {
; CHECK-NEXT: xxswapd 1, 34
; CHECK-NEXT: cmpld 4, 3
; CHECK-NEXT: cmpd 1, 4, 3
; CHECK-NEXT: mfvsrd 3, 0
; CHECK-NEXT: mffprd 3, 0
; CHECK-NEXT: crandc 20, 4, 2
; CHECK-NEXT: mfvsrd 4, 1
; CHECK-NEXT: mffprd 4, 1
; CHECK-NEXT: cmpld 1, 4, 3
; CHECK-NEXT: bc 12, 20, .LBB12_3
; CHECK-NEXT: # %bb.1:
Expand All @@ -259,7 +259,7 @@ define i128 @invalidv1i128(<2 x i128> %v1, <2 x i128> %v2) {
; CHECK-NEXT: .LBB12_3:
; CHECK-NEXT: xxswapd 0, 34
; CHECK-NEXT: mfvsrd 4, 34
; CHECK-NEXT: mfvsrd 3, 0
; CHECK-NEXT: mffprd 3, 0
; CHECK-NEXT: blr
;
; NOP8VEC-LABEL: invalidv1i128:
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/vec-trunc.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -93,7 +93,7 @@ define void @test2i8(<2 x i8>* nocapture %Sink, <2 x i16>* nocapture readonly %S
; CHECK-NEXT: lvx v2, 0, r4
; CHECK-NEXT: vpkuhum v2, v2, v2
; CHECK-NEXT: xxswapd vs0, v2
; CHECK-NEXT: mfvsrd r4, f0
; CHECK-NEXT: mffprd r4, f0
; CHECK-NEXT: clrldi r4, r4, 48
; CHECK-NEXT: sth r4, 0(r3)
; CHECK-NEXT: blr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/vec_add_sub_doubleword.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -36,7 +36,7 @@ define <2 x i64> @increment_by_one(<2 x i64> %x) nounwind {
define <2 x i64> @increment_by_val(<2 x i64> %x, i64 %val) nounwind {
; VSX-LABEL: increment_by_val:
; VSX: # %bb.0:
; VSX-NEXT: mtvsrd 0, 5
; VSX-NEXT: mtfprd 0, 5
; VSX-NEXT: xxspltd 35, 0, 0
; VSX-NEXT: vaddudm 2, 2, 3
; VSX-NEXT: blr
Expand Down Expand Up @@ -98,7 +98,7 @@ define <2 x i64> @decrement_by_one(<2 x i64> %x) nounwind {
define <2 x i64> @decrement_by_val(<2 x i64> %x, i64 %val) nounwind {
; VSX-LABEL: decrement_by_val:
; VSX: # %bb.0:
; VSX-NEXT: mtvsrd 0, 5
; VSX-NEXT: mtfprd 0, 5
; VSX-NEXT: xxspltd 35, 0, 0
; VSX-NEXT: vsubudm 2, 2, 3
; VSX-NEXT: blr
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/vec_add_sub_quadword.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -45,8 +45,8 @@ define <1 x i128> @increment_by_one(<1 x i128> %x) nounwind {
define <1 x i128> @increment_by_val(<1 x i128> %x, i128 %val) nounwind {
; VSX-LABEL: increment_by_val:
; VSX: # %bb.0:
; VSX-NEXT: mtvsrd 0, 6
; VSX-NEXT: mtvsrd 1, 5
; VSX-NEXT: mtfprd 0, 6
; VSX-NEXT: mtfprd 1, 5
; VSX-NEXT: xxmrghd 35, 1, 0
; VSX-NEXT: vadduqm 2, 2, 3
; VSX-NEXT: blr
Expand Down Expand Up @@ -96,8 +96,8 @@ define <1 x i128> @decrement_by_one(<1 x i128> %x) nounwind {
define <1 x i128> @decrement_by_val(<1 x i128> %x, i128 %val) nounwind {
; VSX-LABEL: decrement_by_val:
; VSX: # %bb.0:
; VSX-NEXT: mtvsrd 0, 6
; VSX-NEXT: mtvsrd 1, 5
; VSX-NEXT: mtfprd 0, 6
; VSX-NEXT: mtfprd 1, 5
; VSX-NEXT: xxmrghd 35, 1, 0
; VSX-NEXT: vsubuqm 2, 2, 3
; VSX-NEXT: blr
Expand Down
612 changes: 306 additions & 306 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i16_elts.ll
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12 changes: 6 additions & 6 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i64_elts.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -12,7 +12,7 @@
define <2 x i64> @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
Expand All @@ -21,7 +21,7 @@ define <2 x i64> @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxmrglw vs0, v2, v2
; CHECK-P9-NEXT: xvcvspdp vs0, vs0
Expand All @@ -30,7 +30,7 @@ define <2 x i64> @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
;
; CHECK-BE-LABEL: test2elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs0
; CHECK-BE-NEXT: xvcvspdp vs0, vs0
; CHECK-BE-NEXT: xvcvdpuxds v2, vs0
Expand Down Expand Up @@ -311,7 +311,7 @@ entry:
define <2 x i64> @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw vs0, v2, v2
; CHECK-P8-NEXT: xvcvspdp vs0, vs0
Expand All @@ -320,7 +320,7 @@ define <2 x i64> @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
;
; CHECK-P9-LABEL: test2elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxmrglw vs0, v2, v2
; CHECK-P9-NEXT: xvcvspdp vs0, vs0
Expand All @@ -329,7 +329,7 @@ define <2 x i64> @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
;
; CHECK-BE-LABEL: test2elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xxmrghw vs0, vs0, vs0
; CHECK-BE-NEXT: xvcvspdp vs0, vs0
; CHECK-BE-NEXT: xvcvdpuxds v2, vs0
Expand Down
624 changes: 312 additions & 312 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp32_to_i8_elts.ll
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592 changes: 296 additions & 296 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i16_elts.ll
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20 changes: 10 additions & 10 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -15,15 +15,15 @@ define i64 @test2elt(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xscvdpuxws f1, v2
; CHECK-P8-NEXT: xscvdpuxws f0, f0
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: mffprwz r3, f1
; CHECK-P8-NEXT: mffprwz r4, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mtfprd f1, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: vmrglw v2, v2, v3
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
Expand Down Expand Up @@ -309,15 +309,15 @@ define i64 @test2elt_signed(<2 x double> %a) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: xscvdpsxws f1, v2
; CHECK-P8-NEXT: xscvdpsxws f0, f0
; CHECK-P8-NEXT: mfvsrwz r3, f1
; CHECK-P8-NEXT: mfvsrwz r4, f0
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtvsrd f1, r4
; CHECK-P8-NEXT: mffprwz r3, f1
; CHECK-P8-NEXT: mffprwz r4, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mtfprd f1, r4
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxswapd v3, vs1
; CHECK-P8-NEXT: vmrglw v2, v2, v3
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
Expand Down
596 changes: 298 additions & 298 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp64_to_i8_elts.ll
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20 changes: 10 additions & 10 deletions llvm/test/CodeGen/PowerPC/vec_conv_fp_to_i_4byte_elts.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -12,26 +12,26 @@
define i64 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xvcvspuxws vs0, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xvcvspuxws vs0, v2
; CHECK-P9-NEXT: mfvsrld r3, vs0
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xvcvspuxws vs0, vs0
; CHECK-BE-NEXT: mfvsrd r3, f0
; CHECK-BE-NEXT: mffprd r3, f0
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x float>
Expand Down Expand Up @@ -159,26 +159,26 @@ entry:
define i64 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xvcvspsxws vs0, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xvcvspsxws vs0, v2
; CHECK-P9-NEXT: mfvsrld r3, vs0
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xvcvspsxws vs0, vs0
; CHECK-BE-NEXT: mfvsrd r3, f0
; CHECK-BE-NEXT: mffprd r3, f0
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x float>
Expand Down
32 changes: 16 additions & 16 deletions llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
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Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,12 @@
define i64 @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: clrldi r4, r3, 48
; CHECK-P8-NEXT: rldicl r3, r3, 48, 48
; CHECK-P8-NEXT: rlwinm r4, r4, 0, 16, 31
; CHECK-P8-NEXT: rlwinm r3, r3, 0, 16, 31
; CHECK-P8-NEXT: clrlwi r4, r4, 16
; CHECK-P8-NEXT: clrlwi r3, r3, 16
; CHECK-P8-NEXT: mtfprwz f0, r4
; CHECK-P8-NEXT: mtfprwz f1, r3
; CHECK-P8-NEXT: xscvuxdsp f0, f0
Expand All @@ -28,21 +28,21 @@ define i64 @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrws v2, r3
; CHECK-P9-NEXT: li r3, 0
; CHECK-P9-NEXT: vextuhrx r3, r3, v2
; CHECK-P9-NEXT: rlwinm r3, r3, 0, 16, 31
; CHECK-P9-NEXT: clrlwi r3, r3, 16
; CHECK-P9-NEXT: mtfprwz f0, r3
; CHECK-P9-NEXT: li r3, 2
; CHECK-P9-NEXT: xscvuxdsp f0, f0
; CHECK-P9-NEXT: xscvdpspn vs0, f0
; CHECK-P9-NEXT: vextuhrx r3, r3, v2
; CHECK-P9-NEXT: rlwinm r3, r3, 0, 16, 31
; CHECK-P9-NEXT: clrlwi r3, r3, 16
; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-P9-NEXT: mtfprwz f0, r3
; CHECK-P9-NEXT: xscvuxdsp f0, f0
Expand All @@ -57,12 +57,12 @@ define i64 @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: mtvsrws v2, r3
; CHECK-BE-NEXT: li r3, 2
; CHECK-BE-NEXT: vextuhlx r3, r3, v2
; CHECK-BE-NEXT: rlwinm r3, r3, 0, 16, 31
; CHECK-BE-NEXT: clrlwi r3, r3, 16
; CHECK-BE-NEXT: mtfprwz f0, r3
; CHECK-BE-NEXT: li r3, 0
; CHECK-BE-NEXT: xscvuxdsp f0, f0
; CHECK-BE-NEXT: vextuhlx r3, r3, v2
; CHECK-BE-NEXT: rlwinm r3, r3, 0, 16, 31
; CHECK-BE-NEXT: clrlwi r3, r3, 16
; CHECK-BE-NEXT: xscvdpspn v3, f0
; CHECK-BE-NEXT: mtfprwz f0, r3
; CHECK-BE-NEXT: xscvuxdsp f0, f0
Expand All @@ -81,7 +81,7 @@ define <4 x float> @test4elt(i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI1_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: xxswapd v2, vs0
Expand All @@ -92,7 +92,7 @@ define <4 x float> @test4elt(i64 %a.coerce) local_unnamed_addr #1 {
;
; CHECK-P9-LABEL: test4elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: addis r3, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: addi r3, r3, .LCPI1_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r3
Expand Down Expand Up @@ -264,8 +264,8 @@ entry:
define i64 @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: clrldi r4, r3, 48
; CHECK-P8-NEXT: rldicl r3, r3, 48, 48
; CHECK-P8-NEXT: extsh r4, r4
Expand All @@ -280,7 +280,7 @@ define i64 @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
Expand Down Expand Up @@ -332,7 +332,7 @@ entry:
define <4 x float> @test4elt_signed(i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: vspltisw v3, 8
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: vadduwm v3, v3, v3
Expand All @@ -344,7 +344,7 @@ define <4 x float> @test4elt_signed(i64 %a.coerce) local_unnamed_addr #1 {
;
; CHECK-P9-LABEL: test4elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: vmrglh v2, v2, v2
; CHECK-P9-NEXT: vextsh2w v2, v2
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/PowerPC/vec_conv_i16_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ define <2 x double> @test2elt(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI0_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI0_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: xxswapd v2, vs0
Expand Down Expand Up @@ -53,7 +53,7 @@ define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i64 %a.c
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI1_1@toc@l
Expand All @@ -74,7 +74,7 @@ define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i64 %a.c
;
; CHECK-P9-LABEL: test4elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI1_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down Expand Up @@ -370,7 +370,7 @@ define <2 x double> @test2elt_signed(i32 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI4_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lvx v3, 0, r3
Expand Down Expand Up @@ -415,7 +415,7 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_2@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_2@toc@l
Expand Down Expand Up @@ -443,7 +443,7 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i
;
; CHECK-P9-LABEL: test4elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI5_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down
12 changes: 6 additions & 6 deletions llvm/test/CodeGen/PowerPC/vec_conv_i32_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,23 +12,23 @@
define <2 x double> @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw v2, v2, v2
; CHECK-P8-NEXT: xvcvuxwdp v2, v2
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxmrglw v2, v2, v2
; CHECK-P9-NEXT: xvcvuxwdp v2, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0
; CHECK-BE-NEXT: xvcvuxwdp v2, v2
; CHECK-BE-NEXT: blr
Expand Down Expand Up @@ -266,23 +266,23 @@ entry:
define <2 x double> @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xxmrglw v2, v2, v2
; CHECK-P8-NEXT: xvcvsxwdp v2, v2
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xxmrglw v2, v2, v2
; CHECK-P9-NEXT: xvcvsxwdp v2, v2
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xxmrghw v2, vs0, vs0
; CHECK-BE-NEXT: xvcvsxwdp v2, v2
; CHECK-BE-NEXT: blr
Expand Down
4 changes: 2 additions & 2 deletions llvm/test/CodeGen/PowerPC/vec_conv_i64_to_fp32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -22,7 +22,7 @@ define i64 @test2elt(<2 x i64> %a) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v2, vs0, vs0, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
Expand Down Expand Up @@ -315,7 +315,7 @@ define i64 @test2elt_signed(<2 x i64> %a) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v2, vs0, vs0, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
Expand Down
36 changes: 18 additions & 18 deletions llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,12 @@
define i64 @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: clrldi r4, r3, 56
; CHECK-P8-NEXT: rldicl r3, r3, 56, 56
; CHECK-P8-NEXT: rlwinm r4, r4, 0, 24, 31
; CHECK-P8-NEXT: rlwinm r3, r3, 0, 24, 31
; CHECK-P8-NEXT: clrlwi r4, r4, 24
; CHECK-P8-NEXT: clrlwi r3, r3, 24
; CHECK-P8-NEXT: mtfprwz f0, r4
; CHECK-P8-NEXT: mtfprwz f1, r3
; CHECK-P8-NEXT: xscvuxdsp f0, f0
Expand All @@ -28,21 +28,21 @@ define i64 @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrws v2, r3
; CHECK-P9-NEXT: li r3, 0
; CHECK-P9-NEXT: vextubrx r3, r3, v2
; CHECK-P9-NEXT: rlwinm r3, r3, 0, 24, 31
; CHECK-P9-NEXT: clrlwi r3, r3, 24
; CHECK-P9-NEXT: mtfprwz f0, r3
; CHECK-P9-NEXT: li r3, 1
; CHECK-P9-NEXT: xscvuxdsp f0, f0
; CHECK-P9-NEXT: xscvdpspn vs0, f0
; CHECK-P9-NEXT: vextubrx r3, r3, v2
; CHECK-P9-NEXT: rlwinm r3, r3, 0, 24, 31
; CHECK-P9-NEXT: clrlwi r3, r3, 24
; CHECK-P9-NEXT: xxsldwi v3, vs0, vs0, 1
; CHECK-P9-NEXT: mtfprwz f0, r3
; CHECK-P9-NEXT: xscvuxdsp f0, f0
Expand All @@ -57,12 +57,12 @@ define i64 @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-BE-NEXT: mtvsrws v2, r3
; CHECK-BE-NEXT: li r3, 1
; CHECK-BE-NEXT: vextublx r3, r3, v2
; CHECK-BE-NEXT: rlwinm r3, r3, 0, 24, 31
; CHECK-BE-NEXT: clrlwi r3, r3, 24
; CHECK-BE-NEXT: mtfprwz f0, r3
; CHECK-BE-NEXT: li r3, 0
; CHECK-BE-NEXT: xscvuxdsp f0, f0
; CHECK-BE-NEXT: vextublx r3, r3, v2
; CHECK-BE-NEXT: rlwinm r3, r3, 0, 24, 31
; CHECK-BE-NEXT: clrlwi r3, r3, 24
; CHECK-BE-NEXT: xscvdpspn v3, f0
; CHECK-BE-NEXT: mtfprwz f0, r3
; CHECK-BE-NEXT: xscvuxdsp f0, f0
Expand All @@ -81,7 +81,7 @@ define <4 x float> @test4elt(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI1_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: xxswapd v2, vs0
Expand Down Expand Up @@ -121,7 +121,7 @@ define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, i64 %a.co
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_1@toc@l
Expand All @@ -140,7 +140,7 @@ define void @test8elt(<8 x float>* noalias nocapture sret %agg.result, i64 %a.co
;
; CHECK-P9-LABEL: test8elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down Expand Up @@ -280,8 +280,8 @@ entry:
define i64 @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: clrldi r4, r3, 56
; CHECK-P8-NEXT: rldicl r3, r3, 56, 56
; CHECK-P8-NEXT: extsb r4, r4
Expand All @@ -296,7 +296,7 @@ define i64 @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-NEXT: xxsldwi v3, vs1, vs1, 1
; CHECK-P8-NEXT: vmrglw v2, v3, v2
; CHECK-P8-NEXT: xxswapd vs0, v2
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
Expand Down Expand Up @@ -349,7 +349,7 @@ define <4 x float> @test4elt_signed(i32 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI5_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lvx v3, 0, r3
Expand Down Expand Up @@ -392,7 +392,7 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, i6
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_1@toc@ha
; CHECK-P8-NEXT: vspltisw v5, 12
; CHECK-P8-NEXT: addi r5, r5, .LCPI6_0@toc@l
Expand All @@ -416,7 +416,7 @@ define void @test8elt_signed(<8 x float>* noalias nocapture sret %agg.result, i6
;
; CHECK-P9-LABEL: test8elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down
16 changes: 8 additions & 8 deletions llvm/test/CodeGen/PowerPC/vec_conv_i8_to_fp64_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -13,7 +13,7 @@ define <2 x double> @test2elt(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI0_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI0_0@toc@l
; CHECK-P8-NEXT: xxlxor v4, v4, v4
; CHECK-P8-NEXT: xxswapd v2, vs0
Expand Down Expand Up @@ -53,7 +53,7 @@ define void @test4elt(<4 x double>* noalias nocapture sret %agg.result, i32 %a.c
; CHECK-P8-LABEL: test4elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI1_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI1_1@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI1_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI1_1@toc@l
Expand Down Expand Up @@ -118,7 +118,7 @@ define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, i64 %a.c
; CHECK-P8-LABEL: test8elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI2_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI2_2@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI2_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI2_2@toc@l
Expand Down Expand Up @@ -155,7 +155,7 @@ define void @test8elt(<8 x double>* noalias nocapture sret %agg.result, i64 %a.c
;
; CHECK-P9-LABEL: test8elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI2_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI2_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down Expand Up @@ -404,7 +404,7 @@ define <2 x double> @test2elt_signed(i16 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r4, r2, .LCPI4_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: addi r3, r4, .LCPI4_0@toc@l
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: lvx v3, 0, r3
Expand Down Expand Up @@ -449,7 +449,7 @@ define void @test4elt_signed(<4 x double>* noalias nocapture sret %agg.result, i
; CHECK-P8-LABEL: test4elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: addis r5, r2, .LCPI5_0@toc@ha
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI5_2@toc@ha
; CHECK-P8-NEXT: addi r5, r5, .LCPI5_0@toc@l
; CHECK-P8-NEXT: addi r4, r4, .LCPI5_2@toc@l
Expand Down Expand Up @@ -523,7 +523,7 @@ entry:
define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, i64 %a.coerce) local_unnamed_addr #1 {
; CHECK-P8-LABEL: test8elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r4
; CHECK-P8-NEXT: mtfprd f0, r4
; CHECK-P8-NEXT: addis r4, r2, .LCPI6_2@toc@ha
; CHECK-P8-NEXT: addis r5, r2, .LCPI6_0@toc@ha
; CHECK-P8-NEXT: addis r6, r2, .LCPI6_3@toc@ha
Expand Down Expand Up @@ -572,7 +572,7 @@ define void @test8elt_signed(<8 x double>* noalias nocapture sret %agg.result, i
;
; CHECK-P9-LABEL: test8elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r4
; CHECK-P9-NEXT: mtfprd f0, r4
; CHECK-P9-NEXT: addis r4, r2, .LCPI6_0@toc@ha
; CHECK-P9-NEXT: addi r4, r4, .LCPI6_0@toc@l
; CHECK-P9-NEXT: lxvx v3, 0, r4
Expand Down
20 changes: 10 additions & 10 deletions llvm/test/CodeGen/PowerPC/vec_conv_i_to_fp_4byte_elts.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -12,26 +12,26 @@
define i64 @test2elt(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xvcvuxwsp vs0, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xvcvuxwsp vs0, v2
; CHECK-P9-NEXT: mfvsrld r3, vs0
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xvcvuxwsp vs0, vs0
; CHECK-BE-NEXT: mfvsrd r3, f0
; CHECK-BE-NEXT: mffprd r3, f0
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x i32>
Expand Down Expand Up @@ -159,26 +159,26 @@ entry:
define i64 @test2elt_signed(i64 %a.coerce) local_unnamed_addr #0 {
; CHECK-P8-LABEL: test2elt_signed:
; CHECK-P8: # %bb.0: # %entry
; CHECK-P8-NEXT: mtvsrd f0, r3
; CHECK-P8-NEXT: mtfprd f0, r3
; CHECK-P8-NEXT: xxswapd v2, vs0
; CHECK-P8-NEXT: xvcvsxwsp vs0, v2
; CHECK-P8-NEXT: xxswapd vs0, vs0
; CHECK-P8-NEXT: mfvsrd r3, f0
; CHECK-P8-NEXT: mffprd r3, f0
; CHECK-P8-NEXT: blr
;
; CHECK-P9-LABEL: test2elt_signed:
; CHECK-P9: # %bb.0: # %entry
; CHECK-P9-NEXT: mtvsrd f0, r3
; CHECK-P9-NEXT: mtfprd f0, r3
; CHECK-P9-NEXT: xxswapd v2, vs0
; CHECK-P9-NEXT: xvcvsxwsp vs0, v2
; CHECK-P9-NEXT: mfvsrld r3, vs0
; CHECK-P9-NEXT: blr
;
; CHECK-BE-LABEL: test2elt_signed:
; CHECK-BE: # %bb.0: # %entry
; CHECK-BE-NEXT: mtvsrd f0, r3
; CHECK-BE-NEXT: mtfprd f0, r3
; CHECK-BE-NEXT: xvcvsxwsp vs0, vs0
; CHECK-BE-NEXT: mfvsrd r3, f0
; CHECK-BE-NEXT: mffprd r3, f0
; CHECK-BE-NEXT: blr
entry:
%0 = bitcast i64 %a.coerce to <2 x i32>
Expand Down
2 changes: 1 addition & 1 deletion llvm/test/CodeGen/PowerPC/vsx.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2437,7 +2437,7 @@ define <2 x i32> @test80(i32 %v) {
;
; CHECK-LE-LABEL: test80:
; CHECK-LE: # %bb.0:
; CHECK-LE-NEXT: mtvsrd f0, r3
; CHECK-LE-NEXT: mtfprd f0, r3
; CHECK-LE-NEXT: addis r4, r2, .LCPI65_0@toc@ha
; CHECK-LE-NEXT: addi r3, r4, .LCPI65_0@toc@l
; CHECK-LE-NEXT: xxswapd vs0, vs0
Expand Down
8 changes: 4 additions & 4 deletions llvm/test/CodeGen/PowerPC/xray-conditional-return.ll
View file
Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@

define void @Foo(i32 signext %a, i32 signext %b) #0 {
; CHECK-LABEL: @Foo
; CHECK: cmpw [[CR:[0-9]+]]
; CHECK-NEXT: ble [[CR]], [[LABEL:\.[a-zA-Z0-9]+]]
; CHECK: cmpw
; CHECK-NEXT: ble 0, [[LABEL:\.[a-zA-Z0-9]+]]
; CHECK-NEXT: .p2align 3
; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
; CHECK-NEXT: blr
Expand Down Expand Up @@ -39,8 +39,8 @@ return:

define void @Foo2(i32 signext %a, i32 signext %b) #0 {
; CHECK-LABEL: @Foo2
; CHECK: cmpw [[CR:[0-9]+]]
; CHECK-NEXT: bge [[CR]], [[LABEL:\.[a-zA-Z0-9]+]]
; CHECK: cmpw
; CHECK-NEXT: bge 0, [[LABEL:\.[a-zA-Z0-9]+]]
; CHECK-NEXT: .p2align 3
; CHECK-NEXT: {{\.[a-zA-Z0-9]+}}:
; CHECK-NEXT: blr
Expand Down