40 changes: 15 additions & 25 deletions mlir/include/mlir/Dialect/OpenMP/OpenMPClauses.td
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Original file line number Diff line number Diff line change
Expand Up @@ -460,12 +460,6 @@ class OpenMP_InReductionClauseSkip<
OptionalAttr<SymbolRefArrayAttr>:$in_reduction_syms
);

let optAssemblyFormat = [{
`in_reduction` `(`
custom<ReductionVarList>($in_reduction_vars, type($in_reduction_vars),
$in_reduction_byref, $in_reduction_syms) `)`
}];

let extraClassDeclaration = [{
/// Returns the reduction variables.
SmallVector<Value> getReductionVars() {
Expand All @@ -476,7 +470,9 @@ class OpenMP_InReductionClauseSkip<
unsigned numInReductionBlockArgs() { return getInReductionVars().size(); }
}];

// Description varies depending on the operation.
// Description varies depending on the operation. Assembly format not defined
// because this clause must be processed together with the first region of the
// operation, as it defines entry block arguments.
}

def OpenMP_InReductionClause : OpenMP_InReductionClauseSkip<>;
Expand Down Expand Up @@ -587,7 +583,7 @@ class OpenMP_MapClauseSkip<
);

let optAssemblyFormat = [{
`map_entries` `(` custom<MapEntries>($map_vars, type($map_vars)) `)`
`map_entries` `(` $map_vars `:` type($map_vars) `)`
}];

let description = [{
Expand Down Expand Up @@ -936,16 +932,14 @@ class OpenMP_PrivateClauseSkip<
OptionalAttr<SymbolRefArrayAttr>:$private_syms
);

let optAssemblyFormat = [{
`private` `(`
custom<PrivateList>($private_vars, type($private_vars), $private_syms) `)`
}];

let extraClassDeclaration = [{
unsigned numPrivateBlockArgs() { return getPrivateVars().size(); }
}];

// TODO: Add description.
// Assembly format not defined because this clause must be processed together
// with the first region of the operation, as it defines entry block
// arguments.
}

def OpenMP_PrivateClause : OpenMP_PrivateClauseSkip<>;
Expand Down Expand Up @@ -994,12 +988,6 @@ class OpenMP_ReductionClauseSkip<
OptionalAttr<SymbolRefArrayAttr>:$reduction_syms
);

let optAssemblyFormat = [{
`reduction` `(`
custom<ReductionVarList>($reduction_vars, type($reduction_vars),
$reduction_byref, $reduction_syms) `)`
}];

let extraClassDeclaration = [{
/// Returns the number of reduction variables.
unsigned getNumReductionVars() { return getReductionVars().size(); }
Expand All @@ -1020,6 +1008,10 @@ class OpenMP_ReductionClauseSkip<
thread or simd lane defined by the operation's region into the final value,
which is available in the accumulator after they all complete.
}];

// Assembly format not defined because this clause must be processed together
// with the first region of the operation, as it defines entry block
// arguments.
}

def OpenMP_ReductionClause : OpenMP_ReductionClauseSkip<>;
Expand Down Expand Up @@ -1126,12 +1118,6 @@ class OpenMP_TaskReductionClauseSkip<
OptionalAttr<SymbolRefArrayAttr>:$task_reduction_syms
);

let optAssemblyFormat = [{
`task_reduction` `(`
custom<ReductionVarList>($task_reduction_vars, type($task_reduction_vars),
$task_reduction_byref, $task_reduction_syms) `)`
}];

let extraClassDeclaration = [{
/// Returns the reduction variables.
SmallVector<Value> getReductionVars() {
Expand All @@ -1155,6 +1141,10 @@ class OpenMP_TaskReductionClauseSkip<
attribute, and whether the reduction variable should be passed into the
reduction region by value or by reference in `task_reduction_byref`.
}];

// Assembly format not defined because this clause must be processed together
// with the first region of the operation, as it defines entry block
// arguments.
}

def OpenMP_TaskReductionClause : OpenMP_TaskReductionClauseSkip<>;
Expand Down
99 changes: 75 additions & 24 deletions mlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
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Original file line number Diff line number Diff line change
Expand Up @@ -133,8 +133,7 @@ def ParallelOp : OpenMP_Op<"parallel", traits = [
RecursiveMemoryEffects
], clauses = [
OpenMP_AllocateClause, OpenMP_IfClause, OpenMP_NumThreadsClause,
OpenMP_PrivateClauseSkip<assemblyFormat = true>, OpenMP_ProcBindClause,
OpenMP_ReductionClauseSkip<assemblyFormat = true>
OpenMP_PrivateClause, OpenMP_ProcBindClause, OpenMP_ReductionClause
], singleRegion = true> {
let summary = "parallel construct";
let description = [{
Expand All @@ -151,16 +150,11 @@ def ParallelOp : OpenMP_Op<"parallel", traits = [
OpBuilder<(ins CArg<"const ParallelOperands &">:$clauses)>
];

// TODO: Use default assembly format inherited from OpenMP_Op once printing
// and parsing of the parallel region is not intermingled with printing and
// parsing of reduction and private clauses. `assemblyFormat` should also be
// no longer skipped for clauses added to this operation at that time.
let assemblyFormat =
clausesReqAssemblyFormat # " oilist(" # clausesOptAssemblyFormat # ")" # [{
custom<ParallelRegion>($region, $reduction_vars, type($reduction_vars),
$reduction_byref, $reduction_syms, $private_vars,
type($private_vars), $private_syms) attr-dict
}];
let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateReductionRegion>($region, $private_vars, type($private_vars),
$private_syms, $reduction_vars, type($reduction_vars), $reduction_byref,
$reduction_syms) attr-dict
}];

let hasVerifier = 1;
}
Expand Down Expand Up @@ -200,6 +194,12 @@ def TeamsOp : OpenMP_Op<"teams", traits = [
OpBuilder<(ins CArg<"const TeamsOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateReductionRegion>($region, $private_vars, type($private_vars),
$private_syms, $reduction_vars, type($reduction_vars), $reduction_byref,
$reduction_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -245,6 +245,12 @@ def SectionsOp : OpenMP_Op<"sections", traits = [
OpBuilder<(ins CArg<"const SectionsOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateReductionRegion>($region, $private_vars, type($private_vars),
$private_syms, $reduction_vars, type($reduction_vars), $reduction_byref,
$reduction_syms) attr-dict
}];

let hasVerifier = 1;
let hasRegionVerifier = 1;
}
Expand Down Expand Up @@ -272,6 +278,11 @@ def SingleOp : OpenMP_Op<"single", traits = [
OpBuilder<(ins CArg<"const SingleOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateRegion>($region, $private_vars, type($private_vars),
$private_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -352,7 +363,7 @@ def WsloopOp : OpenMP_Op<"wsloop", traits = [
], clauses = [
OpenMP_AllocateClause, OpenMP_LinearClause, OpenMP_NowaitClause,
OpenMP_OrderClause, OpenMP_OrderedClause, OpenMP_PrivateClause,
OpenMP_ReductionClauseSkip<assemblyFormat = true>, OpenMP_ScheduleClause
OpenMP_ReductionClause, OpenMP_ScheduleClause
], singleRegion = true> {
let summary = "worksharing-loop construct";
let description = [{
Expand Down Expand Up @@ -384,15 +395,11 @@ def WsloopOp : OpenMP_Op<"wsloop", traits = [
OpBuilder<(ins CArg<"const WsloopOperands &">:$clauses)>
];

// TODO: Use default assembly format inherited from OpenMP_Op once printing
// and parsing of the workshare loop region is not intermingled with printing
// and parsing of reduction clauses. `assemblyFormat` should also be no longer
// skipped for clauses added to this operation at that time.
let assemblyFormat =
clausesReqAssemblyFormat # " oilist(" # clausesOptAssemblyFormat # ")" # [{
custom<Wsloop>($region, $reduction_vars, type($reduction_vars),
$reduction_byref, $reduction_syms) attr-dict
}];
let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateReductionRegion>($region, $private_vars, type($private_vars),
$private_syms, $reduction_vars, type($reduction_vars), $reduction_byref,
$reduction_syms) attr-dict
}];

let hasVerifier = 1;
}
Expand Down Expand Up @@ -443,6 +450,12 @@ def SimdOp : OpenMP_Op<"simd", traits = [
OpBuilder<(ins CArg<"const SimdOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateReductionRegion>($region, $private_vars, type($private_vars),
$private_syms, $reduction_vars, type($reduction_vars), $reduction_byref,
$reduction_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -517,6 +530,11 @@ def DistributeOp : OpenMP_Op<"distribute", traits = [
OpBuilder<(ins CArg<"const DistributeOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<PrivateRegion>($region, $private_vars, type($private_vars),
$private_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -556,6 +574,13 @@ def TaskOp : OpenMP_Op<"task", traits = [
OpBuilder<(ins CArg<"const TaskOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<InReductionPrivateRegion>(
$region, $in_reduction_vars, type($in_reduction_vars),
$in_reduction_byref, $in_reduction_syms, $private_vars,
type($private_vars), $private_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -628,10 +653,23 @@ def TaskloopOp : OpenMP_Op<"taskloop", traits = [
OpBuilder<(ins CArg<"const TaskloopOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<InReductionPrivateReductionRegion>(
$region, $in_reduction_vars, type($in_reduction_vars),
$in_reduction_byref, $in_reduction_syms, $private_vars,
type($private_vars), $private_syms, $reduction_vars,
type($reduction_vars), $reduction_byref, $reduction_syms) attr-dict
}];

let extraClassDeclaration = [{
/// Returns the reduction variables
SmallVector<Value> getAllReductionVars();

// Define BlockArgOpenMPOpInterface methods here because they are not
// inherited from the respective clauses.
unsigned numInReductionBlockArgs() { return getInReductionVars().size(); }
unsigned numReductionBlockArgs() { return getReductionVars().size(); }

void getEffects(SmallVectorImpl<MemoryEffects::EffectInstance> &effects);
}] # clausesExtraClassDeclaration;

Expand Down Expand Up @@ -661,6 +699,12 @@ def TaskgroupOp : OpenMP_Op<"taskgroup", traits = [
OpBuilder<(ins CArg<"const TaskgroupOperands &">:$clauses)>
];

let assemblyFormat = clausesAssemblyFormat # [{
custom<TaskReductionRegion>(
$region, $task_reduction_vars, type($task_reduction_vars),
$task_reduction_byref, $task_reduction_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down Expand Up @@ -1049,8 +1093,8 @@ def TargetOp : OpenMP_Op<"target", traits = [
// TODO: Complete clause list (defaultmap, uses_allocators).
OpenMP_AllocateClause, OpenMP_DependClause, OpenMP_DeviceClause,
OpenMP_HasDeviceAddrClause, OpenMP_IfClause, OpenMP_InReductionClause,
OpenMP_IsDevicePtrClause, OpenMP_MapClause, OpenMP_NowaitClause,
OpenMP_PrivateClause, OpenMP_ThreadLimitClause
OpenMP_IsDevicePtrClause, OpenMP_MapClauseSkip<assemblyFormat = true>,
OpenMP_NowaitClause, OpenMP_PrivateClause, OpenMP_ThreadLimitClause
], singleRegion = true> {
let summary = "target construct";
let description = [{
Expand All @@ -1070,6 +1114,13 @@ def TargetOp : OpenMP_Op<"target", traits = [
unsigned numMapBlockArgs() { return getMapVars().size(); }
}] # clausesExtraClassDeclaration;

let assemblyFormat = clausesAssemblyFormat # [{
custom<InReductionMapPrivateRegion>(
$region, $in_reduction_vars, type($in_reduction_vars),
$in_reduction_byref, $in_reduction_syms, $map_vars, type($map_vars),
$private_vars, type($private_vars), $private_syms) attr-dict
}];

let hasVerifier = 1;
}

Expand Down
674 changes: 412 additions & 262 deletions mlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
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6 changes: 1 addition & 5 deletions mlir/test/Conversion/OpenMPToLLVM/convert-to-llvmir.mlir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -267,8 +267,7 @@ llvm.func @_QPomp_target_data_region(%a : !llvm.ptr, %i : !llvm.ptr) {
// CHECK: %[[VAL_0:.*]] = llvm.mlir.constant(64 : i32) : i32
// CHECK: %[[MAP1:.*]] = omp.map.info var_ptr(%[[ARG_0]] : !llvm.ptr, !llvm.array<1024 x i32>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
// CHECK: %[[MAP2:.*]] = omp.map.info var_ptr(%[[ARG_1]] : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = ""}
// CHECK: omp.target map_entries(%[[MAP1]] -> %[[BB_ARG0:.*]], %[[MAP2]] -> %[[BB_ARG1:.*]] : !llvm.ptr, !llvm.ptr) thread_limit(%[[VAL_0]] : i32) {
// CHECK: ^bb0(%[[BB_ARG0]]: !llvm.ptr, %[[BB_ARG1]]: !llvm.ptr):
// CHECK: omp.target thread_limit(%[[VAL_0]] : i32) map_entries(%[[MAP1]] -> %[[BB_ARG0:.*]], %[[MAP2]] -> %[[BB_ARG1:.*]] : !llvm.ptr, !llvm.ptr) {
// CHECK: %[[VAL_1:.*]] = llvm.mlir.constant(10 : i32) : i32
// CHECK: llvm.store %[[VAL_1]], %[[BB_ARG1]] : i32, !llvm.ptr
// CHECK: omp.terminator
Expand All @@ -281,7 +280,6 @@ llvm.func @_QPomp_target(%a : !llvm.ptr, %i : !llvm.ptr) {
%1 = omp.map.info var_ptr(%a : !llvm.ptr, !llvm.array<1024 x i32>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%3 = omp.map.info var_ptr(%i : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = ""}
omp.target thread_limit(%0 : i32) map_entries(%1 -> %arg0, %3 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%2 = llvm.mlir.constant(10 : i32) : i32
llvm.store %2, %arg1 : i32, !llvm.ptr
omp.terminator
Expand Down Expand Up @@ -486,7 +484,6 @@ llvm.func @sub_() {
// CHECK: %[[BOUNDS1:.*]] = omp.map.bounds lower_bound(%[[C_12]] : i64) upper_bound(%[[C_11]] : i64) stride(%[[C_14]] : i64) start_idx(%[[C_14]] : i64)
// CHECK: %[[MAP1:.*]] = omp.map.info var_ptr(%[[ARG_2]] : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%[[BOUNDS1]]) -> !llvm.ptr {name = ""}
// CHECK: omp.target map_entries(%[[MAP0]] -> %[[BB_ARG0:.*]], %[[MAP1]] -> %[[BB_ARG1:.*]] : !llvm.ptr, !llvm.ptr) {
// CHECK: ^bb0(%[[BB_ARG0]]: !llvm.ptr, %[[BB_ARG1]]: !llvm.ptr):
// CHECK: omp.terminator
// CHECK: }
// CHECK: llvm.return
Expand All @@ -506,7 +503,6 @@ llvm.func @_QPtarget_map_with_bounds(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2:
%10 = omp.map.bounds lower_bound(%7 : i64) upper_bound(%6 : i64) stride(%9 : i64) start_idx(%9 : i64)
%11 = omp.map.info var_ptr(%arg2 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%10) -> !llvm.ptr {name = ""}
omp.target map_entries(%5 -> %arg3, %11 -> %arg4: !llvm.ptr, !llvm.ptr) {
^bb0(%arg3: !llvm.ptr, %arg4: !llvm.ptr):
omp.terminator
}
llvm.return
Expand Down
24 changes: 13 additions & 11 deletions mlir/test/Dialect/OpenMP/invalid.mlir
View file
Original file line number Diff line number Diff line change
Expand Up @@ -748,7 +748,7 @@ func.func @foo(%lb : index, %ub : index, %step : index) {
%0 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr

// expected-error @below {{accumulator variable used more than once}}
omp.wsloop reduction(@add_f32 %0 -> %prv : !llvm.ptr, @add_f32 %0 -> %prv1 : !llvm.ptr) {
omp.wsloop reduction(@add_f32 %0 -> %prv, @add_f32 %0 -> %prv1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%iv) : index = (%lb) to (%ub) step (%step) {
%2 = arith.constant 2.0 : f32
omp.yield
Expand Down Expand Up @@ -1662,8 +1662,7 @@ func.func @omp_task_depend(%data_var: memref<i32>) {

func.func @omp_task(%ptr: !llvm.ptr) {
// expected-error @below {{op expected symbol reference @add_f32 to point to a reduction declaration}}
omp.task in_reduction(@add_f32 -> %ptr : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
omp.task in_reduction(@add_f32 %ptr -> %arg0 : !llvm.ptr) {
// CHECK: "test.foo"() : () -> ()
"test.foo"() : () -> ()
// CHECK: omp.terminator
Expand All @@ -1687,8 +1686,7 @@ combiner {

func.func @omp_task(%ptr: !llvm.ptr) {
// expected-error @below {{op accumulator variable used more than once}}
omp.task in_reduction(@add_f32 -> %ptr : !llvm.ptr, @add_f32 -> %ptr : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
omp.task in_reduction(@add_f32 %ptr -> %arg0, @add_f32 %ptr -> %arg1 : !llvm.ptr, !llvm.ptr) {
// CHECK: "test.foo"() : () -> ()
"test.foo"() : () -> ()
// CHECK: omp.terminator
Expand Down Expand Up @@ -1718,8 +1716,7 @@ atomic {

func.func @omp_task(%mem: memref<1xf32>) {
// expected-error @below {{op expected accumulator ('memref<1xf32>') to be the same type as reduction declaration ('!llvm.ptr')}}
omp.task in_reduction(@add_i32 -> %mem : memref<1xf32>) {
^bb0(%arg0: memref<1xf32>):
omp.task in_reduction(@add_i32 %mem -> %arg0 : memref<1xf32>) {
// CHECK: "test.foo"() : () -> ()
"test.foo"() : () -> ()
// CHECK: omp.terminator
Expand Down Expand Up @@ -1866,6 +1863,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32_2 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{expected as many reduction symbol references as reduction variables}}
"omp.taskloop"(%testf32, %testf32_2) ({
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand All @@ -1880,6 +1878,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{expected as many reduction symbol references as reduction variables}}
"omp.taskloop"(%testf32) ({
^bb0(%arg0: !llvm.ptr):
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand All @@ -1895,6 +1894,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32_2 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{expected as many reduction symbol references as reduction variables}}
"omp.taskloop"(%testf32, %testf32_2) ({
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand All @@ -1909,6 +1909,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{expected as many reduction symbol references as reduction variables}}
"omp.taskloop"(%testf32) ({
^bb0(%arg0: !llvm.ptr):
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand All @@ -1935,7 +1936,7 @@ func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32 = "test.f32"() : () -> (!llvm.ptr)
%testf32_2 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{if a reduction clause is present on the taskloop directive, the nogroup clause must not be specified}}
omp.taskloop reduction(@add_f32 -> %testf32 : !llvm.ptr, @add_f32 -> %testf32_2 : !llvm.ptr) nogroup {
omp.taskloop nogroup reduction(@add_f32 %testf32 -> %arg0, @add_f32 %testf32_2 -> %arg1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand All @@ -1961,7 +1962,7 @@ combiner {
func.func @taskloop(%lb: i32, %ub: i32, %step: i32) {
%testf32 = "test.f32"() : () -> (!llvm.ptr)
// expected-error @below {{the same list item cannot appear in both a reduction and an in_reduction clause}}
omp.taskloop reduction(@add_f32 -> %testf32 : !llvm.ptr) in_reduction(@add_f32 -> %testf32 : !llvm.ptr) {
omp.taskloop in_reduction(@add_f32 %testf32 -> %arg0 : !llvm.ptr) reduction(@add_f32 %testf32 -> %arg1 : !llvm.ptr) {
omp.loop_nest (%i, %j) : i32 = (%lb, %ub) to (%ub, %lb) step (%step, %step) {
omp.yield
}
Expand Down Expand Up @@ -2026,7 +2027,7 @@ func.func @omp_target(%map1: memref<?xi32>) {
%mapv = omp.map.info var_ptr(%map1 : memref<?xi32>, tensor<?xi32>) map_clauses(delete) capture(ByRef) -> memref<?xi32> {name = ""}
// expected-error @below {{to, from, tofrom and alloc map types are permitted}}
omp.target map_entries(%mapv -> %arg0: memref<?xi32>) {
^bb0(%arg0: memref<?xi32>):
omp.terminator
}
return
}
Expand Down Expand Up @@ -2438,7 +2439,8 @@ omp.private {type = private} @var1.privatizer : !llvm.ptr alloc {
}

func.func @byref_in_private(%arg0: index) {
// expected-error @below {{private clause cannot have byref attributes}}
// expected-error @below {{expected attribute value}}
// expected-error @below {{custom op 'omp.parallel' invalid `private` format}}
omp.parallel private(byref @var1.privatizer %arg0 -> %arg2 : index) {
omp.terminator
}
Expand Down
113 changes: 46 additions & 67 deletions mlir/test/Dialect/OpenMP/ops.mlir
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-array-sectioning-host.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -19,7 +19,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%7 = omp.map.info var_ptr(%0 : !llvm.ptr, !llvm.array<3 x array<3 x array<3 x i32>>>) map_clauses(tofrom) capture(ByRef) bounds(%5, %5, %6) -> !llvm.ptr {name = "inarray(1:3,1:3,2:2)"}
%8 = omp.map.info var_ptr(%1 : !llvm.ptr, !llvm.array<3 x array<3 x array<3 x i32>>>) map_clauses(tofrom) capture(ByRef) bounds(%5, %5, %5) -> !llvm.ptr {name = "outarray(1:3,1:3,1:3)"}
omp.target map_entries(%7 -> %arg0, %8 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%9 = llvm.mlir.constant(0 : i64) : i64
%10 = llvm.mlir.constant(1 : i64) : i64
%11 = llvm.getelementptr %arg0[0, %10, %9, %9] : (!llvm.ptr, i64, i64, i64) -> !llvm.ptr, !llvm.array<3 x array<3 x array<3 x i32>>>
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-device.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,6 @@ module attributes {omp.is_target_device = true} {
%2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "sp"}
%3 = omp.map.info var_ptr(%0 : !llvm.ptr, i32) map_clauses(to) capture(ByCopy) -> !llvm.ptr {name = "i"}
omp.target map_entries(%2 -> %arg0, %3 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%4 = llvm.load %arg1 : !llvm.ptr -> i32
llvm.store %4, %arg0 : i32, !llvm.ptr
omp.terminator
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-byref-bycopy-generation-host.mlir
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Expand Up @@ -7,7 +7,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "sp"}
%3 = omp.map.info var_ptr(%0 : !llvm.ptr, i32) map_clauses(to) capture(ByCopy) -> !llvm.ptr {name = "i"}
omp.target map_entries(%2 -> %arg0, %3 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%4 = llvm.load %arg1 : !llvm.ptr -> i32
llvm.store %4, %arg0 : i32, !llvm.ptr
omp.terminator
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-constant-alloca-raise.mlir
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Expand Up @@ -16,7 +16,6 @@ module attributes {omp.is_target_device = true} {
%2 = llvm.alloca %1 x !llvm.struct<(ptr)> : (i64) -> !llvm.ptr
%3 = omp.map.info var_ptr(%2 : !llvm.ptr, !llvm.struct<(ptr)>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr
omp.target map_entries(%3 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%4 = llvm.mlir.constant(1 : i32) : i32
%5 = llvm.alloca %4 x !llvm.struct<(ptr)> {alignment = 8 : i64} : (i32) -> !llvm.ptr
%6 = llvm.mlir.constant(50 : i32) : i32
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-constant-indexing-device-region.mlir
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Expand Up @@ -10,7 +10,6 @@ module attributes {omp.is_target_device = true} {
%5 = omp.map.bounds lower_bound(%3 : i64) upper_bound(%4 : i64) extent(%1 : i64) stride(%2 : i64) start_idx(%2 : i64)
%6 = omp.map.info var_ptr(%0 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%5) -> !llvm.ptr {name = "sp"}
omp.target map_entries(%6 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%7 = llvm.mlir.constant(20 : i32) : i32
%8 = llvm.mlir.constant(0 : i64) : i64
%9 = llvm.getelementptr %arg0[0, %8] : (!llvm.ptr, i64) -> !llvm.ptr, !llvm.array<10 x i32>
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-debug.mlir
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Expand Up @@ -6,7 +6,6 @@ module attributes {omp.is_target_device = true} {
%1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
%9 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%9 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%13 = llvm.mlir.constant(1 : i32) : i32
llvm.store %13, %arg0 : i32, !llvm.ptr loc(#loc2)
omp.terminator
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-debug2.mlir
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Expand Up @@ -8,7 +8,6 @@ module attributes {omp.is_target_device = false} {
%1 = llvm.alloca %0 x i32 : (i32) -> !llvm.ptr
%9 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%9 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%13 = llvm.mlir.constant(1 : i32) : i32
llvm.store %13, %arg0 : i32, !llvm.ptr loc(#loc2)
omp.terminator
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-declare-target-llvm-device.mlir
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Expand Up @@ -23,7 +23,6 @@ module attributes {omp.is_target_device = true} {
// CHECK-DAG: br label %omp.region.cont
%map = omp.map.info var_ptr(%0 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%1 = llvm.mlir.constant(1 : i32) : i32
llvm.store %1, %arg0 : i32, !llvm.ptr
omp.terminator
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3 changes: 1 addition & 2 deletions mlir/test/Target/LLVMIR/omptarget-depend-host-only.mlir
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Expand Up @@ -8,8 +8,7 @@ module attributes {omp.is_target_device = false} {
%3 = omp.map.bounds lower_bound(%1 : i64) upper_bound(%0 : i64) extent(%2 : i64) stride(%1 : i64) start_idx(%1 : i64)
%4 = llvm.mlir.addressof @_QFEa : !llvm.ptr
%5 = omp.map.info var_ptr(%4 : !llvm.ptr, !llvm.array<40 x i32>) map_clauses(from) capture(ByRef) bounds(%3) -> !llvm.ptr {name = "a"}
omp.target map_entries(%5 -> %arg0 : !llvm.ptr) depend(taskdependin -> %4 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
omp.target depend(taskdependin -> %4 : !llvm.ptr) map_entries(%5 -> %arg0 : !llvm.ptr) {
%6 = llvm.mlir.constant(100 : index) : i32
llvm.store %6, %arg0 : i32, !llvm.ptr
omp.terminator
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3 changes: 1 addition & 2 deletions mlir/test/Target/LLVMIR/omptarget-depend.mlir
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Expand Up @@ -47,8 +47,7 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%11 = omp.map.info var_ptr(%5 : !llvm.ptr, !llvm.array<40 x i32>) map_clauses(from) capture(ByRef) bounds(%9) -> !llvm.ptr {name = "b"}
%12 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "i"}
%13 = omp.map.info var_ptr(%8 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "n"}
omp.target map_entries(%10 -> %arg0, %11 -> %arg1, %12 -> %arg2, %13 -> %arg3 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) depend(taskdependin -> %4 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr, %arg3: !llvm.ptr):
omp.target depend(taskdependin -> %4 : !llvm.ptr) map_entries(%10 -> %arg0, %11 -> %arg1, %12 -> %arg2, %13 -> %arg3 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) {
%14 = llvm.mlir.constant(0 : index) : i64
%15 = llvm.mlir.constant(10 : i32) : i32
%16 = llvm.mlir.constant(1 : index) : i64
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-fortran-allocatable-types-host.mlir
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Expand Up @@ -43,7 +43,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%32 = omp.map.info var_ptr(%5 : !llvm.ptr, f32) var_ptr_ptr(%31 : !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "scalar"}
%33 = omp.map.info var_ptr(%5 : !llvm.ptr, !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8)>) map_clauses(tofrom) capture(ByRef) members(%32 : [0] : !llvm.ptr) -> !llvm.ptr {name = "scalar"}
omp.target map_entries(%17 -> %arg0, %18 -> %arg1, %29 -> %arg2, %30 -> %arg3, %32 -> %arg4, %33 -> %arg5 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr, %arg3: !llvm.ptr, %arg4: !llvm.ptr, %arg5: !llvm.ptr):
omp.terminator
}
llvm.return
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2 changes: 0 additions & 2 deletions mlir/test/Target/LLVMIR/omptarget-fortran-common-block-host.mlir
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Expand Up @@ -15,7 +15,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%5 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "var1"}
%6 = omp.map.info var_ptr(%4 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "var2"}
omp.target map_entries(%5 -> %arg0, %6 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
omp.terminator
}
llvm.return
Expand All @@ -25,7 +24,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%0 = llvm.mlir.addressof @var_common_ : !llvm.ptr
%1 = omp.map.info var_ptr(%0 : !llvm.ptr, !llvm.array<8 x i8>) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "var_common"}
omp.target map_entries(%1 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
omp.terminator
}
llvm.return
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-nested-record-type-mapping-host.mlir
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Expand Up @@ -23,7 +23,6 @@ llvm.func @_QQmain() {
%11 = omp.map.info var_ptr(%9 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%10) -> !llvm.ptr
%12 = omp.map.info var_ptr(%4 : !llvm.ptr, !llvm.struct<(f32, array<10 x i32>, struct<(f32, i32)>, i32)>) map_clauses(tofrom) capture(ByRef) members(%6, %8, %11 : [3, -1], [2, 1], [1, -1] : !llvm.ptr, !llvm.ptr, !llvm.ptr) -> !llvm.ptr {partial_map = true}
omp.target map_entries(%6 -> %arg0, %8 -> %arg1, %11 -> %arg2, %12 -> %arg3 : !llvm.ptr, !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr, %arg3: !llvm.ptr):
omp.terminator
}
llvm.return
Expand Down
3 changes: 0 additions & 3 deletions mlir/test/Target/LLVMIR/omptarget-parallel-llvm.mlir
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Expand Up @@ -7,7 +7,6 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
llvm.func @_QQmain_omp_outline_1(%arg0: !llvm.ptr) attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
%0 = omp.map.info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
omp.target map_entries(%0 -> %arg2 : !llvm.ptr) {
^bb0(%arg2: !llvm.ptr):
omp.parallel {
%1 = llvm.mlir.constant(1 : i32) : i32
llvm.store %1, %arg2 : i32, !llvm.ptr
Expand All @@ -21,7 +20,6 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
llvm.func @_test_num_threads(%arg0: !llvm.ptr) attributes {omp.declare_target = #omp.declaretarget<device_type = (host), capture_clause = (to)>} {
%0 = omp.map.info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
omp.target map_entries(%0 -> %arg2 : !llvm.ptr) {
^bb0(%arg2: !llvm.ptr):
%1 = llvm.mlir.constant(156 : i32) : i32
omp.parallel num_threads(%1 : i32) {
%2 = llvm.mlir.constant(1 : i32) : i32
Expand All @@ -39,7 +37,6 @@ module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.alloca_memo
%2 = omp.map.info var_ptr(%1 : !llvm.ptr, i32) map_clauses(from) capture(ByRef) -> !llvm.ptr {name = "d"}
%3 = omp.map.info var_ptr(%arg0 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "ifcond"}
omp.target map_entries(%2 -> %arg1, %3 -> %arg2 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg1: !llvm.ptr, %arg2: !llvm.ptr):
%4 = llvm.mlir.constant(10 : i32) : i32
%5 = llvm.load %arg2 : !llvm.ptr -> i32
%6 = llvm.mlir.constant(0 : i64) : i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-record-type-mapping-host.mlir
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Expand Up @@ -22,7 +22,6 @@ llvm.func @_QQmain() {
%11 = omp.map.info var_ptr(%9 : !llvm.ptr, !llvm.array<10 x i32>) map_clauses(tofrom) capture(ByRef) bounds(%10) -> !llvm.ptr
%12 = omp.map.info var_ptr(%4 : !llvm.ptr, !llvm.struct<(f32, array<10 x i32>, i32)>) map_clauses(tofrom) capture(ByRef) members(%7, %11 : [2], [1] : !llvm.ptr, !llvm.ptr) -> !llvm.ptr {partial_map = true}
omp.target map_entries(%7 -> %arg0, %11 -> %arg1, %12 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
omp.terminator
}
llvm.return
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-region-device-llvm.mlir
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Expand Up @@ -16,7 +16,6 @@ module attributes {omp.is_target_device = true} {
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
%8 = llvm.load %arg0 : !llvm.ptr -> i32
%9 = llvm.load %arg1 : !llvm.ptr -> i32
%10 = llvm.add %8, %9 : i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-region-host-only.mlir
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Expand Up @@ -16,7 +16,6 @@ module attributes {omp.is_target_device = false} {
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
%8 = llvm.load %arg0 : !llvm.ptr -> i32
%9 = llvm.load %arg1 : !llvm.ptr -> i32
%10 = llvm.add %8, %9 : i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-region-llvm.mlir
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Expand Up @@ -16,7 +16,6 @@ module attributes {omp.is_target_device = false, omp.target_triples = ["amdgcn-a
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
%8 = llvm.load %arg0 : !llvm.ptr -> i32
%9 = llvm.load %arg1 : !llvm.ptr -> i32
%10 = llvm.add %8, %9 : i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-region-parallel-llvm.mlir
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Expand Up @@ -16,7 +16,6 @@ module attributes {omp.is_target_device = false} {
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries( %map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
omp.parallel {
%8 = llvm.load %arg0 : !llvm.ptr -> i32
%9 = llvm.load %arg1 : !llvm.ptr -> i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/omptarget-target-inside-task.mlir
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Expand Up @@ -17,7 +17,6 @@ module attributes {omp.is_target_device = true, omp.is_gpu = true} {
%map2 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
%map3 = omp.map.info var_ptr(%7 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map1 -> %arg0, %map2 -> %arg1, %map3 -> %arg2 : !llvm.ptr, !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
%8 = llvm.load %arg0 : !llvm.ptr -> i32
%9 = llvm.load %arg1 : !llvm.ptr -> i32
%10 = llvm.add %8, %9 : i32
Expand Down
1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/openmp-data-target-device.mlir
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Expand Up @@ -23,7 +23,6 @@ module attributes { } {
%13 = omp.map.info var_ptr(%10 : !llvm.ptr, !llvm.array<100 x i32>) map_clauses(from) capture(ByRef) bounds(%11) -> !llvm.ptr {name = "int_array"}
%14 = omp.map.info var_ptr(%9 : !llvm.ptr, i32) map_clauses(implicit, exit_release_or_enter_alloc) capture(ByCopy) -> !llvm.ptr {name = "index_"}
omp.target map_entries(%13 -> %arg0, %14 -> %arg1 : !llvm.ptr, !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%15 = llvm.mlir.constant(100 : i32) : i32
%16 = llvm.mlir.constant(1 : i32) : i32
%17 = llvm.mlir.constant(100 : index) : i64
Expand Down
2 changes: 1 addition & 1 deletion mlir/test/Target/LLVMIR/openmp-parallel-reduction-cleanup.mlir
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Expand Up @@ -27,7 +27,7 @@
%0 = llvm.mlir.constant(-1 : i32) : i32
%1 = llvm.mlir.addressof @i : !llvm.ptr
%2 = llvm.mlir.addressof @j : !llvm.ptr
omp.parallel reduction(byref @add_reduction_i_32 %1 -> %arg0 : !llvm.ptr, byref @add_reduction_i_32 %2 -> %arg1 : !llvm.ptr) {
omp.parallel reduction(byref @add_reduction_i_32 %1 -> %arg0, byref @add_reduction_i_32 %2 -> %arg1 : !llvm.ptr, !llvm.ptr) {
llvm.store %0, %arg0 : i32, !llvm.ptr
llvm.store %0, %arg1 : i32, !llvm.ptr
omp.terminator
Expand Down
2 changes: 1 addition & 1 deletion mlir/test/Target/LLVMIR/openmp-parallel-reduction-multiblock.mlir
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Expand Up @@ -22,7 +22,7 @@ omp.declare_reduction @add_reduction_byref_box_heap_i32 : !llvm.ptr init {
omp.yield
}
llvm.func @missordered_blocks_(%arg0: !llvm.ptr {fir.bindc_name = "x"}, %arg1: !llvm.ptr {fir.bindc_name = "y"}) attributes {fir.internal_name = "_QPmissordered_blocks", frame_pointer = #llvm.framePointerKind<"non-leaf">, target_cpu = "generic", target_features = #llvm.target_features<["+outline-atomics", "+v8a", "+fp-armv8", "+neon"]>} {
omp.parallel reduction(byref @add_reduction_byref_box_heap_i32 %arg0 -> %arg2 : !llvm.ptr, byref @add_reduction_byref_box_heap_i32 %arg1 -> %arg3 : !llvm.ptr) {
omp.parallel reduction(byref @add_reduction_byref_box_heap_i32 %arg0 -> %arg2, byref @add_reduction_byref_box_heap_i32 %arg1 -> %arg3 : !llvm.ptr, !llvm.ptr) {
omp.terminator
}
llvm.return
Expand Down
2 changes: 1 addition & 1 deletion mlir/test/Target/LLVMIR/openmp-private.mlir
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Expand Up @@ -35,7 +35,7 @@ llvm.func @parallel_op_1_private(%arg0: !llvm.ptr) {
// CHECK: }

llvm.func @parallel_op_2_privates(%arg0: !llvm.ptr, %arg1: !llvm.ptr) {
omp.parallel private(@x.privatizer %arg0 -> %arg2 : !llvm.ptr, @y.privatizer %arg1 -> %arg3 : !llvm.ptr) {
omp.parallel private(@x.privatizer %arg0 -> %arg2, @y.privatizer %arg1 -> %arg3 : !llvm.ptr, !llvm.ptr) {
%0 = llvm.load %arg2 : !llvm.ptr -> f32
%1 = llvm.load %arg3 : !llvm.ptr -> i32
omp.terminator
Expand Down
3 changes: 1 addition & 2 deletions mlir/test/Target/LLVMIR/openmp-reduction-array-sections.mlir
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Expand Up @@ -44,8 +44,7 @@ llvm.func @sectionsreduction_(%arg0: !llvm.ptr {fir.bindc_name = "x"}) attribute
%2 = llvm.mlir.constant(1 : index) : i64
omp.parallel {
%3 = llvm.alloca %0 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr
omp.sections reduction(byref @add_reduction_byref_box_Uxf32 -> %3 : !llvm.ptr) {
^bb0(%arg1: !llvm.ptr):
omp.sections reduction(byref @add_reduction_byref_box_Uxf32 %3 -> %arg1 : !llvm.ptr) {
omp.section {
^bb0(%arg2: !llvm.ptr):
llvm.br ^bb1(%0 : i64)
Expand Down
2 changes: 1 addition & 1 deletion mlir/test/Target/LLVMIR/openmp-reduction-init-arg.mlir
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Expand Up @@ -24,7 +24,7 @@ module {
%87 = llvm.alloca %86 x !llvm.struct<(ptr, i64, i32, i8, i8, i8, i8, array<1 x array<3 x i64>>)> : (i64) -> !llvm.ptr
// test multiple reduction variables to ensure they don't intefere with eachother
// when inlining the reduction init region multiple times
omp.parallel reduction(byref @add_reduction_byref_box_Uxf64 %84 -> %arg3 : !llvm.ptr, byref @add_reduction_byref_box_Uxf64 %87 -> %arg4 : !llvm.ptr) {
omp.parallel reduction(byref @add_reduction_byref_box_Uxf64 %84 -> %arg3, byref @add_reduction_byref_box_Uxf64 %87 -> %arg4 : !llvm.ptr, !llvm.ptr) {
omp.terminator
}
llvm.return
Expand Down
3 changes: 1 addition & 2 deletions mlir/test/Target/LLVMIR/openmp-reduction-sections.mlir
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Expand Up @@ -13,8 +13,7 @@ llvm.func @sections_(%arg0: !llvm.ptr {fir.bindc_name = "x"}) attributes {fir.in
%0 = llvm.mlir.constant(2.000000e+00 : f32) : f32
%1 = llvm.mlir.constant(1.000000e+00 : f32) : f32
omp.parallel {
omp.sections reduction(@add_reduction_f32 -> %arg0 : !llvm.ptr) {
^bb0(%arg1: !llvm.ptr):
omp.sections reduction(@add_reduction_f32 %arg0 -> %arg1 : !llvm.ptr) {
omp.section {
^bb0(%arg2: !llvm.ptr):
%2 = llvm.load %arg2 : !llvm.ptr -> f32
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6 changes: 3 additions & 3 deletions mlir/test/Target/LLVMIR/openmp-reduction.mlir
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Expand Up @@ -107,7 +107,7 @@ llvm.func @reuse_declaration(%lb : i64, %ub : i64, %step : i64) {
%0 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
%2 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
omp.parallel {
omp.wsloop reduction(@add_f32 %0 -> %prv0 : !llvm.ptr, @add_f32 %2 -> %prv1 : !llvm.ptr) {
omp.wsloop reduction(@add_f32 %0 -> %prv0, @add_f32 %2 -> %prv1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%iv) : i64 = (%lb) to (%ub) step (%step) {
%1 = llvm.mlir.constant(2.0 : f32) : f32
%3 = llvm.load %prv0 : !llvm.ptr -> f32
Expand Down Expand Up @@ -199,7 +199,7 @@ llvm.func @missing_omp_reduction(%lb : i64, %ub : i64, %step : i64) {
%0 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
%2 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
omp.parallel {
omp.wsloop reduction(@add_f32 %0 -> %prv0 : !llvm.ptr, @add_f32 %2 -> %prv1 : !llvm.ptr) {
omp.wsloop reduction(@add_f32 %0 -> %prv0, @add_f32 %2 -> %prv1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%iv) : i64 = (%lb) to (%ub) step (%step) {
%1 = llvm.mlir.constant(2.0 : f32) : f32
%3 = llvm.load %prv0 : !llvm.ptr -> f32
Expand Down Expand Up @@ -382,7 +382,7 @@ llvm.func @no_atomic(%lb : i64, %ub : i64, %step : i64) {
%0 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
%2 = llvm.alloca %c1 x i32 : (i32) -> !llvm.ptr
omp.parallel {
omp.wsloop reduction(@add_f32 %0 -> %prv0 : !llvm.ptr, @mul_f32 %2 -> %prv1 : !llvm.ptr) {
omp.wsloop reduction(@add_f32 %0 -> %prv0, @mul_f32 %2 -> %prv1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%iv) : i64 = (%lb) to (%ub) step (%step) {
%1 = llvm.mlir.constant(2.0 : f32) : f32
%3 = llvm.load %prv0 : !llvm.ptr -> f32
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5 changes: 1 addition & 4 deletions mlir/test/Target/LLVMIR/openmp-target-private.mlir
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Expand Up @@ -14,7 +14,6 @@ llvm.func @target_map_single_private() attributes {fir.internal_name = "_QPtarge
llvm.store %4, %3 : i32, !llvm.ptr
%5 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(to) capture(ByRef) -> !llvm.ptr {name = "a"}
omp.target map_entries(%5 -> %arg0 : !llvm.ptr) private(@simple_var.privatizer %1 -> %arg1 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr):
%6 = llvm.mlir.constant(10 : i32) : i32
%7 = llvm.load %arg0 : !llvm.ptr -> i32
%8 = llvm.add %7, %6 : i32
Expand Down Expand Up @@ -43,8 +42,7 @@ llvm.func @target_map_2_privates() attributes {fir.internal_name = "_QPtarget_ma
%6 = llvm.mlir.constant(2 : i32) : i32
llvm.store %6, %5 : i32, !llvm.ptr
%7 = omp.map.info var_ptr(%5 : !llvm.ptr, i32) map_clauses(to) capture(ByRef) -> !llvm.ptr {name = "a"}
omp.target map_entries(%7 -> %arg0 : !llvm.ptr) private(@simple_var.privatizer %1 -> %arg1 : !llvm.ptr, @n.privatizer %3 -> %arg2 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr, %arg1: !llvm.ptr, %arg2: !llvm.ptr):
omp.target map_entries(%7 -> %arg0 : !llvm.ptr) private(@simple_var.privatizer %1 -> %arg1, @n.privatizer %3 -> %arg2 : !llvm.ptr, !llvm.ptr) {
%8 = llvm.mlir.constant(1.100000e+01 : f32) : f32
%9 = llvm.mlir.constant(10 : i32) : i32
%10 = llvm.load %arg0 : !llvm.ptr -> i32
Expand Down Expand Up @@ -86,7 +84,6 @@ omp.private {type = private} @multi_block.privatizer : !llvm.ptr alloc {

llvm.func @target_op_private_multi_block(%arg0: !llvm.ptr) {
omp.target private(@multi_block.privatizer %arg0 -> %arg2 : !llvm.ptr) {
^bb0(%arg2: !llvm.ptr):
%0 = llvm.load %arg2 : !llvm.ptr -> f32
omp.terminator
}
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3 changes: 1 addition & 2 deletions mlir/test/Target/LLVMIR/openmp-target-use-device-nested.mlir
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Expand Up @@ -25,8 +25,7 @@ module attributes {omp.is_target_device = true } {
omp.target_data use_device_ptr(%map : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%map1 = omp.map.info var_ptr(%arg0 : !llvm.ptr, !llvm.ptr) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = ""}
omp.target map_entries(%map1 : !llvm.ptr){
^bb0(%arg1: !llvm.ptr):
omp.target map_entries(%map1 -> %arg1 : !llvm.ptr){
%1 = llvm.mlir.constant(999 : i32) : i32
%2 = llvm.load %arg1 : !llvm.ptr -> !llvm.ptr
llvm.store %1, %2 : i32, !llvm.ptr
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1 change: 0 additions & 1 deletion mlir/test/Target/LLVMIR/openmp-task-target-device.mlir
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Original file line number Diff line number Diff line change
Expand Up @@ -15,7 +15,6 @@ module attributes {omp.is_target_device = true } {
}
%4 = omp.map.info var_ptr(%3 : !llvm.ptr, i32) map_clauses(tofrom) capture(ByRef) -> !llvm.ptr {name = "a"}
omp.target map_entries(%4 -> %arg0 : !llvm.ptr) {
^bb0(%arg0: !llvm.ptr):
%5 = llvm.mlir.constant(5 : i32) : i32
%6 = llvm.load %arg0 : !llvm.ptr -> i32
%7 = llvm.add %6, %5 : i32
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2 changes: 1 addition & 1 deletion mlir/test/Target/LLVMIR/openmp-wsloop-reduction-cleanup.mlir
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Expand Up @@ -30,7 +30,7 @@
%loop_ub = llvm.mlir.constant(9 : i32) : i32
%loop_lb = llvm.mlir.constant(0 : i32) : i32
%loop_step = llvm.mlir.constant(1 : i32) : i32
omp.wsloop reduction(byref @add_reduction_i_32 %1 -> %arg0 : !llvm.ptr, byref @add_reduction_i_32 %2 -> %arg1 : !llvm.ptr) {
omp.wsloop reduction(byref @add_reduction_i_32 %1 -> %arg0, byref @add_reduction_i_32 %2 -> %arg1 : !llvm.ptr, !llvm.ptr) {
omp.loop_nest (%loop_cnt) : i32 = (%loop_lb) to (%loop_ub) inclusive step (%loop_step) {
llvm.store %0, %arg0 : i32, !llvm.ptr
llvm.store %0, %arg1 : i32, !llvm.ptr
Expand Down